CN101252347B - High precision matching circuit based on digital modulation - Google Patents
High precision matching circuit based on digital modulation Download PDFInfo
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- CN101252347B CN101252347B CN2008100200799A CN200810020079A CN101252347B CN 101252347 B CN101252347 B CN 101252347B CN 2008100200799 A CN2008100200799 A CN 2008100200799A CN 200810020079 A CN200810020079 A CN 200810020079A CN 101252347 B CN101252347 B CN 101252347B
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Abstract
The invention discloses a high precision matching circuit based on digital modulation, comprising circuit elements which are correspondingly connected through a N*N switch array, and output terminals; a N*N register array switched by the N*N switch array is modulated by a SIGMA-DELTA modulation model. The circuit elements which require image matching are dynamically switched through SIGMA-DELTA modulation, thus obtaining average value of the circuit elements in the time domain and reaching high precision image matching on the output terminals of the circuit. The matching circuit can effectively restrain electromagnetic interference and eliminate low-frequency noise caused by the circuit elements.
Description
Technical field
The present invention relates to a kind of high precision matching circuit based on digital modulation.
Background technology
The basic skills that designs at present the circuit devcie of mirror image coupling technically has: the area that increases device; On physical layout, adopt centrosymmetric layout type; Around the circuit devcie of mirror image coupling, increase identical redundant device; Adopt laser trimming etc.But no matter be the area that increases device, or adopt centrosymmetric layout type and around circuit devcie, increase identical redundant device, all can't eliminate fully because the asymmetry of each circuit element that technique change produces.And adopt laser trimming not only still can't eliminate the asymmetry of circuit element fully, also can increase the cost and the complexity of test technology flow process.
Summary of the invention
The purpose of this invention is to provide a kind of high precision matching circuit based on digital modulation, adopt the mode of SIGMA-DELTA modulation that the circuit devcie that needs the mirror image coupling is dynamically switched, thereby on time domain, obtain the mean value of each circuit devcie, on each output of circuit, reach height mirror image coupling accurately.
Technical scheme of the present invention is: a kind of high precision matching circuit based on digital modulation, described match circuit comprises N output and N circuit devcie, the order correspondence is connected with N * N switch arrays between a described N output and N the circuit devcie, described match circuit also comprises N * N register array and the SIGMA-DELTA modulation module that the data in N * N register array are modulated, described SIGMA-DELTA modulation module and N * N register array is provided with input end of clock, described input end of clock is connected with the clock of the modulation signal output frequency of the control modulating frequency of described SIGMA-DELTA modulation module and N * N register array, the modulation signal output of described N * N register array is connected with the switch control input end of N * N switch arrays, and each capable listing with each that described N * N register array modulation signal is controlled described N * N switch arrays has at every turn and only have a switch closure.
The further technical scheme of the present invention is: a kind of high precision matching circuit based on digital modulation, described match circuit comprises N output and N circuit devcie, the order correspondence is connected with N * N switch arrays between a described N output and N the circuit devcie, described match circuit also comprises N * N register array and the SIGMA-DELTA modulation module that the data in N * N register array are modulated, described SIGMA-DELTA modulation module and N * N register array is provided with input end of clock, described input end of clock is connected with the clock of the modulation signal output frequency of the control modulating frequency of described SIGMA-DELTA modulation module and N * N register array, the modulation signal output of described N * N register array is connected with the switch control input end of N * N switch arrays, and each capable listing with each that described N * N register array modulation signal is controlled described N * N switch arrays has at every turn and only have a switch closure; Described SIGMA-DELTA modulation module is that 0 of adjustable exponent number arrives M rank SIGMA-DELTA modulation module, wherein M is less than N, described 0 to M rank SIGMA-DELTA modulation module is provided with the exponent number signal input end, and described exponent number control signal is imported by the exponent number signal input end; Data in described N * N register array be N rank unit matrixs through line feed with change the N rank square formation that rank transformation obtains, described SIGMA-DELTA modulation module enters a new line and changes rank transformation described N rank square formation being modulated to of data in N * N register array.
Advantage of the present invention is:
1. the present invention adopts the mode of SIGMA-DELTA modulation that the circuit devcie that needs the mirror image coupling is dynamically switched, can be in the asymmetry of eliminating fully on the time domain between each circuit devcie.
2. the SIGMA-DELTA of high-order of the present invention modulation will effectively suppress electromagnetic interference (EMI).
3. dynamic modulation mode of the present invention can effectively be eliminated the low-frequency noise that circuit devcie produces, thereby improves the performance index of circuit.
4. applied range of the present invention can be used for the high performance circuit design of the complete mirror image coupling of any needs, all can effectively modulate the symmetry calibration to all kinds of devices.
Description of drawings
Fig. 1 is a system block diagram of the present invention.
Wherein: 1N * N switch arrays; 2 outputs; 3 circuit devcies; The 4SIGMA-DELTA modulation module; 5N * N register array.
Embodiment
Below in conjunction with drawings and Examples the present invention is further described:
Embodiment: as shown in Figure 1, a kind of high precision matching circuit based on digital modulation, described match circuit comprise N output 2 and N circuit devcie 3 that needs the mirror image coupling, and described circuit devcie 3 can be resistance, electric capacity, CMOS pipe or constant-current source etc.; The order correspondence is connected with N * N switch arrays 1 between a described N output 2 and N the circuit devcie 3, described match circuit also comprises N * N register array 5 and the SIGMA-DELTA modulation module 4 that the data in N * N register array 5 are modulated, described SIGMA-DELTA modulation module 4 and N * N register array 5 is provided with input end of clock, described input end of clock is connected with the clock of the modulation signal output frequency of the control modulating frequency of described SIGMA-DELTA modulation module 4 and N * N register array 5, the modulation signal output of described N * N register array 5 is connected with the switch control input end of N * N switch arrays 1, each capable listing with each that described N * N register array 5 modulation signals are controlled described N * N switch arrays 1 has at every turn and only has a switch closure, has so just guaranteed that each output 2 only is communicated with a circuit devcie 3 at every turn.
Described SIGMA-DELTA modulation module 4 is that 0 of adjustable exponent number arrives M rank SIGMA-DELTA modulation module, wherein M is the positive integer less than N, described 0 to M rank SIGMA-DELTA modulation module is provided with the exponent number signal input end, described exponent number control signal Mode＜M:0〉import by the exponent number signal input end, Mode＜M:0〉can send by the logic control element in chip or the system, be used for setting the exponent number of SIGMA-DELTA modulation, its modulation system can be the nothing modulation on 0 rank as required, the linear averaging modulation on 1 rank, or 2 rank and higher high order modulation.
Data in described N * N register array 5 be N rank unit matrixs through line feed with change the N rank square formation that rank transformation obtains, being modulated to of data entered a new line and changed rank transformation described N rank square formation in 4 couples of N of described SIGMA-DELTA modulation module * N register array 5.
As shown in the figure, during work, by exponent number control signal Mode＜M:0〉set the order of modulation of SIGMA-DELTA modulation module 4, SIGMA-DELTA modulation module 4 is along with clock signal clk produces modulation signal X＜N:1 then〉and Y＜N:1, described modulation signal Y＜N:1〉respectively the N rank square formation in the NxN register matrix is carried out the matrix line feed and changed the row operation with X＜N:1.According to the difference of algorithm, can enter a new line or change the row operation respectively, the row that also can enter a new line carry out together; Line feed or change the method for row also can be different according to the difference of algorithm, as: first row (row) is down order exchange successively, or first row (row) and the capable exchange of N, second row (row) and N-1 capable (row) exchange or the like, guarantee that each row of described N rank square formation and each shows and only have one " 1 " to exist, and behind certain hour, each circuit devcie 3 is almost equal with the probability that any output 2 is connected.
Then in the line feed of experiencing certain number of times and after changing the row operation (described number of times can be differentiated with the number of times of N * clock signal clk that N register array 5 receives), data in N * N register array 5 will be by modulation signal ctrl[N:1, N:1] N * N switch arrays 1 are carried out the open and close operation, circuit devcie Dev＜1 that dynamically each is needed the mirror image coupling 〉, Dev＜2〉... Dev＜N〉be connected to one to one on the output out one-dimensional array.
The last mean value that obtains each circuit devcie 3 on time domain reaches height mirror image coupling accurately on each output 2 of circuit.
The present invention adopts the mode of SIGMA-DELTA modulation that the circuit devcie that needs the mirror image coupling is dynamically switched, can be in the asymmetry of eliminating fully on the time domain between each circuit devcie; The SIGMA-DELTA modulation of high-order of the present invention will effectively suppress electromagnetic interference (EMI); Dynamic modulation mode of the present invention can effectively be eliminated the low-frequency noise that circuit devcie produces, thereby improves the performance index of circuit; Applied range of the present invention can be used for the high performance circuit design of the complete mirror image coupling of any needs, all can effectively modulate the symmetry calibration to all kinds of devices.
Claims (3)
1. high precision matching circuit based on digital modulation, it is characterized in that: described match circuit comprises that N output (2) is identical with N type, the circuit devcie (3) that parameter is approaching, the order correspondence is connected with N * N switch arrays (1) between a described N output (2) and N the circuit devcie (3), described match circuit also comprises N * N register array (5) and the SIGMA-DELTA modulation module (4) that the data in N * N register array (5) are modulated, described SIGMA-DELTA modulation module (4) and N * N register array (5) is provided with input end of clock, described input end of clock is connected with the modulating frequency of the described SIGMA-DELTA modulation module of control (4) and the clock of the modulation signal output frequency of N * N register array (5), the modulation signal output of described N * N register array (5) is connected with the switch control input end of N * N switch arrays (1), and each capable listing with each that described N * N register array (5) modulation signal is controlled described N * N switch arrays (1) has at every turn and only have a switch closure.
2. the high precision matching circuit based on digital modulation according to claim 1, it is characterized in that: described SIGMA-DELTA modulation module (4) arrives M rank SIGMA-DELTA modulation module for 0 of adjustable exponent number, wherein M is less than N, described 0 to M rank SIGMA-DELTA modulation module is provided with the exponent number signal input end, and described exponent number control signal is imported by the exponent number signal input end.
3. the high precision matching circuit based on digital modulation according to claim 1, it is characterized in that: the data in described N * N register array (5) be N rank unit matrixs through line feed with change the N rank square formation that rank transformation obtains, described SIGMA-DELTA modulation module (4) enters a new line and changes rank transformation described N rank square formation being modulated to of data in N * N register array (5).
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| CN2008100200799A CN101252347B (en) | 2008-03-25 | 2008-03-25 | High precision matching circuit based on digital modulation |
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| CN2008100200799A CN101252347B (en) | 2008-03-25 | 2008-03-25 | High precision matching circuit based on digital modulation |
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| CN101252347B true CN101252347B (en) | 2010-04-14 |
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| CN102339826B (en) * | 2011-11-01 | 2013-01-16 | 矽力杰半导体技术(杭州)有限公司 | Device-matched IC (integrated circuit) and design method thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040066240A1 (en) * | 2001-04-25 | 2004-04-08 | Staszewski Robert B. | Frequency synthesizer with digitally-controlled oscillator |
| JP2005026998A (en) * | 2003-07-02 | 2005-01-27 | Renesas Technology Corp | Semiconductor integrated circuit incorporating bit conversion circuit or shift circuit and a/d conversion circuit, and semiconductor integrated circuit for communication |
| US7058463B1 (en) * | 2000-12-29 | 2006-06-06 | Nokia Corporation | Method and apparatus for implementing a class D driver and speaker system |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7058463B1 (en) * | 2000-12-29 | 2006-06-06 | Nokia Corporation | Method and apparatus for implementing a class D driver and speaker system |
| US20040066240A1 (en) * | 2001-04-25 | 2004-04-08 | Staszewski Robert B. | Frequency synthesizer with digitally-controlled oscillator |
| JP2005026998A (en) * | 2003-07-02 | 2005-01-27 | Renesas Technology Corp | Semiconductor integrated circuit incorporating bit conversion circuit or shift circuit and a/d conversion circuit, and semiconductor integrated circuit for communication |
Non-Patent Citations (2)
| Title |
|---|
| R.T. Baird.Linearity Enhancement of Multibit Delta Sigma A/D and D/AConverters Using Data Weighted Averaging.IEEE Transactions on Circuits and Systems-II: analog and digital signal processing42 12.1995,42(12),753-762. |
| R.T. Baird.Linearity Enhancement of Multibit Delta Sigma A/D and D/AConverters Using Data Weighted Averaging.IEEE Transactions on Circuits and Systems-II: analog and digital signal processing42 12.1995,42(12),753-762. * |
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