CN101248635B - Digital baseband process control device and method for real-time control of digital baseband - Google Patents
Digital baseband process control device and method for real-time control of digital baseband Download PDFInfo
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Abstract
A digital baseband processing controller, which is used in a digital baseband processing system to real-time control digital baseband, includes: a counter unit, for providing basic time and frame count for said digital baseband processing system; a register unit connected to said counter unit and an event processing unit, for deploying control information required by said counter unit and event processing unit ,and preserving status information and/ or data generated in course of event processing unit executing event; the event processing unit including event memory for preserving event microcode, operation and control module. according to said count value and control information, at specified time the operation and control module begin reading said event microcode, carry out decoding and execute corresponding event, complete control on other hardware module operation in system. Present invention could realize real-time control for digital baseband, and does not need the cost of DSP or the increase of DSP work frequency.
Description
Technical field
The present invention relates to the communication system digital baseband and handle, relate in particular to control device and implementation method that a kind of digital baseband is handled.
Background technology
Finally all can be mapped to digital baseband to Signal Processing in the communication system and handle, it is the core of communication process that digital baseband is handled.In digital baseband is handled, generally include modulation, channel coding/decoding etc.For example:
Digital baseband among the WCDMA is handled major function and is comprised:
Transmitter side: the data that send are carried out chnnel coding (turbo coding and convolutional encoding), interweave, scrambling adds expansion, QPSK (quaternary PSK) modulation etc.
Receiver side: the data that receive are carried out the QPSK demodulation, descrambling and de-spreading, deinterleaving, channel-decoding (turbo decoding and viterbi decoding) etc.
Digital baseband in the ADSL Modem is handled and is mainly comprised:
Transmitter side: carry out framing to sending data, constellation mapping, IFFT (inverse fast fourier transform) finally exports by twisted-pair feeder.
Receiver side: carry out FFT (fast fourier transform) to receiving data, constellation is separated mapping, separates frame.
The implementation that present digital baseband is handled all is DSP (Digital Signal Processing)+hardware mode.In this implementation, use DSP to finish to the bottom layer driving of hardware with to the controlled function of hardware, if DSP resource abundance also can use DSP to finish the function that some hardware implement more complicated, DSP also is responsible for the processing of protocol stack simultaneously.Hardware is mainly used to realize some function singlenesses, the functional module that operand is big.
In the digital baseband of WCDMA was handled, descrambling and de-spreading/scrambling added expansion, deinterleaving/interweave, and channel-decoding/coding is all realized with hardware.During the ADSL Modem digital baseband is handled, FFT/IFFT, the RS encoding and decoding, constellation is separated mapping/constellation mapping and is all realized with hardware.
Realize some frequent uses with hardware, the functional module that operand is bigger can reduce the expense of DSP, reduces the operating frequency of DSP, reduces the power consumption of system.This is even more important for WCDMA terminal (userequipment).In the DSP+ of band processing system hardware implementation mode, because DSP will carry out the processing of protocol stack and the processing of other some softwares, real-time to hardware controls is not fine, cause the decreased performance of system, if, increased the power consumption of chip again by improving the real-time that the DSP frequency satisfies hardware controls.
Summary of the invention
The technical problem to be solved in the present invention provides the control device that a kind of digital baseband is handled, and can realize the real-time control to digital baseband.
In order to solve the problems of the technologies described above, the invention provides the control device that a kind of digital baseband is handled, be applied to digital baseband processing system, it is characterized in that, comprise counter unit, register cell and event handling unit, wherein:
Described counter unit is used to described digital baseband processing system that basic time and frame count are provided, and count value is sent into described event handling unit in real time;
Described register cell, be connected with the event handling unit with described counter unit, comprise a plurality of registers group, be used to dispose the required control information of described counter unit and event handling unit, and preserve the event handling unit and carry out state information and/or the data that produce in the event procedure.
Described event handling unit, comprise event memory and computing and control module, preserve the incident microcode of configuration in the described event memory, described computing and control module are used for according to described count value and control information, begin to read described incident microcode in the moment of appointment, decipher and carry out events corresponding, finish control other hardware module operation in the system;
Further, above-mentioned control device also can have following characteristics: described counter unit comprises counter and frame counter basic time, the count cycle of counter described basic time is the duration of a Frame of described digital baseband processing system, described frame counter carries out frame count according to the count cycle of described basic time of counter, and the count value of basic time and/or frame count is sent into described event handling unit in real time.
Further, above-mentioned control device also can have following characteristics: comprise two incident microcode table table0 and table1 in the described event memory, these two tables adopt ping-pong structure, during incident microcode among the table table0, external module can carry out read-write operation to the incident microcode among the table1.
Further, above-mentioned control device also can have following characteristics: the registers group in the described register cell comprises the event table control register, be used to be provided with the event handling unit and want the current incident microcode table that will read, and/or be provided with whether needing to switch to another event table.
Further, above-mentioned control device also can have following characteristics: the registers group in the described register cell comprises: the frame initial registers is used to dispose the initial value of frame counter; The frame threshold register is used to dispose the threshold value of frame counter, is configured as the maximum frame number of system; Basic time, initial registers was used to dispose the initial value of counter basic time; And basic time threshold register, be used to dispose the threshold value of counter basic time.
Further, above-mentioned control device also can have following characteristics: described incident microcode comprises the software event microcode; Described register cell also comprises digital signal processor DSP interface module and interruption controls module, described dsp interface module is used to described control device that interface with DSP is provided, and described interruption controls module is used for sending interrupt signal according to the interruption that described event handling unit produces to described DSP.
Further, above-mentioned control device also can have following characteristics: the registers group in the described register cell comprises a plurality of interrupt status registers, each interrupt status register is corresponding with an interrupt signal, have only an interrupt line between described interruption controls module and the DSP, described DSP can be by described these interrupt status registers of dsp interface module accesses.
Further, above-mentioned control device also can have following characteristics: the registers group in the described register cell comprises one or more general registers, is used for storing the variable of incident microcode.
Further, above-mentioned control device also can have following characteristics: described counter unit comprises that the counter that is used for the transmitter side counting sends submodule and is used for the counter reception submodule that receiver side is counted; And comprise in the described event handling unit sending the event handling subelement and receiving the event handling subelement that these two subelements include described event memory and computing and control module.
The present invention also will provide a kind of the realization can finish the real-time control to digital baseband not increasing the DSP resource and not improving under the situation of DSP frequency to the method for the real-time control of digital baseband.
In order to solve the problems of the technologies described above, to the invention provides a kind of the realization method of the real-time control of digital baseband be may further comprise the steps:
(a) control device that has counter, event memory, computing and control module and registers group at least that links to each other with hardware module in the system is set in digital baseband processing system, this control device can be according to configuration information to frame count, storage incident microcode and execution incident;
(b) controlled function of described as required control device realization in digital baseband is handled, determine the opportunity and the input and output control signal thereof of this device execution incident, writing the events corresponding microcode according to the microcode grammer writes in the described memory, and dispose in the described registers group according to the frame structure of system, make that described counter can be to the frame count in the system;
(c) according to count value and control information, described computing and control module are read the incident microcode in the moment of appointment from described holder, decipher and the execution incident, produce the output control signal to other hardware module in the system;
(d) after the incident microcode is complete, return step (c).
Further, said method also can have following characteristics: the incident microcode in the described memory is stored in respectively in two microcode tables that adopt ping-pong structure; Described step (b) also is provided with the current microcode table that will read and whether needs to switch to another microcode table by the configuration to described registers group; Described step (c) is to begin to read the incident microcode at frame boundaries; In the described step (d), after the incident microcode of a microcode table is complete, judge whether to need to switch the microcode table earlier, if, when beginning, next frame switches to new microcode table, and return step (c), otherwise directly return step (c).
Further, said method also can have following characteristics: in the described step (a), described control device is linked to each other with DSP in the system by a digital signal processor DSP interface, is by described dsp interface writing events microcode in the event store of described control device in the described step (b).
Further, said method also can have following characteristics: in the described step (a), also described control device is linked to each other with described DSP by one or more interrupt line, the microcode that comprises software event in the incident microcode of writing in the described step (b), in the described step (c) when carrying out described software event, described control device is notified described DSP by described interrupt signal, triggers described DSP and carries out corresponding event.
Further, said method also can have following characteristics: in the described step (a), described control device is linked to each other with described DSP by an interrupt line, comprise a plurality of interrupt status registers in the described registers group, elder generation was with the interrupt status register set of correspondence when the execution incident produced internal interrupt in the described step (c), produce an interrupt signal again to described DSP, which interrupt event what described DSP determined generation by the value of inquiry interrupt status register is.
Further, said method also can have following characteristics: described counter comprise one basic time a counter and frame counter, in the described step (b) by to the configuration of register with basic time counter count cycle be made as the duration of a frame, the threshold value of frame counter is made as maximum frame number in the system.
Further, said method also can have following characteristics: the control device that described step (a) is provided with is divided into the identical transmission of function and receives two parts.
Further, said method also can have following characteristics: comprise following several order in the described incident microcode: condition and condition the finish command, do-nothing operation, fill order and the finish command that signal is operated, described fill order comprises set, reset, trigger, interrupt, add 1, subtract 1, zero clearing, a kind of or combination in any in the free time, and the signal in described condition order and the fill order comprises one or more in described rolling counters forward signal, interrupt signal, input control signal, o controller, the general register signal.
Further, said method also can have following characteristics: described step (a) is also with the output signal of other module in the described system input control signal as described control device; In the described step (c), described computing and control module are also carried out this input control signal when the incident of execution as incident Rule of judgment.
The control device that digital baseband of the present invention is handled is realized by hardware, and is simple in structure, flexible.Can trigger hardware event, improve response speed, reduce the expense of DSP hardware; Can trigger software event again, can be used, not increase the DSP resource and do not improving under the situation of DSP frequency, realize real-time control digital baseband with dsp software.Simultaneously, in the implementation method of the present invention, can carry out software programming to microcode, very big raising the flexibility of control device.
Summary of drawings
Fig. 1 is the structural representation of digital baseband processing control apparatus in the embodiment of the invention;
Fig. 2 is the structural representation of counter unit in the embodiment of the invention;
Fig. 3 is the structural representation of event handling unit in the embodiment of the invention;
Fig. 4 is the structural representation of register cell in the embodiment of the invention;
Fig. 5 is the schematic diagram of incident microcode in the embodiment of the invention;
The control flow chart of control device in Fig. 6 embodiment of the invention;
Fig. 7 is the structured flowchart of WCDMA base band receiving system in application example of the present invention.
Preferred forms of the present invention
Be treated to example with the WCDMA digital baseband below, technical solution of the present invention done further described in detail in conjunction with the accompanying drawings.
The structure of the control device that digital baseband is handled in the present embodiment is made of three parts as shown in Figure 1: counter unit, event handling unit and register cell, wherein:
Counter unit is used to the transmitter side of digital baseband processing system and receiver side that basic time (timebase) and frame count (frame) are provided, and its structure is further divided into following two submodules as shown in Figure 2:
Counter sends submodule, is used to the transmitter side of digital baseband processing system that the count value that needs is provided, and this transmission submodule comprises two counters: transmit frame counter tx_frame and transmission counter tx_timebase basic time.
Counter receives submodule, is used to the receiver side of digital baseband processing system that counter is provided, and this reception submodule comprises two counters: received frame counter rx_frame and reception counter rx_timebase basic time.
The bit wide of two frame counter * _ frame is 12bits, and two basic times, counter * _ timebase represented the time interval of every frame, and bit wide is 20bits.The initial value of all counters and threshold value all can be configured by register cell.All counters of counter unit (comprise tx_frame, tx_timebase, rx_frame, instantaneous value rx_timebase) will be sent in the event handling unit.Each timebase counter count down to the timebase threshold value from the timebase initial value, and timebase counter reset during to the timebase threshold value restarts counting; The frame counter adds 1 simultaneously, when the frame rolling counters forward arrives the frame threshold value, also will reset, again counting.
The event handling unit, be used for incident microcode according to storage, in the multi-form incident of the time trigger of appointment, finish control to hardware module, its structure as shown in Figure 3, further comprise the transmission event handling subelement of transmitter side and the reception event handling subelement of receiver side, above-mentioned two subelements comprise following two modules again respectively:
The event memory module is used to be stored in event microcode under the rated condition, and incident is divided into hardware event and software event, the corresponding actions of hardware event control hardware, and software event is by the operation of DSP down trigger dsp software.Above-mentioned incident writes this event memory module with the form of microcode.This event memory module comprises two incident microcode table: table0 (table 0) and table1 (table 1).These two tables adopt ping-pong structure, when moving the incident microcode among the table0, DSP can carry out read-write operation to the incident microcode among the table1, like this, can be under the situation that does not influence the operation of incident microcode, finish down the configuration of the incident microcode under a kind of situation, when needs enter down a kind of configuration, get final product at frame boundaries handover event microcode table.Each incident microcode table can be stored 128 incident microcodes.
Computing and control module, be used for finishing automatically read (the reading microcode) of incident microcode from the incident memory module, decipher (the microcode implication will be introduced in detail) according to the sign indicating number implication in implementation method, carry out and trigger relevant hardware incident or software event).
Register cell is used to dispose the required control information of described counter unit and event handling unit, and preserves the event handling unit and carry out state information and/or the data that produce in the event procedure.Interface with DSP is provided simultaneously, and its structure comprises registers group module, interruption controls module and dsp interface module as shown in Figure 4.Wherein:
The registers group module is used to define the register of control device, and it further comprises following register:
The frame initial registers is used to dispose the initial value of frame counter * _ frame;
Basic time, initial registers was used to dispose the initial value of counter * _ timebase basic time;
The frame threshold register is used to dispose the threshold value of frame counter * _ frame;
Basic time, threshold register was used to dispose the threshold value of counter * _ timebase basic time;
Interrupt status register and interrupt mask register are used for four interruptions (corresponding transmitter side and receiver side respectively have two interruptions) the interrupt status position and interrupt mask bit separately of memory control device;
The event table control register is used for selecting the current event table that will move (table0 or table1) for the event handling unit, and judging whether to switch to another event table (as switching to table1 from table0, perhaps opposite) by different values is set;
General register is used for storing the variable of incident microcode.Variable in corresponding the incident microcode always has 6 general registers, 3 transmission general registers, 3 reception general registers.These general registers both can be visited by DSP, again can be by the event handling unit access.
The interruption controls module, be used for when receiving internal interrupt signal, producing the interrupt signal of DSP, control device has four internal interrupt signals, each two of transmitter side and receiver sides, but have only an interrupt line to be connected with DSP, thereby these four shared external interrupt of interruption need, after central stopping pregnancy is given birth to, what be determined to that the end produces by DSP inquiry interrupt status register is which interrupts, then according to the software event of down trigger correspondence.
The dsp interface module is used to provide the interface of control device and DSP, and this interface is associated with concrete DSP, determines used dsp interface according to the DSP that selects;
Introduced the basic structure of present embodiment digital baseband processing control apparatus above.Utilize this control device to be implemented in control in the WCDMA baseband system, at first will carry out the design of incident microcode according to the microcode grammer.The microcode grammer of present embodiment is as mentioned below, but has multiple different regulation with regard to grammer, and the present invention does not limit this.
Incident microcode bit wide in the event table is 42bits, 5 kinds of incident microcodes is arranged, as shown in Figure 5.The IF order is arranged, ENDIF order, nop command, act command and END command.
Condition (IF): by command id subdomain (4bits), signal subdomain (4bits), condition subdomain (2bits) and several immediately subdomain (32bits) are formed.Signal in the condition order in the signal subdomain and the signal unified addressing in the act command, use (these signals will be described in detail below).The condition subdomain has four kinds of condition situations: equal (00), be not equal to (01), greater than (10) with less than (11).The condition order as shown in Figure 5, command id is 0000.
Condition finishes (ENDIF): it and IF order are used, if promptly the IF condition satisfies, then the incident microcode between IF and the ENDIF order all is performed, if condition does not satisfy, then begin to carry out from the later incident microcode of ENDIF, form as shown in Figure 5, command id is 0001.
Do-nothing operation (NOP): be illustrated in a period of time, do not carry out any operation, form as shown in Figure 5, the time that do-nothing operation continues is determined the time span of expression counter timing by number immediately.After rolling counters forward arrived the time span that number is determined immediately, the do-nothing operation order finished.Command id is 0010.
Finish (END): stop to carry out the incident microcode.Command format as shown in Figure 5, command id is 1111.
Carry out (ACT): expression is operated accordingly to signal, and act command is supported at most simultaneously 4 signals to be operated accordingly, promptly supports 4 subcommands at most, also can support one, two or three subcommands.Each subcommand is made up of order (4bits) and signal (4bits).As shown in Figure 5.The command id of ACT is 0011.
Act command mainly contains following several:
Set (SET): signal is put 1, represent with Binary Zero 000.
(RESET) resets: signal is put 0, represent with Binary Zero 001.
Trigger (PULSE): make signal produce a pulse signal, represent with Binary Zero 010.
Interrupt (INT): make control device produce a hardware interrupts, send to DSP.Represent with Binary Zero 011.
Add 1 (INCR): corresponding general register is added 1 automatically, represent with Binary Zero 100.
Subtract 1 (DECR): corresponding general register is subtracted 1 automatically, represent with Binary Zero 101.
Zero clearing (CLEAR):, represent with Binary Zero 110 corresponding general register zero clearing.
Idle (IDLE): corresponding to the situation that when using act command, does not have subcommand.Represent with binary one 111.
Other position keeps.
Signal in the IF order and the signal unified addressing in the act command are used.Signals all in the control device is as follows:
* _ total_count: frame counter and basic time counter lump together the count signal that becomes total counter total_count, wherein high 12 of total_count is the frame counter portion, low 20 is the timebase counter portion, is used for the Rule of judgment of Event triggered.Represent total_count with Binary Zero 000.
* _ timebase: basic time the rolling counters forward signal, be used for the Rule of judgment of Event triggered.Represent with Binary Zero 001.
* _ and frame: the frame counter count signal is used for the Rule of judgment of Event triggered.Represent with Binary Zero 010.
* _ and m_input0: the input signal of hardware module, implication is associated with concrete design.Represent with Binary Zero 011.As can being used as system synchronization, or after certain resume module finishes, carry out next step operation by * _ m_input0 or * _ m_input1 notification event processing unit.
* _ and m_input1: the input signal of hardware module, implication is associated with concrete design.Represent with Binary Zero 100.
* _ and gp_reg0: general register 0, represent with Binary Zero 101.
* _ and gp_reg1: general register 1, represent with Binary Zero 110.
* _ and gp_reg2: general register 2, represent with Binary Zero 111.
* _ and dsp_int0: this signal triggering hardware interrupts DSP_INT, and own corresponding interrupt status register state position 1.Represent with binary one 000.
* _ and dsp_int2: this signal triggering hardware interrupts DSP_INT, and own corresponding interrupt status register state position 1.Represent with binary one 001.
* _ and m_ctrl0: output to the control signal of corresponding module, implication is relevant with concrete design.Represent with binary one 010.
…
* _ and m_ctrl5: output to the control signal of corresponding module, implication is relevant with concrete design.Represent with binary one 111.
The IF order can only be used preceding 8 signals in the control device, and can not use back 8 signals.Act command can only use back 11 signals, and can not use preceding 5 signals.
Can see that by top signal ACT can trigger software event and hardware event.Software event is by interrupting representing that have no progeny, what the DSP inquiry produced is which interrupts, and removes to trigger corresponding software event then in producing; And hardware event is represented by the hardwired that is input to hardware, directly triggers hardware and carries out corresponding action.
Introduce the configuration of control device below and to the control procedure of digital baseband transmitter side and receiver side, flow process may further comprise the steps as shown in Figure 6:
The first step, according to the controlled function that the described control device of needs in the concrete application is realized in digital baseband is handled, determine this device execution incident opportunity and and input and output control signal accordingly, write the events corresponding microcode according to the microcode grammer;
Second step, by dsp interface, writing events microcode in the event store of control device;
The 3rd step, configuration register; According to the frame structure in the concrete application, configuration sends and receives the initial value and the threshold value of timebase and frame counter, makes it can be to the frame count in the system; The incident microcode table (table0 or table1) that selection simultaneously will move;
When a plurality of interrupt event is arranged, also need according to actual conditions, in DSP corresponding with it the respectively interrupt events of different interrupt status register definition.
In the 4th step, in the beginning of every frame, when promptly timebase counted again, the incident microcode was read in the current event table in the event handling unit from incident microcode holder, deciphered, and carried out, and realized the scheduling to hardware module;
The 5th step after microcode is carried out and finished, judged whether to need to switch the microcode table, if, carried out for the 6th step, otherwise, returned for the 4th step;
The 6th the step, control device next frame begin switch to new microcode table, returned for the 4th step.
With the application example that is controlled to be in the WCDMA base band receiving system configuration and the control procedure of control device of the present invention is elaborated again below.
In the WCDMA baseband system, a radio frames is 10ms, so basic time, counter cycle was 10ms, per 4096 radio frames are once counted again, so the frame counter cycle is 4096 (being frame number maximum in the system).The relevant base band receiving system of this example is made up of path searcher module, 3 channel receiver modules, DSP and the control device that is connected with above-mentioned 3 modules as shown in Figure 7.
1) at first, writes incident microcode table table0 and table1.
Microcode among the table0 has been set a software event and a hardware event for the control path searcher module, and this software event is used to trigger DSP and finishes register configuration to path searcher module, interrupts rx_dsp_int0 by control device and represents; This hardware event is for path searcher module provides original boundary information (this original boundary information is provided by Cell searching), triggers hardware and begins the route searching process, and rx_m_ctrl0 represents by control signal.Route searching process end signal is imported by path searcher module, and rx_m_input0 represents by the module input signal.The entire path search procedure is only carried out once.Suppose that DSP need spend the time of 100 time quantums to the processing of interrupting (rx_dsp_int0).Then the incident microcode of writing for table0 is as follows:
act?reset?rx_dsp_int0，rx_m_ctrl0，idle，idle
act?clear?rx_gp_reg0，idle，idle，idle
nop?10?act?pulse?rx_dsp_int0，idle，idle，idle?nop?100
if(rx_gp_reg0＝0)
act?pulse?rx_m_ctrl0
endif
if(rx_m_input0＝1)
incr?rx_gp_reg0
endif
end
The function that microcode among the table1 will be realized is the reception that starts DPCH, only defined an incident among the table1, promptly trigger the reception of DPCH channel, corresponding the different paths of channel receiver module, can provide different triggering signals, wherein, rx_m_ctrl0 respective path 0, rx_m_ctrl1 respective path 1, rx_m_ctrl2 respective path 2.Suppose that when first frame begins (rx_frame is 1, and rx_timebase is 0) receives the DPCH channel, add 1 receiving general register rx_gp_reg1 at this moment, after the event handling unit detects rx_gp_reg1 and is 1, begin to trigger the receiving course of DPCH.
The incident microcode of writing for table1 is:
act?reset?rx_m_ctrl1，reset?rx_m_ctrl2，reset?rx_m_ctrl3，idle
act?clear?rx_gp_reg1，idle，idle，idle
nop?10
if(rx_total_count＝00100000h)
incr?rx_gp_reg1
end?if
if(rx_gp_reg1＝1)
act?pulse?rx_m_ctrl1，pulse?rx_m_ctrl2，pulse?rx_m_ctrl3，idleendif
end
To write respectively for the incident microcode that table0 and table1 write and receive corresponding incident microcode table in the event store.
2) configuration counter register, making the rx_timebase counter cycle is 10ms, the rx_frame counter cycle is 4096; The incident microcode table that selection will move is table0; , this interruption is opened in the rx_dsp_int0 position of configure interrupt mask register simultaneously, and Configuration events table control register, carries out the end back at table0 and switches to table1 at frame boundaries.
3) control device begins to get in order finger, decoding and execution at frame boundaries from table0, finishes the set-up procedure that the DPCH channel is received.The concrete operation of carrying out is as follows:
Steps A is carried out initialization at frame boundaries to control signal dsp interrupt signal rx_dsp_int0 and path searcher module control signal m_rx_ctrl0;
Step B is to receiving general register rx_gp_reg0 zero clearing.
Step C waits for 10 time quantums, waits for that promptly above-mentioned signal finishes initialization; Step D triggers DSP and interrupts rx_dsp_int0; DSP receives in this and has no progeny, and responds this interruption, begins path searcher module is carried out register configuration;
Step e is waited for 100 time quantums, waits for that DSP finishes the route searching modules configured;
Step F judges whether rx_gp_reg0 is 0.
Step G if rx_gp_reg0 is 0, makes rx_m_ctrl0 produce a pulse signal, triggers the route searching unit and begins the route searching process;
Step H, condition judgment finishes.
Step I, if the route searching process finishes, path searcher module puts 1 with the rx_m_input0 signal.If it is 1 that event processing module detects rx_m_input0, carry out next step operation.
Step J if rx_m_input0 is 1, adds 1 to rx_gp_reg0.
Step K, condition judgment finishes.
Step L after running into the END instruction, stops to carry out the incident microcode.
4) execute microcode among the table0 after, when frame boundaries, switch the table table, switch to table1 from table0.
5) at the frame boundaries of next frame, control device begins value from table1 in order at frame boundaries, and decoding and execution comprise following operation when carrying out the incident microcode among the table1:
Step M, to control signal rx_m_ctrl0, rx_m_ctrl1 and rx_m_ctrl2 carry out initialization;
Step N is the rx_gp_reg1 zero clearing.
Step O waits for 10 time quantums, waits for that above-mentioned control signal finishes initialization;
Step P has judged whether zero hour of first frame;
Step Q is if to the beginning of first frame, add 1 to rx_gp_reg1.
Step R, condition judgment finishes.
Step S judges whether rx_gp_reg1 is 1 (whether being the beginning of first frame promptly).
Step T if rx_gp_reg1 is 1, provides a boundary information rx_m_ctrli (i=0,1,2) for the channel in each path receives submodule, begins to receive DPCH channel (descrambling and de-spreading process);
Step U, condition judgment finishes.
Step V after running into the END instruction, stops to carry out the incident microcode.
In sum, the present invention triggers relevant hardware incident and software event by control device, and hardware event triggers the hardware controls signal and removes control hardware, can realize very fast response speed; Software event control dsp software carries out software arrangements or software task.Control device automatically performs microcode, does not need software control, takies software resource hardly; Simultaneously microcode can software programming, makes scheduler module that very big flexibility be arranged, form soft, hardware is complementary.
On the basis of the foregoing description, the present invention can also have various conversion scheme.
For example: only need send or receive in the system of processing, control device can include only and send the part of handling or receive the part of handling.Be that counter unit and event handling unit can include only transmission/count pick up device and transmission/reception event handling unit.
And for example, in another embodiment, each interrupt signal line of event handling unit all can be delivered to DSP, no longer know it is which interrupt signal by inquiry by DSP, increased some holding wires like this, but simplified some when handling, can select according to actual conditions.
And for example, in another embodiment, when control device only need be carried out hardware event, and do not need with DSP can remove interruption controls part and dsp interface relevant in the control device when mutual, in event handler, only enroll hardware microcode yet and get final product with DSP.Demand on this function can obtain the embodiment of a lot of conversion.
In addition, though embodiment is to be example with the WCDMA system, during the digital baseband that the present invention also can be applied to other communication system is handled.
Industrial applicibility
The present invention can be applicable in the digital base band processor of communication system, such as wireless domain---the digital base band processor in the WCDMA (WCDMA); Modem Base-Band Processing in cable broadband access field---the ADSL (ADSL).
Claims (18)
1. the control device that digital baseband is handled is applied to digital baseband processing system, its feature
Be, comprise counter unit, register cell and event handling unit, wherein:
Described counter unit is used to described digital baseband processing system that basic time and frame count are provided, and count value is sent into described event handling unit in real time;
Described register cell, be connected with the event handling unit with described counter unit, comprise a plurality of registers group, be used to dispose the required control information of described counter unit and event handling unit, and preserve the event handling unit and carry out state information and/or the data that produce in the event procedure;
Described event handling unit, comprise event memory and computing and control module, preserve the incident microcode of configuration in the described event memory, described computing and control module are used for according to described count value and control information, begin to read described incident microcode in the moment of appointment, decipher and carry out events corresponding, finish control other hardware module operation in the system.
2. control device as claimed in claim 1, it is characterized in that, described counter unit comprises counter and frame counter basic time, the count cycle of counter described basic time is the duration of a Frame of described digital baseband processing system, described frame counter carries out frame count according to the count cycle of described basic time of counter, and the count value of basic time and/or frame count is sent into described event handling unit in real time.
3. control device as claimed in claim 1, it is characterized in that, comprise two incident microcode table table0 and table1 in the described event memory, these two tables adopt ping-pong structure, during incident microcode among the table table0, external module carries out read-write operation to the incident microcode among the table1.
4. control device as claimed in claim 3, it is characterized in that, registers group in the described register cell comprises the event table control register, is used to be provided with the event handling unit and wants the current incident microcode table that will read, and/or be provided with whether needing to switch to another event table.
5. control device as claimed in claim 2 is characterized in that, the registers group in the described register cell comprises: the frame initial registers is used to dispose the initial value of frame counter; The frame threshold register is used to dispose the threshold value of frame counter, is configured as the maximum frame number of system; Basic time, initial registers was used to dispose the initial value of counter basic time; And basic time threshold register, be used to dispose the threshold value of counter basic time.
6. control device as claimed in claim 1 is characterized in that, described incident microcode comprises the software event microcode; Described register cell also comprises digital signal processor DSP interface module and interruption controls module, described dsp interface module is used to described control device that interface with DSP is provided, and described interruption controls module is used for sending interrupt signal according to the interruption that described event handling unit produces to described DSP.
7. control device as claimed in claim 6, it is characterized in that, registers group in the described register cell comprises a plurality of interrupt status registers, each interrupt status register is corresponding with an interrupt signal, have only an interrupt line between described interruption controls module and the DSP, described DSP can be by described these interrupt status registers of dsp interface module accesses.
8. control device as claimed in claim 1 is characterized in that the registers group in the described register cell comprises one or more general registers, is used for storing the variable of incident microcode.
9. control device as claimed in claim 1 is characterized in that, described counter unit comprises that the counter that is used for the transmitter side counting sends submodule and is used for the counter reception submodule that receiver side is counted; And comprise in the described event handling unit sending the event handling subelement and receiving the event handling subelement that these two subelements include described event memory and computing and control module.
10. a realization may further comprise the steps the real-time method of controlling of digital baseband:
(a) control device that has counter, event memory, computing and control module and registers group at least that links to each other with hardware module in the system is set in digital baseband processing system, this control device can be according to configuration information to frame count, storage incident microcode and execution incident;
(b) controlled function of described as required control device realization in digital baseband is handled, determine the opportunity and the input and output control signal thereof of this device execution incident, writing the events corresponding microcode according to the microcode grammer writes in the described memory, and dispose described registers group according to the frame structure of system, make that described counter can be to the frame count in the system;
(c) according to count value and control information, described computing and control module are read the incident microcode in the moment of appointment from described memory, decipher and the execution incident, produce the output control signal to other hardware module in the system; Begin to read the incident microcode at frame boundaries in this step;
(d) after the incident microcode of a microcode table is complete, judge whether to need to switch the microcode table earlier, if, when beginning, next frame switches to new microcode table, and return step (c), otherwise directly return step (c).
11. method as claimed in claim 10 is characterized in that, the incident microcode in the described memory is stored in respectively in two microcode tables that adopt ping-pong structure; Described step (b) also is provided with the current microcode table that will read and whether needs to switch to another microcode table by the configuration to described registers group.
12. method as claimed in claim 10, it is characterized in that, in the described step (a), described control device is linked to each other with DSP in the system by a digital signal processor DSP interface, is by described dsp interface writing events microcode in the event store of described control device in the described step (b).
13. method as claimed in claim 12, it is characterized in that, in the described step (a), also described control device is linked to each other with described DSP by one or more interrupt line, the microcode that comprises software event in the incident microcode of writing in the described step (b), when carrying out described software event, described control device is notified described DSP by interrupt signal in the described step (c), triggers described DSP and carries out corresponding event.
14. method as claimed in claim 13, it is characterized in that, in the described step (a), described control device is linked to each other with described DSP by an interrupt line, comprise a plurality of interrupt status registers in the described registers group, earlier with the interrupt status register set of correspondence, produce an interrupt signal again to described DSP when the execution incident produces internal interrupt in the described step (c), which interrupt event what described DSP determined generation by the value of inquiry interrupt status register is.
15. method as claimed in claim 10, it is characterized in that, described counter comprise one basic time a counter and frame counter, in the described step (b) by to the configuration of register with basic time counter count cycle be made as the duration of a frame, the threshold value of frame counter is made as maximum frame number in the system.
16. method as claimed in claim 10 is characterized in that, the control device that described step (a) is provided with is divided into the identical transmission of function and receives two parts.
17. method as claimed in claim 10, it is characterized in that, comprise following several order in the described incident microcode: condition and condition the finish command, do-nothing operation, fill order and the finish command that signal is operated, described fill order comprises set, reset, trigger, interrupt, add 1, subtract 1, zero clearing, a kind of or combination in any in the free time, and the signal in described condition order and the fill order comprises one or more in described rolling counters forward signal, interrupt signal, input control signal, o controller, the general register signal.
18. method as claimed in claim 10 is characterized in that, described step (a) is also with the output signal of other module in the described system input control signal as described control device; In the described step (c), described computing and control module are also carried out this input control signal when the incident of execution as incident Rule of judgment.
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| PCT/CN2005/002358 WO2007073622A1 (en) | 2005-12-29 | 2005-12-29 | Digital baseband processing controller and baseband real time control method |
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| CN101248635B true CN101248635B (en) | 2011-09-14 |
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| CN101141177B (en) * | 2007-10-18 | 2011-05-11 | 北京天碁科技有限公司 | Device to real-time control of radio frequency chip and analog base band chip |
| CN101420245B (en) * | 2007-10-24 | 2013-03-27 | 中兴通讯股份有限公司 | Scheduling method and device in TD-SCDMA baseband processing |
| CN102036363B (en) * | 2009-09-27 | 2012-10-10 | 联芯科技有限公司 | Sequential control method and device for radio frequency of wireless communication terminal |
| CN103258178B (en) * | 2013-04-19 | 2018-04-20 | 北京创毅讯联科技股份有限公司 | The RF control method and mobile terminal of a kind of mobile terminal |
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| CN1564554A (en) * | 2004-04-16 | 2005-01-12 | 中兴通讯股份有限公司 | High speed base band data monitoring its simulating method and device |
| CN1602012A (en) * | 2004-06-10 | 2005-03-30 | 上海交通大学 | Realizing method of communicating controller |
| CN1617122A (en) * | 2003-11-10 | 2005-05-18 | 神基科技股份有限公司 | Quick starting system and method for individual device |
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| CN1617122A (en) * | 2003-11-10 | 2005-05-18 | 神基科技股份有限公司 | Quick starting system and method for individual device |
| CN1564554A (en) * | 2004-04-16 | 2005-01-12 | 中兴通讯股份有限公司 | High speed base band data monitoring its simulating method and device |
| CN1602012A (en) * | 2004-06-10 | 2005-03-30 | 上海交通大学 | Realizing method of communicating controller |
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Effective date of registration: 20151117 Address after: Dameisha Yantian District of Shenzhen City, Guangdong province 518085 Building No. 1 Patentee after: SHENZHEN ZTE MICROELECTRONICS TECHNOLOGY CO., LTD. Address before: 518057 Nanshan District science and Technology Industrial Park, Guangdong high tech Industrial Park, ZTE building Patentee before: ZTE Corporation |
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Application publication date: 20080820 Assignee: Xi'an Chris Semiconductor Technology Co. Ltd. Assignor: SHENZHEN ZTE MICROELECTRONICS TECHNOLOGY CO., LTD. Contract record no.: 2019440020036 Denomination of invention: Digital baseband process control device and method for real-time control of digital baseband Granted publication date: 20110914 License type: Common License Record date: 20190619 |