CN101192848B - Method and system for realizing the master/slave single board dual-host reset and online information - Google Patents
Method and system for realizing the master/slave single board dual-host reset and online information Download PDFInfo
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- CN101192848B CN101192848B CN2006101440682A CN200610144068A CN101192848B CN 101192848 B CN101192848 B CN 101192848B CN 2006101440682 A CN2006101440682 A CN 2006101440682A CN 200610144068 A CN200610144068 A CN 200610144068A CN 101192848 B CN101192848 B CN 101192848B
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Abstract
The invention provides a method and a system for achieving reposition signal and online information of a main veneer and a prepared veneer. A clock signal is transmitted to a second veneer from a first veneer; the received clock signal is detected by the second veneer, and if a frequency of the clock signal is normal, an online state is confirmed; otherwise, an offline state is confirmed; if the frequency of the clock signal is equal to a promissory frequency, a reposition operation is executed. The invention enables the reposition signal and the online information of the main veneer and a prepared veneer to be transmitted more effectively and more reliably.
Description
Technical field
The present invention relates to the communications field, relate in particular to a kind of method and system that realize master/slave single board dual-host reset and online information.
Background technology
Present developing rapidly along with communication industry, the utilization of various communication equipments is more and more, in order to make communication equipment reliable and stable work in communication network, in existing communication equipment, all taked the active and standby pattern of 1+1 for the veneer of some Core Feature, promptly when the master is broken down with veneer, can automatically switch to standby board work, work reliably to guarantee entire equipment and system stability.
Operation between the main and standby boards has dual-host reset, online information etc.Dual-host reset can thoroughly be restarted the hardware and software of the veneer that is reset, and can cause communication and professional interruption.Illegal dual-host reset can produce serious consequence.Therefore, how to avoid the generation of illegal dual-host reset, realizing resets reliably just seems most important.Online information is whether this plate of report the other side is online, is the important means that the two-shipper veneer is monitored the other side mutually.Therefore, how to report that the other side is important too the online information of this plate accurately.
In the at present existing design annexation of common dual-host reset and online information as shown in Figure 1, its implementation is as follows:
Two terminals are arranged on the backboard, be respectively applied for dual-host reset and online information.Online information is to transmit by the clock signal (clock signal can be selected according to actual conditions, is not the clock of fixed frequency) that CPLD (CPLD, Complex Programmable Logic Device) is exported certain frequency.When detect on the online information clock signal just often, just think that the opposite end veneer is online; Otherwise think opposite end veneer off-line.Reset signal adopts low level to realize, in plate with drawing this signal on the pull-up resistor.Because it is effective that reset signal is a low level, so with moving high level on the pull-up resistor to, otherwise this jitter, might whole veneer cisco unity malfunction.When receiving the reset signal low level, carry out the dual-host reset operation; Otherwise do not carry out the dual-host reset operation.
Above-mentioned existing method for designing can realize the basic operation of dual-host reset and online information, but also has following shortcoming in application:
1, need take two terminals of backboard, and two I/O that take every CPLD;
2, when veneer of plug, interference signal can be produced on reset signal and the online signal, the state of whole board resetting or reporting errors can be caused.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of method and system that realize master/slave single board dual-host reset and online information, can make reset signal and more efficient, the more reliable transmission of online information between the two-shipper veneer.
The technical scheme that realizes the object of the invention is as follows:
A kind of method that realizes master/slave single board dual-host reset and online information transmission, wherein:
The transmitting terminal Board Power up, according to circumstances judge whether to need to send reset command, send reset command if desired, its coding is become the signal that clock frequency is f1, and judge to reset and whether finish, if do not finish, continuation becomes the signal that clock frequency is f1 with its coding, if finish, its coding is become the signal that clock frequency is f2,, its coding is become the signal that clock frequency is f2 if do not need to send reset command, with the output of the signal behind the coding, the signal of transmitting terminal veneer after the receiving terminal veneer sends described numbering;
The receiving terminal Board Power up, earlier judge whether the clock frequency f1 on the received signal is normal, if it is normal, dual-host reset is effective, the reset signal output low level of recovering, otherwise dual-host reset is invalid, the reset signal output high level of recovery, simultaneously, and judge whether clock frequency f1 or f2 on the received signal be normal, if having at least one to be normal among clock f1 and the f2, then the offside veneer is online, the online information signal output low level of recovering, otherwise, offside veneer off-line, the online information signal output high level of recovery.
Preferably, detect the frequency of described clock signal according to the clock source of this locality.
A kind of receiving system of realizing master/slave single board dual-host reset and online information transmission, comprise two clock detection circuits, wherein, it is whether the clock signal of f1 is normal that first clock detection circuit is used to detect clock frequency, it is whether the clock signal of f2 is normal that the second clock testing circuit is used to detect clock frequency, when detect the signal upper frequency be f1 clock signal just often, just think and received reset command, then carry out reset operation, the reset signal output low level of recovering, otherwise, do not carry out reset operation, the reset signal output high level of recovery; After clock f1 and clock f2 being carried out exclusive disjunction by the exclusive disjunction module, the clock signal that detected signal upper frequency is f1 is normal, the clock signal that perhaps detects frequency f 2 just often, think that then the opposite end veneer is online, the online information output low level of recovering, otherwise, the online information output high level of recovery, opposite end veneer off-line.
Preferably, described clock detection circuit detects the frequency of described clock signal according to the clock source of this locality.
A kind of realization master/slave single board dual-host reset and online information system for transmitting comprise dispensing device and receiving system, wherein:
Described dispensing device comprises clock source and switch, and described clock source can produce clock signals of different frequencies, selects a kind of clock signal output by described switch as required;
Described receiving system comprises two clock detection circuits, wherein, it is whether the clock signal of f1 normal that first clock detection circuit is used to detect clock frequency, and it is whether the clock signal of f2 normal that the second clock testing circuit is used to detect clock frequency, when detect the signal upper frequency be f1 clock signal just often, just think and received reset command, then carry out reset operation, the reset signal output low level of recovery, otherwise, do not carry out reset operation, the reset signal output high level of recovery; After clock f1 and clock f2 being carried out exclusive disjunction by the exclusive disjunction module, the clock signal that detected signal upper frequency is f1 is normal, the clock signal that perhaps detects frequency f 2 just often, think that then the opposite end veneer is online, the online information output low level of recovering, otherwise, the online information output high level of recovery, opposite end veneer off-line.
Preferably, described switch is an either-or switch.
Preferably, described clock detection circuit detects the frequency of described clock signal according to the clock source of this locality.
Compared with prior art, the present invention has following beneficial effect:
The object of the present invention is to provide a kind of method and system that realize master/slave single board dual-host reset and online information simply, efficiently, reliably, make reset signal and more efficient, the more reliable transmission of veneer online information between the main and standby boards.
Adopt coded system to realize resetting and online information mutual, can reach and reset reliable and online information purpose accurately.This is because the interference signal on the circuit has no rule, and can change along with the variation of external environment condition.And after adopting the coded system transmission, the signal on the circuit all is known, and regular following; In addition, the recipient only need detect whether to comprise this coding just passable.Therefore, the random interference signal on the circuit can not exert an influence, thereby makes that the reset signal reliability is higher, and antijamming capability is very strong.
Secondly, the employing coded system just can be merged into one to two former holding wires and transmit after realizing resetting.So both save the backboard terminal, simplified back plate design; Save the I/O of CPLD again, thereby economize on resources.
In addition, the present invention realizes that reset signal and online information between the active and standby unit realize by hardware.Coding circuit and decoding circuit are realized simple, and design also is simplified.The present invention can be applied to the multiple standards backboard, as CPSB backboard, ATCA backboard etc.
Below in conjunction with the drawings and specific embodiments the present invention is further described.
Description of drawings
Fig. 1 is the annexation schematic diagram of existing techniques in realizing reset signal and online information;
Fig. 2 is the annexation schematic diagram that the present invention realizes reset signal and online information;
Fig. 3 is the process chart that the present invention sends reset signal and online information;
Fig. 4 is the logic diagram that the present invention sends reset signal and online information;
Fig. 5 is the process chart that the present invention receives reset signal and online information;
Fig. 6 is the logic diagram that the present invention receives reset signal and online information;
Fig. 7 A, B are respectively the waveform schematic diagram of A plate output signal and B plate received signal in the embodiment of the invention;
The reset signal that the B plate that Fig. 8 A, B are respectively corresponding with Fig. 7 recovers and the waveform schematic diagram of online information;
Fig. 9 is the inventive method flow chart.
Embodiment
The object of the present invention is to provide a kind of simple, efficient, method reliably, make reset signal and more efficient, the more reliable transmission of veneer online information between the two-shipper veneer.The present invention can be applied to the multiple standards backboard, as CPCI packet switched backplane (CPSB, Compact PCI Packet Switching Backplane) backboard, advanced telecom counting system structure (ATCA, Advanced Telecommunications Computing Architecture) backboard etc.Of this sort application scenario usually faces several problems:
Reduce the backboard terminal number that takies as far as possible;
When how to avoid plugging a veneer, can produce the unusual dual-host reset of another piece veneer;
How to transmit the online information of veneer reliably.
These requirements above two-shipper circuit commonly used often can not satisfy fully, the present invention utilize a kind of simple, practical, design flexible to satisfy the demand exactly, realize dual-host reset signal and online information efficient, transmit reliably.
The present invention has changed reset signal and the online transmission method of signal on the backboard, becomes the coding reset mode by traditional level reset mode, so just can transmit the two on single line, reaches to save the backboard terminal, realizes the purpose of reliable reset.The present invention handles in the following manner: at transmitting terminal, reset signal and online information are carried out encoding process; At receiving terminal reset signal and online information are carried out decoding processing.Like this, realize resetting reliably and online information accurately.
Below, specify as follows at implementation procedure of the present invention:
As shown in Figure 2, realize the annexation schematic diagram of reset signal and online information for main and standby boards of the present invention.A plate output dual-host reset signal (RST) and online information (ON LINE), below in order to narrate convenience, both are referred to as RST_OLA, be transferred on the B plate by backboard, on the B plate, handle; B plate output dual-host reset signal (RST) and online information (ON LINE), below in order to narrate convenience, both are referred to as RST_OLB, be transferred on the A plate by backboard, on the A plate, handle.The realization of two signals is on all four, just introduces the reset signal and the online signal RST_OLA of A plate output wherein below.In the present invention, choose that clock frequency is respectively f1 and f2 encodes.
As shown in Figure 9, be the inventive method flow chart, comprise:
Step 902, second veneer detect the clock signal that receives, if the frequency of described clock signal is normal, then are presence, i.e. online information signal output low level, otherwise be off-line state, i.e. online information signal output high level; If the frequency of described clock signal equals agreed frequency, then carry out reset operation, i.e. reset signal output low level, otherwise reset signal output high level.
Wherein, as shown in Figure 3, the handling process for the transmitting terminal coding comprises:
Step 302, according to circumstances whether need to send reset command, if then continue step 303; Otherwise go to step 305;
Again as shown in Figure 4, logically realize the block diagram of reset signal and online information for transmitting terminal.The switch that comprises two clock sources and an alternative.Wherein, the first clock source can produce the clock signal that clock frequency is f1, and the second clock source can produce the clock signal that clock frequency is f2.These two clock sources are controlled by described switch as required, thereby select a kind of signal output as required.
And for example shown in Figure 5, the handling process for receiving terminal decoding comprises:
As shown in Figure 6, logically realize the block diagram of reset signal and online information for receiving terminal.Comprise two clock detection circuits.Wherein, to be used to detect clock frequency be whether the clock signal of f1 is normal to first clock detection circuit; It is whether the clock signal of f2 is normal that the second clock testing circuit is used to detect clock frequency; And carry out corresponding operation according to the state of two clocks or the result of the two computing.
Wherein, clock detection circuit adopts local reliable clock source as the reference clock, and as detected clock, whether the signal clock that detects clock frequency respectively and be f1 and f2 is normal the signal of reception.When detect the signal upper frequency be f1 clock signal just often, just think and received reset command, then carry out reset operation, the reset signal output low level of recovery; Otherwise, do not carry out reset operation, the reset signal output high level of recovery.
When detecting the signal upper frequency is that the clock signal of f1 is normal, and the clock signal that perhaps detects frequency and be f2 just often thinks that then the opposite end veneer is online, the online information output low level of recovery, and the opposite end veneer is online; Otherwise, the online information output high level of recovery, opposite end veneer off-line.
Therefore, clock signal to be detected is one, and is two through the signal that first and second clock detection circuit detects back output, i.e. reset signal and online information signal, and the two is independently.If the clock frequency of this signal equals first clock frequency, reset signal output low level then; Otherwise reset signal output high level.If the frequency of this clock signal equals first frequency or second frequency, online information signal output low level then; Otherwise online information signal output high level.
As Fig. 7, shown in Figure 8, be respectively A plate and the firm and hard waveform schematic diagram that shows reset signal and online information of B in the present invention's one specific embodiment.
At first, shown in Fig. 7 A, be the waveform schematic diagram of A plate output signal in the embodiment of the invention; Accordingly, Fig. 7 B is the waveform schematic diagram of B plate received signal.
Secondly, shown in Fig. 8 A, be the reset signal waveform schematic diagram of the B plate recovery corresponding with Fig. 7; The waveform schematic diagram of the online information that Fig. 8 B recovers for the B plate.
Like this,, just can on single line, transmit reset signal and online information, thereby can realize reliable reset operation, also can save the terminal of backboard by the cataloged procedure of transmitting terminal and the decode procedure of receiving terminal.
Above-described embodiment of the present invention does not constitute the qualification to protection range of the present invention.Any any modification of being done within the spirit and principles in the present invention, be equal to and replace and improvement etc., all should be included within the claim protection range of the present invention.
Claims (7)
1. method that realizes the transmission of master/slave single board dual-host reset and online information is characterized in that:
The transmitting terminal Board Power up, according to circumstances judge whether to need to send reset command, send reset command if desired, its coding is become the signal that clock frequency is f1, and judge to reset and whether finish, if do not finish, continuation becomes the signal that clock frequency is f1 with its coding, if finish, its coding is become the signal that clock frequency is f2,, its coding is become the signal that clock frequency is f2 if do not need to send reset command, with the output of the signal behind the coding, the signal of transmitting terminal veneer after the receiving terminal veneer sends described coding;
The receiving terminal Board Power up, earlier judge whether the clock frequency f1 on the received signal is normal, if it is normal, dual-host reset is effective, the reset signal output low level of recovering, otherwise dual-host reset is invalid, the reset signal output high level of recovery, simultaneously, and judge whether clock frequency f1 or f2 on the received signal be normal, if having at least one to be normal among clock f1 and the f2, then the offside veneer is online, the online information signal output low level of recovering, otherwise, offside veneer off-line, the online information signal output high level of recovery.
2. the method for claim 1 is characterized in that, detects the frequency of described clock signal according to the clock source of this locality.
3. receiving system of realizing the transmission of master/slave single board dual-host reset and online information, it is characterized in that, comprise two clock detection circuits, wherein, it is whether the clock signal of f1 is normal that first clock detection circuit is used to detect clock frequency, it is whether the clock signal of f2 is normal that the second clock testing circuit is used to detect clock frequency, when detect the signal upper frequency be f1 clock signal just often, just think and received reset command, then carry out reset operation, the reset signal output low level of recovery, otherwise, do not carry out reset operation, the reset signal output high level of recovery; After clock f1 and clock f2 being carried out exclusive disjunction by the exclusive disjunction module, the clock signal that detected signal upper frequency is f1 is normal, the clock signal that perhaps detects frequency f 2 just often, think that then the opposite end veneer is online, the online information output low level of recovering, otherwise, the online information output high level of recovery, opposite end veneer off-line.
4. receiving system as claimed in claim 3 is characterized in that, described clock detection circuit detects the frequency of described clock signal according to the clock source of this locality.
5. realize master/slave single board dual-host reset and online information system for transmitting for one kind, it is characterized in that, comprise dispensing device and receiving system, wherein:
Described dispensing device comprises clock source and switch, and described clock source can produce clock signals of different frequencies, selects a kind of clock signal output by described switch as required;
Described receiving system comprises two clock detection circuits, wherein, it is whether the clock signal of f1 normal that first clock detection circuit is used to detect clock frequency, and it is whether the clock signal of f2 normal that the second clock testing circuit is used to detect clock frequency, when detect the signal upper frequency be f1 clock signal just often, just think and received reset command, then carry out reset operation, the reset signal output low level of recovery, otherwise, do not carry out reset operation, the reset signal output high level of recovery; After clock f1 and clock f2 being carried out exclusive disjunction by the exclusive disjunction module, the clock signal that detected signal upper frequency is f1 is normal, the clock signal that perhaps detects frequency f 2 just often, think that then the opposite end veneer is online, the online information output low level of recovering, otherwise, the online information output high level of recovery, opposite end veneer off-line.
6. system as claimed in claim 5 is characterized in that, described switch is an either-or switch.
7. system as claimed in claim 5 is characterized in that, described clock detection circuit detects the frequency of described clock signal according to the clock source of this locality.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2006101440682A CN101192848B (en) | 2006-11-24 | 2006-11-24 | Method and system for realizing the master/slave single board dual-host reset and online information |
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| CN2006101440682A CN101192848B (en) | 2006-11-24 | 2006-11-24 | Method and system for realizing the master/slave single board dual-host reset and online information |
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| CN101192848A CN101192848A (en) | 2008-06-04 |
| CN101192848B true CN101192848B (en) | 2010-12-08 |
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Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103019870A (en) * | 2012-12-14 | 2013-04-03 | 大唐移动通信设备有限公司 | Method and communication equipment for processing reset signal |
| CN103744755A (en) * | 2014-01-08 | 2014-04-23 | 烽火通信科技股份有限公司 | Implement system for primary and standby veneer single port shared protection and method thereof |
| CN112051913A (en) * | 2020-09-11 | 2020-12-08 | 深圳市信锐网科技术有限公司 | Device resetting method and device on board card, logic device and storage medium |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1601952A (en) * | 2003-09-23 | 2005-03-30 | 华为技术有限公司 | Clock selective system and its method |
| CN1633060A (en) * | 2003-12-24 | 2005-06-29 | 华为技术有限公司 | A method and apparatus for time clock signal test |
| CN2713741Y (en) * | 2004-06-09 | 2005-07-27 | 港湾网络有限公司 | Clock detecting circuit |
| CN2725904Y (en) * | 2004-06-09 | 2005-09-14 | 港湾网络有限公司 | Clock detector |
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- 2006-11-24 CN CN2006101440682A patent/CN101192848B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1601952A (en) * | 2003-09-23 | 2005-03-30 | 华为技术有限公司 | Clock selective system and its method |
| CN1633060A (en) * | 2003-12-24 | 2005-06-29 | 华为技术有限公司 | A method and apparatus for time clock signal test |
| CN2713741Y (en) * | 2004-06-09 | 2005-07-27 | 港湾网络有限公司 | Clock detecting circuit |
| CN2725904Y (en) * | 2004-06-09 | 2005-09-14 | 港湾网络有限公司 | Clock detector |
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