CN101159863B - Image decoding and image transcoding method and system - Google Patents

Image decoding and image transcoding method and system Download PDF

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CN101159863B
CN101159863B CN 200610142059 CN200610142059A CN101159863B CN 101159863 B CN101159863 B CN 101159863B CN 200610142059 CN200610142059 CN 200610142059 CN 200610142059 A CN200610142059 A CN 200610142059A CN 101159863 B CN101159863 B CN 101159863B
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frame
decoding
frame buffer
transcoding
unit
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CN101159863A (en
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林建佑
阎大贵
潘廷建
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Sunplus Technology Co Ltd
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Sunplus Technology Co Ltd
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Abstract

The invention relates to an image decoding and image transcoding method and a system, which decode, display and transcode video data stream. When last frame decoding finishes, a decoding program checks whether any frame buffer is available. If it is, decoding the prior frame, holding in the frame buffer and marking the frame as available, wherein, the frame mark is relevant to the frame buffer. When the last display finishes, a display program checks whether the frame buffer holds the frame after decoding. If it does, reading the decoding frame in the frame buffer and displaying the decoding frame. When the last frame decoding finishes, a transcoding program checks whether the frame buffers holds the frame after decoding. If it does, reading the decoding frame in the frame buffer and transcoding the decoding frame.

Description

Image decoding and image transcoding method and system
Technical field
The present invention relates to the technical field of image processing, relate in particular to a kind of image decoding and image transcoding method and system.
Background technology
Generally when transmitting video-audio data stream, because the restriction of network bandwidth, often need this video-audio data stream is carried out video code conversion (video transcoding), with the frame per second (reduced frame-rate) or the resolution (resolution) of conversion and reduction imaging data stream, and be convenient in the network that is jammed, transmit.That is, in video code conversion, often the frame per second of dynamic image packed data (frame-rate) is reduced to another dynamic image packed data, just reduce frame and change speed, be used for further reducing the bit rate (bit-rate) of data, with the video transmission demand of reply frequency range deficiency.
Fig. 1 illustrates the calcspar of existing image decoding and image transcoding system.For avoiding complicated control circuit, after video data stream is via decoding unit 110 decodings, leave in respectively in first internal memory 120 and second internal memory 130.Display unit 140 reads the frame (frame) after the decoding in first internal memory 120 and is shown.Transcoding units 150 reads after the decoding in second internal memory 130 frame (frame) and gives transcoding.In order to make the running of demonstration and transcoding smooth and easy, first internal memory 120 and second internal memory 130 need to have three frame buffers (Frame Buffer) respectively.Though this system can avoid complicated control circuit, yet needs very big internal memory frequency range and memory headroom.
Fig. 2 illustrates the calcspar of another existing image decoding and image transcoding system.As shown in Figure 2, this system uses an internal memory 220 with three frame buffers for separating province's internal memory.Display unit 230 sends shown frame to transcoding units 240 simultaneously, so only need the internal memory 220 with three frame buffers, only needs the frequency range of a memory access simultaneously.
But there are the restriction of its use in the image decoding of Fig. 2 and image transcoding system.That is, show necessary identical with the specification of transcoding.When the demonstration and the specification of transcoding are inequality, can have problems during transcoding.For example, when display speed is 25 frame/seconds (frames/sec) and transcoding speed when being 30 frame/seconds (frames/sec),, use the problem of conflicting so can produce internal memory because internal memory 220 only has three frame buffers.And if lighten the brightness of display frame, then when transcoding, coded frame brightness is inequality with original frame brightness when showing.Therefore as can be known, still there are many disappearances in existing image decoding and image transcoding method and system and give improved necessity.
Summary of the invention
One object of the present invention is to provide a kind of image decoding and image transcoding method and system, thereby reduces the memory size demand, and reaches cost-effective purpose.
Another object of the present invention is to provide a kind of image decoding and image transcoding method and system, thereby solve the problem that internal memory uses conflict.
According to characteristic of the present invention, the present invention proposes a kind of image decoding and image transcoding method, its to video data stream decipher, demonstration and transcoding, frame after it will be deciphered is temporary in a plurality of frame buffers, this video data stream has the frame of a sequence, frame after this every decoding has first and second, this method comprises: translator, when previous frame decoding is finished, whether check has aforementioned frame buffer to use, if then existing frame is deciphered and temporary, and is set the frame flag relevant for using with this frame buffer to this frame buffer; Display routine when a last demonstration is finished, is checked the frame whether have after temporary this decoding of aforementioned frame buffer, if then read the frame after this decoding in this frame buffer, and shown; The transcoding program when previous frame decoding is finished, is checked the frame that whether has after temporary this decoding of aforementioned frame buffer, if the frame that then reads after this decoding in this frame buffer carries out transcoding.
According to another characteristic of the present invention, the present invention proposes a kind of image decoding and image transcoding system, its to video data stream decipher, demonstration and transcoding, this video data stream has the frame of a sequence, frame after this every decoding has first and second, and this system comprises internal memory, decoding unit, display unit and transcoding units.This internal memory has a plurality of frame buffers, the image data when being used for temporary this video data stream decoding with transcoding; This decoding unit is coupled to this internal memory, be used to accept this video data stream, and this video data stream is carried out decoding, and produce the frame after the decoding, frame after will deciphering again is written to this frame buffer of appointment in this internal memory, wherein, when previous frame decoding was finished, whether this decoding unit inspection had aforementioned frame buffer to use, if, then to existing frame coding, and temporary to this frame buffer, and then set the frame flag relevant for using with this frame buffer; This display unit is coupled to this internal memory, read and show frame after this decoding with aforementioned frame buffer by appointment in this internal memory, wherein, when a last demonstration is finished, whether this display unit inspection has the frame after temporary this decoding of this frame buffer, if then read the frame after this decoding in this frame buffer, and shown; This transcoding units is coupled to this internal memory, its from this frame buffer zone reading of data of setting to send coding unit to, and carry out the coding action and generation image bit stream, wherein, when previous frame decoding was finished, whether this transcoding units inspection had the frame after temporary this decoding of aforementioned frame buffer, if having, then read the frame after this decoding in this frame buffer, and give transcoding.
According to a characteristic more of the present invention, the present invention proposes a kind of image decoding and image transcoding system, its to video data stream decipher, demonstration and transcoding, this video data stream has the frame of a sequence, have first and second behind this each frame coding, this system comprises internal memory, decoding unit, display unit, transcoding units and control unit.This internal memory has a plurality of frame buffers, the image data when being used for temporary this video data stream decoding with image transcoding; This decoding unit is coupled to this internal memory, is used to accept this video data stream, and this video data stream is carried out decoding, and produces the frame after the decoding, and the frame after will deciphering again is written to the aforementioned frame buffer of appointment in this internal memory; This display unit is coupled to this internal memory, reads and shows frame after this decoding with the aforementioned frame buffer by appointment in this internal memory; This transcoding units is coupled to this internal memory, and it, and is carried out the coding action and produce the image bit stream sending coding unit to from the frame buffer zone reading of data set; This control unit is coupled to this decoding unit, this display unit and this transcoding units, with initialization and control the execution sequential of this decoding unit, this display unit and this transcoding units and these frame buffers of access; Wherein, this control unit utilizes the numbering of these frame buffers to control the execution sequential of this decoding unit, this display unit and this transcoding units.
Description of drawings
Fig. 1 is the calcspar of an existing image decoding and image transcoding system.
Fig. 2 is the calcspar of another existing image decoding and image transcoding system.
Fig. 3 is this bright image decoding and the calcspar of image transcoding system.
Fig. 4 is the control flow chart of image decoding of the present invention and image transcoding method.
Fig. 5 is the running schematic diagram of embodiments of the invention.
Fig. 6 is the sequential chart of Fig. 5 of the present invention.
Fig. 7 is the running schematic diagram of another embodiment of the present invention.
Fig. 8 is the sequential chart of Fig. 7 of the present invention.
Fig. 9 is the calcspar of image decoding of the present invention and another embodiment of image transcoding system.
Figure 10 is the schematic diagram of control unit control pseudo-code of the present invention.
[primary clustering symbol description]
Decoding unit 110 first internal memories 120
Second internal memory, 130 display units 140
Internal memory 220 display units 230
Transcoding units 240
Internal memory 310 decoding units 320
Display unit 330 transcoding units 340
Control unit 350 frame buffers 311
Frame flag 312 decoding marks 321
Translator P410 display routine P420
Transcoding program P430
Internal memory 910 decoding units 920
Display unit 930 transcoding units 940
Control unit 950 frame buffers 911
Timing sequence generating device 951
Embodiment
Fig. 3 illustrates the calcspar of image decoding of the present invention and image transcoding system.This system to video data stream (Video Stream) decipher, demonstration and transcoding.This video data stream has the frame (Frame) of a sequence, has first (Field) and second behind each frame coding.Wherein, this first is called enter the court (Top Field), and this second is called end (Bottom Field).
This system comprises internal memory 310, decoding unit 320, display unit 330, transcoding units 340 and control unit 350.This internal memory 310 has a plurality of frame buffers 311 (Frame Buffer), the image data when being used for temporary image decoding and image transcoding.In the present embodiment, this internal memory 310 preferably has four frame buffers 311.
This internal memory 310 can be SDRAM (SDRAM) or double data rate DRAM (Dynamic Random Access Memory) (Double Data Rate DRAM).This double data rate DRAM (Dynamic Random Access Memory) (DDR DRAM) can be DDR-I, DDR-II, DDR-333 or DDR-400 or the like.
This decoding unit 320 is coupled to this internal memory 310, and it accepts this video data stream, and this video data stream is carried out decoding, and the frame that will decipher the rear video data flow again is written to the frame buffer 311 of appointment in this internal memory 310.When previous frame decoding was finished, this decoding unit 320 checked whether have frame buffer 311 to use, if then to existing frame coding, and temporary to this frame buffer 311, and set the frame flag 312 relevant with this frame buffer 311 for using.
This decoding unit 320 also comprises decoding mark 321, be used for judging when this frame buffer 311 for can not use the time, this decoding unit 320 is not deciphered this existing frame, and sets and decipher mark 321 to indicate existing frame etc. to be decoded.
This display unit 330 is coupled to this internal memory 310, reads the frame of decoding back imaging data stream with the frame buffer 311 by appointment in this internal memory 310, and is shown.When a last demonstration was finished, this display unit 330 was checked the frame that whether has after frame buffer 311 is kept in decoding, if 330 of this display units read the frame after the decoding in this frame buffer 311, and are shown.
This display unit 330 is checked the frame after whether frame buffers 311 have temporary decoding, checks the frame flag 312 relevant with this frame buffer 311.This display unit 330 is if the frame after judging the not temporary decoding of this frame buffer 311 then shows the previous field that shows.
When a last demonstration was finished, this display unit 330 reexamined this decoding mark 321.If this decoding mark 321 has been set, then expression has existing frame etc. to be decoded, so this display unit 330 generation signal Trig are to trigger this decoding unit 320.
This transcoding units 340 is coupled to this internal memory 310, and it, and is carried out the coding action and produce new image bit stream sending coding unit (illustrating) to from frame buffer zone 311 reading of data set.When previous frame decoding was finished, this transcoding units 340 was checked the frame that whether has after the frame buffer 311 temporary decodings, if having, then this transcoding units 340 reads the frame after the decoding in this frame buffer, and gives transcoding.This transcoding units 340 is kept in the frame after deciphering if judge this frame buffer 311, and then this transcoding units 340 does not carry out the relevant action of transcoding.
This control unit 350 is coupled to this decoding unit 320, this display unit 330 and transcoding units 340, with initialization and control this decoding unit 320, this display unit 330 and transcoding units 340 is carried out sequential.
Fig. 4 is the control flow chart of image decoding of the present invention and image transcoding method.This method be to video data stream (Video Stream) decipher, demonstration and transcoding, and the frame after will deciphering is temporary in a plurality of frame buffers.This video data stream has the frame (Frame) of a sequence, has first (Field) and second behind each frame coding.Wherein, this first is called enter the court (TopField), and this second is called end (Bottom Field).
This method comprises translator P410, display routine P420 and transcoding program P430.When 320 pairs of previous frame decodings of this decoding unit are finished, trigger this translator P410 and transcoding program P430.When this display unit 330 has shown one, trigger this display routine P420.The trigger event that trigger event (Event Trigger) that a last demonstration is finished and previous frame decoding are finished can be asynchronous or synchronous.In addition, trigger event produces from the beginning because buffer is free, so can advanced row decoding program P410, wait decoding a period of time after, buffer (Buffer) has decoding data, display routine P420 carries out again.
In step S410, whether when previous frame decoding is finished, checking has frame buffer 311 to use.If then to existing frame coding, and temporary, and set the frame flag 312 relevant for can use (step S420) with this frame buffer 311 to this frame buffer 311 (step S415).
In step S410, can not use if judge this frame buffer 311, then not to this existing frame coding, and set decoding mark 321 to indicate existing frame etc. (step S425) to be decoded.
In step S430, when a last demonstration is finished, check the frame whether have after the frame buffer 311 temporary decodings, if then read the frame after the decoding in this frame buffer 311, and shown (step S435).Wherein, step S430 checks the frame after whether frame buffer 311 has temporary decoding, checks the frame flag 312 relevant with this frame buffer 311.
In step S430, keep in the frame after deciphering if judge this frame buffer 311, then show the previous field (step S440) that shows.
This display routine P420 also checks this decoding mark 321 in the Shang Yichang demonstration when finishing, if this decoding mark 321 has been set, then this display routine P420 triggers this translator P410 (step S445).If this decoding mark 321 is not set, then do not carry out any processing (step S450).
In step S460, when previous frame decoding is finished, check the frame that whether has after frame buffer 311 is kept in decoding, if then read the decoded frame in this frame buffer 311, and give transcoding (step S465).If judge the frame after the not temporary decoding of this frame buffer 311, then do not carry out transcoding (step S470).In step S460, check the frame flag 312 relevant with this frame buffer 311.That is when program P410 finished and set the frame flag 312 relevant with this frame buffer 311 to a frame coding after, step S465 can carry out transcoding.
Fig. 5 is the running schematic diagram of embodiments of the invention.Its decoding is in proper order: IPBBBPBBB....I, B and P represent I-frame, B-frame and P-frame respectively.Digital then represent the position of stored frame buffer 311.For example: P1 represents a P-frame after the decoding, and it is temporary among the frame buffer F1.As shown in Figure 5, frame buffer F0 and F1 are used for temporary I-figure and P-frame, and frame buffer F2 and F3 are used for temporary B-frame.
Fig. 6 is the sequential chart of Fig. 5 of the present invention.In the present embodiment, the trigger event finished of the trigger event (Event Trigger) finished of a last decoding and previous frame decoding is for synchronously.Decoding speed was 30 frame/seconds, and demonstration and transcoding speed also were 30 frame/seconds.
Fig. 7 is the running schematic diagram of another embodiment of the present invention.Its decoding is in proper order: IPBBBPBBB....As shown in Figure 7, frame buffer F0 and F1 are used for temporary I-figure and P-frame, and frame buffer F2 and F3 are used for temporary B-frame.
Fig. 8 is the sequential chart of Fig. 7 of the present invention.In the present embodiment, the trigger event finished of the trigger event (Event Trigger) finished of a last decoding and previous frame decoding is asynchronous.Decoding and transcoding speed were 30 frame/seconds, and display speed was 25 frame/seconds.In order to adjust decoding speed is that 30 frame/seconds and display speed were 25 frame/seconds, when showing the B2 frame, only shows enter the court (T2) of B2 frame.So, 3 frames of every decoding only show 5 fields, and can adjust decoding speed is that 30 frame/seconds and display speed are the problem of 25 frame/seconds.
Fig. 9 is the calcspar of image decoding of the present invention and another embodiment of image transcoding system.Itself and the main difference of Fig. 3 are that Fig. 9 is to use the order of four frame buffer 911 accesses of these control unit 950 controls.That is, utilize 950 pairs of these decoding units 920 of this control unit, this display unit 930 and transcoding units 940 to set the relevant access of frame buffer 911.Simultaneously, this control unit 950 uses timing sequence generating device 951 to produce relevant trigger event (trigger event).As shown in Figure 9, frame buffer 0 and 1 is used for temporary I-figure and P-frame, and frame buffer 2 and 3 is used for temporary B-frame.Figure 10 is the schematic diagram of these control unit 350 control pseudo-codes.For convenience of description, this pseudo-code is added above-listed number.
Row 100~110th when decoding is finished, are set at the frame buffer 911 (nextdecoding buffer) that next desire is used with present frame buffer 911 (current decoding buffer) just in use.
In the present embodiment, row 130 expressions are when the trigger event of these 951 generation decode cycle times of timing sequence generating device.Whether the frame buffer 911 (next decodingbuffer) that row 130 more next desires are used is present frame buffer 911 (current decoding buffer) just in use, if not, then represent still undecoded finishing, this control unit 350 is carried out the pseudo-code of row 460~490, with etc. to be decoded finishing.If then expression has been deciphered and finished, this control unit 350 is carried out the pseudo-code of row 170~450.
The decoding of row 170 carries out image also is stored into present frame buffer 911 (current decoding buffer) just in use.Row 190 judge that next frame belongs to I-frame or P-frame, if this control unit 350 is carried out the pseudo-code of row 200~310.If not, then this control unit 350 is carried out the pseudo-code of row 320~440.
Row 210 judge whether the numbering of last decoding I-frame or the employed frame buffer 911 of P-frame is 0.If that then sets next decoding I-frame or the employed frame buffer 911 of P-frame is numbered 1, and set last one decipher I or the employed frame buffer 911 of P frame be numbered 1.If not, that then sets next decoding I-frame or the employed frame buffer 911 of P-frame is numbered 0, and set last one decipher I-frame or the employed frame buffer 911 of P-frame be numbered 0.
Row 320 judge that next frame belongs to the B frame, if then this control unit 350 is carried out the pseudo-code of row 340~430.
Row 340 judge whether the numbering of the employed frame buffer 911 of last decoding B-frame is 2.If that then sets next decoding B frame employed frame buffer 911 is numbered 3, and set last one decipher I or the employed frame buffer 911 of P frame be numbered 3.If not, that then sets next decoding B frame employed frame buffer 911 is numbered 2, and set last one decipher I-frame or the employed frame buffer 911 of P-frame be numbered 2.
Row 520 expressions are worked as this timing sequence generating device 951 and are produced the trigger event of display cycle time.Row 540 judge whether the numbering of the frame buffer 911 that next desire shows is the numbering of present frame buffer 911 just in use, if then expression decoding is not finished, shows the content (row 560) of the frame buffer 911 of use at present.If not, the content (row 600) that then shows the frame buffer 911 that next desire shows.
As shown in the above description, the characteristic that the present invention utilizes the decoding buffer data to share, at all coding image orders, the time of control image decoding and the renewal of decoding buffering area, and reach the purpose of separating province internal memory space and internal memory frequency range.Solve the problem that the prior art internal memory uses conflict simultaneously.
The foregoing description is only given an example for convenience of description, and the interest field that the present invention advocated should be as the criterion so that claim is described certainly, but not only limits to the foregoing description.

Claims (18)

1. image decoding and image transcoding method, its to video data stream decipher, demonstration and transcoding, the frame after it will be deciphered is temporary in four frame buffers, this video data stream has the frame of a sequence, frame after this every decoding has first and second, and this method comprises:
The decoding step, whether when previous frame decoding is finished, checking has aforementioned frame buffer to use, if then existing frame is deciphered and temporary to this frame buffer, and set the frame flag relevant with this frame buffer for using;
Step display when a last demonstration is finished, is checked the frame whether have after temporary this decoding of aforementioned frame buffer, if then read the frame after this decoding in this frame buffer, and shown; And
The transcoding step when previous frame decoding is finished, is checked the frame that whether has after temporary this decoding of aforementioned frame buffer, if the frame that then reads after this decoding in this frame buffer carries out transcoding.
2. method according to claim 1 wherein, in this decoding step, can not be used if judge this frame buffer, then this existing frame is not deciphered, and it is to be decoded with this existing frame of indication etc. to set the decoding mark.
3. method according to claim 2, wherein, when a last demonstration was finished, this step display reexamined this decoding mark, if this decoding mark is set, then this step display triggers this decoding step.
4. method according to claim 1 wherein, in this step display, as if the frame of judging after this frame buffer does not have temporary this decoding, then shows the field of previous demonstration.
5. method according to claim 1 wherein, in this step display, is checked the frame after whether this frame buffer has temporary this decoding, and it utilizes inspection this frame flag relevant with this frame buffer to judge.
6. method according to claim 1, wherein, in this transcoding step, the frame as if judging after this frame buffer does not have temporary this decoding does not then carry out this transcoding step.
7. image decoding and image transcoding system, its to video data stream decipher, demonstration and transcoding, this video data stream has the frame of a sequence, the frame after this every decoding has first and second, this system comprises:
Internal memory has four frame buffers, the image data when being used for temporary this video data stream decoding with transcoding;
Decoding unit, it is coupled to this internal memory, is used to accept this video data stream, and to this video data stream execution decoding, and the frame after the generation decoding, the frame after will deciphering again is written to this frame buffer of appointment in this internal memory, wherein, when previous frame decoding is finished, whether this decoding unit inspection has aforementioned frame buffer to use, if, then to existing frame coding, and temporary, and then set the frame flag relevant for using with this frame buffer to this frame buffer;
Display unit, it is coupled to this internal memory, read and show frame after this decoding with aforementioned frame buffer by appointment in this internal memory, wherein, when a last demonstration was finished, whether this display unit inspection had the frame after temporary this decoding of this frame buffer, if, then read the frame after this decoding in this frame buffer, and shown; And
Transcoding units, it is coupled to this internal memory, its from the frame buffer reading of data of this frame flag correspondence of setting to send coding unit to, and carry out the coding action and generation image bit stream, wherein, when previous frame decoding is finished, whether this transcoding units inspection has the frame after temporary this decoding of aforementioned frame buffer, if have, then read the frame after this decoding in this frame buffer, and give transcoding.
8. system according to claim 7, it also comprises:
Control unit, it is coupled to this decoding unit, this display unit and this transcoding units, is used for initialization and controls the execution sequential of this decoding unit, this display unit and this transcoding units.
9. system according to claim 8, wherein, this decoding unit also comprises the decoding mark, is used for when judging this frame buffer for can not use the time, and this decoding unit is then to this existing frame coding, and sets this decoding mark and be used to indicate existing frame etc. to be decoded.
10. system according to claim 9, wherein, when a last demonstration was finished, this display unit was also checked this decoding mark, if this decoding mark is set, then this display unit triggers this decoding unit.
11. system according to claim 8, wherein, this display unit then shows the field of previous demonstration as if the frame of judging after this frame buffer does not have temporary this decoding.
12. system according to claim 8, wherein, this display unit is checked the frame after whether this frame buffer has temporary this decoding, and it utilizes inspection this frame flag relevant with this frame buffer to judge.
13. system according to claim 8, wherein, this transcoding units is as if the frame of judging after this frame buffer does not have temporary this decoding, and then this transcoding units is not carried out transcoding.
14. system according to claim 8, wherein, previous frame decoding finishes and a last demonstration is finished to asynchronous.
15. system according to claim 8, wherein, previous frame decoding finishes and a last demonstration is finished to synchronously.
16. image decoding and image transcoding system, its to video data stream decipher, demonstration and transcoding, this video data stream has the frame of a sequence, has first and second behind this each frame coding, this system comprises:
Internal memory, it has four frame buffers, the image data when being used for temporary this video data stream decoding with image transcoding;
Decoding unit, it is coupled to this internal memory, is used to accept this video data stream, and this video data stream is carried out decoding, and produces the frame after the decoding, and the frame after will deciphering again is written to the aforementioned frame buffer of appointment in this internal memory;
Display unit, it is coupled to this internal memory, reads and shows frame after this decoding with the aforementioned frame buffer by appointment in this internal memory;
Transcoding units, it is coupled to this internal memory, and it, and is carried out the coding action and produces the image bit stream sending coding unit to from the frame buffer reading of data set; And
Control unit, it is coupled to this decoding unit, this display unit and this transcoding units, with initialization and control the execution sequential of this decoding unit, this display unit and this transcoding units and these frame buffers of access;
Wherein, this control unit utilizes the numbering of these frame buffers to control this decoding unit, the execution sequential of this display unit and this transcoding units, this control unit also comprises the timing sequence generating device to produce this decoding unit, the trigger event of this display unit and this transcoding units, when decoding is finished, this control unit is set at the frame buffer that next desire is used with present frame buffer just in use, produce the trigger event of decode cycle time when this timing sequence generating device, whether the frame buffer that the more next desire of this control unit is used is present frame buffer just in use, if not, represent still undecoded finishing, if, expression has been deciphered and has been finished, produce the trigger event of display cycle time when this timing sequence generating device, this control unit judges whether the numbering of the frame buffer that next desire shows is the numbering of present frame buffer just in use, if, expression decoding is not finished, the content that shows the frame buffer that uses at present, if not, the content that shows the frame buffer that next desire shows.
17. system according to claim 16, wherein, the trigger event of this decoding unit and the trigger event of this display unit are asynchronous.
18. system according to claim 16, wherein, the trigger event of this decoding unit and the trigger event of this display unit are synchronous.
CN 200610142059 2006-10-08 2006-10-08 Image decoding and image transcoding method and system Expired - Fee Related CN101159863B (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1288337A (en) * 1999-09-10 2001-03-21 株式会社Ntt杜可莫 Method and device used for automatic data converting coding video frequency image data
CN2648737Y (en) * 2003-10-17 2004-10-13 清华大学 Decoding code translator based on digital video broadcasting

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1288337A (en) * 1999-09-10 2001-03-21 株式会社Ntt杜可莫 Method and device used for automatic data converting coding video frequency image data
CN2648737Y (en) * 2003-10-17 2004-10-13 清华大学 Decoding code translator based on digital video broadcasting

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