CN101141124A - Level determining device and method of pulsewidth modulation signal - Google Patents

Level determining device and method of pulsewidth modulation signal Download PDF

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Publication number
CN101141124A
CN101141124A CNA2006101267388A CN200610126738A CN101141124A CN 101141124 A CN101141124 A CN 101141124A CN A2006101267388 A CNA2006101267388 A CN A2006101267388A CN 200610126738 A CN200610126738 A CN 200610126738A CN 101141124 A CN101141124 A CN 101141124A
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signal
reference voltage
level
pulse width
width modulation
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CN101141124B (en
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邱进发
郭柏村
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Delta Optoelectronics Inc
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Delta Optoelectronics Inc
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Abstract

The invention discloses a level deciding device for pulse-width signal and consists of a pulse-width signal generating circuit, a reference voltage reference generating circuit and a deciding circuit. The pulse-width signal generating circuit generates a first pulse-width signal; the reference voltage generating circuit generates a reference voltages signal and the deciding circuit is electrically connected with the pulse-width signal generating circuit and the reference voltages generating circuit and decides the high and low level value of the first pulse width signal according to the reference voltage so as to generate a second pulse-width signal.

Description

Level judging device and method for pulse width modulation signal
Technical Field
The present invention relates to a determining device and method, and more particularly, to a level determining device and method for a pwm signal.
Background
Due to the development of electronic technology, the use of Pulse Width Modulation (PWM) signals as control signals for electronic components has become more and more popular.
Referring to fig. 1, pulse width modulation is a method for digitally encoding the level (level) of an analog signal, i.e. converting the analog signal into a square wave with only high and low level differences. The important parameters include high level V H Low level V L And duty cycle D (DutyCycle), where duty cycle D represents where the square wave isAt a high level V H Is represented by a percentage, which is generally the proportion of the time T of (a) in one square wave period T.
Referring to fig. 2, in the prior art, a Transistor-logic (TTL) circuit 11 determines high and low levels of a pwm signal Sp01 generated by a pwm signal generating circuit 12. However, when the TTL circuit 11 determines the low level, the maximum determination voltage value is generally 0.8V, that is, when the pwm signal Sp01 is interfered by noise during signal transmission, and the low level value of the pwm signal Sp01 is greater than 0.8V, the TTL circuit 11 may erroneously determine the high level or cannot determine the high level, so that the TTL circuit 11 or its lower circuit may malfunction.
Accordingly, it is an important subject to provide a level determining apparatus and method for pulse width modulation signals, which have better noise tolerance and avoid the occurrence of erroneous determination of the level values of the pulse width modulation signals.
Disclosure of Invention
In view of the above-mentioned problems, it is an object of the present invention to provide a level determining apparatus and method capable of determining a high level (level) value and a low level (level) value of a pwm signal according to different system requirements.
Accordingly, to achieve the above objective, an apparatus for determining a level of a pwm signal according to the present invention includes a pwm signal generating circuit, a reference voltage generating circuit, and a determining circuit. The pulse width modulation signal generating circuit generates a first pulse width modulation signal; the reference voltage generating circuit generates a voltage signal; the judgment loop is electrically connected with the pulse width modulation signal generation loop and the reference voltage generation loop respectively, and judges the high and low level values of the first pulse width modulation signal according to the voltage signal so as to generate a second pulse width modulation signal.
In addition, to achieve the above object, a method for determining a level of a pwm signal according to the present invention includes the steps of: generating a first pulse width modulation signal by a pulse width modulation signal generating circuit; generating a reference voltage signal by a reference voltage generating circuit; and the judgment loop judges the high and low level values of the first pulse width modulation signal according to the reference voltage signal so as to generate a second pulse width modulation signal.
In view of the above, the present invention provides a level determination apparatus and method for pwm signals, which uses a voltage signal generated by a reference voltage generation circuit, so that the determination circuit determines whether the pwm signal is at a high level or a low level according to the voltage signal, and can properly adjust the magnitude of the voltage signal according to different systems to accurately determine the level value of the pwm signal.
Drawings
FIG. 1 is a diagram illustrating a conventional PWM signal;
FIG. 2 is a diagram illustrating a level determining apparatus of a conventional PWM signal;
FIG. 3 is a diagram illustrating an apparatus for determining a level of a PWM signal according to a preferred embodiment of the present invention;
FIGS. 4A and 4B are schematic diagrams illustrating a variation of a reference voltage generating circuit of a level determination apparatus for a PWM signal according to a preferred embodiment of the present invention; and
fig. 5 is a flowchart illustrating a method for determining a level of a pwm signal according to a preferred embodiment of the present invention.
Element number description:
11: transistor-logic circuit
12: pulse width modulation signal generating circuit
2: level judging device for pulse width modulation signal
21: pulse width modulation signal generating circuit
22: reference voltage generating circuit
23: judging loop
231: comparator with a comparator circuit
D: duty cycle
t: time of day
T: period of time
V H : high level
V L : low level of electricity
Sp01: pulse width modulation signal
Sp11: first pulse width modulation signal
Sp12: second pulse width modulation signal
Sv1: reference voltage signal
P1: power supply signal
V DD : voltage of
Is: electric current
R1: a first resistor
R2: second resistor
Rs: resistor with a resistor element
# in1: positive input terminal
# in2: inverting input terminal
# out: output terminal
Detailed Description
Hereinafter, an apparatus and a method for determining a level of a pwm signal according to a preferred embodiment of the present invention will be described with reference to the accompanying drawings.
Referring to fig. 3, a level determination apparatus 2 for pwm signals according to a preferred embodiment of the present invention includes a pwm signal generating circuit 21, a reference voltage generating circuit 22 and a determining circuit 23.
The pwm signal generating circuit 21 generates the first pwm signal Sp11, and the frequency, duty cycle and level of the first pwm signal Sp11 can be arbitrarily adjusted according to different system requirements. The first pulse width modulation signal Sp11 can be generated by an analog circuit or a digital circuit.
The reference voltage generating circuit 22 generates a reference voltage signal Sv1 according to the power signal P1. As shown in fig. 4A, when the power signal P1 is the voltage VDD, that is, the power signal P1 is generated by a voltage source, the reference voltage generating circuit 22 includes a voltage divider, in this embodiment, the voltage divider has a first resistor R1 and a second resistor R2, and converts the power signal P1 into the reference voltage signal Sv1 through the first resistor R1 and the second resistor R2, and the reference voltage signal Sv1 can be obtained by the following formula:
Figure A20061012673800071
as shown in fig. 4B, when the power signal P1 Is the current Is, that Is, the power signal P1 Is generated by a current source, in this example, the reference voltage generating circuit 22 includes a resistor Rs, and the voltage drop generated by the current Is flowing through the resistor Rs Is used as the reference voltage signal Sv1.
Referring to fig. 3 again, the determining circuit 23 is electrically connected to the pwm signal generating circuit 21 and the reference voltage generating circuit 22, respectively, and determines the high and low level values of the first pwm signal Sp11 according to the reference voltage signal Sv1, and accordingly generates the second pwm signal Sp12. The determining circuit 23 may include a Comparator 231 (Comparator) or an operational Amplifier (OP Amplifier), and in the embodiment, the Comparator 231 is taken as an example.
In the present embodiment, the comparator 231 has a Positive terminal # in1, a Negative terminal # in2 and an output terminal # out, wherein the Positive terminal # in1 is electrically connected to the pwm signal generating module 21, and the first pwm signal Sp11 is inputted from the Positive terminal # in1 to the comparator 231; the inverting input # in2 is electrically connected to the reference voltage generating circuit 22, and the reference voltage signal Sv1 is input from the inverting input # in2 to the comparator 231.
Since the characteristics of a typical comparator are: when the level value of the positive input terminal is greater than that of the negative input terminal, the output terminal outputs a high level. Conversely, when the level value of the forward input terminal is less than that of the reverse input terminal, the output terminal outputs a low level. Therefore, the level determination device 2 of the pwm signal of the present invention can adjust the magnitude of the reference voltage signal Sv1 according to the system difference, so that the determination loop 23 can accurately determine the high and low levels of the first pwm signal Sp11 to generate the second pwm signal Sp12, which is not easily interfered by noise to generate erroneous determination.
In addition, referring to fig. 5, a method for determining a level of a pwm signal according to a preferred embodiment of the present invention includes the following steps: step S01, a pulse width modulation signal generating circuit generates a first pulse width modulation signal; step S02, generating a reference voltage signal by a reference voltage generating circuit; and step S03, the judgment loop judges the high and low level values of the first PWM signal according to the reference voltage signal to generate a second PWM signal. Since the detailed level determination method has been described in the above embodiments, it is not repeated herein.
In summary, according to the level determination apparatus and method of the pwm signal of the present invention, the reference voltage signal generated by the reference voltage generation circuit is utilized, so that the determination circuit determines the high level or the low level of the pwm signal according to the reference voltage signal, and the magnitude of the reference voltage signal can be properly adjusted according to different systems to accurately determine the level value of the pwm signal.
The foregoing is by way of example only, and not limiting. Any equivalent modifications or variations which do not depart from the spirit and scope of the present invention are intended to be included within the scope of the appended claims.

Claims (17)

1. A level judging device of a pulse width modulation signal, comprising:
a pulse width modulation signal generating circuit for generating a first pulse width modulation signal;
a reference voltage generating circuit for generating a reference voltage signal; and
and the judgment loop is respectively electrically connected with the pulse width modulation signal generation loop and the reference voltage generation loop and judges the high and low level values of the first pulse width modulation signal according to the reference voltage signal so as to generate a second pulse width modulation signal.
2. The level judging device according to claim 1, wherein the judging loop comprises a comparator.
3. The level judging device according to claim 1, wherein the judging loop comprises an operational amplifier.
4. The apparatus of claim 1, wherein the reference voltage generating circuit generates the reference voltage signal according to a power signal inputted from an external source.
5. The level judging device according to claim 4, wherein the power signal is a voltage.
6. The level determining apparatus as claimed in claim 5, wherein the reference voltage generating circuit comprises a voltage divider generating the reference voltage signal.
7. The level judging device of claim 6, wherein the voltage divider comprises a first resistor and a second resistor.
8. The level determining apparatus as claimed in claim 4, wherein the power signal is a current.
9. The apparatus of claim 8, wherein the reference voltage generating circuit comprises a resistor for generating the reference voltage signal according to the current.
10. The level determining apparatus as claimed in claim 1, wherein the pwm signal generating circuit is an analog circuit or a digital circuit.
11. A method for judging the level of a pulse width modulation signal comprises the following steps:
generating a first pulse width modulation signal by a pulse width modulation signal generating circuit;
generating a reference voltage signal by a reference voltage generating circuit; and
the judgment loop judges the high and low level values of the first pulse width modulation signal according to the reference voltage signal so as to generate a second pulse width modulation signal.
12. The method of claim 11, further comprising the step of inputting a power signal to the reference voltage generating circuit.
13. The level determination method as claimed in claim 12, wherein the reference voltage signal is generated from the power signal via a voltage divider.
14. The level determination method as claimed in claim 12, wherein the reference voltage signal is generated from the power signal through a resistor.
15. The method of claim 11, wherein the reference voltage signal and the first pwm signal are inputted into a comparator of the determining loop to generate a second pwm signal.
16. The method of claim 11, wherein the reference voltage signal and the first PWM signal are inputted to an operational amplifier of the determining loop to generate a second PWM signal.
17. The level determination method as claimed in claim 11, wherein the pwm signal generating circuit is an analog circuit or a digital circuit.
CN2006101267388A 2006-09-06 2006-09-06 Level determining device and method of pulsewidth modulation signal Expired - Fee Related CN101141124B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102084592B (en) * 2008-04-18 2014-04-23 努吉拉有限公司 Improved pulse width modulation
CN109586690A (en) * 2018-11-22 2019-04-05 北京遥感设备研究所 A kind of novel pulsewidth can self-regulated pulse modulated circuit and working method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4424546B2 (en) * 2005-01-13 2010-03-03 Okiセミコンダクタ株式会社 Pulse width modulation circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102084592B (en) * 2008-04-18 2014-04-23 努吉拉有限公司 Improved pulse width modulation
CN109586690A (en) * 2018-11-22 2019-04-05 北京遥感设备研究所 A kind of novel pulsewidth can self-regulated pulse modulated circuit and working method
CN109586690B (en) * 2018-11-22 2023-07-25 北京遥感设备研究所 Novel pulse modulation circuit with self-adjustable pulse width and working method

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