CN101118511A - Process for basic input output system supporting vertical card - Google Patents
Process for basic input output system supporting vertical card Download PDFInfo
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- CN101118511A CN101118511A CNA2006101083172A CN200610108317A CN101118511A CN 101118511 A CN101118511 A CN 101118511A CN A2006101083172 A CNA2006101083172 A CN A2006101083172A CN 200610108317 A CN200610108317 A CN 200610108317A CN 101118511 A CN101118511 A CN 101118511A
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Abstract
The present invention provides an upstanding card supporting method in a basic input output system. The method is that when the basic input output system arranged in a mainboard conducts a self testing program, the basic input output system reads the resource information of each upstanding card arranged on the mainboard, and creates a group state information according to the resource information, and makes the basic input output system provide the group state information to an operation system after the self testing program is finished, and then the operation system can start the upstanding card according to the group state information.
Description
Technical field
The invention relates to Basic Input or Output System (BIOS), especially refer to that a kind of Basic Input or Output System (BIOS) can offer a resource information of Basic Input or Output System (BIOS) according to a vertical card, dynamically sets up and can offer the configuration info that an operating system correctly activates this vertical card.
Background technology
In recent years, server is because of the normalization of its cabinet size, can be installed in the machine room advantage such as unified management again, and widely each enterprise uses; With blade point type server, be installed in the frame to operate, one of characteristic of this blade point type server maximum, be in its limited space, lay various chipsets, electronic package and various interface device, make the more traditional server of this blade point type server have more high-effect, yet, the casing of this blade point type server highly is the restriction of 1U (1U=13/4 " or 44.45mm) because of being subjected to normalization; though make the interior motherboard of its casing be provided with many slots, can't the adapter that highly exceeds this casing directly be plugged on this slot in upright mode.
Based on above-mentioned reason, there are some manufacturers to develop a kind of vertical card (riser card), outward appearance type shape and this adapter of this vertical card are roughly the same, not existing together of this vertical card and this adapter is to be that this vertical card is provided with a circuit board that highly is no more than this casing, one side of this circuit board is provided with an expansion slot, the opening direction of this expansion slot then and between this slot is at right angles, so, this adapter will be with the mode of level this expansion slot of pegging graft, make this adapter and this motherboard be parallel shape, promptly can not exceed the height of this casing.
Yet; after this adapter is plugged on this expansion slot; usually can cover other slot in this casing; so; though solved the upright problem of pegging graft of this adapter; simultaneously; but reduced the expansion capacity of this server on the contrary; therefore; this manufacturer is for can improve this problem; and increase the function of this vertical card; be the circuit that on this vertical card, utilizes different electronic modules to be combined into, make this expansion slot support the communications protocol identical simultaneously, or this expansion slot support be different from the communications protocol of this slot with this slot; or a part of expansion slot support communications protocol identical with this slot of this vertical card, another part expansion slot then supports to be different from the communications protocol of this slot.Moreover, usually a Basic Input or Output System (BIOS) (BIOS) of this server is in order correctly to enable this vertical card, be in this Basic Input or Output System (BIOS), to set up a configuration info of supporting this vertical card, make the employed operating system of this server to enable this vertical card according to this configuration info.
The device number (device number) of one expansion slot of different vertical cards, may be identical with the device number (device number) of another expansion slot, but use different interrupt request paths, for example: wherein a kind of vertical card is provided with one and extends peripheral part interconnection (Peripheral ComponentInterconnect Extended, be called for short: PCI-X) expansion slot, and another kind of vertical card has a quick peripheral part interconnection (Peripheral Component Interconnect Express, be called for short: PCI-E) expansion slot and a PCI-X expansion slot, shown in following, the two has the same apparatus number, but uses different interrupt request paths:
| Expansion slot | Device number | The interrupt request path of program interrupt controller but (PIC IRQ router) | But advance the interrupt request number (APIC IRQ number) of rank program interrupt controller |
| Vertical card 1:PCIX slot | 3 | LINKA，C，B，D | 24，26，25，27 |
| Vertical card 2:PCIX slot | 3 | LINKC，A，D，B | 26，24，27，25 |
Moreover, advance rank program interrupt controller (IO APICController is as PXH or PXHD) but have I/O port on some vertical cards, but some vertical card there is not then I/O port to advance the rank program interrupt controller; Again, same PCI or PCI-X or PCI-E bridge (bridge) because of different vertical cards (as: have the vertical card of two PCI-E expansion slots, or have the vertical card of PXH and two PCI-E expansion slots), will have different configuration infos.
In sum, a Basic Input or Output System (BIOS) (BIOS) is only arranged in this server, this Basic Input or Output System (BIOS) only can be set up a configuration info of its a kind of vertical card of supporting, if the configuration info of the vertical card that the configuration info of the vertical card that this server is pegged graft and this Basic Input or Output System (BIOS) are set is not inconsistent, then the operating system of this server then can't correctly be enabled this vertical card, so, how to make its set Basic Input or Output System (BIOS) of this server by utilizing, can make this operating system can from this Basic Input or Output System (BIOS), obtain the configuration info of the vertical card that is installed in this server, in order to correctly to activate various vertical cards, be a very urgent problem demanding prompt solution.
Summary of the invention
Because aforesaid many disappearances, the inventor is through the permanent research and experiment of making great efforts, and development and Design goes out a kind of " method of basic input output system supporting vertical card " of the present invention finally, in the hope of by proposition of the present invention, can contribute to some extent society.
A purpose of the present invention, provide a kind of method of basic input output system supporting vertical card, be that the set Basic Input or Output System (BIOS) of a motherboard is when carrying out self test program, can read the set resource information of any vertical card that this motherboard is pegged graft earlier, this Basic Input or Output System (BIOS) is set up a configuration info according to this resource information again, and this configuration info offered an operating system, this operating system is promptly enabled this vertical card according to this configuration info, so, this Basic Input or Output System (BIOS) is not a configuration info that preestablishes its single kind of vertical card can supporting, but dynamically set up this configuration info according to the resource information that it read, make this operating system in this Basic Input or Output System (BIOS), to read to go to and meet the respectively configuration info of this vertical card, and then correctly enable various vertical card, be not only to support single kind of vertical card, only support the shortcoming of single vertical card in order to solve traditional Basic Input or Output System (BIOS).
Description of drawings
Fig. 1 is an action flow chart of the present invention;
Fig. 2 is that Basic Input or Output System (BIOS) of the present invention reads this resource information and sets up the action flow chart of this configuration info.
Embodiment
If each slot (slot) of each vertical card (riser card) is an adapter on pegging graft, after one Basic Input or Output System (BIOS) of this motherboard activates, to read the identity code (riser card ID) of this vertical card from the set circuit of this vertical card, the slot numbering of each slot that this vertical card is set, and read a device number (device number) of this adapter and the bus number resource informations such as (bus number) that this Basic Input or Output System (BIOS) is connected to this adapter from the set circuit of this adapter, and store an interrupt request routing table (the Programmable Interrupt Controller Interrupt ReQuestrouting tabole of the various adapters of a plurality of couplings and vertical card combination in this Basic Input or Output System (BIOS), be called for short: PIC IRQ routing table), one multiprocessor configuration table (Multi-Processor Specification configuration table, be called for short: MPSconfiguration table), one advances rank power management routing table (Advanced ConfigurationPower Interface (ACPI) IRQ routing table), and the configuration info that this Basic Input or Output System (BIOS) can be set up according to each resource information that this adapter and vertical card are formed, and this configuration info comprises each break path (as: Interrupt Pin A of this adapter, B, C, D), the available interruption numbering of each break path (as: hexadecimal code for the 0xDC98 tabular form can with interruption be numbered 3,4,7,10,11,12,14,15), (Register is as being numbered 60h in the set chipset of this motherboard for one route-caching device of each break path, 63h, 62h, the buffer of 6Bh), each break path (Interrupt Pin A, B, C, D) but into rank program interrupt controller (IO APIC controller) is gone in an output of being linked, respectively but the pin numbering on the rank program interrupt controller (IO APIC controller) into and the attribute (polarity of interruption of each interruption are gone in one output of linking of this break path, triggering mode, kenel) etc.
Therefore, method at a kind of basic input output system supporting vertical card of the present invention, see also shown in Figure 1, it is a configuration info that in the set Basic Input or Output System (BIOS) of motherboard, is provided with corresponding different resource information, make this Basic Input or Output System (BIOS) begin to carry out (step 101) after the self test program, read earlier a plurality of resource informations (step 102) of the adapter that the slot of the vertical card installed on this motherboard and this vertical card pegs graft by this Basic Input or Output System (BIOS), make this Basic Input or Output System (BIOS) set up a configuration info (step 103) of corresponding described resource information according to described resource information, and this configuration info offered an operating system (step 104), make this operating system see through this configuration info and enable this vertical card (step 105), so, this motherboard is after this Basic Input or Output System (BIOS) begins to carry out self test program at every turn, resource information at the vertical card of installing at present on this motherboard, dynamically set up out a configuration info that meets this vertical card and offer this operating system, but not only can provide a configuration info of predefined single kind of vertical card to operating system as traditional Basic Input or Output System (BIOS), so this method will effectively solve the shortcoming that traditional Basic Input or Output System (BIOS) is only supported single vertical card.
In one embodiment of this invention, see also shown in Figure 2ly, this Basic Input or Output System (BIOS) is to read this resource information and set up this configuration info according to the following step:
(201) read the identity code (riser card ID) of this vertical card;
(202) read the device number and a bus number of the adapter that this vertical card pegs graft;
(203) but obtain according to resource informations such as this identity code, device number and bus number a program interrupt controller interrupt request routing table (PIC IRQ routing table), a multiprocessor configuration table (MPS (Multi-Processor Specification) configurationtable), that should resource information be advanced the configuration info that rank power management routing table (ACPI IRQ routing table) is set up;
(204) but again this configuration info is advanced rank power management routing table program interrupt controller interrupt request routing table and multiprocessor configuration table with this and provides respectively and feed rank power-management interface (ACPI) but the operating system of program interrupt controller (PIC) and multiprocessor (MPS) pattern.
In above-mentioned steps (204), but this Basic Input or Output System (BIOS) is advanced rank program interrupt controller description list (Multiple APIC Description Table with more than one, be called for short: MADT) and one advance rank power-management interface machine language program (ACPI Machine Language, be called for short AML) in be denoted as " _ PRT " part coding repay to this and advance rank power management routing table, use for the operating system of advancing rank power-management interface pattern.
In this embodiment, this interrupt request routing table comprises available interruption numbering, a slot numbering of route-caching device (Register), the break path of this bus number (bus number), device number (device number), break path (Interrupt Pin A, B, C, D), this interrupt request routing table (PIC IRQ routing table) be for the operating system of PIC pattern used.Illustrate for an embodiment for the composition aspect that can understand this interrupt request routing table (PIC IRQ routing table) is following:
The identity code (rise rcard ID) of supposing this vertical card is 3, this bus number is 6, the slot numbering of this one of them slot of vertical card is 1, and the device of having pegged graft on this slot is numbered 3 adapter, the pin position that this adapter sends look-at-me is respectively A, B, C, D pin (InterruptPin A, B, C, D), and but this operating system is under the program interrupt controller pattern, the route-caching device (Register) in this path is 60h in regular turn, 63h, 62h, 6Bh, break path (Interrupt Pin A, B, C, D) available interruption numbering is that 0xDC98 (is shown 1,101 11,001,001 1000 with binary form with sexadecimal, its available interruption of tabular form is numbered 3,4,7,10,11,12,14,15), then but this operating system is under the program interrupt controller pattern, and (PIC IRQ routingtable) is as shown in the table for this interrupt request routing table:
| Pin A | Pin B | Pin C | Pin D | ||||||||
| Bus | Dev | Reg | Map | Reg | Map | Reg | Map | Reg | Map | Slot | Rev |
| 0x06 | 0x18 | 0x60 | 0xDC98 | 0x63 | 0xDC98 | 0x62 | 0xDC98 | 0x6B | 0xDC98 | 0x01 | 0x00 |
And this multiprocessor configuration group table (MPS Configuration Table) but comprise into routing table of rank program interrupt controller (IO APIC controller entries) and interrupt request routing table (IRQrouting entries) at least, wherein this is exported into the control routing table and comprises the identity code (IOAPIC ID) of exporting controller, status information (Enable/disable), version information (version) and access site (MMIOaddress) etc., this interrupt request routing table then includes this bus number (Bus Number), device number (Device Number), look-at-me is sent the pin position, the identity code (IO APICNumber) of controller is gone in output, polarity (Polarity) information, triggering mode (Level or Edge trigger) information, trigger classification (Interrupt Type) information, but trigger pip is gone into pin numbering (Wire number on IO APIC Cont roller) information on the rank program interrupt controller (IOAPIC Cont roller) into etc. in output, above example, but this output of advancing the rank program interrupt controller goes into to control routing table (IO APICcont roller entries) and interrupt request routing table (IRQ routing entries) is as shown in the table respectively:
Output goes into to control routing table (IO APIC controller entries)
| I/O APIC | ID：2 | Enabled | Version： 20h | Address： fec00000h | Annotations and comments: IOAPIC cont rol ler#1 |
| I/O APIC | ID：3 | Enabled | Version： 20h | Address ：fec80000h | Annotations and comments: IOAPIC cont roller#2 |
| I/O APIC | ID：4 | Enabled | Version： 20h | Address： fec84000h | Annotations and comments:: IOAPIC controller#3 if Active riser card present |
| I/O APIC | ID：5 | Enabled | Version： 20h | Address： fec84400h | Annotations and comments: IOAPIC controller#4 if Active riser card present |
The interrupt request routing table (IRQrouting entries) of the identity code (IO APIC Number) 3 of controller is gone in output
| Bus | IRQ Signal | Dev | APIC | Wire | Polarity | Trigger | Type | IO/Local |
| 6：PCI | 0Ch：INT_A# | 3h | 3 | 0 | Low | Level | INT | I/O |
| 6：PCI | 0Dh：INT_B# | 3h | 3 | 3 | Low | Level | INT | I/O |
| 6：PCI | 0Eh：INT_C# | 3h | 3 | 2 | Low | Level | INT | I/O |
| 6：PCI | 0Fh：INT_D# | 3h | 3 | 1 | Low | Level | INT | I/O |
Because but this output of advancing the rank program interrupt controller goes into to control routing table and interrupt request routing table and aforementioned each table, be to belong to the known standard format of industry, promptly repeat no more at this.
In sum, the interrupt mode that this Basic Input or Output System (BIOS) sets at present with this operating system (PIC/APIC/MPS pattern), should advance rank program interrupt controller description list (ACPI MADT) more and advance rank power-management interface machine language program (ACPI Machine Language but utilize, be called for short AML) in be denoted as " _ PRT " part coding repay correctly the interrupt request path and give and have the into operating system of rank power-management interface (ACPI), multiprocessor configuration group table is repaid the operating system to the MPS pattern in " Signa ture_MP_ " mode in addition, again, but should program interrupt controller interrupt request routing table with " Signature ＄ PIR " but mode is repaid the operating system to program interrupt controller (PIC) pattern, so, this operating system is no matter under any pattern, all can provide correct configuration info, make this operating system can correctly enable this vertical card by this Basic Input or Output System (BIOS).In addition, by above-listed each table as can be known, have resource informations such as a device number and a bus number respectively in each table, be with, finding out corresponding configuration info with a plurality of resource informations in the present invention is feasible in fact.
Moreover, no matter be plugged into any vertical card on this motherboard, this Basic Input or Output System (BIOS) all can provide the configuration info that meets this vertical card to this operating system, in other words, after this Basic Input or Output System (BIOS) begins to carry out self test program, obtain this resource information by this vertical card, perhaps, the resource information of each vertical card can be stored among the BIOS, and via reading the identity code (Riser CardId) on the vertical card and then from BIOS, finding out its corresponding vertical card resource information, set up the configuration info that can offer this operating system according to this resource information again, so, can solve the shortcoming of traditional Basic Input or Output System (BIOS).Moreover, vertical card identity code (Riser Card Id) can see through example for I2C or GPI mode by obtaining on the vertical card.
The above only is a specific embodiment of the best of the present invention, and structural attitude of the present invention is not limited thereto, and anyly is familiar with this skill person in field of the present invention, can think easily and variation or modification, all can be encompassed in the claim of this case.
Claims (8)
1. the method for a basic input output system supporting vertical card be a configuration info that is provided with corresponding different resource information in the set Basic Input or Output System (BIOS) of a motherboard, and this Basic Input or Output System (BIOS) is to handle according to the following step:
Carry out self test program;
This Basic Input or Output System (BIOS) reads at least one resource information of the adapter that each slot of the vertical card installed on this motherboard and this vertical card pegs graft;
Obtain a configuration info that should resource information according to this resource information;
This configuration info is offered an operating system.
2. the method for claim 1, wherein this operating system sees through this configuration info and enables this vertical card.
3. method as claimed in claim 2, wherein said resource information comprises the identity code of this vertical card, a device number and a bus number of this adapter at least, this Basic Input or Output System (BIOS) is after carrying out self test program, to read described resource information according to the following step:
Read the identity code of this vertical card;
Read the device number and the bus number of the adapter that this vertical card pegs graft.
4. method as claimed in claim 3, after wherein this Basic Input or Output System (BIOS) reads this resource information, set up this configuration info according to the following step, and this configuration info is offered this operating system:
But interrupt request routing table, the multiprocessor configuration table, obtained a program interrupt controller that should resource information according to this identity code, device number and bus number resource information advance rank power management configuration table, meet the configuration info of this resource information that reads with foundation;
But but but again this configuration info is advanced rank program interrupt controller description list with this and advance rank power-management interface machine language sign indicating number program interrupt controller interrupt request routing table and the multiprocessor configuration table provides the operating system that feeds rank power-management interface program interrupt controller and multi-processor mode respectively.
5. method as claimed in claim 4, wherein this interrupt request routing table comprises the route-caching device of this bus number, device number, break path, the available interruption numbering and a slot numbering of break path.
6. method as claimed in claim 4, but wherein and this multiprocessor configuration group table comprises that at least into the output of rank program interrupt controller goes into to control routing table and interrupt request routing table.
7. method as claimed in claim 4, but wherein this advances rank power management configuration table and then is provided with an output of advancing the rank program interrupt controller and goes into to control routing table and interrupt request routing table.
8. method as claimed in claim 7, wherein this Basic Input or Output System (BIOS) one is advanced rank power-management interface interrupt mode with what this operating system set at present, but utilizes to advance coding repayment that rank program interrupt controller description list and advances rank power-management interface machine language program more one and correctly give and have the into operating system of rank power-management interface in each interrupt request path.
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| Application Number | Priority Date | Filing Date | Title |
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| CNB2006101083172A CN100498731C (en) | 2006-08-01 | 2006-08-01 | Process for basic input output system supporting vertical card |
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| Application Number | Priority Date | Filing Date | Title |
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| CNB2006101083172A CN100498731C (en) | 2006-08-01 | 2006-08-01 | Process for basic input output system supporting vertical card |
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| CN101118511A true CN101118511A (en) | 2008-02-06 |
| CN100498731C CN100498731C (en) | 2009-06-10 |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102193056A (en) * | 2010-01-25 | 2011-09-21 | 爱德万测试株式会社 | Test apparatus and test method |
| CN105787343A (en) * | 2014-12-17 | 2016-07-20 | 联想（上海）信息技术有限公司 | Method, device and electronic equipment for external equipment certification management |
| CN107656855A (en) * | 2016-07-26 | 2018-02-02 | 佛山市顺德区顺达电脑厂有限公司 | User is reminded to misplace CPU system and method |
| CN108984213A (en) * | 2018-05-22 | 2018-12-11 | 郑州云海信息技术有限公司 | Support method, mainboard and the server of the identification extension of polymorphic type Riser card |
| CN105760742B (en) * | 2014-12-17 | 2019-01-15 | 联想（上海）信息技术有限公司 | External equipment authentication management method, apparatus and electronic equipment |
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2006
- 2006-08-01 CN CNB2006101083172A patent/CN100498731C/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102193056A (en) * | 2010-01-25 | 2011-09-21 | 爱德万测试株式会社 | Test apparatus and test method |
| CN105787343A (en) * | 2014-12-17 | 2016-07-20 | 联想（上海）信息技术有限公司 | Method, device and electronic equipment for external equipment certification management |
| CN105787343B (en) * | 2014-12-17 | 2019-01-15 | 联想（上海）信息技术有限公司 | External equipment authentication management method, apparatus and electronic equipment |
| CN105760742B (en) * | 2014-12-17 | 2019-01-15 | 联想（上海）信息技术有限公司 | External equipment authentication management method, apparatus and electronic equipment |
| CN107656855A (en) * | 2016-07-26 | 2018-02-02 | 佛山市顺德区顺达电脑厂有限公司 | User is reminded to misplace CPU system and method |
| CN107656855B (en) * | 2016-07-26 | 2020-06-30 | 佛山市顺德区顺达电脑厂有限公司 | System and method for reminding user of misplacing CPU |
| CN108984213A (en) * | 2018-05-22 | 2018-12-11 | 郑州云海信息技术有限公司 | Support method, mainboard and the server of the identification extension of polymorphic type Riser card |
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|---|---|
| CN100498731C (en) | 2009-06-10 |
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