CN100574251C - A kind of multiprotocol label switching route system interface arrangement and retransmission method - Google Patents

A kind of multiprotocol label switching route system interface arrangement and retransmission method Download PDF

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CN100574251C
CN100574251C CNB021551561A CN02155156A CN100574251C CN 100574251 C CN100574251 C CN 100574251C CN B021551561 A CNB021551561 A CN B021551561A CN 02155156 A CN02155156 A CN 02155156A CN 100574251 C CN100574251 C CN 100574251C
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sar
head
bag
cam
label
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CN1507228A (en
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翟红健
胡海聿
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ZTE Corp
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Abstract

The present invention relates to a kind of multiprotocol label switching route system interface arrangement and retransmission method, interface arrangement comprises: physical layer terminal, route/forward direction engine, AAL5/SAR processing unit, route wherein/forward direction engine also comprises: CAM RAM, splitter, an IP processing logic.The present invention is by optimizing the metadata cache structure in the multiprotocol label switching route system, to reduce the progression of the buffer memory of packet in the multiprotocol label switching route system, accelerate the forwarding rate of packet, save memory space, in route system, can simplied system structure, and improve the performance of system and reduce system cost.

Description

A kind of multiprotocol label switching route system interface arrangement and retransmission method
Affiliated technical field
The present invention relates to a kind of optimization method of metadata cache structure of the route system that uses multiprotocol label switching (mpls), belong to the data communication field.
Background technology
MPLS is derived from the needs of IP over ATM (based on the Internet Protocol of asynchronous transfer mode), is operated in network layer in early days based on the IP agreement, and its core technology is equally applicable to other network layer protocol.MPLS is used for a certain specific link layer without limits, but groundwork still concentrates on the ATM (asynchronous transfer mode).Development along with IP network, especially on lucky bit line speed multi-layer switches, when hope directly developed into IP/OPTICS (DWDM) (Internet Protocol/light (dense wave division multipurpose)) by IP/SDH/OPTICS (Internet Protocol/SDH (Synchronous Digital Hierarchy)/optical-fiber network) pattern, MPLS was the technology that must use and develop.Because the dense wave division multipurpose DWDM from IP to light, from the notion of level, there is a link layer centre, promptly is used to the one deck that transmits, exchanges and transmit.The existing IP of being applicable to is grouped in the technology that link layer transmits, and has only cell two classes of SDH and the Asynchronous Transfer Mode ATM of synchronous transfer module STM.MPLS is applicable to SDH and ATM and simultaneously applicable to the technology of the arbitrary specific link layer standard of future development.MPLS is also containing network enabled management, traffic engineering, QOS (service quality) and COS every functions such as (service types).IP can could directly transmit on OPTICS by MPLS (also can adopt other corresponding mode certainly).
The structure of the metadata cache in the design philosophy of a kind of MPLS router of the prior art (" design of multiprotocol label switching (mpls) router " literary composition that, Cao Mingcui, Chen Chunhan towering by breadboard Liu of high-speed wideband optical communication of the Central China University of Science and Technology referring to calendar year 2001 first-phase " data communication ", Li Feng write).The MPLS router is made up of interface card and Switching Module, as shown in Figure 1.Interface card 1-n comprises that physical layer process, Mac (media interviews control) layer are handled, the IP layer is handled (comprise route/forwarding engine, SAR (Segmentation And Re-assembly splits and reorganization) handles).Ply-yarn drill receives input and forms atm cell stream, just outputs to the corresponding interface by crosspoint.If management information flow is just exported to as the ply-yarn drill of administrative unit by crosspoint and handled, return to the corresponding interface ply-yarn drill again.
The MPLS interface module is divided into Phy Termination (physical layer terminal), Routing/ForwardingEngine (route/forward direction engine), AAL5/SAR handles (type 5/ fractionation is joined in the professional examination of ATM and reorganization is handled) unit 3 parts, as shown in Figure 2.Phy Termination finishes the extraction of Mac frame.Routing/Forwarding Engine extracts IP head (adding TCP (transmission control protocol) head when considering QOS possibly), this IP head or common IP head, or Labelled (mark) IP head excessively from the Mac frame.By searching, to generating the IP bag that Labelled crosses IP first watch new (Push of label (pushing away), Pop (ejection), Swap (exchange), TTL (remaining time) renewal, CRC (CRC) generation).The AAL5/SAR processing unit encapsulates the IP bag that Labelled crosses earlier with AAL5, handle the atm cell stream that forms 53 bytes by SAR again.
Phy Termination is made up of Ethernet Phy (ethernet physical layer), MII/GMII (PCS/PMA/PMD) (medium independent interface/gigabit medium independent interface (physical code word layer/physical medium visit/physical medium relies on)), Ethernet Mac (ethernet medium access control apparatus), it receives incoming bit stream, gives Routing/Forwarding Engine and handles.
Routing/Forwarding Engine is the core of MPLS router, it be divided into again IP processing logic, an IP processing logic, CAM module such as RAM (Content Addressable Memory random asccess memory).CAM (Content Addressable Memory) module is made up of two kinds of CAM unit: a kind of label lookup (being called label C AM) of carrying out; Another kind carries out IP route querying (being called IP CAM).Ram cell is deposited the pairing information of CAM matched and searched.As shown in Figure 3, the importation of IP processing logic receives the Mac frame, puts into IP bag input block (being called for short IP bag buffering), and the IP head part is sent to IP processing logic.As shown in Figure 4, IP processing logic searched CAM, search RAM according to the match address that CAM returns, thereby obtain corresponding fresh information on first watch (as exporting label etc.) and control signal corresponding (as the Swap of label, Pop, Push operation, IP error signal etc.) return to the renewal operation that the IP processing logic carries out the IP head.
IP bag (the IP bag that common IP bag or Labelled cross) forms the IP bag that Labelled crosses by the IP processing logic, through the encapsulation of AAL5, gives SAR cell processing.The label that SAR sends according to IP processing logic wraps the ATM cell that splits into 53 bytes to the IP after the AAL5 encapsulation that receives, and sends into and receives FIFO (first in first out buffer).With multiplex/demultiplex the input of the low speed of a plurality of interfaces is multiplexed with an input at a high speed, sends into Switching Module.In Switching Module, line up, be switched to corresponding output port after the scheduling, enter and receive FIFO.Through the SAR packing, AAL5 goes encapsulation, obtains the IP bag that Labelled crosses, and enters the output of IP processing logic; Mac address, the CRC that adds the output the port generates, TTL upgrades, and puts into IP bag output buffering, transfers to the Mac layer and handles.
The characteristics of this method are to use MPLS (hardware realization) to substitute the longest matched and searched of elongated IP that tradition realizes with software, have improved the bag forwarding rate greatly, make port speed bring up to Gbits/s.MPLS can not only improve the bag forwarding rate, can also provide QOS to support and flow planning.
But the use to buffering area also has the improvements of being worth in the method.In this technology all data have been used the two-stage buffering area, to IP bag buffering, another grade realized the buffering of cell to one-level in hardware SAR in the IP of FPGA processing logic.This usage can the slow down forwarding rate and the waste memory space of IP bag.
Summary of the invention
The objective of the invention is to construct a kind of interface arrangement and retransmission method of multiprotocol label switching route system, by optimizing the metadata cache structure in the multiprotocol label switching (mpls) route system, to reduce the progression of the metadata cache of IP bag in the multiprotocol label switching (mpls) route system, accelerate the forwarding rate of IP bag, save memory space.
The interface arrangement of a kind of multiprotocol label switching route system proposed by the invention comprises: physical layer terminal, route/forward direction engine, AAL5/SAR processing unit, and the physical layer terminal is finished the extraction of Mac frame; Route/forward direction engine extracts the IP head from the Mac frame that the physical layer terminal is extracted, by searching, to the IP IP packet header that first watch, newly-generated mark was crossed; The IP bag that the AAL5/SAR processing unit is earlier crossed mark is handled the atm cell stream that forms 53 bytes by SAR again with the AAL5 encapsulation, and described route/forward direction engine comprises: CAM RAM, splitter, an IP processing logic; Wherein:
The CAM module is used to carry out label lookup and IP route querying;
Ram cell is used to deposit the pairing information of CAM matched and searched;
The importation of splitter is used to receive the Mac frame, the load of IP bag is directly delivered to the AAL5/SAR processing unit handle, and the IP head part is sent to IP processing logic;
IP processing logic is used to search CAM, search RAM according to the match address that CAM returns, thereby obtain fresh information and the control signal that is used to control SAR accordingly on corresponding first watch, carry out the renewal operation of IP head, give AAL5/SAR processing unit with the IP head then.
The interface method of a kind of multiprotocol label switching route system a kind of proposed by the invention proposed by the invention,
At receive direction, may further comprise the steps:
A. the splitter of route/forward direction engine receives mac frame, the IP head part is sent to IP processing logic, IP processing logic searched CAM, search RAM according to the match address that CAM returns, thereby obtain fresh information and control signal corresponding on corresponding first watch, carry out the renewal operation of IP head, give AAL5/SAR processing unit with the IP head then;
B. the splitter of route/forward direction engine is directly given the AAL5/SAR processing unit load of IP bag and is handled, and SAR sends into the load of the IP bag that receives the reception buffering area of SAR;
Whether c.SAR is effective according to the result decision label or the IP head of IP processing logic, whether abandons this bag;
D.SAR sends into the IP head that receives the reception buffering area of SAR, and will receive the ATM cell that the IP bag of being made up of IP head and corresponding load in the buffering area splits into 53 bytes, by multiplex/demultiplex the input of the low speed of a plurality of interfaces is multiplexed with an input at a high speed, sends into Switching Module;
At sending direction, may further comprise the steps:
E. cell is lined up in Switching Module, is switched to corresponding output port after the scheduling, and reorganization enters the transmission buffering area after forming the IP bag through SAR;
F. the IP head part is sent to IP processing logic, IP processing logic searched CAM, searches RAM according to the match address that CAM returns, thereby obtains fresh information and control signal corresponding on corresponding first watch, carries out the renewal operation of IP head;
The result that g.SAR handles according to the IP head determines whether whether label or IP head be effective, abandon this bag;
H. the splitter of route/forward direction engine receives the load of the IP bag that SAR sends, and adds output Mac address, the CRC of generation, the TTL of renewal of the port after making up with the IP head of handling, transfers to the processing of Mac layer.
In addition, among the step a, IP processing logic also analyzed the IP head that receives before the operation of carrying out the described CAM of searching, specifically comprises following process:
1) contains effective label as the IP head, extract this label so and send into the CAM module, carry out label lookup;
2) contain invalid label as the IP head, then generate control signal, the expression label is invalid, and notice SAR abandons this bag;
3) do not contain label as the IP bag, carry out traditional IP distinguishing validity so;
4) when being confirmed to be effective I P head, just take out purpose IP address and send into CAM, carry out the layer 3 IP route querying; Otherwise just generate control signal, notice SAR abandons this bag.
In route system, adopt the present invention's (first-level buffer structure) to adopt the former technology (level 2 buffering structure) can simplied system structure, improve the bag forwarding rate greatly and save storage space, thereby higher performance and lower system cost are provided.
Description of drawings
Fig. 1 is a MPLS route system block diagram;
Fig. 2 is prior art level 2 buffering technology MPLS route system/interface module design frame chart;
Fig. 3 is an IP processing logic block diagram in prior art level 2 buffering technology MPLS route system/interface module;
Fig. 4 is IP processing logic block diagram in prior art level 2 buffering technology MPLS route system/interface module;
Fig. 5 is first-level buffer technology MPLS route system of the present invention/interface module design frame chart.
Embodiment
After the MPLS route system adopted first-level buffer, than using level 2 buffering, the processing procedure of IP bag was simplified.
As shown in Figure 5, the MPLS interface module is divided into Phy Termination, Routing/ForwardingEngine, AAL5/SAR processing unit 3 parts.Phy Termination finishes the extraction of Mac frame.Routing/Forwarding Engine extracts IP head when QOS (consider add possibly TCP head) from the Mac frame, this IP head or common IP head, or the IP head crossed of Labelled.By searching, the IP head is upgraded (Push of label, Pop, Swap, TTL renewal, CRC generation).The AAL5/SAR processing unit encapsulates the IP bag that Labelled crosses earlier with AAL5, handle the atm cell stream that forms 53 bytes by SAR again.
Phy Termination is made up of Ethernet Phy, MII/GMII (PCS/PMA/PMD), Ethernet Mac, and it receives incoming bit stream, gives Routing/Forwarding Engine and handles.
Routing/Forwarding Engine is the core of MPLS router, it be divided into again splitter, an IP processing logic, CAM 3 modules such as RAM.CAM (Content Addressable Memory) module is made up of two kinds of CAM unit: a kind of label lookup (being called label C AM) of carrying out; Another kind carries out IP route querying (being called IP CAM).Ram cell is deposited the pairing information of CAM matched and searched.The importation of splitter receives the Mac frame, the load of IP bag is directly delivered to SAR handle; And the IP head part sent to IP processing logic.IP processing logic searched CAM, search RAM according to the match address that CAM returns, thereby obtain corresponding fresh information on first watch (as exporting label etc.) and control signal corresponding (as the Swap of label, Pop, Push operation, IP error signal etc.) carry out the renewal operation of IP head and to the control of SAR.
Label judgement/verification the module of IP processing logic is the analyzing IP head at first:
A. contain effective label as the IP head, extract this label so and send into the CAM module, carry out label lookup.
B. contain invalid label as the IP head, then generate control signal, the expression label is invalid, and notice SAR abandons this bag.
C. do not contain label (being the IP bag that common not Labelled crosses) as the IP bag, carry out traditional IP distinguishing validity so, as CRC check.
D. ought be confirmed to be effective I P head, just take out purpose IP address and send into IP CAM, carry out the layer 3 IP route querying; Otherwise just generate control signal, notice SAR abandons this bag.
Through searching of label C AM or IP CAM, CAM can send out in the unit lookup result corresponding and give the matching logic of IP processing logic:
If a. matching logic receives mismatch signal, just the IP head ATM cell of packing into is issued host CPU and carried out searching of overall route/label list.The result sends IP processing logic back to, carries out the renewal of CAM/RAM simultaneously.
If b. matching logic receives matched signal (also receiving the address ram of depositing lookup result simultaneously), just the matching result among the RAM is put into the result register of IP processing logic, generate control signal corresponding simultaneously, the indicating label control logic is carried out corresponding operating (Push of label, Swap, Pop) according to matching result to the IP head.
IP bag (the IP bag that common IP bag or Labelled cross) passes through splitter, the IP head is transferred to the buffering area that IP processing logic upgrades the SAR that restores, and IP bag load deposits the buffering area of SAR in, forms the IP bag that Labelled crosses, through the encapsulation of AAL5, give SAR cell processing.The label that SAR sends according to IP processing logic wraps the ATM cell that splits into 53 bytes to the IP after the AAL5 encapsulation that receives, and sends into Switching Module.In Switching Module, line up, be switched to corresponding output port after the scheduling, enter and receive FIFO.Through the SAR packing, AAL5 goes encapsulation, obtains the IP bag that Labelled crosses, and enters IP processing logic part; The result that SAR handles according to the IP head determines whether whether label or IP head be effective, abandon this bag.Splitter receives the IP bag PAYLOAD (load) that SAR sends, and upgrades with the Mac address, CRC generation, the TTL that add the output the port after the IP head combination of handling, transfers to the Mac layer and handles.

Claims (3)

1, a kind of interface arrangement of multiprotocol label switching route system comprises: physical layer terminal, route/forward direction engine, AAL5/SAR processing unit, and the physical layer terminal is finished the extraction of Mac frame; Route/forward direction engine extracts the IP head from the Mac frame that the physical layer terminal is extracted, by searching, to the IP IP packet header that first watch, newly-generated mark was crossed; The IP bag that the AAL5/SAR processing unit is earlier crossed mark is handled the atm cell stream that forms 53 bytes by SAR again with the AAL5 encapsulation, it is characterized in that described route/forward direction engine comprises: CAM RAM, splitter, an IP processing logic; Wherein:
The CAM module is used to carry out label lookup and IP route querying;
Ram cell is used to deposit the pairing information of CAM matched and searched;
The importation of splitter is used to receive the Mac frame, the load of IP bag is directly delivered to the AAL5/SAR processing unit handle, and the IP head part is sent to IP processing logic;
IP processing logic is used to search CAM, search RAM according to the match address that CAM returns, thereby obtain fresh information and the control signal that is used to control SAR accordingly on corresponding first watch, carry out the renewal operation of IP head, give AAL5/SAR processing unit with the IP head then.
2, according to the retransmission method of the described multiprotocol label switching route system of claim 1 interface arrangement, it is characterized in that,
At receive direction, may further comprise the steps:
A. the splitter of route/forward direction engine receives mac frame, the IP head part is sent to IP processing logic, IP processing logic searched CAM, search RAM according to the match address that CAM returns, thereby obtain fresh information and control signal corresponding on corresponding first watch, carry out the renewal operation of IP head, give AAL5/SAR processing unit with the IP head then;
B. the splitter of route/forward direction engine is directly given the AAL5/SAR processing unit load of IP bag and is handled, and SAR sends into the load of the IP bag that receives the reception buffering area of SAR;
Whether c.SAR is effective according to the result decision label or the IP head of IP processing logic, whether abandons this bag;
D.SAR sends into the IP head that receives the reception buffering area of SAR, and will receive the ATM cell that the IP bag of being made up of IP head and corresponding load in the buffering area splits into 53 bytes, by multiplex/demultiplex the input of the low speed of a plurality of interfaces is multiplexed with an input at a high speed, sends into Switching Module;
At sending direction, may further comprise the steps:
E. cell is lined up in Switching Module, is switched to corresponding output port after the scheduling, and reorganization enters the transmission buffering area after forming the IP bag through SAR;
F. the IP head part is sent to IP processing logic, IP processing logic searched CAM, searches RAM according to the match address that CAM returns, thereby obtains fresh information and control signal corresponding on corresponding first watch, carries out the renewal operation of IP head;
The result that g.SAR handles according to the IP head determines whether whether label or IP head be effective, abandon this bag;
H. the splitter of route/forward direction engine receives the load of the IP bag that SAR sends, and adds output Mac address, the CRC of generation, the TTL of renewal of the port after making up with the IP head of handling, transfers to the processing of Mac layer.
3, retransmission method according to claim 2 is characterized in that, among the step a, IP processing logic also analyzed the IP head that receives before the operation of carrying out the described CAM of searching, specifically comprises following process:
1) contains effective label as the IP head, extract this label so and send into the CAM module, carry out label lookup;
2) contain invalid label as the IP head, then generate control signal, the expression label is invalid, and notice SAR abandons this bag;
3) do not contain label as the IP bag, carry out traditional IP distinguishing validity so;
4) when being confirmed to be effective I P head, just take out purpose IP address and send into CAM, carry out the layer 3 IP route querying; Otherwise just generate control signal, notice SAR abandons this bag.
CNB021551561A 2002-12-10 2002-12-10 A kind of multiprotocol label switching route system interface arrangement and retransmission method Expired - Lifetime CN100574251C (en)

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US7613188B1 (en) * 2006-04-27 2009-11-03 Alcatel Lucent Ethernet VLL spoke termination at an IP interface
CN100450100C (en) * 2006-08-29 2009-01-07 华为技术有限公司 Route method and equipment
CN100425040C (en) * 2007-03-16 2008-10-08 北京航空航天大学 Sky-based network space route exchanging method
CN101515899B (en) * 2009-04-01 2012-05-23 中国人民解放军信息工程大学 Route generation method and device
CN104601495B (en) * 2015-01-30 2018-11-30 杭州晨晓科技股份有限公司 A kind of system extending physical port

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