CN100543681C - A kind of method and device of programming device upgrading - Google Patents
A kind of method and device of programming device upgrading Download PDFInfo
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- CN100543681C CN100543681C CNB2007101107966A CN200710110796A CN100543681C CN 100543681 C CN100543681 C CN 100543681C CN B2007101107966 A CNB2007101107966 A CN B2007101107966A CN 200710110796 A CN200710110796 A CN 200710110796A CN 100543681 C CN100543681 C CN 100543681C
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Abstract
The invention discloses a kind of method and device of programming device upgrading, may further comprise the steps, at first expand the I/O interface of the CPU that is not with general purpose I/O interface with gate circuit and latch; Then by the CPU input information; During last described latch output enable, the joint test working group that constitutes by described I/O expansion is that the JTAG chain is upgraded to described programming device.Use the present invention, can make the CPU that is not with general purpose I/O interface realize the programming device online upgrading, provide cost savings, whether plug the JTAG socket by the JTAG cable simultaneously and come the adaptive sintering processing of choosing programming device, convenience debugging and production effect have been reached, shorten the construction cycle, improved production efficiency greatly.
Description
Technical field
The present invention relates to electronic device field, relate in particular to the method and the device of a kind of programming device upgrading of communication field.
Background technology
Along with the widespread use of programmable logic chip in digital circuit, complicated programmable logic device (CPLD) (Complex Programmable Logic Device) and on-site programmable gate array FPGA programming devices such as (Field Programmable Gate Array) have been adopted in the increasing design.Owing to reasons such as demand change or design errors, the code in these programming devices needs to upgrade sometimes, and usually requirement can be carried out online upgrading to these programming devices, but to strengthen the ability of maintenance.Otherwise can only be with the sintering cable to field upgrade, will increase maintenance cost greatly.
The scheme that prior art addresses this problem employing is to adopt the CPU of band general purpose I/O interface to realize the online upgrading of programming device.But this scheme exists obviously not enough, and the CPU with general purpose I/O interface just can't not realize this function.
The also useful Small-sized C PLD of prior art comes can't not realize the problem of online upgrading with general purpose I/O interface to not carrying out the I/O expansion with the CPU of general purpose I/O interface to solve this CPU in addition.But there is following deficiency in this scheme: itself needs code Small-sized C PLD, needs to use the sintering cable to download, and increases production process, and cost is also higher relatively.
Therefore need to solve in the prior art not can't the online upgrading programming device with the CPU of general purpose I/O interface problem, the perhaps current problem of higher relatively, the complex procedures of cost during with Small-sized C PLD online upgrading programming device.
Summary of the invention
Technical matters to be solved by this invention provides the method and the device of a kind of programming device upgrading, thus solve in the prior art not can't the online upgrading programming device with the CPU of general purpose I/O interface problem, reduce cost simultaneously, simplify working process.
In order to solve the problems of the technologies described above, the invention provides a kind of method of programming device upgrading, may further comprise the steps,
A, expand the I/O interface of the CPU that is not with general purpose I/O interface with gate circuit and latch;
B, by the CPU input information;
When c, described latch output enable, described programming device is upgraded by the JTAG chain that described I/O expansion constitutes.
Further, said method also can provide the JTAG socket, when described latch output does not enable, by the JTAG chain that described JTAG socket constitutes described programming device is upgraded.
Further, said method also can comprise, utilize the JTAG cable of described programming device whether to plug the signal that described JTAG socket produced and change the output enable signal of controlling described latch, when the JTAG of described programming device cable is not plugged described JTAG socket, described latch output enable; When the JTAG of described programming device cable was plugged described JTAG socket, described latch output did not enable.
Further, said method can comprise that also described latch is 8 latchs, perhaps is 16 latchs, perhaps is 32 latchs.
Further, said method can comprise that also the data line of described CPU links to each other with described latch, links to each other with described gate circuit input end with the control signal end of described CPU, described gate output links to each other with the latch signal end of described latch, is combined into the latch signal of described latch; Described latch output signal end is connected with the jtag interface of described programming device, and described programming device is upgraded.
Further, said method can comprise that also the control signal of described CPU comprises chip selection signal and read-write.
Further, said method also can comprise, when if the JTAG cable of described programming device has two GND lines, a GND pin connects VCC by first resistance in the then described JTAG socket, when inserting not described JTAG cable, the high level of described GND pin output connects the output enable signal end of described latch through a not gate, and described programming device is upgraded; When plugging described JTAG cable, described programming device is carried out sintering by described JTAG socket;
When if the JTAG cable of described programming device has two VCC lines, VCC pin in the then described JTAG socket connects GND by second resistance, when inserting not described JTAG cable, the low level of described VCC pin output directly connects the output enable signal end of latch, and described programming device is upgraded; When plugging described JTAG cable, described programming device is carried out sintering by described JTAG socket;
If when the JTAG cable of described programming device has two GND lines and two VCC lines, then take above-mentioned any one connected mode.
The present invention also provides a kind of device of programming device upgrading, comprises the CPU that is not with general purpose I/O interface, also comprise,
Gate circuit, its input end links to each other with the control signal end of described CPU, and the control signal of described CPU is used to control latching of described latch by the latch signal that gate circuit is combined into described latch;
Latch, its latch signal end links to each other with the output terminal of described gate circuit, its data input pin links to each other with the data line of described CPU, its output terminal links to each other with the jtag interface of programming device, when the latch output enable, described programming device is upgraded by the JTAG chain that described latch and gate circuit constituted.
Further, said apparatus also can comprise, latch output enable control logic module, with the output enable of described latch promptly/the OE signal end links to each other;
The JTAG socket, link to each other with the jtag interface of described latch output enable control logic module and described programming device, whether the output of controlling described latch by described latch output enable control logic module enables, when latch output does not enable, described programming device is upgraded by the JTAG chain that described JTAG socket constitutes.
Further, said apparatus also can comprise, when the JTAG cable was plugged described JTAG socket, described latch output did not enable; When the JTAG cable is not plugged described JTAG socket, described latch output enable.
Further, said apparatus also can comprise, described latch output enable control logic module comprises that an end links to each other with VCC, first resistance that the other end links to each other with the GND pin of described JTAG socket, the end that wherein said first resistance links to each other with described GND pin and the input end of a not gate link to each other, and the output terminal of not gate links to each other with the output enable signal end of described latch; Comprise that perhaps an end links to each other with GND, second resistance that the other end links to each other with the VCC pin of described JTAG socket, the end that wherein said second resistance links to each other with described VCC pin links to each other with the output enable signal end of described latch.
Compared with prior art, because the present invention adopts a kind of method that does not realize the programming device online upgrading with the CPU of general purpose I/O interface, provide cost savings, whether plug the JTAG socket by the JTAG cable simultaneously and come the adaptive sintering processing of choosing programming device, convenience debugging and production effect have been reached, shorten the construction cycle, improved production efficiency greatly.
Description of drawings
Fig. 1 is the principle schematic that does not realize the programming device online upgrading with the CPU of general purpose I/O interface of the specific embodiment of the invention;
Fig. 2 is the method flow diagram of not realizing the programming device online upgrading with the CPU of general purpose I/O interface of the specific embodiment of the invention;
Fig. 3 is the synoptic diagram of latch output enable steering logic implementation when in the JTAG cable of the specific embodiment of the invention two GND lines being arranged;
Fig. 4 is the synoptic diagram of latch output enable steering logic implementation when in the JTAG cable of the specific embodiment of the invention two VCC lines being arranged.
Embodiment
Below in conjunction with the drawings and specific embodiments the present invention is elaborated.
Programming device comprises CPLD, FPGA in the specific embodiment of the invention, also can comprise GAL (Generic Array Logic, generic logic array), PAL (Programmable Array Logic, programmable logic array) etc.
Expand the I/O interface of the CPU that is not with general purpose I/O interface in the specific embodiment of the invention by gate circuit and latch, utilize the I/O and the JTAG socket of expansion to make up a JTAG (JointTest Action Group respectively separately, joint test working group) chain, whether plug the signal that the JTAG socket produced by the JTAG cable simultaneously and change the output enable signal that comes the control lock storage, thus adaptive selection to programming device by the JTAG cable carry out sintering or by the expansion I/O interface of CPU debug, the online upgrading of production phase.
The device of the programming device online upgrading that the present invention proposes mainly comprises as shown in Figure 1:
One with the CPU of general purpose I/O interface;
One gate circuit, its input end links to each other with the control signal end of described CPU;
One latch, it latchs (LE) signal end and links to each other with the output terminal of described gate circuit, and the control signal of CPU is used for latching of control lock storage by (LE) signal that latchs that gate circuit is combined into latch; Its data input pin links to each other with the data line of CPU, expands the I/O interface of the CPU that is not with general purpose I/O interface; The latch output signal end is connected with the jtag interface of programming device, latch output simulation JTAG signal;
One latch output enable control logic module, with the output enable of latch (/OE) signal end links to each other;
Described output enable control logic module specifically as shown in Figure 3 and Figure 4, described latch output enable control logic module comprises that an end links to each other with VCC, the R1 resistance that the other end links to each other with the GND pin of described JTAG socket, the end that wherein said R1 resistance links to each other with described GND pin and the input end of a not gate link to each other, and the output terminal of not gate links to each other with the output enable signal end of described latch; Comprise that perhaps an end links to each other with GND, the R2 resistance that the other end links to each other with the VCC pin of described JTAG socket, the end that wherein said R2 resistance links to each other with described VCC pin links to each other with the output enable signal end of described latch.
One JTAG socket is connected with the jtag interface of programming device, simultaneously the output enable of the signal on the JTAG socket by latch output enable control logic module control lock storage (/OE) signal.
Utilize the JTAG cable of programming device whether to plug the signal that the JTAG socket produced and change the output enable signal that comes the control lock storage.Latch output enable when the JTAG cable is not plugged the JTAG socket, latch output did not enable when the JTAG cable was plugged the JTAG socket.
When the JTAG of programming device cable is not plugged the JTAG socket, the latch output enable, output information is upgraded to programming device by the JTAG chain that the I/O expansion constitutes;
When the JTAG of programming device cable was plugged the JTAG socket, latch output did not enable, and latch is output information not, and the JTAG chain that constitutes by the JTAG socket is to programming device upgrade (or sintering).
As shown in Figure 2, the specific embodiment of the invention do not realize that with the CPU of general purpose I/O interface the method flow of programming device online upgrading is as follows:
8 latchs of the general employing of described latch also can be as 16 latchs, 32 latchs etc.
Described control signal comprises chip selection signal, read-write etc.
The data line of described CPU links to each other with described latch, links to each other with described gate circuit input end with the control signal end of described CPU, and described gate output links to each other with the latch signal end of described latch, is combined into the latch signal of described latch; Described latch output signal end is connected with the jtag interface of described programming device, and described programming device is upgraded.
As shown in Figure 3, when if the JTAG cable of described programming device has two GND lines, a GND pin meets VCC by R1 resistance in the then described JTAG socket, when inserting not described JTAG cable, the high level of described GND pin output connects the output enable signal end of described latch through a not gate, and described programming device is upgraded; When plugging described JTAG cable, described programming device is carried out sintering by described JTAG socket;
As shown in Figure 4, when if the JTAG cable of described programming device has two VCC lines, VCC pin in the then described JTAG socket meets GND by R2 resistance, when inserting not described JTAG cable, the low level of described VCC pin output directly connects the output enable signal end of latch, and described programming device is upgraded; When plugging described JTAG cable, described programming device is carried out sintering by described JTAG socket;
When if the JTAG cable of described programming device has two GND lines and two VCC lines, then take any one connected mode of Fig. 3 or Fig. 4, to described programming device upgrade (or sintering).
When the JTAG of programming device cable was plugged the JTAG socket, latch output did not enable, and latch is output information not, and the JTAG chain that constitutes by the JTAG socket is to programming device upgrade (or sintering).
Fig. 3 is the synoptic diagram of latch output enable steering logic implementation when in the JTAG cable of the specific embodiment of the invention two GND lines being arranged.The JTAG socket links to each other with the output enable signal of latch by latch output enable steering logic; PinX2 (GND) pin in the JTAG socket is met VCC by R1 resistance, and pinX1 and the pairing line of pinX2 are short circuit ground connection in the JTAG cable; PinX2 exports high level when not inserting the JTAG cable like this, pinX2 output low level when plugging the JTAG cable, the output level of pinX2 just can be realized the adaptively selected of JTAG downloading mode through the output enable signal end that a not gate connects latch, (signal output part of the latch of the specific embodiment of the invention is effective when low level), when inserting the JTAG cable by CPU to the programming device online upgrading, by the JTAG socket programming device is carried out sintering when plugging the JTAG cable.
Fig. 4 is the synoptic diagram of latch output enable steering logic implementation when in the JTAG cable of the specific embodiment of the invention two VCC lines being arranged.The JTAG socket links to each other with the output enable signal of latch by latch output enable steering logic; PinY2 in the JTAG socket (VCC) pin is met GND by R2 resistance, and pinY1 and the pairing line of pinY2 are that short circuit meets VCC in the JTAG cable, pinY2 output low level when inserting the JTAG cable like this, pinY2 output high level when plugging the JTAG cable, the output enable signal end that the level of pinY2 output is directly connect latch just can be realized the adaptively selected of JTAG downloading mode, (signal output part of the latch of the specific embodiment of the invention is effective when low level), when inserting the JTAG cable by CPU to the programming device online upgrading, by the JTAG socket programming device is carried out sintering when plugging the JTAG cable.
The above; only for the preferable embodiment of the present invention, but protection scope of the present invention is not limited thereto, and anyly is familiar with the people of this technology in the disclosed technical scope of the present invention; the variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection domain of claim.
Claims (11)
1, a kind of method of programming device upgrading may further comprise the steps,
A, expand the I/O interface of the CPU that is not with general purpose I/O interface with gate circuit and latch;
B, by the CPU input information;
When c, described latch output enable, described programming device is upgraded by the JTAG chain that described I/O expansion constitutes.
2, the method for claim 1 is characterized in that, JTAG also is provided socket, when described latch output does not enable, by the JTAG chain that described JTAG socket constitutes described programming device is upgraded.
3, method as claimed in claim 2, it is characterized in that, utilize the JTAG cable of described programming device whether to plug the signal that described JTAG socket produced and change the output enable signal of controlling described latch, when the JTAG of described programming device cable is not plugged described JTAG socket, described latch output enable; When the JTAG of described programming device cable was plugged described JTAG socket, described latch output did not enable.
4, the method for claim 1 is characterized in that, described latch is 8 latchs, perhaps is 16 latchs, perhaps is 32 latchs.
5, the method for claim 1, it is characterized in that, the data line of described CPU links to each other with described latch, control signal end with described CPU links to each other with described gate circuit input end, described gate output links to each other with the latch signal end of described latch, is combined into the latch signal of described latch; Described latch output signal end is connected with the jtag interface of described programming device, and described programming device is upgraded.
6, method as claimed in claim 5 is characterized in that, the control signal of described CPU comprises chip selection signal and read-write.
7, method as claimed in claim 3 is characterized in that,
When if the JTAG cable of described programming device has two GND lines, a GND pin connects VCC by first resistance in the then described JTAG socket, when inserting not described JTAG cable, the high level of described GND pin output connects the output enable signal end of described latch through a not gate, and described programming device is upgraded; When plugging described JTAG cable, described programming device is carried out sintering by described JTAG socket;
When if the JTAG cable of described programming device has two VCC lines, VCC pin in the then described JTAG socket connects GND by second resistance, when inserting not described JTAG cable, the low level of described VCC pin output directly connects the output enable signal end of latch, and described programming device is upgraded; When plugging described JTAG cable, described programming device is carried out sintering by described JTAG socket;
If when the JTAG cable of described programming device has two GND lines and two VCC lines, then take above-mentioned any one connected mode.
8, a kind of device of programming device upgrading comprises the CPU that is not with general purpose I/O interface, it is characterized in that, also comprise,
Gate circuit, its input end links to each other with the control signal end of described CPU, and the control signal of described CPU is used to control latching of described latch by the latch signal that gate circuit is combined into latch;
Described latch, its latch signal end links to each other with the output terminal of described gate circuit, its data input pin links to each other with the data line of described CPU, its output terminal links to each other with the jtag interface of programming device, when the latch output enable, described programming device is upgraded by the JTAG chain that described latch and gate circuit constituted.
9, device as claimed in claim 8 is characterized in that, also comprise,
Latch output enable control logic module, with the output enable of described latch promptly/the OE signal end links to each other;
The JTAG socket, link to each other with the jtag interface of described latch output enable control logic module and described programming device, whether the output of controlling described latch by described latch output enable control logic module enables, when latch output does not enable, described programming device is upgraded by the JTAG chain that described JTAG socket constitutes.
10, device as claimed in claim 9 is characterized in that, when the JTAG cable was plugged described JTAG socket, described latch output did not enable; When the JTAG cable is not plugged described JTAG socket, described latch output enable.
11, device as claimed in claim 9, it is characterized in that, described latch output enable control logic module comprises that an end links to each other with VCC, first resistance that the other end links to each other with the GND pin of described JTAG socket, the end that wherein said first resistance links to each other with described GND pin and the input end of a not gate link to each other, and the output terminal of not gate links to each other with the output enable signal end of described latch; Comprise that perhaps an end links to each other with GND, second resistance that the other end links to each other with the VCC pin of described JTAG socket, the end that wherein said second resistance links to each other with described VCC pin links to each other with the output enable signal end of described latch.
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| Application Number | Priority Date | Filing Date | Title |
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| CNB2007101107966A CN100543681C (en) | 2007-06-18 | 2007-06-18 | A kind of method and device of programming device upgrading |
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| CNB2007101107966A CN100543681C (en) | 2007-06-18 | 2007-06-18 | A kind of method and device of programming device upgrading |
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| CN100543681C true CN100543681C (en) | 2009-09-23 |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102073517A (en) * | 2009-11-23 | 2011-05-25 | 中兴通讯股份有限公司 | Upgrading and backup method and device for embedded system |
| CN101894029A (en) * | 2010-06-21 | 2010-11-24 | 中兴通讯股份有限公司 | Method and device for upgrading complex programmable logic device on line |
| CN110109694B (en) * | 2019-04-28 | 2023-04-07 | 新华三技术有限公司 | Device pin control method and programmable logic device |
| CN114924776A (en) * | 2022-04-20 | 2022-08-19 | 阿里巴巴（中国）有限公司 | Programmable logic device upgrading method, device, system, equipment and program product |
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Non-Patent Citations (2)
| Title |
|---|
| 基于JTAG标准的在系统编程下载系统接口电路的设计. 雷雪梅等.内蒙古大学学报（自然科学版），第34卷第6期. 2003 |
| 基于JTAG标准的在系统编程下载系统接口电路的设计. 雷雪梅等.内蒙古大学学报（自然科学版），第34卷第6期. 2003 * |
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