CN100472460C - Detection and display method and device for computer self-test information - Google Patents
Detection and display method and device for computer self-test information Download PDFInfo
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- CN100472460C CN100472460C CNB021553815A CN02155381A CN100472460C CN 100472460 C CN100472460 C CN 100472460C CN B021553815 A CNB021553815 A CN B021553815A CN 02155381 A CN02155381 A CN 02155381A CN 100472460 C CN100472460 C CN 100472460C
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Abstract
The present invention is detection and display method and device for computer self-test information. The method includes in the power-on self test (POST) state executing curing program in the BIOS in the POST stage of computer system to send POST information in certain data structure to controller chip and transmit the information to the display module timely so as to display the POST procedure and information in characters and sentences; and displaying fault information, if any, in the display module. The device for the detection and display includes a controller connected to the system control bus of the computer mainboard to obtain POST information; and a display module connected to the controller to display real-time POST information. The present invention makes it possible to display POST information conveniently and intuitively.
Description
Technical field
The present invention is about a kind of method and device of detection and demonstration of computer related information, the detection of especially computer booting self check (POST) information and the method and the device of demonstration.
Background technology
The notion of computing machine POST process is meant when the computer equipment electrifying startup, the self-testing process that the Basic Input or Output System (BIOS) of computing machine (BIOS) is carried out each module of computing machine self.POST information is meant in the POST process, BIOS checks the resulting various information of each module, comprise: whether each module exists, whether each module status is normal, whether initialization is normally finished, cpu type, CPU frequency, type of memory, memory size, hard-disk capacity, bios version information and computer serial number etc.
Along with the continuous progress and the human being's production of computer industry level are lived to the intensification day by day of computer dependency, the user of computing machine has proposed more and more higher requirement to the reliability and the ease for use of computing machine.For example, usually need real-time monitoring equipment POST process, understand POST and whether carry out smoothly in fields such as computer monitor and control system, enterprise asset management system, computer fault diagnosises; Break down in computer system POST process, need obtain failure message in real time and in time know the source of failure, take some countermeasures, fix a breakdown.
More than use, all require computer system to have in the POST process and can make things convenient for the device that shows POST information and failure message intuitively, all require this device to be under the state that does not have the outfit standard CRT monitor in computer system, the user can make things convenient for and obtains POST information and failure message intuitively.
Generally speaking, personal computer is equipped with the display device (as CRT) of standard, can directly show above-mentioned POST information.Yet in server was used, along with the increase of server usage quantity, a large amount of servers were put together, can not the also unnecessary CRT display device of being equipped with a station symbol standard for each station server.
At present, had obtaining and display mode of multiple computing machine POST information, wherein modal way is to read and show the hardware configuration information of computing machine by the DEBUG card.
Computer system is in the POST process, BIOS can send 16 carry system codes by 80 ports (fixed address port) on isa bus, the POST information that different coded representation is different, by continuous access 80 ports, and demonstrate the POST code by LED, finish POST information and show and fault diagnosis functions.The DEBUG card just is based on this principle work, and it generally has isa bus DEBUG card and pci bus DEBUG card.
But obtain and show that POST information has significant limitation, mainly shows as following several in DEBUG card mode:
1.DEBUG card can only be plugged on the system bus of cabinet inside, need open cabinet, inconvenient operation during use;
2.DEBUG calorie requirement uses a PCI or ISA expansion slot position, is difficult for accomplishing in more computer equipment of plug-in card or RSC server, its use is restricted;
3.DEBUG card can only show 16 system POST codes, can't intuitively show failure message;
4. computer motherboard bios version difference, the implication of POST code is also inequality, the user must contrast the implication of BIOS interpretation POST code, cause use inconvenient.
5.LED display device can only show two code informations, quantity of information seldom and generally is integrated on the DEBUG card, need open cabinet and check, uses inconvenient.
Summary of the invention
Problem solved by the invention is to avoid checking that computing machine POST self check information is inconvenient to reach not directly perceived.
Solution of the present invention may further comprise the steps:
1) revises the comnnnication protocol structure of basic input-output system BIOS program curing in advance;
2) electrifying startup computer equipment is carried out the Basic Input or Output System (BIOS) program curing;
3) computer booting self check information is sent to controller according to certain data structure;
4) controller is decoding, and the data after the decoding send to display module, show computer booting self check information in real time.
For realizing such scheme, the present invention detects and shows that the device of computer self-test information comprises:
Controller is connected on the System Management Bus of computer motherboard, and obtains POST self check information; And
Display module is connected in controller, shows POST self check information in real time.
The device that the present invention describes obtains the mode of computing machine POST information than DEBUG card described above, mainly has following advantage:
1. do not take the inside computer system system bus, it is any local easily to be installed in cabinet inside easily;
2. access computer systems bus port not directly obtains POST information from the SMBUS bus, and is simple and effectively;
3.LCD or display device such as VFT all can show the character information and the Chinese character information of multidigit, can make things convenient for to show POST process and information intuitively;
4.LCD or display device such as VFT can be connected with this device by cable, and self is installed on the case front panel, the user need not open cabinet can obtain the POST failure message easily;
5. for the RSC server that is stacked in a large number, this device has tangible use meaning.
Description of drawings
Fig. 1 is the block scheme that the present invention detected and showed the computer self-test information device.
Fig. 2 is the block scheme of the specific embodiment of the invention.
Fig. 3 is the process flow diagram that the present invention detected and showed the computer self-test information method.
Embodiment
Please refer to shown in Figure 1ly, the present invention detects with the device 1 that shows computer self-test information and is connected with the mainboard 2 of computing machine, and adopts power supply 3 to power.The mainboard 2 of computing machine wherein, the computer motherboard for routine comprises: CPU (not label), internal memory (not label), south bridge 20, north bridge (not label) and BIOS program curing 22 and SMBUS bus (SystemManagement Bus System Management Bus) 5.In addition, mainboard 2 is also outer hangs with peripheral expansion equipment 4 (for example hard disk, display etc.).
Apparatus of the present invention 1 are articulated on the SMBUS bus 5, include:
In computer system power-on self check (POST) stage, program curing 22 sends to controller 10 with computing machine POST self check information according to certain data structure among the computing machine execution BIOS, controller 10 control NVRAM chips get off this information stores, computing machine POST self check information after will separating simultaneously/deciphering is real-time transmitted to display module 14, shows POST process and information with character and statement.If fault takes place, show failure message on the display module in real time.
At this, the power supply 3 of this device 1 can obtain by the 5V power supply of computer ATX electric power system, also can be independent current source.
Controller can 10, to be the band I that is independent of the computing machine host CPU
2The microcontroller of C bus interface himself can have and separate/decoding function.
The relative position of storer 12 and controller 10 can be handled flexibly, can adopt following schemes:
1, be integrated in controller 10 inside, be the Flash internal memory this moment;
2, exist as independent storage chip, with the interface employing parallel interface of controller 10;
3, exist as independent storage chip, with the interface employing I2C interface of controller 10;
1. adopt the LCD display module of standard parallel interface;
2. adopt I
2C interface connects standard LCD display module to the parallel port conversion chip;
3. adopt standard VFT (vacuum fluorescent display screen) display module;
Please refer to shown in Figure 2ly, Fig. 2 is the specific embodiment that the present invention detected and showed computer self-test information device 1.In the present embodiment, the controller 10 and storer 12 integrated POST cards 16 in the device 1.
Request in person down in conjunction with the workflow of briefly describing this device 1 with reference to Fig. 3.
Execution in step 1, when computer power switch starts or after the RESET switch presses, carries out the BIOS program curing, computer system POST self check begins;
Execution in step 2 sends to controller 10 with computing machine POST self check information according to certain data structure;
Execution in step 3, display 14 show the POST processes in real time, and current which parts that detecting detect information such as whether pass through.
Execution in step 4, in execution in step S3, controller 10 is the discrete cell of the writing data into memory that receives
Execution in step 5 after the POST of mainboard 2 process finishes, shows that POST normally passes through, and the hardware configuration information of simultaneous computer is written in the storer 12 (Flash internal memory) of controller 10 (microcontroller), to make things convenient for user inquiring., utilize the control button here, the working procedure in controller 10 sends instruction, comes the POST self check information in the readout memory.
In the present embodiment, the information communication of BIOS program curing 22 and POST card 16 middle controllers 10 is undertaken by SMBUS bus 5, how revising BIOS program curing 22, guarantee that the controller 10 on the POST card 16 can correctly receive POST information, is very important to the present invention.Be the basic agreement structure explanation that BIOS program curing 22 is communicated by letter with POST card 16 below:
Serial number | Type of data packet |
1 | The CPU self check begins the |
2 | The base memory self check begins the |
3 | The PCI self check begins the POST packet |
4 | The VGA self check begins the POST packet |
5 | The full memory self check begins the POST packet |
6 | The hard disk self check begins the POST packet |
7 | The hard disk self check finishes the POST packet |
8 | POST process suspension data bag |
9 | System hardware |
10 | IDE hard disk 1 information packet |
11 | IDE |
12 | IDE |
13 | IDE hard disk 4 |
14 | RTC to the time information packet |
15 | POST process end data packet |
In BIOS program curing 22 and the basic agreement that POST card 16 is communicated by letter, each all comprises testing result to last test item from detecting packet, after POST card 16 receives each packet, at first the first half of packet is resolved, obtain the testing result rreturn value of last self check, on LCD, show the character information whether last self check is passed through in real time.If last is detected and normally passes through, again the latter half of packet is resolved, obtain the current component information that is detecting, then on LCD, demonstrate the component information that current POST is detecting in real time;
When each self check among 1#-6# can not be passed through, BIOS program curing 22 can send the POST process suspension data bag of 8#, after microcontroller is received, will control LCD and show corresponding information, reported that this parts produce fault, make things convenient for user's fault location reason.Reduce the trouble-shooting time.
When 1#-6# passed through smoothly, BIOS program curing 22 can send to the POST card to the packet of 9# one 14#, and microcontroller is stored in the inner Flash internal memory, in order to inquiry.After receiving 15#POST process end data packet, on LCD, show " POST PASS " information simultaneously.
In sum, method and apparatus of the present invention can make things convenient for and intuitively shows computing machine POST self check information.
Claims (16)
1. method that detects and show computer self-test information is characterized in that may further comprise the steps:
1) revises the comnnnication protocol structure of Basic Input or Output System (BIOS) program curing in advance;
2) electrifying startup computer equipment is carried out the Basic Input or Output System (BIOS) program curing;
3) computer booting self check information is sent to controller by System Management Bus according to certain data structure;
4) controller sends to display module to the data after decoding, deciphering, and shows the computer booting self check information of natural language form in real time.
2. the method for detection as claimed in claim 1 and demonstration computer self-test information, it is characterized in that: described display module also shows failure message.
3. detection as claimed in claim 1 and show the method for computer self-test information is characterized in that: described controller is a microcontroller and tool is separated, decoding function.
4. the method for detection as claimed in claim 1 and demonstration computer self-test information is characterized in that: in execution in step 4) in, controller is the discrete cell of the writing data into memory that receives.
5. the method for detection as claimed in claim 4 and demonstration computer self-test information, it is characterized in that: storer can be stored whole computer booting self check procedural information.
6. the method for detection as claimed in claim 4 and demonstration computer self-test information, it is characterized in that: after the system computer startup self-detection is finished, at any time the computer booting self check information by storing in the controller readout memory is presented on the display module.
7. the method for detection as claimed in claim 5 and demonstration computer self-test information is characterized in that: utilize the control button, the working procedure in controller sends instruction, comes the computer booting self check information in the readout memory.
8. a device that detects and show computer self-test information carries out the signal transmission with computer motherboard, it is characterized in that this device comprises:
Modified module is used for the comnnnication protocol structure of Basic Input or Output System (BIOS) program curing is made amendment;
Controller is connected on the System Management Bus of computer motherboard, and obtains computer booting self check information; And
Display module is connected in controller, shows the computer booting self check information of natural language form in real time.
9. the device of detection as claimed in claim 8 and demonstration computer self-test information is characterized in that: controller adopts has I
2The microcontroller of C interface.
10. the device of detection as claimed in claim 8 and demonstration computer self-test information, it is characterized in that: this controller also is connected with storer, and storage comes from the computer booting self check information data of controller.
11. the device of detection as claimed in claim 10 and demonstration computer self-test information, it is characterized in that: this storer is integrated in controller inside.
12. the device of detection as claimed in claim 10 and demonstration computer self-test information is characterized in that: this storer individualism, with the interface employing parallel interface of controller.
13. the device of detection as claimed in claim 10 and demonstration computer self-test information is characterized in that: this storer individualism, with the interface employing I of controller
2C interface.
14. the device of detection as claimed in claim 8 and demonstration computer self-test information, it is characterized in that: this display module is the LCD display module of standard.
15. detection as claimed in claim 8 and show the device of computer self-test information is characterized in that: this device also includes independently power supply and powers.
16. the device of detection as claimed in claim 8 and demonstration computer self-test information is characterized in that: this device adopts the 5V power supply power supply of computer ATX electric power system.
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CNB021553815A CN100472460C (en) | 2002-12-11 | 2002-12-11 | Detection and display method and device for computer self-test information |
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CNB021553815A CN100472460C (en) | 2002-12-11 | 2002-12-11 | Detection and display method and device for computer self-test information |
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CN100472460C true CN100472460C (en) | 2009-03-25 |
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