CN100461748C - Method for interconnecting switched network route directly - Google Patents

Method for interconnecting switched network route directly Download PDF

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Publication number
CN100461748C
CN100461748C CNB2004100853814A CN200410085381A CN100461748C CN 100461748 C CN100461748 C CN 100461748C CN B2004100853814 A CNB2004100853814 A CN B2004100853814A CN 200410085381 A CN200410085381 A CN 200410085381A CN 100461748 C CN100461748 C CN 100461748C
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deadlock
cell
exchange
plane
exchange plane
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CN1764150A (en
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胡致远
王少勇
王凯
邹昕光
李英新
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Abstract

The method for direct interconnection SN route comprises: grouping the buffer queue in exchange node to form VOQ exchange plane by buffer queues with same destination address; the cell routes on different VOQ exchange planes; it also configures buffer queue group on exchange node to release deadlock; when coming deadlock, it sends queue head cell to the exchange plane formed by release-deadlock queues to route; there are at least two exchange planes formed by release-deadlock buffer queues, one for local recovery the deadlocked cell and another for global recovery. This invention increases utility of exchange network channel and avoids loss of exchange network packet.

Description

The direct interconnection exchanging network by method
Technical field
The present invention relates to communication technical field, relate in particular to a kind of method of in the switching network of direct interconnection topological structure, carrying out route.
Background technology
Along with the continuous expansion of communication network scale, require switching network (Switching fabric) can realize economic expansion and service quality (QoS) guarantee is provided.Traditional (dynamically) be the interconnection structure switching network indirectly, as Crossbar (switching matrix), three grades of Clos etc., adopts and concentrates the switching backplane structure, and cost is excessive during dilatation.And direct interconnection topological structure network as three-dimensional Torus (annulus), can provide the linear expansion structure, realize smooth expansion, and this multi-path network structure provides good fault-tolerance.Closely during the last ten years, the direct interconnection network is used for parallel computer architecture always, very high extensibility, economy, robustness are arranged, yet the computer network of direct interconnection fails to provide the required QoS of router to ensure, the blocking performance that it " sets saturated (tree-saturation) " can not guarantee packet delay.
" setting saturated (tree saturation) " is the network congestion that produces because of the nodal cache competition, the cache resources that leads to " intermediate node " on " focus port " path in the network may exhaust, thereby stop to need to pass through, and then bring out more network-caching resource exhaustion, paralyse until the whole network through these " intermediate nodes " Business Stream to other ports.Solving the saturated way of tree at present is: switching node configuration virtual output buffers formation (VOQ), each switching node is according to the destination address principle of identity in the network, form different virtual output buffers formation (VOQ) exchange plane (being called for short the virtual switch plane), to avoid the buffer memory competition between the different output ports, as shown in Figure 1, configuration virtual output buffers formation (VOQ) respectively in the switching node 1-9, destination address is that 4 VOQ and destination address are that 6 VOQ forms 2 virtual switch planes respectively in each nodal cache, destination address is that 4 or 6 cell carries out route on virtual switch plane separately respectively, the number on virtual switch plane generally is at least total node number, also can suitably increase according to cache resources.Adopt the virtual switch planar technique to solve the buffer memory race problem that " setting saturated (tree saturation) " brings.
The channel utilization index of the direct interconnection network of multipath is with routing algorithm, traffic sharing algorithm and arbitrate relevant.Routing algorithm often is divided into two kinds of shortest path and non-shortest paths, and the advantage of shortest path first is to be easy to avoid deadlock; The advantage of non-shortest path first is higher channel utilization index to be arranged and adapt to bursts of traffic.
Common shortest path has following three kinds by algorithm:
1, the source route algorithm of minimal path---equiprobability selects source node to transmit grouping to any minimal path between the destination node at random, as shown in Figure 2;
2, self adaptation minimal path routing algorithm, as shown in Figure 3;
3, dimension preface routing algorithm (Dimension-Ordered), as shown in Figure 4.
The main purpose of traffic sharing algorithm is the flow burden in each path of balance entire switching network, can allocate definite route in advance in network source node, or by middle switching node dynamic equilibrium.Detection feedback signal (back-pressure or node failure) can help each switching node to adjust flow in addition.
Arbitration algorithm solves the access road race problem of the switching node inside of direct interconnection switching network, and fairness is its leading indicator, can adopt repeating query class or fair scheduling algorithm.
The multipath characteristic of direct interconnection network, guaranteed the percent of pass under the burst conditions, increased System Fault Tolerance, and adopt the virtual switch planar technique to solve the buffer memory competition that " setting saturated " brings, but at non-shortest path by under the condition, fail to eliminate the buffer memory circulation dependence that may occur between the node in the same virtual switch plane, easily produce of deadlock.
Be illustrated in figure 5 as deadlock mechanism of production schematic diagram, 4 of produce of deadlock counterclockwise loopback path application cache resources in each edge of switching node among the figure, but do not abandon the cache resources that it has had.Deadlock situation appear at non-shortest path by or adopt the situation of deviation routing policy unusually because of switching node.
The main method that solves deadlock at present has:
1) destroys the resources circulation dependence;
2) provide sufficient cache resources;
3) allow to convert and abandon.
Above-mentioned first method will limit some paths, need to adopt shortest path by or other specific routing rules, reduced channel utilization index like this; Second kind of scheme is subjected to technology and cost restriction; And owing to the switching network inside that is in link layer does not allow to abandon, thereby limited the third scheme.
Summary of the invention
Technical problem to be solved by this invention is: overcome existing direct interconnection topological structure switching network after adopting the virtual switch plane to solve to set the saturated buffer memory competition that brings, still there be the problem of non-shortest path by easy produce of deadlock under the condition, a kind of direct interconnection switching network method for routing of eliminating deadlock is provided, and improve the switching network channel utilization index, avoid Network Packet Loss.
The present invention solves the problems of the technologies described above the technical scheme that is adopted to be:
This direct interconnection exchanging network by method, buffer queue in the switching node is divided into groups, the buffer queue group that has identical destination address in each switching node forms virtual output buffers formation VOQ exchange plane, cell carries out route in each VOQ exchange plane, it is characterized in that: the deadlock in the described VOQ exchange plane is eliminated, be may further comprise the steps:
A, be used to remove the buffer queue group of deadlock in switching node configuration;
B, when deadlock takes place when, the queue heads cell is delivered to the formed exchange plane of buffer queue group that is used for removing deadlock by described in each switching node carries out route.
Among the described step B, the described formed exchange plane of buffer queue group that is used to remove deadlock comprises two exchange planes, one of them exchange plane carries out local recovery to the cell that deadlock takes place, and when this cell arrives the subsequent exchange node, comes back to the VOQ exchange plane and carries out route; Another exchange plane then carries out the overall situation to the cell that deadlock takes place and recovers, and cell is routed to destination node always in this exchange plane.
Among the described step B, adopt queue heads cell stand-by period calculator to carry out deadlock and judge, surpass the preset time thresholding, then think deadlock has taken place when the queue heads cell stand-by period.
Described preset time thresholding comprises the lower limit and the upper limit, and by presetting upper and lower time threshold, which exchange plane decision delivers to the deadlock cell is handled, and handles when surpassing down in limited time, deliver to the exchange plane that carries out local recovery; Handle when surpassing last prescribing a time limit, deliver to the exchange plane that carries out overall situation recovery.
In the exchange plane of described releasing deadlock, the cell priority in the switching node prolongs with the stand-by period and increases.
The non-shortest path that cell in the described VOQ exchange plane adopts the high channel utilance is by carrying out route, and the described cell that is used for removing the formed exchange plane of buffer queue group of deadlock adopts no deadlock path to carry out route.
Beneficial effect of the present invention is: the present invention is by dividing the buffer unit of direct interconnection topological structure switching network, form respectively on " virtual switch plane " and " deadlock recovery plane ", for the switching network percent of pass that utilizes different routing algorithms to improve under the lack of balance business has been created condition; Level is divided the contradiction that has solved between path diversity and the increase of deadlock probability clearly; Solve the deadlock problem of the switching network routing algorithm of direct interconnection topological structure, improved the switching network percent of pass, avoided packet loss.
The present invention adopts many " virtual switch planes " shared " deadlock recovery plane ", reduced and removed the required buffer queue number of deadlock, and further segmentation " deadlock recovery plane " is " part " and " overall situation " two classes, solved the buffer memory demand of the deadlock of deadlock under the smooth traffic and burst conditions respectively to " deadlock recovery plane ", in addition, Deadlock Detection and switching node passage arbitration mechanism have guaranteed switching network QoS index.
Description of drawings
Fig. 1 is a virtual switch planar structure schematic diagram;
Fig. 2 is the source routing proposal schematic diagram;
Fig. 3 is that the self adaptation shortest path is by the scheme schematic diagram;
Fig. 4 is dimension preface routing plan schematic diagram;
Fig. 5 is a deadlock mechanism of production schematic diagram;
Fig. 6 is an implementation flow chart of the present invention.
Embodiment
With embodiment the present invention is described in further detail with reference to the accompanying drawings below:
The multipath characteristic of the switching network of direct interconnection topological structure may cause deadlock, and the scheme of solution deadlock commonly used all has its limitation at present, need seek new routing policy.
Basic thought of the present invention is: because the reason of " setting saturated " and " deadlock " phenomenon all is will solve buffer memory to utilize problem, therefore solution is with the buffer queue grouping of direct interconnection switching network by switching node, form different exchange planes, its exchange plane is divided into a plurality of " virtual switch planes " and " deadlock recovery exchange plane ", two kinds of exchange planes can adopt different routing algorithms respectively, to avoid " setting saturated " and " deadlock " phenomenon.
Virtual output buffers formation (VOQ) is formed different virtual switch planes according to the destination address principle of identity, and the number on virtual switch plane equals total node number at least, can suitably increase the virtual switch plane according to cache resources, to reduce the deadlock probability; In switching node, utilize an extra buffer queue group to be used to remove deadlock, be used to remove the buffer queue group formation deadlock recovery exchange plane of deadlock in each node, if deadlock has taken place, then solve by the deadlock recovery plane, the queue heads cell is delivered to carried out route in this exchange plane.
" deadlock recovery plane " of the present invention provides deadlock recovery mechanism for all " virtual switch planes ", " virtual switch plane " can adopt the non-shortest path of high channel utilance by algorithm, adopt the deadlock probability on virtual switch plane lower, entire switching network is used unified deadlock recovery plane, each deadlock recovery plane is corresponding to one in the switching node extra (be used to remove deadlock) buffer queue group, and this deadlock recovers plane and uses deadlock-free routing algorithm.
The primary condition that solves deadlock is to detect deadlock, because the distribution control characteristic of each switching node in the direct interconnection network is difficult to from judging deadlock in logic, easier method is to adopt the stand-by period to judge scheme.The present invention adopts queue heads cell stand-by period calculator, when the queue heads cell stand-by period surpasses and to preset thresholding, then this queue heads cell is delivered to the deadlock recovery plane.
" deadlock recovery plane " can be divided into " plane is recovered by local deadlock " and " plane is recovered by global deadlock " again.The cell of overtime thresholding is at first delivered to " plane is recovered by local deadlock ", and when it arrives next jumping switching node, gets back to " virtual switch plane ".This plane evenly distributes the deadlock restore funcitons in entire switching network, handles and will improve " plane is recovered by global deadlock " to the serious deadlock that uneven flow produced.Therefore, time threshold can be divided into the lower limit and the upper limit, and by presetting time threshold up and down, the deadlock cell delivered to " plane is recovered by local deadlock " in decision or " plane is recovered by global deadlock " handles.The cell that surpasses the upper limit (stand-by period is longer) will be sent to destination node always in " plane is recovered by global deadlock ", intermediate node does not return " virtual switch plane ".
In the virtual switch plane, repeating query or other fair scheduling algorithms are adopted in the arbitration of switching node; And in " deadlock recovery plane ", but the switching node arbitration is such scheme also, but transmits urgent relation in order to embody stand-by period and cell, can adopt the dynamic priority scheme, its cell priority increased with the stand-by period, had solved the competition of different cell passages in the exchange plane.
As shown in Figure 6, implementation flow process of the present invention is as follows:
1, at first carries out initialization, queue heads cell stand-by period Upper threshold and Lower Threshold are set;
If 2 cells recover the plane in global deadlock, or the formation stand-by period greater than Upper threshold, then recover the plane in global deadlock and distribute no deadlock routing forwarding cell, or wait for next time slot processing according to cell priority;
Greater than Lower Threshold, then cell being delivered to local deadlock recovers the plane if the time that 3 cells are waited for surpasses Upper threshold, does not have deadlock routing forwarding cell according to the cell priority assignment, or waits for next time slot processing;
If the time that 4 cells are waited for is not more than Lower Threshold, then in the virtual switch plane, arbitrate, select successful cell to distribute the routing forwarding cell, or wait for next time slot processing.
The invention provides the exchange plane scheme of " virtual switch plane " and " deadlock recovery plane " combination, solved " setting saturated " and " deadlock " problem of direct interconnection switching network respectively, and improved channel utilization index, avoided Network Packet Loss.

Claims (6)

  1. A direct interconnection exchanging network by method, buffer queue in the switching node is divided into groups, the buffer queue group that has identical destination address in each switching node forms virtual output buffers formation VOQ exchange plane, cell carries out route in each VOQ exchange plane, it is characterized in that: the deadlock in the described VOQ exchange plane is eliminated, be may further comprise the steps:
    A, be used to remove the buffer queue group of deadlock in switching node configuration;
    B, when deadlock takes place when, the queue heads cell is delivered to the formed exchange plane of buffer queue group that is used for removing deadlock by described in each switching node carries out route.
  2. 2. direct interconnection exchanging network according to claim 1 by method, it is characterized in that: among the described step B, the described formed exchange plane of buffer queue group that is used to remove deadlock comprises two exchange planes, one of them exchange plane carries out local recovery to the cell that deadlock takes place, when this cell arrives the subsequent exchange node, come back to the VOQ exchange plane and carry out route; Another exchange plane then carries out the overall situation to the cell that deadlock takes place and recovers, and cell is routed to destination node always in this exchange plane.
  3. 3. direct interconnection exchanging network according to claim 2 by method, it is characterized in that: among the described step B, adopt queue heads cell stand-by period calculator to carry out deadlock and judge, surpass the preset time thresholding, then think deadlock has taken place when the queue heads cell stand-by period.
  4. 4. direct interconnection exchanging network according to claim 3 by method, it is characterized in that: described preset time thresholding comprises the lower limit and the upper limit, by presetting upper and lower time threshold, which exchange plane decision delivers to the deadlock cell is handled, handle when surpassing down in limited time, deliver to the exchange plane that carries out local recovery; Handle when surpassing last prescribing a time limit, deliver to the exchange plane that carries out overall situation recovery.
  5. 5. direct interconnection exchanging network according to claim 3 by method, it is characterized in that: in the exchange plane of described releasing deadlock, the cell priority in the switching node prolongs with the stand-by period and increases.
  6. 6. direct interconnection exchanging network according to claim 1 by method, it is characterized in that: the non-shortest path that cell in the described VOQ exchange plane adopts the high channel utilance is by carrying out route, and the described cell that is used for removing the formed exchange plane of buffer queue group of deadlock adopts no deadlock path to carry out route.
CNB2004100853814A 2004-10-22 2004-10-22 Method for interconnecting switched network route directly Expired - Fee Related CN100461748C (en)

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KR101250666B1 (en) * 2009-01-30 2013-04-03 후지쯔 가부시끼가이샤 Information processing system, information processing device, control method for information processing device, and computer-readable recording medium
CN102137010B (en) * 2011-02-17 2013-11-06 大唐移动通信设备有限公司 Data transmitting method and communication nodes
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5805589A (en) * 1993-03-04 1998-09-08 International Business Machines Corporation Central shared queue based time multiplexed packet switch with deadlock avoidance
US20020191619A1 (en) * 2001-05-31 2002-12-19 Philip Shafer Network router management interface with API invoked via login stream
CN1487699A (en) * 2002-09-30 2004-04-07 华为技术有限公司 Flow rate simulating method and device for exchange network test
CN1518298A (en) * 2003-01-06 2004-08-04 ض� Managing method and device of VoQ
US20040199734A1 (en) * 2003-04-03 2004-10-07 Oracle International Corporation Deadlock resolution through lock requeuing

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5805589A (en) * 1993-03-04 1998-09-08 International Business Machines Corporation Central shared queue based time multiplexed packet switch with deadlock avoidance
US20020191619A1 (en) * 2001-05-31 2002-12-19 Philip Shafer Network router management interface with API invoked via login stream
CN1487699A (en) * 2002-09-30 2004-04-07 华为技术有限公司 Flow rate simulating method and device for exchange network test
CN1518298A (en) * 2003-01-06 2004-08-04 ض� Managing method and device of VoQ
US20040199734A1 (en) * 2003-04-03 2004-10-07 Oracle International Corporation Deadlock resolution through lock requeuing

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