CN100446250C - Domain structure of increwing induction quality factor - Google Patents
Domain structure of increwing induction quality factor Download PDFInfo
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- CN100446250C CN100446250C CNB2005101110368A CN200510111036A CN100446250C CN 100446250 C CN100446250 C CN 100446250C CN B2005101110368 A CNB2005101110368 A CN B2005101110368A CN 200510111036 A CN200510111036 A CN 200510111036A CN 100446250 C CN100446250 C CN 100446250C
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Abstract
Conventional CMOS technique is adopted in the invention to reduce magnetic flux loss of inductance caused by induced current on substrate so as to raise Q value. Shielding layer of substrate is added between substrate of inductance domain and metal layer in the structure. Double spiral lines along complementation direction are adopted in the shielding layer of substrate. Complemental double spiral lines are interconnected at center of the shielding layer. Other two ends of double spiral lines are connected to ground.
Description
Technical field
The present invention relates to-domain structure of kind of inductance, relate in particular to a kind of domain structure that can improve induction quality factor.
Background technology
Inductance is the important passive component that is applied in the high-frequency circuit, and the quality factor of inductance (be exactly the Q value, the Q value is the bigger the better) has been described the degree (ideal inductance be not loss of energy) of the energy loss of actual inductance.Under physical condition, the magnetic flux change that the electric current of the inductance metal wire of flowing through produces can induce image electric current on substrate; And, can offset the part magnetic flux of inductance own by the flux change that image current forms, cause actual inductance value and Q value to descend, as shown in Figure 1.
In order to address this problem, current major technique is material behavior and the structure that changes substrate, increases substrate shield, and multilayer and differential inductance structure adopt microelectronics manufacturing processing MEMS method processing inductance or the like, and these methods respectively have characteristics.
The material and the architectural characteristic that change substrate can reduce flux loss, and reduce the inductance parasitic capacitance, make inductance Q value improve, and the inductance resonance frequency also can improve, but it has used unconventional CMOS process.
Multilayer and differential inductance structure also can improve inductance magnetic flux, obtain bigger inductance value, be to adopt common process, but its inductor models are comparatively complicated.
Adopt the MEMS processing method can obtain different shape and three-dimensional inductance, inductance parameters improves a lot, but its manufacture method complexity, the cost height.
Increasing substrate shield is the raising inductance Q value method that is widely used, and does not need special process, but its degree that improves the Q value is according to shielding mode and difference.As shown in Figure 2, be present more typical patterned substrate shielding construction.
Summary of the invention
Technical problem to be solved by this invention provides a kind of inductance domain structure, and it adopts conventional CMOS technology, can reduce because the flux loss that the substrate induced current brings to inductance improves inductance Q value.
In order to solve above technical problem, the invention provides a kind of inductance domain structure, increase the substrate shield layer between substrate in the inductance domain and the metal level, described substrate shield layer adopts double helix structure, the mode of the current opposite in direction of two adjacent parallel lines connected when described bifilar helix existed so that electric current to be arranged, described bifilar helix is at substrate shield layer hub interconnection, the other two-terminal-grounding of bifilar helix.
Described bifilar helix adopts polycrystalline silicon material.
Because the substrate shield structure that the present invention has adopted the bifilar helix of current opposite in direction between a kind of two parallel lines to form, can reduce the generation of substrate image current, electric current that the more important thing is the mutual counter current of two parallel lines of helix structure makes substrate image current flux change cancel out each other, thereby eliminate of the influence of the magnetic flux of substrate image current, thereby improve the Q value of inductance inductance Q value.
Description of drawings
Below in conjunction with the drawings and specific embodiments the present invention is further elaborated.
Fig. 1 is the schematic diagram of substrate image current to the inductance flux change;
Fig. 2 is existing patterned substrate shielding construction schematic diagram;
Fig. 3 is a double helix structure substrate schematic diagram of the present invention;
Fig. 4 is an inductance domain schematic diagram of the present invention;
Fig. 5 is 5 nanohenrys (nH) inductance under 0.25 micron radio frequency technology of the prompt intelligence JAZZ of company of the U.S. of the present invention, the inductor models of operating frequency 3.5 GHzs (GHz):
Fig. 6 is the artificial circuit of Fig. 5 inductor models when substrate shield of the present invention is arranged:
Fig. 7 is the artificial circuit of Fig. 5 inductor models when substrate shield of the present invention is arranged and during image current;
Fig. 8 is the Smith chart table of correspondence when having substrate shield of the present invention and not having substrate shield of the present invention;
Fig. 9 is the artificial inductive equiva lent impedance of correspondence when having substrate shield of the present invention and not having substrate shield of the present invention:
Figure 10 is the artificial inductive equivalence Q value of correspondence when having substrate shield of the present invention and not having substrate shield of the present invention.
Embodiment
Shown in Fig. 3,4, it is double helix structure substrate schematic diagram of the present invention and the inductance domain that has this substrate, and wherein arrow is represented current direction, and the current opposite in direction of two adjacent parallel lines connects in the double-spiral structure of the present invention.Adopt the prompt intelligence JAZZ 0.25umCMOS of company of U.S. radio frequency technology, operating voltage 2.5V, concrete domain and parameter item are as follows: add square screen between the substrate of inductance and inductance metal wire, this screen is made of the bipitch of polyethylene (Poly) polysilicon, the two-terminal-grounding of this helical, in this screen square center, two helical other two ends interconnection.The inductance metal wire can adopt 4 layers on metal (Metal), 3 microns of live widths, 4 microns of spacings; The bifilar helix of substrate shield adopts Poly polysilicon, 3 microns of live widths, 1 micron of distance between centers of tracks.
Below in conjunction with carrying out circuit analysis and simulation result analysis.At first, utilize CadenceSpectre radio frequency instrument that designed inductance domain has been carried out emulation, simulation object is 5 nanohenrys (nH) inductance under 0.25 micron radio frequency technology of the prompt intelligence JAZZ of company of the U.S., operating frequency 3.5 GHzs (GHz), and inductor models is as shown in Figure 5.
In inductor models, L is an ideal inductance, and RS is that inductance internal resistance loss CP is the inductance shunt capacitance, RP inductance parallel resistance, and Cox is an electric capacity between inductance and substrate, and R1 is a substrate loss, and C1 is a capacitance to substrate.Wherein L, Rs, Cp, Rp, Cox, R1, C1 are respectively 4.99 nanohenrys, 8.9 ohm, 18fF, 2.9 kilo-ohms, 24fF, 160 ohm, 70fF.
Fig. 6 is the artificial circuit of inductor models when substrate shield of the present invention is arranged; Fig. 7 is the artificial circuit of inductor models when substrate shield of the present invention is arranged and during image current.At first, our emulation since the mutual inductance effect that the substrate image current produces to the influence of inductance Q value.Then, we are to having added bifilar helix shielding substrate layer, and the inductance that has reduced after the mutual inductance that image current produced influences carries out emulation.
By emulation, obtain the inductance equiva lent impedance Z that represents with Smith chart
0, then,, obtain corresponding inductance L and Q value by conversion Calculation formula (1) (2).
Wherein, f is an operating frequency, Image (Z
0) be Z
0Imaginary part, Real (Z
0) be Z
0Real part.
Fig. 8 is a Smith chart table corresponding respectively when having substrate shield of the present invention under these conditions and not having substrate shield of the present invention, wherein, curve 1 is inductance equivalent load impedance curve when having the image current mutual inductance effect, and curve 2 is for eliminating inductance equivalent load impedance curve behind the image current mutual inductance effect.Fig. 9, the 10th, corresponding respectively artificial inductive equiva lent impedance and Q value when having substrate shield of the present invention under these conditions and not having substrate shield of the present invention, curve 1 among Fig. 9,10 is respectively artificial inductive equiva lent impedance and the Q value that has substrate shield correspondence of the present invention, and curve 2 is respectively the artificial inductive equiva lent impedance and the Q value of correspondence when not having substrate shield of the present invention.
From Fig. 8,9,10 as can be seen, adopt substrate shield of the present invention to suppress the mutual inductance effect of image current to inductance after, in the 1-5GHz frequency range, the load impedance of inductance and Q value all have increase in various degree, especially when 3.5GHz, inductance Q value increases to 6.71 from 5.59, has improved 19%.
Claims (3)
1, a kind of inductance domain structure increases the substrate shield layer between substrate in the inductance domain and the metal level, it is characterized in that: described substrate shield layer adopts double helix structure; The mode of the current opposite in direction of two adjacent parallel lines connected when described bifilar helix existed so that electric current to be arranged; Described bifilar helix is at substrate shield layer hub interconnection, the other two-terminal-grounding of bifilar helix.
2, inductance domain structure as claimed in claim 1 is characterized in that, described bifilar helix adopts polycrystalline silicon material.
3, inductance domain structure as claimed in claim 1 is characterized in that, described substrate shield layer is a square structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005101110368A CN100446250C (en) | 2005-12-01 | 2005-12-01 | Domain structure of increwing induction quality factor |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005101110368A CN100446250C (en) | 2005-12-01 | 2005-12-01 | Domain structure of increwing induction quality factor |
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| Publication Number | Publication Date |
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| CN1979852A CN1979852A (en) | 2007-06-13 |
| CN100446250C true CN100446250C (en) | 2008-12-24 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB2005101110368A Active CN100446250C (en) | 2005-12-01 | 2005-12-01 | Domain structure of increwing induction quality factor |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102412227A (en) * | 2011-07-28 | 2012-04-11 | 上海华虹Nec电子有限公司 | Ground-shielding structure of helical inductor |
| CN102779807A (en) * | 2012-01-16 | 2012-11-14 | 中国科学院上海微系统与信息技术研究所 | RDL (radiological defense laboratory) technology-compatible inductive component and manufacture method |
| CN109637999B (en) * | 2018-12-19 | 2020-11-24 | 上海华力集成电路制造有限公司 | Silicon-based inductor structure and layout of closed line therein |
| CN111668193A (en) * | 2020-05-12 | 2020-09-15 | 成都华微电子科技有限公司 | Integrated circuit chip with inductance coil |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5969950A (en) * | 1998-11-04 | 1999-10-19 | Sun Microsystems, Inc. | Enhanced heat sink attachment |
| CN1361550A (en) * | 2000-12-26 | 2002-07-31 | 株式会社东芝 | Semi-conductor device |
| CN1536590A (en) * | 2003-04-04 | 2004-10-13 | 矽统科技股份有限公司 | High-quality factor inducltor-device with wheltering pattern embedded in substrate |
| US6885275B1 (en) * | 1998-11-12 | 2005-04-26 | Broadcom Corporation | Multi-track integrated spiral inductor |
-
2005
- 2005-12-01 CN CNB2005101110368A patent/CN100446250C/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5969950A (en) * | 1998-11-04 | 1999-10-19 | Sun Microsystems, Inc. | Enhanced heat sink attachment |
| US6885275B1 (en) * | 1998-11-12 | 2005-04-26 | Broadcom Corporation | Multi-track integrated spiral inductor |
| CN1361550A (en) * | 2000-12-26 | 2002-07-31 | 株式会社东芝 | Semi-conductor device |
| CN1536590A (en) * | 2003-04-04 | 2004-10-13 | 矽统科技股份有限公司 | High-quality factor inducltor-device with wheltering pattern embedded in substrate |
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| CN1979852A (en) | 2007-06-13 |
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Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HUAHONG NEC ELECTRONICS CO LTD, SHANGHAI Effective date: 20131216 |
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Free format text: CORRECT: ADDRESS; FROM: 201206 PUDONG NEW AREA, SHANGHAI TO: 201203 PUDONG NEW AREA, SHANGHAI |
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Effective date of registration: 20131216 Address after: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech Park No. 1399 Patentee after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201206, Shanghai, Pudong New Area, Sichuan Road, No. 1188 Bridge Patentee before: Shanghai Huahong NEC Electronics Co., Ltd. |