CN100444198C - Smart card driving system - Google Patents
Smart card driving system Download PDFInfo
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- CN100444198C CN100444198C CNB2005101365865A CN200510136586A CN100444198C CN 100444198 C CN100444198 C CN 100444198C CN B2005101365865 A CNB2005101365865 A CN B2005101365865A CN 200510136586 A CN200510136586 A CN 200510136586A CN 100444198 C CN100444198 C CN 100444198C
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Abstract
The invention discloses a smart card drive system that comprises smart card chip which possesses input/output pin which can receive and send data, reset pin, clock pin, embedded system chip that includes general purpose output, clock output, serial port input pin, serial port output pin, thereinto, the general purpose output is connected with the reset pin of the smart card chip to control the level of the reset pin; the clock output is connected with the clock pin to output system clock to the smart card chip in operating mode; the serial port input pin, serial port output pin are connected with the input/output pin of the smart card chip to realize the communication between the serial port and smart card controlled by embedded system. The invention guarantees the data signaling rate and debugging performance, but also avoids using single-purpose chip to manage smart card, so it can decrease cost in large scale application and increase the competitive power.
Description
Technical field
The present invention relates to a kind of drive system, particularly a kind of smart card driving system.
Background technology
Smart card is a kind of small-sized embedded system, UIM (User IdentityModel such as field of mobile phones, subscriber identification module) card, SIM (Subscriber Identity Model, subscriber identification module) card, PIM (Personal Identity Module, subscriber identification module) card etc.Be mainly used in storage and manage some user profile because the specific (special) requirements of smart card sequential in the system of current various use smart cards, generally has a special chip, be used to manage and smart card between data interaction.Along with popularizing and a large amount of uses of smart card of present various embedded systems, the cost that chip brought that is used for the smart card management is also increasing.Because the present employed smart card driving system more complicated of industry, cost, are are therefore researched and developed a kind of system than higher simply, smart card driving system is necessary very much cheaply.
Summary of the invention
Technical scheme provided by the invention has provided a kind of smart card driving system, reaching by embedded system controlling and driving smart card, thereby need not use special-purpose smart card managing chip, effectively reduces cost.
For solving the problems of the technologies described above, the invention provides a kind of smart card driving system.Native system comprises smart card, described smart card has I/O pin, reset pin, the clock pin of transceive data, also comprise: embedded system chip, described embedded system chip has general delivery outlet, clock delivery outlet, serial ports input pin, serial ports output pin, wherein, described general delivery outlet links to each other with the reset pin of described smart card, the level of control reset pin; The clock delivery outlet links to each other with the clock pin of described smart card, descends the output system clock to smart card in working order; Described serial ports input pin, serial ports output pin link to each other with the I/O pin of described smart card, in the data communication that realizes under the control of described embedded system between serial ports and the smart card.
Native system may further include: frequency dividing circuit, be connected between the clock pin of the clock delivery outlet of described embedded system chip and described smart card, and import smart card behind the system clock frequency division with embedded system output.
Native system may further include: anti-jamming circuit is connected between the I/O pin of the serial ports output pin of described embedded system chip and described smart card.
Described anti-jamming circuit can be an open collector gate circuit of being made up of dual input Sheffer stroke gate and triode.
In the described open collector gate circuit, two input ends that can the right and wrong door connect the serial ports output pin and the system power supply of described embedded system chip respectively, the input end of the output termination triode of Sheffer stroke gate, the I/O pin of the described smart card of output termination of triode.
The clock delivery outlet of described embedded system chip, can be under idle condition output system clock not.
The clock delivery outlet of described embedded system chip can be exported slow clock under idle condition.
The general delivery outlet of described embedded system chip, when needs drag down the level of smart card reset pin, output low level; When needs are drawn high the level of smart card reset pin, the output high level.
Sequential between described embedded system chip port and the described smart port card can meet the ISO/IEC standard, and provides control by embedded system.
Data communication between the I/O pin of the serial ports input pin of described embedded system chip, serial ports output pin and described smart card, can meet the data transmit-receive mechanism for correcting errors that the ISO/IEC standard relates to, and provide control by the serial port drive of embedded system.
The present invention has not only guaranteed message transmission rate and error-correcting performance, can also be because of avoiding using special chip management smart card, thus in large-scale application, can effectively reduce cost, improve the competitiveness of product in market.
Description of drawings
Fig. 1 is the described system hardware connection layout of the embodiment of the invention.
Fig. 2 is the described anti-clutter circuit figure that adopts in the embodiment of the invention.
Embodiment
Set forth the present invention and concrete enforcement below in conjunction with accompanying drawing.
How emphasis of the present invention writes software and realizes driving sequential etc. if not lying in, existing in the prior art a large amount of the providing of this sequential control software, of the present inventionly focus on providing a kind of hardware driving scheme, connectivity scenario by each pin, make sequential control software can pass through pin transferring command and data interaction, so just do not need special-purpose smart card managing chip to control smart card, and only need utilize the chip of embedded system itself that control can be provided.Among the embodiment on the basis of above-mentioned hardware syndeton, according to the sequential flow process of ISO/IEC 7816 standard codes, by the initialization of embedded system by each delivery outlet control smart card, reset, sequential flow processs such as request of data, Card Rejections and card deactivation.In data communication process, realize and the data interaction of smart card and the error correction flow process in the data transmission procedure by serial ports by embedded system control.Fig. 1 is the system hardware connection layout of the embodiment of the invention, as shown in Figure 1:
Embedded system is controlled smart card by the GPO (general delivery outlet) and the MCKO (clock delivery outlet) of master chip, and communicate by serial ports and the smart card that chip carries, serial ports receives pin SIN mouth by its data and sends pin SOUT mouth and carries out data transmit-receive, and smart card carries out data transmit-receive by the I/O mouth.
At the various operating processes of smart card,, control and data write sticking into row according to ISO/IEC 7816 standards by interconnection system shown in Figure 1 by the embedded system control timing.
Control the output of general output pin GPO1 mouth by embedded system, the level of control smart card reset pin I/O, when needs dragged down smart card reset pin I/O, GPO1 exported " 0 "; In the time of need drawing high smart card reset pin I/O, GPO1 exports " 1 ".
By the major clock delivery outlet MCKO output system clock of embedded system control master chip, according to system's needs and ISO/IEC 7816 standards, through obtaining the clock signal of suitable frequency behind the suitable frequency division.Delivery outlet MCKO descends the output system clock in working order, does not export clock under the idle condition or exports slow clock.
Carry out data communication by embedded system control master chip by serial ports and smart card, as shown in Figure 1, the input and output pin of serial ports and the I/O mouth of smart card are linked to each other.But note, if directly the output pin with the master chip serial ports links to each other with smart card I/O pin, may produce interference mutually, state when the serial ports output pin is idle can have influence on the output of smart card, cause the input pin of serial ports can not correctly receive data, therefore also need solve this interference problem.
Be to have adopted anti-clutter circuit to solve this problem in the embodiment of the invention, Fig. 2 is the anti-clutter circuit figure that adopts among the embodiment, as shown in the figure, anti-clutter circuit be one by a Sheffer stroke gate and the open collector gate circuit that triode is formed, be called for short the OC gate circuit, this OC gate circuit can guarantee that the I/O pin of serial ports output port SOUT and smart card can not influence each other.OC gate circuit legend shown in Figure 2 is made up of a dual input Sheffer stroke gate chip and a triode chip.Numeral on two each pins of chip is represented the pin of chip numbering respectively, and Sheffer stroke gate pin of chip 1 and pin 2 are input pins, and pin 3 is grounding pins of chip, and pin 4 is output pins, and pin 5 is power supplys.Triode pin of chip 1 is a grounding pin, and pin 2 is input pins, and pin 3 is output pins.The pin 1 of Sheffer stroke gate links to each other with the serial ports output pin, and Sheffer stroke gate pin of chip 2 links to each other with system power supply with pin 5, and Sheffer stroke gate pin of chip 4 links to each other with triode pin of chip 2, and triode pin of chip 3 links to each other with the I/O mouth pin of smart card.Sheffer stroke gate pin of chip 3 and triode pin of chip 1 ground connection.The SOUT pin is connected to serial ports output pin SOUT among the figure, and the P_IO pin is connected to smart card I/O mouth.VDDIO is connected to system power supply.This circuit can prevent the interference that smart card I/O pin and serial ports output pin connect together and bring.
After doing above-mentioned hardware design, native system is to the driving of the smart card above-mentioned port by embedded system control master chip, and according to the various sequential to smart card operation of ISO/IEC 7816 standard codes, the output respective electrical is plain existing on the corresponding port.Simultaneously, the data transmit-receive mechanism for correcting errors that ISO/IEC relates to, also in the serial port drive program of master chip with Implementation of Embedded System.
Claims (10)
1, a kind of smart card driving system, comprise smart card, described smart card has I/O pin, reset pin, the clock pin of transceive data, it is characterized in that, described drive system also comprises: embedded system chip, described embedded system chip have general delivery outlet, clock delivery outlet, serial ports input pin, serial ports output pin, wherein, described general delivery outlet links to each other with the reset pin of described smart card, the level of control reset pin; The clock delivery outlet links to each other with the clock pin of described smart card, descends the output system clock to smart card in working order; Described serial ports input pin, serial ports output pin link to each other with the I/O pin of described smart card, in the data communication that realizes under the control of described embedded system between serial ports and the smart card.
2, drive system as claimed in claim 1, it is characterized in that, further comprise: frequency dividing circuit, be connected between the clock pin of the clock delivery outlet of described embedded system chip and described smart card, import smart card behind the system clock frequency division with embedded system output.
3, drive system as claimed in claim 1 is characterized in that, further comprises: anti-jamming circuit is connected between the I/O pin of the serial ports output pin of described embedded system chip and described smart card.
4, drive system as claimed in claim 3 is characterized in that, described anti-jamming circuit is an open collector gate circuit of being made up of dual input Sheffer stroke gate and triode.
5, drive system as claimed in claim 4, it is characterized in that, in the described open collector gate circuit, two input ends of Sheffer stroke gate connect the serial ports output pin and the system power supply of described embedded system chip respectively, the input end of the output termination triode of Sheffer stroke gate, the I/O pin of the described smart card of output termination of triode.
6, drive system as claimed in claim 1 is characterized in that, the clock delivery outlet of described embedded system chip, output system clock not under idle condition.
7, drive system as claimed in claim 1 is characterized in that, the clock delivery outlet of described embedded system chip, the slow clock of output under idle condition.
8, drive system as claimed in claim 1 is characterized in that, the general delivery outlet of described embedded system chip, and when needs drag down the level of smart card reset pin, output low level; When needs are drawn high the level of smart card reset pin, the output high level.
9, drive system as claimed in claim 1 is characterized in that, the sequential between described embedded system chip port and the described smart port card meets the ISO/IEC standard, and provides control by embedded system.
10, drive system as claimed in claim 1, it is characterized in that, data communication between the I/O pin of the serial ports input pin of described embedded system chip, serial ports output pin and described smart card, meet the data transmit-receive mechanism for correcting errors that the ISO/IEC standard relates to, and provide control by the serial port drive of embedded system.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005101365865A CN100444198C (en) | 2005-12-30 | 2005-12-30 | Smart card driving system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005101365865A CN100444198C (en) | 2005-12-30 | 2005-12-30 | Smart card driving system |
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| CN1991874A CN1991874A (en) | 2007-07-04 |
| CN100444198C true CN100444198C (en) | 2008-12-17 |
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| CNB2005101365865A Expired - Fee Related CN100444198C (en) | 2005-12-30 | 2005-12-30 | Smart card driving system |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102541776A (en) * | 2010-12-22 | 2012-07-04 | 安凯(广州)微电子技术有限公司 | Method for simulating contact type smart IC (integrated circuit) card interface on application processor chip |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101697646A (en) * | 2009-05-14 | 2010-04-21 | 上海闻泰电子科技有限公司 | System and method for improving electrical performance of intelligent card interface of mobile terminal |
| CN104391770B (en) * | 2014-10-23 | 2016-08-24 | 山东维固信息科技股份有限公司 | The on-line debugging of a kind of embedded data security system SOC and Upper machine communication module |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1306368A (en) * | 2000-01-20 | 2001-08-01 | 国际商业机器公司 | Hand-held device, intelligence card interface device and data transmitting method |
| CN1326573A (en) * | 1998-03-26 | 2001-12-12 | 格姆普拉斯公司 | Versatile interface smart card |
| WO2002103923A1 (en) * | 2001-06-20 | 2002-12-27 | Smart Card Laboratory, Inc. | Portable telephone having smartcard which non-contact interface is transferred into break contact point |
| CN1545357A (en) * | 2003-11-12 | 2004-11-10 | ���˹���Ѷ��� | Method, apparatus and system for implementing PIM card of Little Smart handset |
-
2005
- 2005-12-30 CN CNB2005101365865A patent/CN100444198C/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1326573A (en) * | 1998-03-26 | 2001-12-12 | 格姆普拉斯公司 | Versatile interface smart card |
| CN1306368A (en) * | 2000-01-20 | 2001-08-01 | 国际商业机器公司 | Hand-held device, intelligence card interface device and data transmitting method |
| WO2002103923A1 (en) * | 2001-06-20 | 2002-12-27 | Smart Card Laboratory, Inc. | Portable telephone having smartcard which non-contact interface is transferred into break contact point |
| CN1545357A (en) * | 2003-11-12 | 2004-11-10 | ���˹���Ѷ��� | Method, apparatus and system for implementing PIM card of Little Smart handset |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102541776A (en) * | 2010-12-22 | 2012-07-04 | 安凯(广州)微电子技术有限公司 | Method for simulating contact type smart IC (integrated circuit) card interface on application processor chip |
| CN102541776B (en) * | 2010-12-22 | 2016-02-03 | 安凯(广州)微电子技术有限公司 | The method of simulated implementation contact intellective IC card interface on application processor chip |
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| Publication number | Publication date |
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| CN1991874A (en) | 2007-07-04 |
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