CN100437489C - Method for saving system resource - Google Patents
Method for saving system resource Download PDFInfo
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- CN100437489C CN100437489C CNB2006100011783A CN200610001178A CN100437489C CN 100437489 C CN100437489 C CN 100437489C CN B2006100011783 A CNB2006100011783 A CN B2006100011783A CN 200610001178 A CN200610001178 A CN 200610001178A CN 100437489 C CN100437489 C CN 100437489C
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- 238000000034 method Methods 0.000 title claims abstract description 27
- 230000000295 complement effect Effects 0.000 claims description 3
- 229910044991 metal oxide Inorganic materials 0.000 claims description 3
- 150000004706 metal oxides Chemical class 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 claims description 3
- 230000005540 biological transmission Effects 0.000 abstract description 4
- 230000003213 activating effect Effects 0.000 abstract 1
- 230000002093 peripheral effect Effects 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 239000002699 waste material Substances 0.000 description 4
- 230000004913 activation Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- GOLXNESZZPUPJE-UHFFFAOYSA-N spiromesifen Chemical compound CC1=CC(C)=CC(C)=C1C(C(O1)=O)=C(OC(=O)CC(C)(C)C)C11CCCC1 GOLXNESZZPUPJE-UHFFFAOYSA-N 0.000 description 2
- 238000004891 communication Methods 0.000 description 1
- 230000009849 deactivation Effects 0.000 description 1
- 230000008034 disappearance Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000035800 maturation Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
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Abstract
A method for saving system resource includes activating bridge corresponding to bus inserted with expansion slot card and writing information of bridge activated bus in the first storage when start-up self-test program is executed by BIOS, only distributing system resource to bridge on activated bus by BIOS when PnP algorithm program is executed by BIOS, using chip set to carry out configuration on width of bus with expansion slot card for making bus interface support maximum bus width to raise data transmission speed.
Description
Technical field
The invention relates to a kind of method of saving system resource, particularly about a kind of method of saving system resource of effective distribution bus interface bandwidth.
Background technology
Along with being showing improvement or progress day by day of electronics and computer technology, the function that realizes from strength to strength, and can increase update functions by carrying new peripheral unit, but must restart computer system so that the driving of peripheral unit to be installed after carrying new peripheral unit, so, need stop existing operation, very loaded down with trivial details and inconvenient on reality is used, especially time remaining and high reliability are had the very equipment such as server of high request, more can cause serious consequences such as data loss, service disruption.
For this reason, industry promptly proposes a kind of expansion slot plug-in card (Slot Card) interconnection technique with hot plug function, PCI (Peripheral Component Interconnection) (being designated hereinafter simply as the PCI technology) has become the bus standard that computer system is generally supported as input and output (I/O) interface of computer system.
PCI (Peripheral Component Interconnect) is a kind of peripheral device connecting interface commonly used on the computer platform, it can outwards overlap the CPU (central processing unit) of computer platform to a circuit board, be connected to various computer peripheral apparatus by this circuit board, for example comprise screen display, hard disk unit, CD-ROM drive, network switch or the like, CPU (central processing unit) can be carried out data with these peripheral devices and be exchanged.The PCI standard has been stipulated the bus signals of one group of standard, allows CPU (central processing unit) carry out data with peripheral device on circuit board and exchanges.Yet on concrete the application, maturation and progress along with technology, the PCI standard again and then comprise the extensibility standard that some are different, PCI-E (PCI Express) for example, it is based on original PCI framework and makes some ductile functions expansions, makes data rate more quicker than traditional pci bus.
The PCI-E bus architecture can be supported various expansion slot plug-in cards with different bus bandwidth, for example comprises the bus bandwidth of 1 (x1), 4 (x4), 8 (x8) and 16 (x16).When practical application, the slot that the expansion slot plug-in card of little bus bandwidth can be plugged on big bus bandwidth uses.For instance, the expansion slot plug-in card of 4 bus bandwidths is not planted only to the slot that is similarly 4 bus bandwidths and is used, and the slot that also can be plugged on 8 or 16 s' bus bandwidth uses.Just if having-slot of 8 bus bandwidths is set on the main frame motherboard, then this slot is promptly optionally in order to the expansion slot plug-in card of 8 or 4 bus bandwidths of pegging graft.
Yet on concrete enforcement, if it is 8 buses that the problem of above-mentioned PCI-E bus architecture is the PCI-E interface controller on the main frame motherboard, then these 8 buses only can have 2 kinds of online designs: the 1st kind of mode is the slot that it all is connected to 8 bus bandwidths; The 2nd kind of mode then is to be divided into two 4 bus, again this bus of two 4 is connected respectively to two different slots.Adopted the 2nd kind of mode but the shortcoming of this practice is, how much expansion slot plug-in card (Slot Card) quantity on then it is pegged graft all only can use the wide bus of 4 bit strips is carried out data transmission; Just if the expansion slot plug-in card on pegging graft only has only a slice, then this expansion slot plug-in card also only can use 4 and can't use the wide bus of 8 bit strips and carry out data transmission.Therefore on pegging graft under the situation of a slice expansion slot plug-in card, obviously fail to effectively utilize the system resource of top efficiency and carry out data transmission.
When the PCI-E interface controller on the main frame motherboard disposes slot, then no matter whether be plugged with the expansion slot plug-in card on this PCI-E interface, system all can give the bridge distributing system resource (as IO, MMIO, IRQ) of PCI-E interface, then the bridge of the bus interface of those expansion slot plug-in cards of not pegging graft can be wasted system resource, and, BIOS do not have the bridge distributing system resource of expansion slot plug-in card for those PCI-E interfaces if forcing, then rub-out signal can appear in some OS operating system (as MPS pattern of MS windows 2000,2003) on device.
For this reason, how to promote data rate and do not waste system resource, become the important topic that needs to be resolved hurrily at present.
Summary of the invention
For overcoming the disappearance of above-mentioned prior art, fundamental purpose of the present invention is to provide a kind of bus interface to support the method for the saving system resource of the maximum bus bandwidth of this expansion slot plug-in card, reaching maximum effective utilization, and promotes data rate.
Another object of the present invention is to provide a kind of bus interface can not waste the method for the saving system resource of system resource.
A further object of the present invention is to provide a kind of method that can not produce the saving system resource of error message.
For reaching above-mentioned and other purpose, the invention provides a kind of method of saving system resource, be applied in one and have in the computer system of bios program, this method may further comprise the steps: the program of (1) one Basic Input or Output System (BIOS) execution-start selftest; (2) judge whether the data of one first storage unit are invalid, if, carry out step (3), if not, then carry out step (4); (3) identification code on the foundation-expansion board is learnt the expansion board of present grafting, learns the corresponding bridge of all expansion slots on this expansion board, and positional value that will these corresponding all bridges is recorded in the value of including of first storage unit; (4) value of including according to this first storage unit activates all corresponding bridges; (5) all activated bridge begins to link up at its bus of controlling the bus bandwidth after obtaining linking up; (6) learn the expansion board of present grafting according to the identification code on this expansion board, and reexamine that all are plugged with the expansion slot of a plug-in card on this expansion board, and with all be plugged with a plug-in card expansion slot the positional value of corresponding all bridges be recorded in second storage unit; (7) judge whether the value of including of first storage unit equals the positional value of second storage unit, if, then carry out step (8), if not, then carry out step (9); (8) this Basic Input or Output System (BIOS) is carried out the program of a plug and play algorithm, and system resource is only distributed to the bridge that activates bus, and end step; And (9) write the positional value of second storage unit in the value of including of first storage unit, and reset system, and return step (1) and continue execution in step (1) to step (9).
This bus is a PCI or PCI-E bus, this expansion slot plug-in card (Slot Card) is a pci card or PCI-E card, and this expansion slot plug-in card comprises floppy drive, Winchester disk drive, cd-ROM (CD-ROM), read/writable CD-ROM drive (CD-R/W) and digital multi CD-ROM drive (DVD), sound card and network interface card.
Moreover this first storage unit is a non-volatility memorizer, and this non-volatility memorizer is a complementary metal oxide semiconductor (CMOS) (CMOS), electrically erasable programmable ROM (EEPROM), flash ROM (Flash ROM).
The random-access memory (ram) that other this second storage unit is generally erasable (Read/Write).
The method that the present invention saves system resource is at a Basic Input or Output System (BIOS) (BasicInput/Output System, BIOS) in, when carrying out the program of a start selftest, whether the data of judging one first storage unit are invalid, and whether be plugged with the expansion slot plug-in card (Slot Card) of expansion board (Riser Card) on the testbus interface, if then activation is plugged with the bridge of pairing this bus of expansion slot plug-in card of expansion board; If not, forbid that then this nothing is plugged with the bridge of pairing this bus of expansion slot plug-in card of expansion board, and the information (for example the bit value is made as 1) of the bridge of this bus of being activated write in one first storage unit, when the program of this Basic Input or Output System (BIOS) execution-plug and play algorithm, because of the bridge of forbidding will be hidden, system can't use the bus interface cycle (PCI Cycle) to go access (Access), so with for example look-at-me (IRQ), system resources such as I/O (IO) interface resource and internal memory I/O (MMIO) zone are only distributed to the bridge of the bus of activation, can not waste system resource, and when the bridge of bus is activated, bus bandwidth to the expansion slot plug-in card that is plugged with expansion board disposes, make this bus interface can support the bus bandwidth of the expansion slot plug-in card maximum of this expansion board, reach maximum effective utilization, and promote data rate.
Description of drawings
Fig. 1 is the method flow diagram of saving system resource of the present invention.
Embodiment
Embodiment
See also Fig. 1, it is the process flow diagram that the present invention saves the method for system resource.As shown in the figure, the present invention saves the method for system resource, uses one and has in the computer system of bios program, this method may further comprise the steps: at first, carry out step S10, Basic Input or Output System (BIOS) (BIOS) is carried out the program of a start selftest, then carries out step S20.
In step S20, judge whether the data of one first storage unit are invalid, if, then carry out step S30, if not, then carry out step S40.
In step S30, learn the expansion board of present grafting according to the identification code on the expansion board (Riser Card), thereby learn the corresponding bridge of all expansion slots on this expansion board, and positional value that will these corresponding all bridges is recorded in the value of including of first storage unit, then carries out step S40.
In step S40, all the corresponding bridges of the value of including deactivation according to this first storage unit then carry out step S50.
In step S50, all activated bridge begins to link up at its bus of controlling, and the bus bandwidth after obtaining linking up then carries out step S60.
In step S60, learn the expansion board of present grafting according to the identification code on this expansion board, and reexamine that all are plugged with the expansion slot of a plug-in card on this expansion board, and with all be plugged with a plug-in card expansion slot the positional value of corresponding all bridges be recorded in second storage unit, then carry out step S70.
In step S70, judge whether the value of including of first storage unit equals the positional value of second storage unit, if, then carry out step S80, if not, then carry out step S90.
In step S80, this sill input-output system is carried out a plug and play algorithm routine, and system resource only distributes to the bridge that activates bus, and end step.
In step S90, the positional value of second storage unit is write in the value of including of first storage unit, and reset system, and return step S10 and continue execution in step S10 to step S90.
In the present embodiment, this bus interface is a pci interface or PCI-E interface, this expansion slot plug-in card is a pci card or PCI-E card, and this expansion slot plug-in card comprises floppy drive, Winchester disk drive, cd-ROM (CD-ROM), read/writable CD-ROM drive (CD-R/W) and digital multi CD-ROM drive (DVD), audio communication card and network card.
Moreover, in the present embodiment, this first storage unit is a non-volatility memorizer, and this non-volatility memorizer is a complementary metal oxide semiconductor (CMOS) (CMOS), electrically erasable programmable ROM (EEPROM), flash ROM (Flash ROM).
This second storage unit is generally to wipe the random-access memory (ram) of (Read/Write) in addition.It is noted that the said expansion board of the present invention (Riser Card) is the expansion board of broad sense, is not general said expansion board (Slot Card), all belongs to Slot Card as PCI Card/PCIE Card; The said expansion board of the present invention (Riser Card) has a slot (Slot) at least on it, if there is the PCI/PCIE card to insert in this slot (Slot), we claim that this PCI/PCIE card is expansion slot plug-in card (Slot Card).
In sum, the present invention saves the method for system resource, be at a Basic Input or Output System (BIOS) (Basic Input/Output System, BIOS) in, when carrying out the program of a start selftest, whether invalid by the data of judging one first storage unit, and whether be plugged with the expansion slot plug-in card (Slot Card) of expansion board (Riser Card) on the testbus interface, if then activation is plugged with the bridge of pairing this bus of expansion slot plug-in card of expansion board; If not, forbid that then this is not plugged with the bridge of pairing this bus of expansion slot plug-in card of expansion board, and the information (for example the bit value is made as 1) of the bridge of this bus of being activated write in one first storage unit, when this input-output system is carried out the program of a plug and play algorithm, it will be hidden the bridge that cause is forbidden, system can't use the bus interface cycle (PCI Cycle) to go access (Access), therefore only with for example look-at-me (IRQ), system resources such as I/O (IO) interface resource and internal memory I/O (MMIO) zone are only distributed to the bridge that activates bus, can not waste system resource, and when the bridge of bus is activated, chipset (Chipset) will dispose the bus bandwidth of the expansion slot plug-in card that is plugged with expansion board, make this bus interface can support the bus bandwidth of the expansion slot plug-in card maximum of this expansion board, reach maximum effective utilization, and promote data rate.
Claims (8)
1. a method of saving system resource is characterized in that, this method may further comprise the steps:
(1) one Basic Input or Output System (BIOS) is carried out the program of a start selftest;
(2) judge whether the data of one first storage unit are invalid, if, carry out step (3), if not, then carry out step (4);
(3) learn the expansion board of present grafting according to the identification code on the expansion board, learn the corresponding bridge of all expansion slots on this expansion board, and positional value that will these corresponding all bridges is recorded in the value of including of first storage unit;
(4) value of including according to this first storage unit activates all corresponding bridges;
(5) all activated bridge begins to link up at its bus of controlling the bus bandwidth after obtaining linking up;
(6) learn the expansion board of present grafting according to the identification code on this expansion board, and reexamine that all are plugged with the expansion slot of a plug-in card on this expansion board, and with all be plugged with a plug-in card expansion slot the positional value of corresponding all bridges be recorded in second storage unit;
(7) judge whether the value of including of first storage unit equals the positional value of second storage unit, if, then carry out step (8), if not, then carry out step (9);
(8) this Basic Input or Output System (BIOS) is carried out the program of a plug and play algorithm, and system resource is only distributed to the bridge that activates bus, and end step; And
(9) positional value with second storage unit writes in the value of including of first storage unit, and reset system, and returns step (1) and continue execution in step (1) to step (9).
2. the method for saving system resource as claimed in claim 1 is characterized in that, this bus is in PCI or the PCI-E interface.
3. the method for saving system resource as claimed in claim 1 is characterized in that, this expansion slot plug-in card is in a pci card or the PCI-E card.
4. the method for saving system resource as claimed in claim 1 is characterized in that, this expansion board comprises floppy drive, Winchester disk drive, cd-ROM, read/writable CD-ROM drive, digital multi CD-ROM drive, sound card and network interface card.
5. the method for saving system resource as claimed in claim 1 is characterized in that, this first storage unit is a non-volatility memorizer.
6. the method for saving system resource as claimed in claim 5 is characterized in that, this non-volatility memorizer is in a complementary metal oxide semiconductor (CMOS), electrically erasable programmable ROM, the flash ROM.
7. the method for saving system resource as claimed in claim 1 is characterized in that, this second storage unit is erasable random access memory.
8. the method for saving system resource as claimed in claim 1 is characterized in that, this system resource is look-at-me, input/output interface resource and internal memory I/O zone.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100011783A CN100437489C (en) | 2006-01-13 | 2006-01-13 | Method for saving system resource |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100011783A CN100437489C (en) | 2006-01-13 | 2006-01-13 | Method for saving system resource |
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| CN101000546A CN101000546A (en) | 2007-07-18 |
| CN100437489C true CN100437489C (en) | 2008-11-26 |
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| CNB2006100011783A Expired - Fee Related CN100437489C (en) | 2006-01-13 | 2006-01-13 | Method for saving system resource |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102467426B (en) * | 2010-11-08 | 2015-01-28 | 英业达股份有限公司 | Method for forbidding option read-only memory of external card in basic input/output system (BIOS) |
| CN105206487B (en) * | 2015-10-08 | 2017-12-19 | 清华大学 | A kind of liquid metal plasma color display device and preparation method |
| CN106126460B (en) * | 2016-06-16 | 2018-12-11 | 迈普通信技术股份有限公司 | Hot-plug equipment reserves resource allocation methods, device and system |
| CN108874544A (en) * | 2018-06-11 | 2018-11-23 | 郑州云海信息技术有限公司 | A kind of method and system of GPU server I/O resource allocation |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004334693A (en) * | 2003-05-09 | 2004-11-25 | Nec Soft Ltd | Computer system |
| US20040255109A1 (en) * | 2003-06-02 | 2004-12-16 | Nec Corporation | Initialization of range registers within chipsets on spare processor cells |
| US20050273525A1 (en) * | 2004-06-03 | 2005-12-08 | Anderson David D | Dynamic I/O disabling systems and methods |
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2006
- 2006-01-13 CN CNB2006100011783A patent/CN100437489C/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004334693A (en) * | 2003-05-09 | 2004-11-25 | Nec Soft Ltd | Computer system |
| US20040255109A1 (en) * | 2003-06-02 | 2004-12-16 | Nec Corporation | Initialization of range registers within chipsets on spare processor cells |
| US20050273525A1 (en) * | 2004-06-03 | 2005-12-08 | Anderson David D | Dynamic I/O disabling systems and methods |
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| CN101000546A (en) | 2007-07-18 |
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Inventor after: Sun Ying Inventor after: Liu Zhi Inventor before: Lu Yingzhi |
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Effective date of registration: 20170323 Address after: No. 1, building No. 23, Dongli oasis garden, Dongli District, Tianjin, China Patentee after: Sun Ying Patentee after: Liu Zhi Address before: Taipei City, Taiwan, China Patentee before: Inventec Corporation |
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Address after: No. 247 lililiu Road, lylii Town, Li Riverside County, the Guangxi Zhuang Autonomous Region, the Guangxi Zhuang Autonomous Region Co-patentee after: Liu Zhi Patentee after: Sun Ying Address before: 300300 Dongli Lake Hengda oasis garden, No. 23, Dongli, Tianjin, No. 201 Co-patentee before: Liu Zhi Patentee before: Sun Ying |
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Granted publication date: 20081126 Termination date: 20180113 |
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| CF01 | Termination of patent right due to non-payment of annual fee |