CN100399574C - Organic light-emitting diode display panel and its polysilicon channel layer forming method - Google Patents
Organic light-emitting diode display panel and its polysilicon channel layer forming method Download PDFInfo
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- CN100399574C CN100399574C CNB2006100060741A CN200610006074A CN100399574C CN 100399574 C CN100399574 C CN 100399574C CN B2006100060741 A CNB2006100060741 A CN B2006100060741A CN 200610006074 A CN200610006074 A CN 200610006074A CN 100399574 C CN100399574 C CN 100399574C
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Abstract
The present invention relates to a polysilicon channel layer and a forming method thereof. A base board is provided; a polysilicon layer is arranged on the base board; then, non-third A family dopant atoms and non-fifth A family dopant atoms are doped in the polysilicon layer to form the polysilicon channel layer.
Description
Technical field
The present invention relates to a kind of organic LED display panel (organic light emitting diode, OLED) and the formation method of polysilicon channel layer, particularly relate to a kind of organic LED display panel of the foreign atom that in polysilicon channel layer, is doped with non-IIIA family and non-VA family and the formation method of polysilicon channel layer thereof.
Background technology
At traditional low temperature polycrystalline silicon (low temperature polysilicon, LTPS) display panels (liquid crystal display panel LCD panel) and Organic Light Emitting Diode (organic lightemitting diode, OLED) in the technology of display floater, industry can be used excimer laser tempering (excimer laser annealing, ELA) technology to analyze and molten amorphous silicon (amorphous silicon, a-Si) layer is to crystallize into polysilicon layer.(thin filmtransistor, channel layer TFT) will be to improve the electrical performance of thin-film transistor and this polysilicon layer will can be used as thin-film transistor.
Research is pointed out according to pertinent literature, the defect type that influences the multi-crystal TFT electrical performance mainly contains two kinds, be that crystal boundary falls into and to catch (grain boundary trap) defective and interface and fall into and catch (interface trap) defective. wherein, crystal boundary falls into and catches defective is variation in the process of polysilicon layer from the molten amorphous crystallizing silicon layer mainly.Especially use ELA with the amorphous silicon layer fusion and crystallization during as the crystallization technique (being designated hereinafter simply as the ELA crystallization technique) of polysilicon layer, crystal boundary falls into catches defective and interface to fall into the quantity of catching defective is 10 approximately
12And 10
11The order of magnitude.By the quantity of its defective as can be known, the raceway groove quality (channelquality) of polysilicon layer is fallen into by crystal boundary and catches the defective effect maximum.
For LTPS LCD, channel layer has above-mentioned generation of defects among the dynamical TFT of ELA crystallization technique made though see through, because TFT the requirement as the switch element of pixel still can reach the standard of LTPS LCD for the TFT performance.
But for the OLED display floater, its defective effect is not just allowed to ignore.In the active pixel matrix of OLED display floater, the TFT of each pixel with the mode of current drives drive an organic electric laser element that comprises anode, negative electrode and organic material layer (organic electroluminescent device, OELD).Because the polysilicon layer that sees through ELA crystallization technique made usually has the inhomogeneities of crystallization and defective, causes the characteristic of the channel layer of all TFT to be not quite similar.And then after causing the OLED display floater to complete to light, will produce the fringe phenomena (being designated hereinafter simply as linemura) of light and shade inequality therefore.Thus, influence the display quality of OLED display floater widely.
Summary of the invention
In view of this, purpose of the present invention is exactly that the formation method of a kind of organic LED display panel and polysilicon channel layer thereof is being provided.Mix in its polysilicon layer that behind the heat treatment amorphous silicon layer, is crystallized into (for example with the formed polysilicon layer of the ELA crystallization technique) design of foreign atom of non-IIIA family and non-VA family, defective that can the homogenizing polysilicon layer.Therefore, can improve the inhomogeneities of polysilicon layer crystallization and defective, make that the characteristic of polysilicon channel layer of all pixel TFT is identical.Therefore, and then make that the characteristic of TFT of all pixels is identical, avoid organic LED display panel when running, to produce bright uneven fringe phenomena (line mura).Thus, promote the display quality of organic LED display panel widely.
According to purpose of the present invention, a kind of organic LED display panel is proposed, comprise a substrate, a pixel and a thin-film transistor.Pixel is arranged on the substrate.Thin-film transistor is arranged in the pixel, and comprises a polysilicon channel layer.Be doped with one in the polysilicon channel layer and be the foreign atom of electrically neutral atom.
According to another object of the present invention, a kind of formation method of polysilicon channel layer is proposed.At first, provide a substrate, have an amorphous silicon layer on the substrate.Then, the heat treatment amorphous silicon layer is to form a polysilicon layer.Then, mixing one is that the foreign atom of electrically neutral atom is in polysilicon layer, to form a polysilicon channel layer.
According to a further object of the present invention, a kind of formation method of polysilicon channel layer is proposed.At first, provide a substrate, have one first polysilicon layer and one second polysilicon layer on the substrate.Then, cover substrate with a photomask, photomask has an opening and exposes first polysilicon layer.Then, mixing one is that the foreign atom of electrically neutral atom is in first polysilicon layer, to form a polysilicon channel layer.
According to another purpose of the present invention, a kind of formation method of polysilicon channel layer is proposed.At first, provide a substrate, have one first polysilicon layer and one second polysilicon layer on the substrate.Then, cover substrate with one first photomask, first photomask has one first opening and one second opening exposes first polysilicon layer and second polysilicon layer respectively.Then, mixing one is that first foreign atom of electrically neutral atom is in first polysilicon layer and second polysilicon layer, to form one first polysilicon channel layer and one second polysilicon channel layer respectively.The doping content of first foreign atom in first polysilicon channel layer is identical with the doping content of first foreign atom in second polysilicon channel layer.Then, remove first photomask and cover substrate with one second photomask, second photomask has one the 3rd opening and exposes first polysilicon channel layer.Then, mixing one is that second foreign atom of electrically neutral atom is in first polysilicon channel layer, to form one the 3rd polysilicon channel layer.Wherein, first foreign atom and the second foreign atom total doping content in the 3rd polysilicon channel layer is greater than the doping content of first foreign atom in second polysilicon channel layer.
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, following conjunction with figs. and preferred embodiment are to illustrate in greater detail the present invention.
Description of drawings
It is Organic Light Emitting Diode (organic lightemitting diode, OLED) schematic diagram of circuit framework in the single pixel of display floater according to embodiments of the invention one that Fig. 1 illustrates;
It is profile according to thin bilge construction in the single pixel of the organic LED display panel of embodiments of the invention one that Fig. 2 illustrates;
It is flow chart according to the formation method of the polysilicon channel layer of embodiments of the invention two that Fig. 3 illustrates;
It is flow chart according to the formation method of the polysilicon channel layer of embodiments of the invention three that Fig. 4 illustrates;
Fig. 5 A～5H illustrates the process section of the polysilicon channel layer that is embodiments of the invention three;
It is flow chart according to the formation method of the polysilicon channel layer of embodiments of the invention four that Fig. 6 illustrates; And
Fig. 7 A～7H illustrates the process section of the polysilicon channel layer that is embodiments of the invention four.
The simple symbol explanation
10: organic LED display panel
11,21: substrate
13: pixel
14: the first polysilicon channel layers
18,19: insulating barrier
22: the second polysilicon channel layers
23: amorphous silicon layer
24: polysilicon layer
24a: first polysilicon layer
24b: second polysilicon layer
24c: the 3rd polysilicon channel layer
25: organic electroluminescent element
26: anode
27: negative electrode
28: organic material layer
51,71: the first photomasks
51a, 71a: first opening
52,72: the second photomasks
52b, 71b: second opening
72b: the 3rd opening
53: excimer laser
54: arrow
Cs: storage capacitors
D1: first drain electrode
D2: second drain electrode
DL1: first data wire
DL2: second data wire
G1: first grid
G2: second grid
S1: first source electrode
S2: second source electrode
SL1: first scan line
SL2: second scan line
T1: the first film transistor
T2: second thin-film transistor
Embodiment
Embodiment one
Please be simultaneously with reference to Fig. 1～2, it is Organic Light Emitting Diode (organic light emitting diode according to embodiments of the invention one that Fig. 1 illustrates, OLED) it is profile according to thin bilge construction in the single pixel of the organic LED display panel of embodiments of the invention one that the schematic diagram of circuit framework in the single pixel of display floater, Fig. 2 illustrate.Shown in Fig. 1～2, organic LED display panel 10 comprises a substrate 11, a pixel 13 and a first film transistor (thin film transistor, TFT) T1 at least.Pixel 13 is arranged on the substrate 11, is that example explains with the pixel in several pixels of active matrix pixel array (active matrix pixelarray) for example.The first film transistor T 1 is arranged in the pixel 13, and comprises one first polysilicon channel layer 14.First polysilicon channel layer 14 also is doped with first foreign atom of the non-IIIA family that is different from polysilicon and non-VA family except comprising polysilicon, the defective (defect) of polysilicon layer before mixing with homogenizing.Therefore, can improve the inhomogeneities of polysilicon layer crystallization and defective, make that the characteristic of polysilicon channel layer is identical in all pixel TFT.Therefore, and then make that the characteristic of TFT of all pixels is identical, avoid organic LED display panel when running, to produce bright uneven fringe phenomena (line mura).Thus, can promote the display quality of organic LED display panel widely, increase the good impression of consumer for the OLED display floater.
Wherein, first foreign atom that is doped in first polysilicon channel layer 14 can be an electrically neutral atom, also can comprise inert gas and/or IVA family.For example, first foreign atom is selected from the foreign atom of at least one foreign atom in the group that helium (He), neon (Ne), argon (Ar), krypton (Kr), xenon (Xe) and radon (Rn) formed and combination in any thereof.First foreign atom is selected from the foreign atom of at least one foreign atom in the group that carbon (IC), silicon (Si), germanium (Ge), tin (Sn) and plumbous (Pb) formed and combination in any thereof.First foreign atom also can be selected from the combination of inert gas and IVA family.But the technology of present embodiment is not confined to this, and for example, first foreign atom can be selected from the electric neutrality foreign atom beyond periodic table IIIA family and the VA family, and promptly first foreign atom is not to be selected from periodic table IIIA family and VA family.In addition, the doping content of first foreign atom in first polysilicon channel layer 14 is 10
11～10
15Atom number/square centimeter (atoms/cm
2), also can be greater than 10
12Atom number/square centimeter.The first above-mentioned polysilicon channel layer 14 is finished after can being doped first foreign atom by a polysilicon layer, and polysilicon layer can be seen through after the heat treatment and crystallization is finished by an amorphous silicon layer.For example, amorphous silicon layer can see through laser tempering (laserannealing) method fusion and crystallize into polysilicon layer, and the laser tempering method can see through an excimer laser (excimer laser) scanning and molten amorphous silicon layer.
In the present embodiment, in the process of making the first film transistor T 1, at first (excimer laser annealing, ELA) crystallization technique is with the amorphous silicon layer fusion and crystallization is a polysilicon layer with the excimer laser tempering.Then, a certain amount of first foreign atom that mixes is in polysilicon layer, to finish the first above-mentioned polysilicon channel layer 14.
In the present embodiment, the first film transistor T 1 also comprises a first grid G1, one first source S 1 and one first drain D 1.First source S 1 and first drain D 1 are arranged on first polysilicon channel layer 14, and are electrically connected with two ends of first polysilicon channel layer 14 accordingly.First grid G1 is arranged on first polysilicon channel layer 14, and between first source S 1 and first drain D 1.Wherein, first source S 1 and first drain D 1 contact and are electrically connected with polysilicon channel layer 14 ohmic properties through heavy doping N type layer (N+) respectively.
Moreover organic LED display panel 10 also comprises one first scan line SL1, one second scan line SL2, one first data wire DL1, one second data wire DL2, one second thin-film transistor T2.The first scan line SL1 and the second scan line SL2 are arranged on the substrate 11 abreast, the first data wire DL1 and the second data wire DL2 are arranged on the substrate 11 abreast, and vertical mutually with the first scan line SL1 and the second scan line SL2, and define pixel 13 alternately.The second thin-film transistor T2 is arranged in the pixel 13, and comprises a second grid G2, one second source S 2, one second drain D 2 and one second polysilicon channel layer 22.Second source S 2 and second drain D 2 are arranged at two ends of second polysilicon channel layer 22 accordingly, and contact and be electrically connected with two end ohmic properties of second polysilicon channel layer 22 through N+.Second grid G2 is electrically connected with the first scan line SL1, and second source S 2 is electrically connected with the first data wire DL1, and second drain D 2 is electrically connected with first grid G1.
Wherein, also can be doped with second foreign atom of a non-IIIA family and non-VA family in second polysilicon channel layer 22.Doping content and first foreign atom the doping content in first polysilicon channel layer 14 of second foreign atom in second polysilicon channel layer 22 is identical or different.The doping content of first foreign atom in first polysilicon channel layer 14 can be greater than the doping content of second foreign atom in second polysilicon channel layer 22.Second foreign atom can be an electrically neutral atom, also can comprise inert gas and/or IVA family.For example, second foreign atom respectively is selected from least one and combination in any in the group that helium (He), neon (Ne), argon (Ar), krypton (Kr), xenon (Xe) and radon (Rn) formed.Second foreign atom is selected from the foreign atom of at least one foreign atom in the group that carbon (IC), silicon (Si), germanium (Ge), tin (Sn) and plumbous (Pb) formed and combination in any thereof.Second foreign atom also can be selected from the combination of inert gas and IVA family.First foreign atom and second foreign atom are identical or different.Second foreign atom can be selected from the electric neutrality foreign atom beyond periodic table IIIA family and the V A family.Moreover the second above-mentioned polysilicon channel layer 22 is finished after can being doped second foreign atom by a polysilicon layer, and polysilicon layer can be seen through after the heat treatment and crystallization is finished by an amorphous silicon layer.For example, amorphous silicon layer can see through laser tempering (laserannealing) method fusion and crystallize into polysilicon layer, and the laser tempering method can see through an excimer laser (excimer laser) scanning and molten amorphous silicon layer.
Again, organic LED display panel 10 also comprises a storage capacitors Cs and an organic electroluminescent element (organic electroluminescent device, OELD) 25.Storage capacitors Cs is arranged in the pixel 13, and the end of storage capacitors Cs is electrically connected between the first grid G1 and second drain D 2, and the other end of storage capacitors Cs is electrically connected between first source S 1 and the one first fixed voltage Vdd.Organic electroluminescent element 25 is arranged in the pixel 13, in order to be electrically connected with first drain D 1 and one second fixed voltage Vss.
The present embodiment the technical staff in the technical field can also understand that the technology of present embodiment is not confined to this.For example, organic LED display panel 10 also comprises an insulating barrier 18, and insulating barrier 18 is arranged between first polysilicon channel layer 14, second polysilicon channel layer 22 and the substrate 11.In addition, organic LED display panel 10 also comprises an insulating barrier 19, and insulating barrier 19 is arranged between first grid G1, second grid G2 and first polysilicon channel layer 14.Insulating barrier 18 and 19 comprises oxide, nitride, nitrogen oxide, silicon nitride or nitrogen oxide.
Thin bilge construction as for organic electroluminescent element 25 is done a simple declaration at this, but the technology of present embodiment is not confined to this.Organic electroluminescent element 25 comprises an anode 26, a negative electrode 27 and an organic material layer 28 at least, and organic material layer 28 is arranged between anode 26 and the negative electrode 27.Anode 26 is electrically connected with first drain D 1, but negative electrode 27 can ground connection or is applied in a fixed voltage.Organic material layer 28 can comprise source, a hole, an electron source and a luminescent layer, and luminescent layer is arranged between source, hole and the electron source.The source, hole is in abutting connection with anode 26, and electron source is in abutting connection with negative electrode 27.
In the present embodiment, organic LED display panel 10 also comprises a substrate 21, substrate 21 sees through frame glue (sealant) and parallel assembling simultaneously with 11, pixel 13, the first film transistor T 1, the second thin-film transistor T2, storage capacitors Cs and organic motor light-emitting component 25 are sealed and be hedged off from the outer world.Wherein, substrate 11 and 21 comprises glass substrate, plastic base, ceramic substrate or flexible base plate.
Though present embodiment explains with the TFT structure of grid at last (top gate), the technology that is doped with the foreign atom of non-IIIA family and non-VA family in the polysilicon channel layer of present embodiment also can be applicable to grid on the TFT structure of (bottom gate) or bigrid (dual gates) down.
Present embodiment promptly is to see through excimer laser tempering (excimer laser annealing at amorphous silicon layer, ELA) fusion polysilicon layer and after crystallizing into polysilicon layer (being the ELA crystallization technique) utilizes the foreign atom doped polysilicon layer of non-IIIA family and non-VA family and the technology that forms polysilicon channel layer is adjusted the defect density of original polysilicon layer.Because of the implant energy and the concentration of the foreign atom of non-IIIA family and non-VA family can be controlled very accurately, so the effective Be Controlled of the characteristic of TFT.And the uniformity that doping techniques provided can be improved the inhomogeneities that the ELA crystallization is produced, and then improves the fringe effects of light and shade inequality.Following table is the signal example that defect density improves in the channel layer of OLED display floater, with whole OLED display floater the result of the foreign atom of non-impurity-doped non-IIIA family and non-VA family is arranged relatively, but the technology of present embodiment is not confined to this.
| No fringe area | Fringe area is arranged | Defect rate | |
| Defect density (defective number/unit are) before mixing | 10 12 | 10 13 | 10 |
| The foreign atom impurity concentration (atom number/unit are) of non-IIIA family and |
10 13 | 10 13 | |
| Back defect density (defective number/unit are) mixes | 1.1×10 13 | 2×10 13 | 1.67 |
Last table as can be seen, in traditional OLED display floater of the foreign atom of non-impurity-doped non-IIIA family and non-VA family, its defect rate that has or not fringe area is 10 times.In the OLED of present embodiment display floater, the foreign atom of non-IIIA family and non-VA family has increased by 10 times of the foreign atom impurity concentrations of non-IIIA family and non-VA family after no fringe area though it mixes, but its defect rate that has or not fringe area can be improved to 1.67 times by 10 times after mixing via a foreign atom through the non-IIIA family calculated and non-VA family.So can homogenizing raceway groove quality (channel quality), make the characteristic of polysilicon channel layer of TFT of all pixels identical, and effectively improve the inhomogeneities of ELA crystallization and defective with the foreign atom doping of an amount of non-IIIA family and non-VA family.And then make that the characteristic of TFT of all pixels is identical therefore.
In the OLED display floater performance of present embodiment when the doping content of the foreign atom of difference non-IIIA family and non-VA family, be 1.5 * 10 in the doping content of the foreign atom of non-IIIA family and non-VA family
12/ cm
2Condition still have the effect of line mura, but slighter than reference condition.
But not the doping content of the foreign atom of IIIA family and non-VA family is 1.5 * 10
13/ cm
2The time, can see the phenomenon of not had line mura.This doping content of suitably adjusting the foreign atom of non-IIIA family and non-VA family should be improved line mura phenomenon, because the doping effect of the foreign atom of non-IIIA family and non-VA family has been dominated the performance of raceway groove quality (channel quality), but not originally decides the raceway groove quality by the ELA crystallization technique.
The grain size (grain size) of the polysilicon layer before mixing is between 0.1～10 micron (μ m), and the grain boundary defects concentration (grain boundary defect density) of the polysilicon layer before mixing is greater than 1011 defectives number/square centimeter, and polysilicon layer in 5 mu m ranges the thickest reach the thinnest thickness differ 100 dusts (
) when above (being the height of polysilicon layer projection), the concentration that first foreign atom of non-IIIA family and non-VA family is doped in first polysilicon channel layer 14 can be greater than 10
12Atom number/square centimeter.Therefore, the foreign atom that the height of the grain size of the visual polysilicon layer of present embodiment, grain boundary defects concentration and polysilicon layer projection is suitably adjusted non-IIIA family and non-VA family is doped in the concentration in the polysilicon layer, to form needed polysilicon channel layer.
Embodiment two
Please refer to Fig. 3, it illustrates is flow chart according to the formation method of the polysilicon channel layer of embodiments of the invention two.As shown in Figure 3, at first, in step 31, provide a substrate, have an amorphous silicon layer on the substrate.Then, enter in the step 32, the heat treatment amorphous silicon layer is to form a polysilicon layer.Then, enter in the step 33, the foreign atom of mix a non-IIIA family and non-VA family is in polysilicon layer, to form a polysilicon channel layer.Wherein, foreign atom can be an electrically neutral atom, also comprises inert gas and/or IVA family.For example, foreign atom is selected from least one and combination in any in the group that helium (He), neon (Ne), argon (Ar), krypton (Kr), xenon (Xe) and radon (Rn) formed, non-periodic table IIIA family and the VA family of being selected from.Foreign atom is selected from the foreign atom of at least one foreign atom in the group that carbon (IC), silicon (Si), germanium (Ge), tin (Sn) and plumbous (Pb) formed and combination in any thereof.Foreign atom also can be selected from the combination of inert gas and IVA family.In addition, the doping content of foreign atom in polysilicon channel layer is 10
11～10
15Atom number/square centimeter more can be greater than 10
12Atom number/square centimeter.In addition, also can see through laser tempering method heat treatment amorphous silicon layer, for example, with an excimer laser step-scan and molten amorphous silicon layer, to form polysilicon layer (being so-called ELA crystallization technique).
Mix in the polysilicon layer that present embodiment is crystallized into behind the heat treatment amorphous silicon layer (for example with the formed polysilicon layer of the ELA crystallization technique) design of foreign atom (for example being inert gas) of non-IIIA family and non-VA family, can be with the defective homogenizing in the polysilicon layer, and improve the inhomogeneities of polysilicon crystal and defective.Thus, the organic LED display panel that can avoid subsequent technique to finish produces bright uneven fringe phenomena (line mura) when running, promote the display quality of organic LED display panel widely.
Embodiment three
Please be simultaneously with reference to Fig. 4～5H, it is flow chart according to the formation method of the polysilicon channel layer of embodiments of the invention three that Fig. 4 illustrates, Fig. 5 A～5H illustrates the process section of the polysilicon channel layer that is embodiments of the invention three.As shown in Figure 4, at first, in step 41, provide a substrate 11, have one first polysilicon layer 24a and one second polysilicon layer 24b on the substrate 11.The mode that is formed on the substrate 11 as for the first polysilicon layer 24a and the second polysilicon layer 24b is simply described as follows at this, but the technology of present embodiment is not confined to this.Shown in Fig. 5 A, substrate 11 is provided, have an amorphous silicon layer 23 on the substrate 11.Then, heat treatment amorphous silicon layer 23 is to form a polysilicon layer 24, shown in Fig. 5 B.At this, also can see through laser tempering method heat treatment amorphous silicon layer 23, for example, with direction step-scan and the molten amorphous silicon layer 23 of an excimer laser 53, progressively to crystallize into polysilicon layer 24 along the arrow 54 of Fig. 5 A.Then, shown in Fig. 5 C, remove the polysilicon layer 24 of part, to form the first polysilicon layer 24a and the second polysilicon layer 24b.But the technology that present embodiment forms the above-mentioned first polysilicon layer 24a and the second polysilicon layer 24b is not confined to this.
After treating that the first polysilicon layer 24a and the second polysilicon layer 24b are formed on the substrate 11, enter in the step 42, shown in Fig. 5 D, cover substrate 11 with one first photomask 51.First photomask 51 has one first opening 51a, and the first opening 51a exposes the first polysilicon layer 24a.
Then, enter in the step 43, shown in Fig. 5 E, the first foreign atom Al of mix a non-IIIA family and non-VA family is in the first polysilicon layer 24a, to form one first polysilicon channel layer 14.The first foreign atom Al can be an electrically neutral atom, also comprises inert gas and/or IVA family.Wherein, the first foreign atom Al is selected from least one and combination in any in the group that helium (He), neon (Ne), argon (Ar), krypton (Kr), xenon (Xe) and radon (Rn) formed.The first foreign atom Al is selected from the foreign atom of at least one foreign atom in the group that carbon (IC), silicon (Si), germanium (Ge), tin (Sn) and plumbous (Pb) formed and combination in any thereof.The first foreign atom Al also can be selected from the combination of inert gas and IVA family.The doping content of the first foreign atom Al in first polysilicon channel layer 14 is 10
11～10
15Atom number/square centimeter.In step 43, also can use the first foreign atom Al to originate as alloy, see through ion implantation the first foreign atom Al is doped among the first polysilicon layer 24a.
Then, enter in the step 44, shown in Fig. 5 F, remove first photomask 51 and cover substrate 11 with one second photomask 52.Second photomask 52 has one second opening 52a, and the second opening 52a exposes the second polysilicon layer 24b.
Then, enter in the step 45, shown in Fig. 5 G, the second foreign atom A2 of mix a non-IIIA family and non-VA family is in the second polysilicon layer 24b, to form one second polysilicon channel layer 22.The second foreign atom A2 can be an electrically neutral atom, also comprises inert gas and/or IVA family.Wherein, doping content and first foreign atom Al the doping content in first polysilicon channel layer 14 of the second foreign atom A2 in second polysilicon channel layer 22 is identical or different.The doping content of the first foreign atom Al in first polysilicon channel layer 14 is greater than the doping content of the second foreign atom A2 in second polysilicon channel layer 22.Second foreign atom is selected from least one and combination in any in the group that helium (He), neon (Ne), argon (Ar), krypton (Kr), xenon (Xe) and radon (Rn) formed.The second foreign atom A2 is selected from the foreign atom of at least one foreign atom in the group that carbon (IC), silicon (Si), germanium (Ge), tin (Sn) and plumbous (Pb) formed and combination in any thereof.The second foreign atom A2 also can be selected from the combination of inert gas and IVA family.The first foreign atom Al and the second foreign atom A2 can be identical or different.In step 45, also can use the second foreign atom A2 to originate as alloy, see through ion implantation the second foreign atom A2 is doped among the second polysilicon layer 24b.Then, enter in the step 46, shown in Fig. 5 H, remove second photomask 52.
The present embodiment the technical staff in the technical field can also understand that the technology of present embodiment is not confined to this.For example, after the first polysilicon layer 24a and the second polysilicon layer 24b are formed on the substrate 11, more can cover the thin sacrifice layer of one deck (as silicon dioxide, SiO
2) on the first polysilicon layer 24a and the second polysilicon layer 24b.In addition.After the second foreign atom A2 is doped in the second polysilicon layer 24b, use diluted hydrofluoric acid (dilute HF) to remove above-mentioned sacrifice layer.At this, resilient coating when sacrifice layer can be the first foreign atom Al and the second foreign atom A2 and be doped in the first polysilicon layer 24a and the second polysilicon layer 24b respectively, when mixing to reduce by the first foreign atom Al and the second foreign atom A2 respectively to the destruction on the surface of the first polysilicon layer 24a and the second polysilicon layer 24b.
Embodiment four
Please be simultaneously with reference to Fig. 6～7H, it is flow chart according to the formation method of the polysilicon channel layer of embodiments of the invention four that Fig. 6 illustrates, Fig. 7 A～7H illustrates the process section of the polysilicon channel layer that is embodiments of the invention four.As shown in Figure 6, at first, in step 61, provide a substrate 11, have one first polysilicon layer 24a and one second polysilicon layer 24b on the substrate 11.Be formed at shown in mode Fig. 7 A～7C on the substrate 11 as for the first polysilicon layer 24a and the second polysilicon layer 24b, in embodiment two, illustrated, do not repeat them here.
Then, enter in the step 62, shown in Fig. 7 D, cover substrate 11 with one first photomask 71.First photomask 71 has one first opening 71a and one second opening 71b, and the first opening 71a and the second opening 71b expose the first polysilicon layer 24a and the second polysilicon layer 24b respectively.
Then, enter in the step 63, shown in Fig. 7 E, the first foreign atom A3 of mix a non-IIIA family and non-VA family is in the first polysilicon layer 24a and the second polysilicon layer 24b, to form one the 3rd polysilicon channel layer 24c and one second polysilicon channel layer 22 respectively.The first foreign atom A3 can be an electrically neutral atom, also comprises inert gas and/or IVA family.Wherein, the doping content of the first foreign atom A3 in second polysilicon channel layer 22 is identical with the doping content of the first foreign atom A3 in the 3rd polysilicon channel layer 24c.The first foreign atom A3 is selected from least one and combination in any in the group that helium (He), neon (Ne), argon (Ar), krypton (Kr), xenon (Xe) and radon (Rn) formed.The first foreign atom A3 is selected from the foreign atom of at least one foreign atom in the group that carbon (IC), silicon (Si), germanium (Ge), tin (Sn) and plumbous (Pb) formed and combination in any thereof.The first foreign atom A3 also can be selected from the combination of inert gas and IVA family.In step 63, use the first foreign atom A3 to originate as alloy, see through ion implantation the first foreign atom A3 is doped among the first polysilicon layer 24a and the second polysilicon layer 24b.
Then, enter in the step 64, shown in Fig. 7 F, remove first photomask 71 and cover substrate 11 with one second photomask 72.Second photomask 72 has one the 3rd opening 72a, and the 3rd opening 72a exposes the 3rd polysilicon channel layer 24c.
Then, enter in the step 65, shown in Fig. 7 G, the second foreign atom A4 of mix a non-IIIA family and non-VA family is in the 3rd polysilicon channel layer 24c, to form one first polysilicon channel layer 14.The second foreign atom A4 can be an electrically neutral atom, also comprises inert gas and/or IVA family.Wherein, the first foreign atom A3 and the second foreign atom A4 total doping content and the doping content of the first foreign atom A3 in second polysilicon channel layer 22 in first polysilicon channel layer 14 is identical or different.For example, the first foreign atom A3 and the total doping content of the second foreign atom A4 in first polysilicon channel layer 14 are greater than the doping content of the first foreign atom A3 in second polysilicon channel layer 22.The first foreign atom A3 and the total doping content of the second foreign atom A4 in first polysilicon channel layer 14 are 10
11～10
15Atom number/square centimeter, or greater than 10
12Atom number/square centimeter.The second foreign atom A4 is selected from least one and combination in any in the group that helium (He), neon (Ne), argon (Ar), krypton (Kr), xenon (Xe) and radon (Rn) formed.The second foreign atom A4 is selected from the foreign atom of at least one foreign atom in the group that carbon (IC), silicon (Si), germanium (Ge), tin (Sn) and plumbous (Pb) formed and combination in any thereof.The second foreign atom A4 also can be selected from the combination of inert gas and IVA family.The first foreign atom A3 and the second foreign atom A4 can be identical or different.In step 65, also can use the second foreign atom A4 to originate as alloy, see through ion implantation the second foreign atom A4 is doped among the 3rd polysilicon channel layer 24c.Then, enter in the step 66, shown in Fig. 7 H, remove second photomask 72.
The formation method of disclosed organic LED display panel of the above embodiment of the present invention and polysilicon channel layer thereof, the design of foreign atom in its polysilicon layer that behind the heat treatment amorphous silicon layer, is crystallized into (for example with the formed polysilicon layer of ELA crystallization technique), defective that can the homogenizing polysilicon layer.Therefore, can improve the inhomogeneities of polysilicon layer crystallization and defective, make that the characteristic of polysilicon channel layer of all pixel TFT is identical.Therefore, and then make that the characteristic of TFT of all pixels is identical, avoid organic LED display panel when running, to produce bright uneven fringe phenomena.Thus, promote the display quality of organic LED display panel widely.
In sum; though the present invention discloses as above with preferred embodiment; yet it is not in order to limit the present invention; those skilled in the art without departing from the spirit and scope of the present invention; can do a little change and retouching, thus protection scope of the present invention should with accompanying Claim the person of being defined be as the criterion.
Claims (31)
1. organic LED display panel comprises:
Substrate;
Pixel is arranged on this substrate; And
The first film transistor is arranged in this pixel, and comprises first polysilicon channel layer, is doped with first foreign atom in this first polysilicon channel layer, and this first foreign atom is an electrically neutral atom.
2. panel as claimed in claim 1, wherein this first foreign atom comprises inert gas and/or IVA family.
3. panel as claimed in claim 2, wherein this first foreign atom is selected from least one and combination in any in the group that helium, neon, argon, krypton, xenon and radon form.
4. panel as claimed in claim 1, wherein the doping content of this first foreign atom in this first polysilicon channel layer is 10
11～10
15Atom number/square centimeter.
5. panel as claimed in claim 1, wherein this first film transistor also comprises first grid, first source electrode and first drain electrode, this first source electrode and this first drain electrode are electrically connected with two ends of this first polysilicon channel layer accordingly, this first source electrode is electrically connected with first fixed voltage, and this organic LED display panel also comprises:
First scan line and second scan line are arranged on this substrate in parallel to each other;
First data wire and second data wire are arranged on this substrate in parallel to each other, and staggered mutual vertically with this first scan line and this second scan line, and define this pixel; And
Second thin-film transistor, be arranged in this pixel, and comprise second grid, second source electrode, second drain electrode and second polysilicon channel layer, this second source electrode and this second drain electrode are electrically connected with two ends of this second polysilicon channel layer accordingly, this second grid is electrically connected with this first scan line, this second source electrode is electrically connected with this first data wire, and this second drain electrode is electrically connected with this first grid.
6. panel as claimed in claim 5, wherein be doped with second foreign atom in this second polysilicon channel layer, doping content and this first foreign atom the doping content in this first polysilicon channel layer of this second foreign atom in this second polysilicon channel layer is identical or different, and wherein this second foreign atom is an electrically neutral atom.
7. panel as claimed in claim 6, wherein this second foreign atom comprises inert gas and/or IVA family.
8. panel as claimed in claim 7, wherein this second foreign atom respectively is selected from least one and combination in any in the group that helium, neon, argon, krypton, xenon and radon form.
9. panel as claimed in claim 6, wherein the doping content of this first foreign atom in this first polysilicon channel layer is greater than the doping content of this second foreign atom in this second polysilicon channel layer.
10. panel as claimed in claim 9, wherein the doping content of this first foreign atom in this first polysilicon channel layer is 10
11～10
15Atom number/square centimeter.
11. panel as claimed in claim 5 also comprises:
Storage capacitors is arranged in this pixel, and an end of this storage capacitors is electrically connected between this second drain electrode and this first grid, and the other end of this storage capacitors is electrically connected between this first source electrode and this first fixed voltage.
12. panel as claimed in claim 5 also comprises:
Organic electroluminescent element is arranged in this pixel, in order to be electrically connected with this first drain electrode and second fixed voltage.
13. the formation method of a polysilicon channel layer comprises:
Substrate is provided, has amorphous silicon layer on this substrate;
This amorphous silicon layer of heat treatment is to form polysilicon layer; And
The doping foreign atom is in this polysilicon layer, and to form polysilicon channel layer, wherein this foreign atom is an electrically neutral atom.
14. method as claimed in claim 13, wherein this foreign atom comprises inert gas and/or IVA family.
15. method as claimed in claim 14, wherein this foreign atom is selected from least one and combination in any in the group that helium, neon, argon, krypton, xenon and radon form.
16. method as claimed in claim 13, wherein the doping content of this foreign atom in this polysilicon channel layer is 10
11～10
15Atom number/square centimeter.
17. the formation method of a polysilicon channel layer comprises:
Substrate is provided, has first polysilicon layer and second polysilicon layer on this substrate;
Cover this substrate with first photomask, this first photomask has first opening and exposes this first polysilicon layer; And
Mix first foreign atom in this first polysilicon layer, and to form first polysilicon channel layer, wherein this first foreign atom is an electrically neutral atom.
18. method as claimed in claim 17, wherein this first foreign atom comprises inert gas and/or IVA family.
19. method as claimed in claim 18, wherein this first foreign atom is selected from least one and combination in any in the group that helium, neon, argon, krypton, xenon and radon form.
20. method as claimed in claim 17, wherein the doping content of this first foreign atom in this first polysilicon channel layer is 10
11～10
15Atom number/square centimeter.
21. method as claimed in claim 17 also comprises:
Remove this first photomask and cover this substrate with second photomask, this second photomask has second opening and exposes this second polysilicon layer; And
Mix second foreign atom in this second polysilicon layer, to form second polysilicon channel layer, doping content and this first foreign atom the doping content in this first polysilicon channel layer of this second foreign atom in this second polysilicon channel layer is identical or different, and wherein this second foreign atom is an electrically neutral atom.
22. method as claimed in claim 21, wherein this second foreign atom comprises inert gas and/or IVA family.
23. method as claimed in claim 22, wherein this second foreign atom respectively is selected from least one and combination in any in the group that helium, neon, argon, krypton, xenon and radon form.
24. method as claimed in claim 21, wherein the doping content of this first foreign atom in this first polysilicon channel layer is greater than the doping content of this second foreign atom in this second polysilicon channel layer.
25. method as claimed in claim 24, wherein the doping content of this first foreign atom in this first polysilicon channel layer is 10
11～10
15Atom number/square centimeter.
26. method as claimed in claim 17, wherein this provides the step of this substrate to comprise:
This substrate is provided, has amorphous silicon layer on this substrate;
This amorphous silicon layer of heat treatment is to form polysilicon layer; And
Remove this polysilicon layer of part, to form this first polysilicon layer and this second polysilicon layer.
27. the formation method of a polysilicon channel layer comprises:
Substrate is provided, has first polysilicon layer and second polysilicon layer on this substrate;
Cover this substrate with first photomask, this first photomask has first opening and second opening exposes this first polysilicon layer and this second polysilicon layer respectively;
Mix first foreign atom in this first polysilicon layer and this second polysilicon layer, to form first polysilicon channel layer and second polysilicon channel layer respectively, the doping content of this first foreign atom in this first polysilicon channel layer is identical with the doping content of this first foreign atom in this second polysilicon channel layer;
Remove this first photomask and cover this substrate with second photomask, this second photomask has the 3rd opening and exposes this first polysilicon channel layer; And
Mix second foreign atom in this first polysilicon channel layer, to form the 3rd polysilicon channel layer, this first foreign atom and the total doping content of this second foreign atom in the 3rd polysilicon channel layer are greater than the doping content of this first foreign atom in this second polysilicon channel layer, and wherein this second foreign atom of this first foreign atom is an electrically neutral atom.
28. method as claimed in claim 27, wherein this first foreign atom and this second foreign atom comprise inert gas and/or IVA family.
29. method as claimed in claim 28, wherein this first foreign atom and this second foreign atom respectively are selected from least one and combination in any in the group that helium, neon, argon, krypton, xenon and radon form.
30. method as claimed in claim 27, wherein this first foreign atom and the total doping content of this second foreign atom in the 3rd polysilicon channel layer are 10
11～10
15Atom number/square centimeter.
31. method as claimed in claim 27, wherein this provides the step of this substrate to comprise:
This substrate is provided, has amorphous silicon layer on this substrate;
This amorphous silicon layer of heat treatment is to form polysilicon layer; And
Remove this polysilicon layer of part, to form this first polysilicon layer and this second polysilicon layer.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020158995A1 (en) * | 2001-04-26 | 2002-10-31 | Chang-Won Hwang | Polycrystalline silicon thin film transistor of liquid crystal display and manufacturing method thereof |
| US20050012091A1 (en) * | 2003-07-18 | 2005-01-20 | Au Optronics Corp. | Active matrix organic electroluminescence display device |
| CN1588644A (en) * | 2004-08-26 | 2005-03-02 | 友达光电股份有限公司 | Thin film transistor structure for plane display device and its producing method |
| US20050250230A1 (en) * | 2003-09-18 | 2005-11-10 | Au Optronics Corp. | Control TFT for OLED display |
-
2006
- 2006-01-24 CN CNB2006100060741A patent/CN100399574C/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020158995A1 (en) * | 2001-04-26 | 2002-10-31 | Chang-Won Hwang | Polycrystalline silicon thin film transistor of liquid crystal display and manufacturing method thereof |
| US20050012091A1 (en) * | 2003-07-18 | 2005-01-20 | Au Optronics Corp. | Active matrix organic electroluminescence display device |
| US20050250230A1 (en) * | 2003-09-18 | 2005-11-10 | Au Optronics Corp. | Control TFT for OLED display |
| CN1588644A (en) * | 2004-08-26 | 2005-03-02 | 友达光电股份有限公司 | Thin film transistor structure for plane display device and its producing method |
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