CN100371896C - Computer system and startup method thereof - Google Patents
Computer system and startup method thereof Download PDFInfo
- Publication number
- CN100371896C CN100371896C CNB2005100965157A CN200510096515A CN100371896C CN 100371896 C CN100371896 C CN 100371896C CN B2005100965157 A CNB2005100965157 A CN B2005100965157A CN 200510096515 A CN200510096515 A CN 200510096515A CN 100371896 C CN100371896 C CN 100371896C
- Authority
- CN
- China
- Prior art keywords
- incident
- microprocessor
- carrying
- priority
- formation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Abstract
The present invention provides a computer system and a startup method thereof. The computer system comprises a storage device and a microprocessor, wherein the storage device is used for storing a startup system and a multitask kernel, and the microprocessor is coupled with the storage device and is used for loading the multitask kernel to execute the startup system.
Description
Technical field
The present invention relates to a kind of computer system and starting-up method thereof, particularly relate to a kind of framework of a multitask core that utilizes and come the computer system and the starting-up method of multitasking extensible firmware interface incident.
Background technology
For existing computer system, it includes a basic input/output (basic inputoutput system, BIOS) handle boot program, that is, in this computer system load and execution one operating system (operating system, OS) before, this basic input/output is responsible for the initial work of computer hardware, for example, this basic input/output can check whether the employed computer hardware of this computer system normally connects or the like.All the time, basic input/output by the low order program language (for example: assembly language) compile and form is, know as industry, basic input/output generally all can be stored in (the read-only memory of the ROM (read-only memory) on the motherboard in the computer system regularly, ROM) in, make like this that content that maximum benefit is to guarantee basic input/output can not revised by other program and the execution that influences boot program.Yet, present existing basic input/output has many shortcomings, for example, itself has no idea to support computer system so that the function of plug and play to be provided, but need still that (Input/Output, IO) resource is adjusted to the driving of hardware and I/O.
In order to improve the defective of existing basic input/output, those skilled in the art once proposed an extensible firmware interface, and (extensible firmware interface, EFI), intention replaces existing basic input/output.The basis of extensible firmware interface is still basic input/output, is connected part then by further standardization, in order to give bigger expanded function on function between the hardware relevant with computer system and software.The extensible firmware interface adopts program language in higher (for example: the C language) write and form, it similarly is an operating system that is simplified, between the computer hardware and operating system of computer system itself, in addition, literal interface compared to existing basic input/output, the extensible firmware interface also provides a patterned operation interface, and the display mode that it provided is understandable more and practical for the user.The function and the running of extensible firmware interface are described below.
In the start process of computer system, the workflow of extensible firmware interface roughly can reduce following several steps: (1) starts; (2) initialization of standard firmware platform (firmware platfom); (3) the driver storehouse of loading extensible firmware interface and execution relative program; And (4) choose the operating system that will enter in the startup menu of extensible firmware interface, and propose to start guidance code to the extensible firmware interface.Afterwards, the operating system that is selected just can be loaded to be carried out and finishes the start flow process of whole computer system.
Yet, in the start process of computer system, no matter be existing basic input/output or above-mentioned extensible firmware interface, none method is supported the function of multitasking (multi-tasking), therefore, for the extensible firmware interface, microprocessor when computer system, central processing unit (central processing unit for example, CPU), when receiving the incident (event) of a relative higher priority, it can't interrupt the incident of an executory relatively low priority at present immediately, but after must waiting executory up till now incident to finish, can go to carry out the incident of this correspondence higher priority.That is to say,, cause the range of application at extensible firmware interface to be restricted because do not possess the cause of the mechanism of multitasking.
Summary of the invention
In view of this, one of purpose of the present invention is to provide a kind of framework of a multitask core that utilizes to come the computer system and the starting-up method of multitasking extensible firmware interface incident, to address the above problem.
The present invention is according to above-mentioned purpose, but a kind of computer system of multitasking extensible firmware interface incident is provided.This computer system includes: a memory storage is used for storing a boot system and a multitask core (multi-tasking kernel); An and microprocessor (micro-processor), be coupled to this memory storage, be used for loading this multitask core to carry out this boot system, wherein this boot system is an extensible firmware interface, after carrying out this multitask core when this microprocessor, in this memory storage, produce the task of a plurality of different priorities, corresponding a plurality of formations respectively, and this formation is used for depositing the incident of a plurality of corresponding priority that produced when this microprocessor is carried out this extensible firmware interface respectively, and wherein if this microprocessor in carrying out this extensible firmware interface procedure, when carrying out an incident, receive an insertion incident, and should the pairing priority of insertion incident be higher than the pairing priority of this incident, then this microprocessor interrupts carrying out this incident to carry out this insertion incident at once.
In addition, but the present invention also provides a kind of starting-up method of multitasking extensible firmware interface incident.This starting-up method includes: a multitask core is provided; And load this multitask core to carry out this boot system, wherein this boot system is an extensible firmware interface, after carrying out the multitask core, it can produce the task of a plurality of different priorities, corresponding a plurality of formations respectively, and these formations are used for depositing the incident of a plurality of corresponding priority that produced when carrying out this extensible firmware interface respectively, and if in the process of carrying out this extensible firmware interface, when carrying out an incident, receive an insertion incident, and should the pairing priority of insertion incident be higher than the pairing priority of this incident, then interrupt carrying out this incident to carry out this insertion incident at once.
Description of drawings
Fig. 1 is the functional block diagram of computer system of the present invention.
Fig. 2 is the synoptic diagram of a plurality of formations in the storer shown in Figure 1.
Fig. 3 to Fig. 6 is the synoptic diagram of storer different operating state shown in Figure 2.
Fig. 7 enables the synoptic diagram of the mode of operation under the mechanism of covering in microprocessor for storer shown in Figure 2.
Fig. 8 is another synoptic diagram of a plurality of formations in the storer shown in Figure 1.
Fig. 9 enables the synoptic diagram of the mode of operation under the mechanism of covering in microprocessor for storer shown in Figure 8.
The reference numeral explanation
10 computer systems, 12 hard disks
14 storeies, 16 microprocessors
18a, 18b hardware unit 20 operating systems
22a, 22b, 22c firmware 24 extensible firmware interfaces
40,41,42,43 formations of 26 cores
50-56,60,71-77 incident
Embodiment
See also Fig. 1, Fig. 1 is the functional block diagram of computer system 10 of the present invention.Computer system 10 includes a hard disk 12, a storer 14, a microprocessor (a for example central processing unit) 16 and a plurality of other hardware unit (for example CD-ROM drive and display card or the like) 18a, 18b.For convenience of explanation and simplicity of illustration, only demonstrate two other hardware unit 18a, 18b among Fig. 1.Hard disk 12 and storer 14 are used as the memory storage of computer system 10, wherein hard disk 12 internal memories contain an operating system (operating system, OS) 20, one extensible firmware interface (extensible firmwareinterface, EFI) 24, one firmwares 22 and a real time operating system (μ C/OS-II) core (kernel) 26; And storer 14 is used to provide a storage space with temporal data.Microprocessor 16 is coupled to hard disk 12, storer 14 and hardware unit 18a, 18b.When computer system 10 was carried out boot program, microprocessor 16 read core 26 and extensible firmware interface 24 from hard disk 12, and with in its pseudostatic ram 14; Then, microprocessor 16 just reads and carries out core 26 and extensible firmware interface 24 in storer 14.In the back segment of boot program, microprocessor 16 is understood from hard disk 12 read operation systems 20, and with in its pseudostatic ram 14; At last, microprocessor 16 just reads and executive operating system 20 in storer 14, to finish whole boot program.Note that as previously mentioned extensible firmware interface 24 is a single worker (single-tasking) a boot system, in order to as operating system 20 and firmware 22a, the 22b of hard disk 12 and other hardware unit 18a, 18b, the communication media between the 22c.As for core 26, because of it meets μ C/OS-II framework, so in the embodiment that the present invention discloses, core 26 is a multitask (multi-tasking) core.Note that extensible firmware interface 24 and the core 26 that meets μ C/OS-II framework only are preferred embodiment of the present invention, anyly come the computer architecture of fill order worker's boot system, all belong to category of the present invention with the multitask core.
In start process, when microprocessor 16 was carried out extensible firmware interface 24, it can produce a plurality of processing and the different incident (event) of priority, all corresponding certain priority of each incident of needing.In present embodiment, definition has the priority of four kinds of grades altogether, and it is respectively: TPL_HIGH_LEVEL, TPL_NOTIFY, TPL_CALLBACK and TPL_APPLICATION, and its priority is successively decreased to TPL_APPLICATION by TPL_HIGH_LEVEL.
See also Fig. 2, Fig. 2 is the synoptic diagram of a plurality of formations 40,41,42,43 in the storer 14 shown in Figure 1.As previously mentioned, core 26 has the function of multitasking, and meets μ C/OS-II framework, and according to μ C/OS-II framework, microprocessor 16 can produce 64 tasks (task) T in storer 14 after carrying out core 26
1～T
64, and can distinguish corresponding 64 different priorities (priority level).Wherein, task T
30, T
31, T
32, T
33, point to four formations (queue) 40,41,42,43 respectively, formation 40 is used for depositing the incident 50 of corresponding limit priority TPL_HIGH_LEVEL; Formation 41 is the incident 51,52 that is used for depositing corresponding time high priority TPL_NOTIFY; Formation 42 is used for depositing the incident of corresponding time low priority TPL_CALLBACK, but in Fig. 2, any incident is not deposited in formation 42 at present; Formation 43 is used for depositing the incident 53,54,55 of corresponding lowest priority TPL_APPLICATION.
Compared to directly utilizing these 64 tasks to deposit incident, present embodiment only utilizes task T
30, T
31, T
32, T
33Four formations 40,41,42,43 of pointing to respectively deposit incident, so design can allow temporary incident number become many, the utilization in space also becomes and has more elasticity.In addition, formation 42 is not because deposit any incident at present, therefore can be suspended (suspend), receiving one up to microprocessor 16 can't carry out and corresponding priority is the incident of time low priority TPL_CALLBACK immediately, then formation 42 just can be reactivated (resume), and this incident then is stored in the into formation 42.Please note, indicating the mode that a formation is suspended has a variety of, one of them sets a corresponding label S for microprocessor 16 respectively at each formation 40,41,42,43, thus, microprocessor 16 can judge whether it is suspended from the numerical value that formation 40,41,42,43 each other label S are write down.For instance, microprocessor 16 is preset as 0 with the value of formation 40,41,42,43 label S separately earlier, and when formation 42 is deposited any incident and is suspended because of nothing, microprocessor 16 just is set at 1 with the value of the label s of formation 42, follow-up microprocessor 16 is in carrying out formation during stored incident, the numerical value 1 that can be noted down by the label S of formation 42 learns that formation 42 do not deposit any incident at present, is in the state of time-out.
Because formation 40,41,42,43 utilizes the mechanism of first in first out (First In First Out), therefore for same formation, for example formation 43, during the incident of in microprocessor 16 is being carried out formation 43, being deposited in regular turn 53,54,55 (corresponding identical priority), if do not receive the incident of higher relatively priority, then the sequencing of microprocessor 16 execution incidents 53,54,55 can to enter the sequencing of formation 43 identical with incident 53,54,55, just execute incident 53 earlier, carry out incident 54 again, carry out incident 55 at last.Execution sequence as for the incident of different priorities, 16 of microprocessors according to priority by the high and low incident of carrying out in regular turn in four formations 40,41,42,43, in other words, after the incident in the formation of corresponding higher priority all was finished, microprocessor 16 was just then carried out the interior incident of formation of next priority.Therefore, for incident shown in Figure 2 50,51,52,53,54,55, under normal operation, microprocessor 16 is carried out the order of above-mentioned incident by then being in regular turn earlier: incident 50, incident 51, incident 52, incident 53, incident 54, incident 55.
Next cooperate Fig. 2 to Fig. 6 to illustrate that microprocessor 16 carrying out the handling procedure when receiving the insertion incident in the process of an incident.Wherein, Fig. 3 to Fig. 6 is the synoptic diagram of the different operating state of storer 14 shown in Figure 2.In microprocessor 16 execute incident 50 and formation 40 be in be suspended (suspend) state after, microprocessor 16 can then read and carry out the incident 51 of corresponding priority for time high priority TPL_NOTIFY.When receiving the insertion incident in the process of microprocessor 16 execution incidents 51 for example 60 the time, if incident 60 is a relatively low priority (for example TPL_APPLICATION) compared to incident 51, then incident 60 can be stored in the formation 43 of relatively low priority TPL_APPLICATION into, and execution sequence can be after the incident of having deposited before 55, at this moment, the mode of operation of storer 14 will be as shown in Figure 3.If incident 60 is relative one lower priority (for example TPL_CALLBACK) compared to incident 51 equally, but because formation 42 originally is not in halted state because of depositing any incident, at this moment, formation 42 just can be reactivated, and incident 60 just is stored in the into formation 42, and the mode of operation of storer 14 then as shown in Figure 4.If incident 60 pairing priority are time high priority TPL_NOTIFY, identical with the relative priority level of incident 51, then incident 60 can be stored in the into formation 41, and after the incident 52 that can formerly deposit of execution sequence, at this moment, the mode of operation of storer 14 as shown in Figure 5.If incident 60 pairing priority are its limit priority TPL_HIGH_LEVEL, its relative priority level is higher than 51 pairing high priority TPL_NOTIFY of incident, then microprocessor 16 interrupts executory incident 51 and carries out incident 60 at once, above-mentioned interrupted incident 51 and its breakpoint B P are temporarily stored among the memory location TL in the storer 14, and the mode of operation of 14 this moments of storer as shown in Figure 6.After follow-up microprocessor 16 such as grade executes incident 60, can read the data of incident 51 and its breakpoint B P from the position TL of storer 14, and continue to begin execution incident 51 from breakpoint B P, this is the aforementioned multitasking of mentioning.
When microprocessor 16 continues to receive and a plurality of incidents of carrying out relative higher priority, or when continue carrying out incident in the formation of depositing in relative higher priority, may can not carry out the incident of relatively low priority for some time, for addressing the above problem, the present invention also discloses a kind of covering (mask) mechanism, in order to provide a kind of just as the temporary transient running that improves the priority of lower priority incident, can allow microprocessor 16 adjust the execution sequence of incident as required, that is to say, when microprocessor 16 when the mechanism of covering starts, after executing the incident of carrying out at present, next can skip the incident of second priority, (in this, second priority is higher than the 3rd priority and carry out earlier the incident of the 3rd priority.)。Next will illustrate the detailed operation of this mechanism of covering.
Please consult Fig. 2 and Fig. 7 simultaneously, Fig. 7 enables the synoptic diagram of the mode of operation under the mechanism of covering in microprocessor 16 for storer 14 shown in Figure 2.As shown in Figure 2, when microprocessor 16 reads from formation 40 and during execution incident 50, if no any incident in the formation 40, and receive and carry out under the situation of new incident, microprocessor 16 can be carried out incident 51, incident 52, incident 53, incident 54, incident 55 in regular turn.Yet wish that now microprocessor 16 carries out incident 53 at once after executing present incident 50, therefore, promptly need to start the mechanism of covering to cover (mask) all other pending incidents also higher than incident 53 pairing lowest priority TPL_APPLICATION, just cover formation 41 stored incidents 51,52, storer 14 mode of operation at this moment as shown in Figure 7.And as for formation 40,42, because it has not had all and has deposited any incident and be suspended, so in the present embodiment, microprocessor 16 just need not cover formation 40,42.It is a variety of to note that the mode of covering a formation has, and one of them sets a corresponding label M for microprocessor 16 respectively at each formation 40,41,42,43, and microprocessor 16 can be judged its whether crested from the value of label M.For instance, microprocessor 16 is preset as 0 with the value of formation 40,41,42,43 label M separately earlier, and when formation 41 cresteds, microprocessor 16 meetings are set at 1 with the value of the label M of formation 41, thus, after microprocessor 16 executes incident 50, can be 1 to learn formation 41 cresteds by the value of the label M of formation 41, then microprocessor 16 can directly be skipped the incident 51,52 of depositing in formation 41 and directly carry out incident 53.Further illustrate again, when the value of the label S of formation 40 is 1, the value of the label M of formation 41 is 1 and the value of the label S of formation 42 when being 1, therefore microprocessor 16 can learn that it need not read formation 40,41,42, can be directly to read incident 53 in the formation 43 and carry out.
See also simultaneously Fig. 8 and Fig. 9, Fig. 8 be another synoptic diagram of a plurality of formations 40,41,42,43 in the storer 14 shown in Figure 2, and Fig. 9 to be explanation storer 14 shown in Figure 8 enable a synoptic diagram that covers the mode of operation under machine-processed in microprocessor 16.In Fig. 8, formation 40 is deposited any incident because of nothing and is suspended, and incident 71,72 has been deposited in formation 41, and incident 73,74 has been deposited in formation 42, and formation 43 storeies are placed with incident 75,76,77.Microprocessor 16 reads and execution incident 71 in formation 41, then, do not receive and carry out under the situation of new events at microprocessor 16, microprocessor 16 originally can be carried out incident 72 in regular turn, 73,74,75,76,77, yet, wish that now microprocessor 16 carries out incident 75 at once after executing present incident 71, therefore, promptly need to cover all other pending incidents also higher than incident 75 pairing lowest priority TPL_APPLICATION, just cover formation 41, the incident 72 that 42 storeies are put, 73,74, storer 14 mode of operation at this moment will be as shown in Figure 9.
As previously mentioned, computer system of the present invention and starting-up method thereof can be when boot program be carried out, the mechanism of enabling multitasking is handled the incident of a plurality of different priorities, that is, when the microprocessor of this computer system received the incident of a relative higher priority, the incident that can interrupt an executory relatively low priority immediately was to carry out the incident of relative higher priority.Compared to prior art, computer system of the present invention and starting-up method are because use the relation of formation, so can handle more incident; In addition, computer system of the present invention and starting-up method also provide one to cover (mask) mechanism, and it can temporarily improve the priority of the incident of corresponding lower priority originally, and this incident can be performed ahead of time.
The above only is preferred embodiment of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (10)
1. computer system, it includes:
One memory storage is used for storing a boot system and a multitask core; And
One microprocessor is coupled to this memory storage, is used for loading this multitask core carrying out this boot system,
Wherein this boot system is an extensible firmware interface, after this microprocessor is carried out this multitask core, in this memory storage, produce the task of a plurality of different priorities, corresponding a plurality of formations respectively, and these a plurality of formations are used for depositing the incident of a plurality of corresponding priority that produced when this microprocessor is carried out this extensible firmware interface respectively, and
Wherein if this microprocessor in carrying out this extensible firmware interface procedure, when carrying out an incident, receive an insertion incident, and should the pairing priority of insertion incident be higher than the pairing priority of this incident, then this microprocessor interrupts carrying out this incident to carry out this insertion incident at once.
2. computer system as claimed in claim 1, wherein an incident of this microprocessor correspondence one priority that will be performed removes in the formation of depositing this incident.
3. computer system as claimed in claim 1, wherein this microprocessor suspends a formation of not depositing any incident in these a plurality of formations.
4. computer system as claimed in claim 1, wherein this microprocessor starts one and covers mechanism, covering the higher incident of a relative priority level, and carries out the lower incident of a relative priority level.
5. computer system as claimed in claim 4, incident in wherein carrying out as if this microprocessor, after incident was finished in this execution, this microprocessor was carried out the lower incident of this relative priority level again.
6. the starting-up method of a computer system, this computer system includes a boot system, and this starting-up method comprises the following step:
One multitask core is provided; And
Load this multitask core carrying out this boot system,
Wherein this boot system is an extensible firmware interface, after carrying out the multitask core, it can produce the task of a plurality of different priorities, corresponding a plurality of formations respectively, and these a plurality of formations are used for depositing the incident of a plurality of corresponding priority that produced when carrying out this extensible firmware interface respectively, and
If in the process of carrying out this extensible firmware interface, when carrying out an incident, receive an insertion incident, and should the pairing priority of insertion incident be higher than the pairing priority of this incident, then interrupt carrying out this incident to carry out this insertion incident at once.
7. starting-up method as claimed in claim 6 also comprises the following steps:
One incident of correspondence one priority that has been performed is removed in the formation of depositing this incident.
8. starting-up method as claimed in claim 6 also comprises the following steps:
Suspend a formation of not depositing any incident in these a plurality of formations.
9. starting-up method as claimed in claim 6 also comprises the following steps:
Start one and cover mechanism, so that the higher incident crested of a relative priority level, and the lower incident of a relative priority level is performed.
10. starting-up method as claimed in claim 9 also comprises the following steps:
If incident in carrying out is then carried out the lower incident of this relative priority level again after incident is finished in this execution.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100965157A CN100371896C (en) | 2005-08-22 | 2005-08-22 | Computer system and startup method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100965157A CN100371896C (en) | 2005-08-22 | 2005-08-22 | Computer system and startup method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1731357A CN1731357A (en) | 2006-02-08 |
| CN100371896C true CN100371896C (en) | 2008-02-27 |
Family
ID=35963718
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005100965157A Active CN100371896C (en) | 2005-08-22 | 2005-08-22 | Computer system and startup method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100371896C (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107273201A (en) * | 2017-07-03 | 2017-10-20 | 深圳市沃特沃德股份有限公司 | Vehicle control syetem and its data processing method |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN86102662A (en) * | 1985-03-20 | 1986-11-05 | 株式会社日立制作所 | Input/output control system |
| WO1990006554A1 (en) * | 1988-11-30 | 1990-06-14 | Laboratoire Europeen De Recherches Electroniques Avancees | Computer and starting-up process of said computer |
| CN1075021A (en) * | 1992-01-31 | 1993-08-04 | 国际商业机器公司 | Multimedia operation system and method |
| JP2000207165A (en) * | 1999-01-13 | 2000-07-28 | Nec Corp | Display system for personal computer |
| US20030135785A1 (en) * | 2002-01-15 | 2003-07-17 | Carr Russell L. | Configuration proxy service for the extended firmware interface environment |
| US20040260917A1 (en) * | 2003-06-23 | 2004-12-23 | Newisys, Inc. | Multi-processing in a BIOS environment |
| WO2005006188A2 (en) * | 2003-06-30 | 2005-01-20 | Intel Corporation | Parallel execution of enhanced efi based bios drivers on a multi-processor or hyper-threading enabled platform |
| CN1592890A (en) * | 2000-11-02 | 2005-03-09 | 英特尔公司 | Event handling |
-
2005
- 2005-08-22 CN CNB2005100965157A patent/CN100371896C/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN86102662A (en) * | 1985-03-20 | 1986-11-05 | 株式会社日立制作所 | Input/output control system |
| WO1990006554A1 (en) * | 1988-11-30 | 1990-06-14 | Laboratoire Europeen De Recherches Electroniques Avancees | Computer and starting-up process of said computer |
| CN1075021A (en) * | 1992-01-31 | 1993-08-04 | 国际商业机器公司 | Multimedia operation system and method |
| JP2000207165A (en) * | 1999-01-13 | 2000-07-28 | Nec Corp | Display system for personal computer |
| CN1592890A (en) * | 2000-11-02 | 2005-03-09 | 英特尔公司 | Event handling |
| US20030135785A1 (en) * | 2002-01-15 | 2003-07-17 | Carr Russell L. | Configuration proxy service for the extended firmware interface environment |
| US20040260917A1 (en) * | 2003-06-23 | 2004-12-23 | Newisys, Inc. | Multi-processing in a BIOS environment |
| WO2005006188A2 (en) * | 2003-06-30 | 2005-01-20 | Intel Corporation | Parallel execution of enhanced efi based bios drivers on a multi-processor or hyper-threading enabled platform |
Non-Patent Citations (1)
| Title |
|---|
| μC/OS-II嵌入式操作系统的多任务应用程序开发. 佟国香，李琦，李广军.光电工程，第31卷. 2004 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1731357A (en) | 2006-02-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101233489B (en) | Adaptive process dispatch in a computer system having a plurality of processors | |
| CN100570565C (en) | Operating system service method and system based on strategy are provided in supervisory routine | |
| JP5071913B2 (en) | Concurrent physical processor reallocation method, system, and program | |
| AU734920B2 (en) | Modifiable partition boot record for a computer memory device | |
| US8484631B2 (en) | Supporting hardware configuration changes in a UEFI firmware component | |
| US8972699B2 (en) | Multicore interface with dynamic task management capability and task loading and offloading method thereof | |
| US6834385B2 (en) | System and method for utilizing dispatch queues in a multiprocessor data processing system | |
| US8108880B2 (en) | Method and system for enabling state save and debug operations for co-routines in an event-driven environment | |
| CN100349131C (en) | Method for positioning malfunction of application program | |
| CN103365668B (en) | A kind of dynamic link library loads and the method, apparatus of link | |
| CN101652747A (en) | Parallel dll tree initialization | |
| CN104461876A (en) | Concurrent program reappearance debugging method based on snapshot sequence running | |
| US10394571B2 (en) | Passing data from a host-based utility to a service processor | |
| US20040098722A1 (en) | System, method, and computer program product for operating-system task management | |
| US7231512B2 (en) | Technique for reconstituting a pre-boot firmware environment after launch of an operating system | |
| CN105487956B (en) | Debugging method and device in power-on self-test | |
| CN105550029A (en) | Process scheduling method and device | |
| US8726258B2 (en) | Supporting multiple hardware components in UEFI | |
| CN104572162A (en) | UEFI (Unified Extensible Firmware Interface) firmware implementation method based on Loongson handheld computer | |
| CN104520811A (en) | System and method for optimizing start time of computer with a plurality of central processing units | |
| CN102141915B (en) | Equipment real-time control method based on RTLinux | |
| CN100371896C (en) | Computer system and startup method thereof | |
| CN105094870A (en) | Compatible method of 64-bit Linux operating system for 32-bit application software | |
| CN104205043A (en) | Hiding logical processors from an operating system on a computer | |
| US7577814B1 (en) | Firmware memory management |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20081219 Address after: Chinese Beijing Haidian District city Zhongguancun Road No. 1 Building No. 7 hospital via Chinese core building Patentee after: VIA Technologies (China) Inc. Address before: Taipei County of Taiwan Patentee before: Weisheng Electronic Co., Ltd. |
|
| ASS | Succession or assignment of patent right |
Owner name: VIA ELECTRONIC ( CHINA) CO., LTD. Free format text: FORMER OWNER: WEISHENG ELECTRONICS CO., LTD. Effective date: 20081219 |