CN100358327C - Delay compensation method of LLAS dynamic lossless witchover data bandwidth - Google Patents
Delay compensation method of LLAS dynamic lossless witchover data bandwidth Download PDFInfo
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- CN100358327C CN100358327C CNB2004100391745A CN200410039174A CN100358327C CN 100358327 C CN100358327 C CN 100358327C CN B2004100391745 A CNB2004100391745 A CN B2004100391745A CN 200410039174 A CN200410039174 A CN 200410039174A CN 100358327 C CN100358327 C CN 100358327C
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Abstract
The present invention discloses a delay compensation method of LCAS dynamic lossless switchover data bandwidth, which comprises the following steps: a. data of each group of VCG is stored in a storage unit in a VC sequence; b. an MFI queue of each group of VCG is independently adjusted, a maximum MFI value is searched on a first order of the MFI queue of a valid SQ, and queue contents less than the maximum MFI value are deleted from the first order until all the MFI values of the first order of the valid SQ are identical; lower four bits of the MFI value of the first order of the aligned MFI queue are compared with each other, if the lower four bits are not in a form of 0000, all the contents of the MFI queue of the SQ are orderly discarded until all the lower four bits of the MFI value of the first order are equal to 0000; c. the adjusted MFI queue is processed, whether an MFI value which appears for the next time is continuous with the current MFI value is judged, and if the MFI value which appears for the next time is discontinuous with the current MFI value, a user jumps out of the step c to enter the step b. The present invention automatically eliminates a group network time delay difference.
Description
Technical field:
The present invention relates to the dynamically delay compensation method of harmless switch data bandwidth of a kind of LCAS.
Background technology:
In the SDH transport service, LCAS (Link Capacity Adjustment Scheme, Link Capacity Adjustment Scheme) major function is to utilize the self-defined control frame structure of SDH overhead byte, shine upon needed VC (Virtual Capacity with in-band method control institute data carried by data service bandwidth, virtual container) number, and support dynamically harmless bandwidth (being the virtual container number) to switch.Here, the LCAS technology is done with simple introduction.LCAS is called VBA (Variable Bandwidth Allocation, bandwidth varying distributes) technology at first again.As can be seen, the LCAS technology has characteristics such as the flexible and dynamic adjustment of bandwidth, when user bandwidth changes, can adjust VCG (Virtual Concatenation Group, empty appearance group) Member (member) number in, this adjustment can not produce user's regular traffic interrupts.In addition, the LCAS technology also provides a kind of fault tolerant mechanism: certain member in void appearance group was lost efficacy, and whole empty appearance group was lost efficacy, but automatically the member of losing efficacy is rejected from void appearance group, and remaining normal member continues transport service; After the member of losing efficacy recovers, system should the inefficacy member add empty appearance group automatically.In general, the LCAS technology is adjusted VCG two reasons, is respectively, and Link State changes: when LCAS detects when occurring certain Member on the network and losing efficacy, reduce the capacity of VCG automatically; If after detecting the Member reparation of inefficacy, then automatically increase the capacity of VCG.This capacity adjustment all is feasible to concerning each Member.Band width configuration changes: the source end of LCAS and the controlling mechanism between the destination, can adjust used VCG capacity according to service traffics and bandwidth particularly according to the capacity of the actual service bandwidth demand adjustment VCG that carries out.In addition, VCG also has identification field GID (Group Identification bit, group id), and it is used for identifying VCG, and all member GID of same VCG are identical.
Simultaneously, because the difference of networking mode, make the transmission path difference of each VC of same VCG, may there be delay inequality in each VC that then is engraved in the VCG that receiving terminal receives simultaneously, cause the MFI value of different VC inequality, if these data are not handled, will cause the entanglement of data, and can influence the harmless switching of LCAS protocol dynamic.Existing delay compensation method can't obtain corresponding M FI content owing to do not relate to the agreement that the LCAS Bandwidth Dynamic is adjusted, and can only pass through the human configuration delay parameter, finishes the VCG data of bandwidth fixed are carried out buffer memory, eliminates the time delay of networking.Loss of data when so, big but also adjustment bandwidth not only consuming time can cause switching.
Summary of the invention:
At the existing problem and shortage of delay compensation method of the dynamically harmless switch data bandwidth of LCAS, the purpose of this invention is to provide a kind of dynamically delay compensation method of harmless switch data bandwidth of the complete LCAS of data sequence that guarantees.
The present invention is achieved in that the dynamically delay compensation method of harmless switch data bandwidth of a kind of LCAS, it is characterized in that this method may further comprise the steps:
A. the data of every group of VCG according to the sequential storage of VC in memory cell;
B. MFI (multi-frame sign, the MultiFrame Indicator) formation of every group of VCG is independently adjusted, set-up procedure is as follows:
(sequence number is sought maximum MFI value on the first place of MFI formation Sequence), will delete from the first place less than the formation content of this maximum MFI value, and is all identical until the MFI value of the first place of the MFI of all effective SQ formation at effective SQ;
If multi-frame is defined as 16 single frames in the system, relatively low 4 of the first MFI value of Dui Qi MFI formation, if be not 0000, then abandon the content of the MFI formation of all SQ successively, be equal to 0000 up to the low 4bit (position) of the first MFI value;
C. handle adjusted MFI formation, and judge whether the next MFI value that occurs of VC of all effective SQ correspondences is continuous with current MFI value, if discontinuous, then jumps out this step, enters step b.
Further, described harmless switch data bandwidth is that the boundary at multi-frame is carried out change action after the bandwidth adjustment.
Further, described delay compensation is based on that the mode of storage carries out.
Further, described memory cell is specially DDRSDRAM.
Further, described VCG includes 16 MEMBER (member), and each MEMBER is by 16 connected in series forming of VC.
Further, described memory cell is carried out the piece distribution according to the serial number VC_NUM of VC in STM to the address of DDRSDRAM, divides fritter with the VC number of supporting again in each piece.
Further, described fritter memory capacity is greater than the VC capacity.
The present invention can adopt FPGA to realize it, again in conjunction with the requirement of LCAS agreement, has realized a kind ofly avoiding the artificial automatic elimination networking delay inequality that participates in to support the delay compensation method of the dynamic switch data bandwidth of LCAS simultaneously again.This method can be supported many group VCG according to the amount of capacity of memory cell, and Bu Chang time delay scope is adjustable along with the size of memory capacity simultaneously.
Description of drawings:
Below in conjunction with accompanying drawing, the present invention is made detailed description.
Fig. 1 is a memory allocation schematic diagram of the present invention;
Fig. 2 is a MFI formation initial condition schematic diagram of the present invention;
Fig. 3 carries out adjusted view for MFI formation of the present invention to Fig. 1;
Fig. 4 finally adjusts view for MFI formation of the present invention;
Fig. 5 is the structural representation of FPGA of the present invention.
Embodiment:
The present invention realizes in conjunction with the requirement of LCAS agreement that with FPGA empty appearance group of the present invention (VCG) includes 16 members (MEMBER), and each member is by connected in series the forming of 16 virtual containers (VC).FPGA of the present invention includes STM data flow, memory cell, MFI formation, LCAS protocol analysis, downstream and separates mapping block.
Step of the present invention is as follows:
A. the data of every group of VCG according to the sequential storage of VC in memory cell;
B. the MFI formation of every group of VCG is independently adjusted, set-up procedure is as follows:
On the first place of the effectively MFI formation of SQ, seek maximum MFI value, will delete from the first place less than the formation content of this maximum MFI value, all identical until the MFI value of the first place of the MFI of all effective SQ formation;
If multi-frame is defined as 16 single frames in the system, then low 4 of the first MFI value of the MFI formation of relatively aliging, if be not 0000, then abandon the content of the MFI formation of all SQ successively, be equal to 0000 up to the low 4bit of the first MFI value;
C. handle adjusted MFI formation, and judge whether the next MFI value that occurs of VC of all effective SQ correspondences is continuous with current MFI value, if discontinuous, then jumps out this step, enters step b.
The present invention is in the multi-frame operation, if bandwidth adjustment, only carry out change action at the boundary of multi-frame, and the mode that is based on storage is carried out, according to the address of the serial number VC_NUM of VC in STM memory cell being carried out piece distributes, divide fritter with the VC number of supporting again in each piece, its fritter memory capacity is greater than the VC capacity.
Using the mode of storage to eliminate network delay is the method for normal use in the communication system, in the SDH transmission system of supporting the LCAS agreement, the unit that is used to carry data all is unit with VC, the capacity of VC virtual container is different and different with map type, uses the delay compensation method of DDRSDRAM as memory cell with VC-4 for the example introduction among the present invention.Other VC or other RAM can be applicable to the present invention equally.The capacity of VC-4 virtual container is 261 * 9Bytes, generally transmits a VC-4 needs 125us consuming time who comprises overhead byte, and the present invention supports 16 VC-4 of 2.5G bandwidth, if it is poor to eliminate the 8ms network delay, need memory span at least should for:
(8ms/125us)×(261×9Bytes)×16≈2.4MB
The aforementioned calculation method is suitable for the VC of other types equally, and the computational methods of eliminating dissimilar VC virtual container time delays and memory span are:
(T/t)×B×N
Wherein T is time delay to be eliminated in the following formula, and t is the unit time delay of corresponding virtual container, and B is the unit capacity of virtual container, and N is the virtual container number of the data bandwidth correspondence of current support.
The present invention is for the ease of the read and write access to memory, still be example, need piece to be carried out in the address of DDRSDRAM and distribute, divide fritter with the virtual container number of supporting again in each piece according to the serial number VC_NUM of VC-4 in STM with VC-4, for the ease of address administration, each fritter capacity is divided into 2
12Byte, promptly 4096 bytes as long as guarantee the capacity of the capacity of VC less than this memory block, are 261 * 9＜4096, thus the rest parts free time, shown in the little square frame part among Fig. 1.
The MFI formation is to have identical SQ number the tick lables of VC in the multi-frame of LCAS definition in same group of VCG, identical and VC of every transmission adds one to the MFI value of the VC of each SQ correspondence among same group of VCG automatically at transmitting terminal, and in the difference of receiving terminal owing to network delay, the MFI value of each VC correspondence may be different, MFI alignment for the VC among all SQ that make same VCG, at first to shine upon by the LCAS protocol process module the VC MFI value corresponding with it, and the stored information of VC of the MFI correspondence after the mapping and relevant LCAS information deposited in the formation, claim this formation to be the MFI formation, as shown in Figure 2, all corresponding MFI formation of each SQ in each VCG group, the VC in the VCG group specifically is VC-4.
Among the present invention, the function of memory only is the sequential storage data according to VC-4 of machinery, and all protocol processes relevant and MFI with LCAS align adjust and dynamic bandwidth adjust function all based on MFI formation finish.As shown in Figure 2, because the first MFI value of the MFI formation of the effective SQ that receives is different, promptly the MFI value of SQ=0 is 0, and the MFI value of SQ=1 is 4, and the MFI value of SQ=2 is 4, and the MFI value of SQ=3 is 1.If directly send these data, will cause the entanglement of downstream data, therefore, must adjust just the MFI formation and can send it.
The adjustment algorithm of MFI alignment of the present invention is specific as follows:
A. the scope to MFI formation adjustment only limits to a VCG inside, does not adjust between the different VCG;
B. in same VCG, effectively seek maximum MFI value (the minimum path of promptly corresponding time-delay) in the MFI formation first place of SQ, as shown in Figure 2, the first MFI value of the MFI formation that receives is 4 to the maximum, the first MFI value of the first MFI value less than the formation of the MFI value of maximum abandoned, MFI value up to the MFI of all effective SQ formation first place all identical (waiting until that promptly the VC-4 by the longest path arrives), as shown in Figure 2, the first MFI value of the MFI formation of alignment is 4;
C. if multi-frame is defined as 16 single frames in the system, the low 4bit value of MFI value of the MFI formation of alignment relatively then, if be not equal to 0000, then abandon the first MFI value of MFI formation of all effective SQ correspondences successively, low 4bit up to the first MFI value equals 0000, and promptly alignment is to begin from multiframe boundaries.As shown in Figure 2, the first MFI value of the MFI formation of alignment and demarcation is 0;
D. all identical and low 4bit value of the first MFI value in the MFI formation of all effective SQ all is 0000 in each VCG, and then report is alignd and the demarcation state, and notifies downstream module.
E. under MFI alignment and demarcation state, whenever handle judge behind the VC-4 of all effective SQ correspondences of same VCG the MFI value that occurs next time whether with current MFI value continuously, if it is discontinuous, then frame losing or other faults appear in explanation, then jump out alignment and demarcation state at once, again align to delimit and adjust, promptly jump out this step, enter step b; And continue to adjust.
Through adjusting, the present invention has eliminated the delay inequality that network path brings, and how to introduce below in the technology of having eliminated behind the network delay according to the harmless switch data bandwidth of the control of LCAS agreement.
Data bandwidth under the LCAS agreement of the present invention is in the present invention and is the effective number of SQ in the same VCG, and effectively SQ is interpreted as currently using, and is carrying the VC passage of valid data.Switching in of data bandwidth means the number of adjusting effective SQ in the same VCG among the present invention.For the switch data bandwidth that guarantees can't harm, the present invention only carries out change action in the LCAS processing module at the boundary of multi-frame, promptly changes the effective status of SQ at the boundary of multi-frame.Like this on the border that each multi-frame finishes, numbers of the ensuing effective SQ of device report downstream again all is so that downstream module is done corresponding adjustment.So just guaranteed its harmless switching.
As shown in Figure 5, as verification platform, internal structure is separated mapping block N and is constituted by STM data flow D, memory cell C, MFI formation M, LCAS protocol analysis L, downstream with FPGA in the present invention.The data of STM data flow D module are that physical address deposits each VC data carried by data in memory with the serial number of VC, simultaneously the information that provides according to LCAS protocol analysis module L deposits the MFI value of each VC among the SQ of VCG at its place, the downstream separate mapping block N the MFI formation alignd and the state delimited under data are read and finish the follow-up mapping function of separating from memory.
Claims (7)
1. the dynamic delay compensation method of harmless switch data bandwidth of a LCAS is characterized in that this method may further comprise the steps:
A. the data of every group of VCG according to the sequential storage of VC in memory cell;
B. the MFI formation of every group of VCG is independently adjusted, set-up procedure is as follows:
On the first place of the effectively MFI formation of SQ, seek maximum MFI value, will delete from the first place less than the formation content of this maximum MFI value, all identical until the MFI value of the first place of the MFI of all effective SQ formation;
If multi-frame is defined as 16 single frames in the system, relatively low 4 of the first MFI value of Dui Qi MFI formation, as if being not 0000, then abandon the content of the MFI formation of all SQ successively, hanging down 4 and be equal to 0000 up to the first MFI value;
C. handle adjusted MFI formation, and judge whether the next MFI value that occurs of VC of all effective SQ correspondences is continuous with current MFI value, if discontinuous, then jumps out this step, enters step b.
2. LCAS as claimed in claim 1 is the delay compensation method of harmless switch data bandwidth dynamically, it is characterized in that, described harmless switch data bandwidth is that the boundary at multi-frame is carried out change action after the bandwidth adjustment.
3. the delay compensation method of the dynamically harmless switch data bandwidth of LCAS as claimed in claim 1 is characterized in that, described delay compensation is based on that the mode of storage carries out.
4. LCAS as claimed in claim 1 is the delay compensation method of harmless switch data bandwidth dynamically, it is characterized in that described memory cell is specially DDRSDRAM.
5. LCAS as claimed in claim 1 is the delay compensation method of harmless switch data bandwidth dynamically, it is characterized in that described VCG includes 16 members, and each member is by 16 connected in series forming of VC.
6. LCAS as claimed in claim 4 is the delay compensation method of harmless switch data bandwidth dynamically, it is characterized in that, described memory cell is carried out the piece distribution according to the serial number VC_NUM of VC in STM to the address of DDRSDRAM, divides fritter with the VC number of supporting again in each piece.
7. LCAS as claimed in claim 6 is the delay compensation method of harmless switch data bandwidth dynamically, it is characterized in that described fritter memory capacity is greater than the VC capacity.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6078593A (en) * | 1997-02-04 | 2000-06-20 | Next Level Communications | Method and apparatus for reliable operation of universal voice grade cards |
| KR20040002040A (en) * | 2002-06-29 | 2004-01-07 | 주식회사 케이티 | packet transfer method using the Virtual Concatenation in EtherNet-based Digital Subscriber Line |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6078593A (en) * | 1997-02-04 | 2000-06-20 | Next Level Communications | Method and apparatus for reliable operation of universal voice grade cards |
| KR20040002040A (en) * | 2002-06-29 | 2004-01-07 | 주식회사 케이티 | packet transfer method using the Virtual Concatenation in EtherNet-based Digital Subscriber Line |
Non-Patent Citations (1)
| Title |
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| 链路容量调整方案的控制原理分析 刘国辉.中国有线电视，第21期 2003 * |
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