CA2739188A1 - Method and system for automated test of multi-media user devices - Google Patents
Method and system for automated test of multi-media user devices Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N17/00—Diagnosis, testing or measuring for television systems or their details
- H04N17/04—Diagnosis, testing or measuring for television systems or their details for receivers
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Abstract
A test system, for example for set top boxes or game consoles, includes logic to reformat media signals output by a device under test, logic to receive the reformatted media signals and to analyze them for errors, and a pluggable interface coupling and device under test to the logic to reformat the media signals.
Description
-I-Method and System for Automated Test of Multi-Media User Devices [oil FIELD
[021 This application relates to automated test equipment.
[041 In the drayvings. the same reference nunihers and acronyms identit-v elements or acts with the same or similar functionality for ease of understanding and convenience. To easily identify the discussion of any particular element or act. the most significant digit or digits in a reference number refer to the figure number in which that element is first introduced.
1051 FIG 1 illustrates a prior-art test system for end-user devices such as set top boxes and game consoles.
[06] FIG 2 illustrates an embodiment of a novel automated test system for end-user devices.
1071 FIG 3 illustrates an embodiment of a novel programmable inultiformat board.
[08] DETAILED DESCRIPTION
[091 References to one embodiment" or "an embodiment" do not necessarily refer to the same embodiment. although they may.
[10] Unless the context clearly requires otherwise, throughout the description and the claims, the words "comprise," "comprising." and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense. that is to say, in the sense of includitngr but not limited to." Words using the singular or plural number also include the plural or singular number respectively. Additionally, the words "herein,"
"above," "below"
and words of similar import. when used in this application, refer to this application as a whole and not to any particular portions of this application. When the claims use the w wrd "or" in reference to a list of two or more items, that word covers all of the following interpretations of the ~,iwd: any of the items in the list, all of the items in the list and any combination of the items in the list.
111] FIG 1 illustrates a test system for user devices such as set top boxes and game consoles. Multiple units under test (UI TT1 _ I fUT2_ _ ..UUTN-) are coupled to multiple multi-m edia-format boards: AIFBI. _M B2, ... MFBN. The multi-media-format boards may each offer a set of media format conversion functionality. The connectivity employ=ed between a particular CUT and its associated \IFB may vary according to the make and model of the UUT and or MFB. Some UT.-Ts may receive signals which are not directed from or through the ~~11B with which they are associated, for example signals from a service provider head-end. The inputs to a I.IFB, CUT. and the connections beta-een an 1IFB and UUT, may vary according to the make and model oft1[-T, complicating the testing process.
[12] Polling, control. initialization, and configuration signals provided by the service provider (e.g.. a cable television network operator. an Internet Service Provider, etc.) to the UUT are supplied via a direct connection between the UUT and the service provider net~tork.
[1,] In order to swap a t_ U )A nth another fort sting purposes. it may be necessary to manually reconfigure the connections between the CUT and the MFB. and the UUf and the service provider.
[141 Each MMIFB may be coupled to test logic (e.g. a laptop computer). for example via a I Tniversal Serial Bus (t-SB). Each \IFB may drive an infrared (IR) signal source (IR1. IR2 ...IRN) to control the UUT..=), USB hub may be employed to expand the number of ports available on a laptop, personal computer. or other test device.
[15] FIG 2 illustrates an embodiment of a novel automated test system for end-user devices. Inputs to a unit under test (T -UT) are received at a pluggable interface module 202, which adapts and positions the signals to be received by the UUf 204. The interface ntodule 202 comprises inputs to and outputs from the UUT 204.
[161 A multi-media format board 206 (MIFB) may be configured with logic that is downloaded and installed on the board 206, making it a programmable multi-media format board (PMFB). This may enable use or a single PI-IM with multiple makes and models of IJI -T. The PMFB 206 may be coil-Figured to provide all of the inputs that the receives, and to receive all outputs of interest for testing from the UUT 204.
In this manner.
it may be possible to simple disengage a particular UUT from the interface nodule 202, and plug in a nem. I -I -T_ without manually removing or installing any cabling or connections to the I_-UT 204 or PMFB 206.
[171 The interface nodule 202 may comprise an identification (e.g. an assembly part number) that corresponds to the supported model. This identification may be coded into a non-volatile memory of the interface module 202. The PMIFB 206 may be adapted to automatically detect the make and model or a L"UT 204 coupled thereto by interacting with the UUT 204 and or with the interface module 202. and may download and or activate appropriate logic (e.g. from the test analysis logic 208) to interact with and facilitate the testing of the UU.-T 20-1. Upon detecting the make and model ofa 1'UT 204, the P lFB 206 may intbrm the test analysis logic 208 ofthis information, so that the test analysis logic 208 may select appropriate test and analysis logic forthe UUT 204. Logic of the test system may provide for parallel processing. such that each UUT 20-1 may be tested independently and concurrently. Multi-threading may be employed to accomplish this.
[18] The PMFB 206 may convert outputs of the 11-V T 204 to a binary format suitable for processing and analysis by the test analysis logic 208. Each PMIFB 206 may have associated test logic. or multiple PMFBs may output data in parallel to shared test analysis logic.
Outputs of the PMFB 206 to test analysis logic 208 may he provided in some embodiments via universal serial bus (IJSB). The pluggable interface module 202 may be adapted to fit, e. g. slot into. a retainer 210. The interface module 202 is interchangeable and may be specific to a make and model of I 'LIT 204. whereas the retainer 210 may comprise a universal configuration (inputs and outputs) common among all makes and models of UUT
204.: slide rack 212 driven by a lever 214, crank, or other mechanism may be provided for loading the UUT 204 and for mechanically engaging it 1 -ith the interface module 202 via operation of the lever 214 or other control The lever 214 or other control may likewise be employed to disengage the LUT 204 from the interface module 202, at which point the UUT 204 and or the modular interface 202 may be removed and replaced with another LU1' 204 and or interface module 202.
[19] The PMFB 206 may comprise logic for the decoding and reformatting of various media formats. such as Component. Composite, S-video. HD II, and analog video.
The format logic may also support S. PDIF and'or coa daloptical audio formats, to name just some examples. Logic to decode different media formats may be downloaded by the PRIFI3 206 in sonic embodiments. Thus. a single P%IFR 206 may be employed \sith various I-I.I's that operate upon or output various media formats.
1201 Polling. control. initialization. and configuration signals provided bvthe service provider (e.g.. a cable television nets ork operator. an Internet Service Provider, etc.) to the LTTUT are provided via a source signal selector 216. The source signal selector 216 ma-choose from among multiple available service provider sources and direct signals from the chosen source to the interface module 202 (note that the signals from the chosen source may in some implementations be directed to the retainer 210. which may comprise inputs and outputs common to all makes and models of Ul T 20-1. For example. the source signal selector 216 may choose signals from a particular headend or a cable t:
levision provider, depending upon the make model of the LPL I' 204. The source signal selector 216 may choose signals from different service providers depending on the type of L-LT
(e.g. set top box. game console, etc.). The source signal selector 216 roan comprise a configurable RF
attenuation control to stress the RF input of'the unit under test. This may be employed to detect anomalies on units failing when the RF level is below certain threshold levels.
[21 j A carousel server (OLL. e.g. a Motorola Oftline Loader. not shown in dra-ings) may be employed to load code objects on various set-top boxes. Deploting an OLL may increase the throughput olloading desired code objects independent from a service provider source. The signal selector 216 may be used in conjunction with the OLL to help prepare the set-top boxes with specific code objects.
[22] Either or both of the PMFB 206 or source signal selector 216 may determine the make and'or model of the tT-T 204. If the PMIFB 206 makes this determination.
it may in some embodiments communicate the make'model information to the source signal selector 216 and or direct the P1lIFB 206 to select a particular source. If the source signal selector 216 makes this determination. it may, in some embodiments. communicate the information the Ph=1FI3 206 and or direct the PNIFB 206 to select a particular source.
Media signals may be provided via a tunable RF channel from a local source 218, instead of from the provider network. The local source need not be "local" to the test svsteni. but may be any Source other than the service provider netriz ork. The local media test signals may be substituted for signals from the provider network (e.g. the provider signals may be filtered out and replaced). or the local signals may supplement the polling, control.
initialization, and configuration signals normally provided by the service provider.
[23] The source 218 of the local media test signals may be it separate server for this purpose.. and or the test analysis logic 208 or devices may provide the local media test signals. In some embodiments. the mediatest signals may be selected according to the make and or model of the Uf TT 204. The system maN include logic to apply the media test signals to the I- UT via a same physical medium as service provider configuration signals are applied to the [JUT. This logic may be comprised by the source signal selector 216, the pluggable interface module 202, the media format board 206, or some other device (e.g. an RF coupler in the signal path).
[24] Control signals that drive features ofthe I?FT 204 may be provided, for example by an IR port and or USB from the PyIFB 206. PCI or SPl control and data exchange may also be employed to interact with the LJL: f 204. The PMFB 206 may operate as a frame grabber which captures one or more frames output by the UT TT 204. buffers the captured frame(s).
converts them to a data stream, and transfers them to the testanalysis logic 208, for example via a USI3 interface.
[25 ] Logic to capture and process new updated or different media formats, or to interact Faith nee different makes and models ofUUT 204, may be dynamically loaded to the P-\1FB 206 by the test, analysis logic 208 or another device. Dynamic loading of logic to the P ~1FB 206 may be based upon a determination of the make and or model number of the U U T 204.
[26] A test platform employing features of the described test system embodiment(s) may be arranged in horizontal vertical, and or grid configurations. with one. two, four, eight, or up to 24 UUT test stations, to name some of the possibilities.
[27 FIG 3 illustrates an embodiment of a novel programmable multi-media format board. Various components readily apparent to those skilled in the art are omitted from the h-illustration for purposes of keeping the description concise. The board may be programmed with new. changed media processing logic via parallel port, USB, or other digital interfaces.
which may conunaunicate and store upgrades to SDRAM. FLASH memory (not shown).
or other volatile or nonvolatile program memory (e.g. memory of audio and video decoder blocks). Various board functions are coordinated using logic comprised by an FPGA.
EPROM, E'.EPRONI, ASIC. or other program memory storage. _A n IR port is available for communicating commands ,~i irelesslt to a I -T -T.
[28] The board has a capability to receive and decode various media formats, such as CUBS, Component. S-Video, IIDMI (high definition multimedia interface). SPDIF.
Digital audio. PCMI, Dolby. and DTS. A secure daughter board 222 may be used to decode and test HDMI signals. with the decoded result then passed to the MIFB. The HDMII
daughter board tests the signal to comply with HDCP (high bandwidth digital content protection). because the decoded HDMI signal cannot be passed to a PC. laptop. or other unsecure digital platform without violation of the IIDCP specification. The board may also have a capability -to receive and decode analog, SPDIF, optical signals. as well as RF signals (e.g. via coaxial cable).
1291 The board may comprise logic (e.g. in FPGA) to determine the make and model of a coupled UC T, and to adapt the applied media decoding logic accordingly. and to communicate the make and model information to a signal source for the 11 IT
(or cause the signal source to select a signal suitable to the make and or model of the (t T
). This make and model information may be obtained from the UUT. or from the pluggable interface module. or from another source. depending on the implementation.
[30] The board may comprise logic (e.g. in FPO .-\,) to adapt the applied media decoding logic based upon instructions from a signal source or other external device.
1311 "Logic'- refers to signals and or information embodied in circuits (e.g.
memory circuits) that may be applied to influence the operation of a device.
Soflcvarc. hardware. and firm ware are examples of logic. In general. logic may comprise combinations of software.
hardware. and.-or firmware.
[321 Those skilled in the art will appreciate that logic may be distributed throughout one or more devices, and or may be comprised of combinations of instructions in memory, processing capability, circuits, and so on. Therefore. in the interest of clarity and correctness loaac may not always be distinctly illustrated in drawings of devices and systems, although it is inherently present therein.
[33] The techniques and procedures described herein may- he implemented via logic distributed in one or more computing devices. The particular distribution and choice of logic is a design decision that will vary according to implementation.
[34] Those having skill in the art will appreciate that there are various logic implementations by which processes and or systems described herein can he effected (e.g., hardw-care_ software. and or firmware), and that the preferred vehicle will vary with the context in which the processes are deployed. For example. i# an implementer determines that speed and accuracy are paramount. the implementer may opt for a hardware and or firniNfare vehicle: alternati~cly, ifflexihility is paramount, the implementer may opt for a solely software implementation; or. vet again alternatively, the implementer may opt for some combination of hardware. software. and or firimvare. Bence, there are several possible vehicles by which the processes described herein may be effected, none of which is inherently superior to the other in that an~vchicle to be utilized is a choice dependent upon the context in which the vehicle wk Ill he deployed and the specific concerns (e.g., speed.
flexibility. or predictability) of the implementer, any of which may vary.
Those skilled in the art will recognize that optical aspects of implementations may involve optically-oriented hardware. softx~are. and or firtmyare.
[35] The foregoing detailed description has set forth various embodiments of the devices and, or processes via the use of block diagrams. flowcharts, ands or examples.
Insofar as such block diagrams. flowcharts. and or examples contain one or more functions and or operations, it will be understood as notorious by those uuithin the art that each function and or operation within such block diagrams, flowcharts, or examples can he implemented_ individually ands or collectively, by a wide range of hardware. software, firmware. or virtually any combination thereof Several portions of the subject matter described herein may be implemented via Application Specific Integrated Circuits (ASICs), Field Pro amenable Gate Arrays (FPGAs). digital signal processors (DSPs), or other integrated formats. Ilo.-ever, those skilled in the art will recognize that some aspects of the embodiments disclosed herein. in whole or in part, can be equivalently implemented in standard integrated circuits, as one or more computer programs running on one or more -R-computers (e.g.. as one or more programs running on one or more computer systems), as one or more programs running on one or more processors (e.g.. as one or more programs running on one or more microprocessors), as tirmwware. or as virtually-' any combination thereof; and that designing the circuitry and or writing the code for the software andor frmyy are would be well within the skill of one of skill in the art in light of this disclosure. In addition. those skilled in the art will appreciate that the tile clianiSills of the subject matter described herein are capable ol-being distributed as a program product in a variety of corms, and that an illustrative embodiment ofthe subject matter described herein applies equally regardless of the particular type of signal hearing media used to actually carry out the distribution. Examples of a signal bearing media include. but are not limited to. the folio wving: recordable type media such as floppy disks, hard disk drives- CD
ROMls, digital tape. and computer memory; and transmission type media such as digital and analog coniniunication links using TDyi or IP based communication links {e.g.. packet links), [361 In a general sense. those skilled in the art yvill recognize that the various aspects described herein Mhieh can be implemented. individually and or collectively, by a .Aide range of hardware. sottwware_ firmware. or any combination thereot'can be vieywed as being composed of various types of "electrical cii-cuitry." Conlsegttelitly, as used herein "electrical circuitry includes. but is not limited to. electrical circuitry having at least one discrete electrical circuit. electrical circuitry having at least one integrated circuit. electrical circuitry having at last one application specific integrated circuit. electrical circuitry forming a general purpose Computing device configured by a computer program (e.g., a general purpose computer configured by a computer program which at least partially carries out processes and or devices described herein, or a microprocessor configured by a computer-program which at least partially carries out processes and, or devices described herein)-electrical circuitry" forming a memory device (e.g., forms of random access memory), and or electrical circuitry forming a communications device (e.g.. a modem.
comnlumications switch, or optical-electrical equipment).
[371 Those skilled in the art ill recognize that it is common within the art to describe devices and/or processes in the fashion set forth herein. and thereafter use standard engineering practices to integrate such described devices and/or processes into larger systems. That is. at least a portion of the devices and or processes described herein can be integrated into a network processing system via a reasonable amount of experimentation.
[38] The foregoing described aspects depict dif'f'erent components contained within, or connected ~~ith, different other components. It is to he understood that such depicted architectures are merely exemplary. and that in fact many other architectures can be implemented which achieve the same finctionality. In a conceptual sense. any arrangement of components to achieve the same functionality is effectively "associated"
such that the desired functionality is achieved. Hence_ am,- to components herein combined to achieve a particular functionality can be seen as "associated with" each other such that the desired flnetionality is achieved, irrespective of architectures or interlnedial components. Likewise.
any two components so associated can also he vies-%ed as being "operable' connected", or "operably coupled". to each other to achieve the desired hinctionalit"
[021 This application relates to automated test equipment.
[041 In the drayvings. the same reference nunihers and acronyms identit-v elements or acts with the same or similar functionality for ease of understanding and convenience. To easily identify the discussion of any particular element or act. the most significant digit or digits in a reference number refer to the figure number in which that element is first introduced.
1051 FIG 1 illustrates a prior-art test system for end-user devices such as set top boxes and game consoles.
[06] FIG 2 illustrates an embodiment of a novel automated test system for end-user devices.
1071 FIG 3 illustrates an embodiment of a novel programmable inultiformat board.
[08] DETAILED DESCRIPTION
[091 References to one embodiment" or "an embodiment" do not necessarily refer to the same embodiment. although they may.
[10] Unless the context clearly requires otherwise, throughout the description and the claims, the words "comprise," "comprising." and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense. that is to say, in the sense of includitngr but not limited to." Words using the singular or plural number also include the plural or singular number respectively. Additionally, the words "herein,"
"above," "below"
and words of similar import. when used in this application, refer to this application as a whole and not to any particular portions of this application. When the claims use the w wrd "or" in reference to a list of two or more items, that word covers all of the following interpretations of the ~,iwd: any of the items in the list, all of the items in the list and any combination of the items in the list.
111] FIG 1 illustrates a test system for user devices such as set top boxes and game consoles. Multiple units under test (UI TT1 _ I fUT2_ _ ..UUTN-) are coupled to multiple multi-m edia-format boards: AIFBI. _M B2, ... MFBN. The multi-media-format boards may each offer a set of media format conversion functionality. The connectivity employ=ed between a particular CUT and its associated \IFB may vary according to the make and model of the UUT and or MFB. Some UT.-Ts may receive signals which are not directed from or through the ~~11B with which they are associated, for example signals from a service provider head-end. The inputs to a I.IFB, CUT. and the connections beta-een an 1IFB and UUT, may vary according to the make and model oft1[-T, complicating the testing process.
[12] Polling, control. initialization, and configuration signals provided by the service provider (e.g.. a cable television network operator. an Internet Service Provider, etc.) to the UUT are supplied via a direct connection between the UUT and the service provider net~tork.
[1,] In order to swap a t_ U )A nth another fort sting purposes. it may be necessary to manually reconfigure the connections between the CUT and the MFB. and the UUf and the service provider.
[141 Each MMIFB may be coupled to test logic (e.g. a laptop computer). for example via a I Tniversal Serial Bus (t-SB). Each \IFB may drive an infrared (IR) signal source (IR1. IR2 ...IRN) to control the UUT..=), USB hub may be employed to expand the number of ports available on a laptop, personal computer. or other test device.
[15] FIG 2 illustrates an embodiment of a novel automated test system for end-user devices. Inputs to a unit under test (T -UT) are received at a pluggable interface module 202, which adapts and positions the signals to be received by the UUf 204. The interface ntodule 202 comprises inputs to and outputs from the UUT 204.
[161 A multi-media format board 206 (MIFB) may be configured with logic that is downloaded and installed on the board 206, making it a programmable multi-media format board (PMFB). This may enable use or a single PI-IM with multiple makes and models of IJI -T. The PMFB 206 may be coil-Figured to provide all of the inputs that the receives, and to receive all outputs of interest for testing from the UUT 204.
In this manner.
it may be possible to simple disengage a particular UUT from the interface nodule 202, and plug in a nem. I -I -T_ without manually removing or installing any cabling or connections to the I_-UT 204 or PMFB 206.
[171 The interface nodule 202 may comprise an identification (e.g. an assembly part number) that corresponds to the supported model. This identification may be coded into a non-volatile memory of the interface module 202. The PMIFB 206 may be adapted to automatically detect the make and model or a L"UT 204 coupled thereto by interacting with the UUT 204 and or with the interface module 202. and may download and or activate appropriate logic (e.g. from the test analysis logic 208) to interact with and facilitate the testing of the UU.-T 20-1. Upon detecting the make and model ofa 1'UT 204, the P lFB 206 may intbrm the test analysis logic 208 ofthis information, so that the test analysis logic 208 may select appropriate test and analysis logic forthe UUT 204. Logic of the test system may provide for parallel processing. such that each UUT 20-1 may be tested independently and concurrently. Multi-threading may be employed to accomplish this.
[18] The PMFB 206 may convert outputs of the 11-V T 204 to a binary format suitable for processing and analysis by the test analysis logic 208. Each PMIFB 206 may have associated test logic. or multiple PMFBs may output data in parallel to shared test analysis logic.
Outputs of the PMFB 206 to test analysis logic 208 may he provided in some embodiments via universal serial bus (IJSB). The pluggable interface module 202 may be adapted to fit, e. g. slot into. a retainer 210. The interface module 202 is interchangeable and may be specific to a make and model of I 'LIT 204. whereas the retainer 210 may comprise a universal configuration (inputs and outputs) common among all makes and models of UUT
204.: slide rack 212 driven by a lever 214, crank, or other mechanism may be provided for loading the UUT 204 and for mechanically engaging it 1 -ith the interface module 202 via operation of the lever 214 or other control The lever 214 or other control may likewise be employed to disengage the LUT 204 from the interface module 202, at which point the UUT 204 and or the modular interface 202 may be removed and replaced with another LU1' 204 and or interface module 202.
[19] The PMFB 206 may comprise logic for the decoding and reformatting of various media formats. such as Component. Composite, S-video. HD II, and analog video.
The format logic may also support S. PDIF and'or coa daloptical audio formats, to name just some examples. Logic to decode different media formats may be downloaded by the PRIFI3 206 in sonic embodiments. Thus. a single P%IFR 206 may be employed \sith various I-I.I's that operate upon or output various media formats.
1201 Polling. control. initialization. and configuration signals provided bvthe service provider (e.g.. a cable television nets ork operator. an Internet Service Provider, etc.) to the LTTUT are provided via a source signal selector 216. The source signal selector 216 ma-choose from among multiple available service provider sources and direct signals from the chosen source to the interface module 202 (note that the signals from the chosen source may in some implementations be directed to the retainer 210. which may comprise inputs and outputs common to all makes and models of Ul T 20-1. For example. the source signal selector 216 may choose signals from a particular headend or a cable t:
levision provider, depending upon the make model of the LPL I' 204. The source signal selector 216 may choose signals from different service providers depending on the type of L-LT
(e.g. set top box. game console, etc.). The source signal selector 216 roan comprise a configurable RF
attenuation control to stress the RF input of'the unit under test. This may be employed to detect anomalies on units failing when the RF level is below certain threshold levels.
[21 j A carousel server (OLL. e.g. a Motorola Oftline Loader. not shown in dra-ings) may be employed to load code objects on various set-top boxes. Deploting an OLL may increase the throughput olloading desired code objects independent from a service provider source. The signal selector 216 may be used in conjunction with the OLL to help prepare the set-top boxes with specific code objects.
[22] Either or both of the PMFB 206 or source signal selector 216 may determine the make and'or model of the tT-T 204. If the PMIFB 206 makes this determination.
it may in some embodiments communicate the make'model information to the source signal selector 216 and or direct the P1lIFB 206 to select a particular source. If the source signal selector 216 makes this determination. it may, in some embodiments. communicate the information the Ph=1FI3 206 and or direct the PNIFB 206 to select a particular source.
Media signals may be provided via a tunable RF channel from a local source 218, instead of from the provider network. The local source need not be "local" to the test svsteni. but may be any Source other than the service provider netriz ork. The local media test signals may be substituted for signals from the provider network (e.g. the provider signals may be filtered out and replaced). or the local signals may supplement the polling, control.
initialization, and configuration signals normally provided by the service provider.
[23] The source 218 of the local media test signals may be it separate server for this purpose.. and or the test analysis logic 208 or devices may provide the local media test signals. In some embodiments. the mediatest signals may be selected according to the make and or model of the Uf TT 204. The system maN include logic to apply the media test signals to the I- UT via a same physical medium as service provider configuration signals are applied to the [JUT. This logic may be comprised by the source signal selector 216, the pluggable interface module 202, the media format board 206, or some other device (e.g. an RF coupler in the signal path).
[24] Control signals that drive features ofthe I?FT 204 may be provided, for example by an IR port and or USB from the PyIFB 206. PCI or SPl control and data exchange may also be employed to interact with the LJL: f 204. The PMFB 206 may operate as a frame grabber which captures one or more frames output by the UT TT 204. buffers the captured frame(s).
converts them to a data stream, and transfers them to the testanalysis logic 208, for example via a USI3 interface.
[25 ] Logic to capture and process new updated or different media formats, or to interact Faith nee different makes and models ofUUT 204, may be dynamically loaded to the P-\1FB 206 by the test, analysis logic 208 or another device. Dynamic loading of logic to the P ~1FB 206 may be based upon a determination of the make and or model number of the U U T 204.
[26] A test platform employing features of the described test system embodiment(s) may be arranged in horizontal vertical, and or grid configurations. with one. two, four, eight, or up to 24 UUT test stations, to name some of the possibilities.
[27 FIG 3 illustrates an embodiment of a novel programmable multi-media format board. Various components readily apparent to those skilled in the art are omitted from the h-illustration for purposes of keeping the description concise. The board may be programmed with new. changed media processing logic via parallel port, USB, or other digital interfaces.
which may conunaunicate and store upgrades to SDRAM. FLASH memory (not shown).
or other volatile or nonvolatile program memory (e.g. memory of audio and video decoder blocks). Various board functions are coordinated using logic comprised by an FPGA.
EPROM, E'.EPRONI, ASIC. or other program memory storage. _A n IR port is available for communicating commands ,~i irelesslt to a I -T -T.
[28] The board has a capability to receive and decode various media formats, such as CUBS, Component. S-Video, IIDMI (high definition multimedia interface). SPDIF.
Digital audio. PCMI, Dolby. and DTS. A secure daughter board 222 may be used to decode and test HDMI signals. with the decoded result then passed to the MIFB. The HDMII
daughter board tests the signal to comply with HDCP (high bandwidth digital content protection). because the decoded HDMI signal cannot be passed to a PC. laptop. or other unsecure digital platform without violation of the IIDCP specification. The board may also have a capability -to receive and decode analog, SPDIF, optical signals. as well as RF signals (e.g. via coaxial cable).
1291 The board may comprise logic (e.g. in FPGA) to determine the make and model of a coupled UC T, and to adapt the applied media decoding logic accordingly. and to communicate the make and model information to a signal source for the 11 IT
(or cause the signal source to select a signal suitable to the make and or model of the (t T
). This make and model information may be obtained from the UUT. or from the pluggable interface module. or from another source. depending on the implementation.
[30] The board may comprise logic (e.g. in FPO .-\,) to adapt the applied media decoding logic based upon instructions from a signal source or other external device.
1311 "Logic'- refers to signals and or information embodied in circuits (e.g.
memory circuits) that may be applied to influence the operation of a device.
Soflcvarc. hardware. and firm ware are examples of logic. In general. logic may comprise combinations of software.
hardware. and.-or firmware.
[321 Those skilled in the art will appreciate that logic may be distributed throughout one or more devices, and or may be comprised of combinations of instructions in memory, processing capability, circuits, and so on. Therefore. in the interest of clarity and correctness loaac may not always be distinctly illustrated in drawings of devices and systems, although it is inherently present therein.
[33] The techniques and procedures described herein may- he implemented via logic distributed in one or more computing devices. The particular distribution and choice of logic is a design decision that will vary according to implementation.
[34] Those having skill in the art will appreciate that there are various logic implementations by which processes and or systems described herein can he effected (e.g., hardw-care_ software. and or firmware), and that the preferred vehicle will vary with the context in which the processes are deployed. For example. i# an implementer determines that speed and accuracy are paramount. the implementer may opt for a hardware and or firniNfare vehicle: alternati~cly, ifflexihility is paramount, the implementer may opt for a solely software implementation; or. vet again alternatively, the implementer may opt for some combination of hardware. software. and or firimvare. Bence, there are several possible vehicles by which the processes described herein may be effected, none of which is inherently superior to the other in that an~vchicle to be utilized is a choice dependent upon the context in which the vehicle wk Ill he deployed and the specific concerns (e.g., speed.
flexibility. or predictability) of the implementer, any of which may vary.
Those skilled in the art will recognize that optical aspects of implementations may involve optically-oriented hardware. softx~are. and or firtmyare.
[35] The foregoing detailed description has set forth various embodiments of the devices and, or processes via the use of block diagrams. flowcharts, ands or examples.
Insofar as such block diagrams. flowcharts. and or examples contain one or more functions and or operations, it will be understood as notorious by those uuithin the art that each function and or operation within such block diagrams, flowcharts, or examples can he implemented_ individually ands or collectively, by a wide range of hardware. software, firmware. or virtually any combination thereof Several portions of the subject matter described herein may be implemented via Application Specific Integrated Circuits (ASICs), Field Pro amenable Gate Arrays (FPGAs). digital signal processors (DSPs), or other integrated formats. Ilo.-ever, those skilled in the art will recognize that some aspects of the embodiments disclosed herein. in whole or in part, can be equivalently implemented in standard integrated circuits, as one or more computer programs running on one or more -R-computers (e.g.. as one or more programs running on one or more computer systems), as one or more programs running on one or more processors (e.g.. as one or more programs running on one or more microprocessors), as tirmwware. or as virtually-' any combination thereof; and that designing the circuitry and or writing the code for the software andor frmyy are would be well within the skill of one of skill in the art in light of this disclosure. In addition. those skilled in the art will appreciate that the tile clianiSills of the subject matter described herein are capable ol-being distributed as a program product in a variety of corms, and that an illustrative embodiment ofthe subject matter described herein applies equally regardless of the particular type of signal hearing media used to actually carry out the distribution. Examples of a signal bearing media include. but are not limited to. the folio wving: recordable type media such as floppy disks, hard disk drives- CD
ROMls, digital tape. and computer memory; and transmission type media such as digital and analog coniniunication links using TDyi or IP based communication links {e.g.. packet links), [361 In a general sense. those skilled in the art yvill recognize that the various aspects described herein Mhieh can be implemented. individually and or collectively, by a .Aide range of hardware. sottwware_ firmware. or any combination thereot'can be vieywed as being composed of various types of "electrical cii-cuitry." Conlsegttelitly, as used herein "electrical circuitry includes. but is not limited to. electrical circuitry having at least one discrete electrical circuit. electrical circuitry having at least one integrated circuit. electrical circuitry having at last one application specific integrated circuit. electrical circuitry forming a general purpose Computing device configured by a computer program (e.g., a general purpose computer configured by a computer program which at least partially carries out processes and or devices described herein, or a microprocessor configured by a computer-program which at least partially carries out processes and, or devices described herein)-electrical circuitry" forming a memory device (e.g., forms of random access memory), and or electrical circuitry forming a communications device (e.g.. a modem.
comnlumications switch, or optical-electrical equipment).
[371 Those skilled in the art ill recognize that it is common within the art to describe devices and/or processes in the fashion set forth herein. and thereafter use standard engineering practices to integrate such described devices and/or processes into larger systems. That is. at least a portion of the devices and or processes described herein can be integrated into a network processing system via a reasonable amount of experimentation.
[38] The foregoing described aspects depict dif'f'erent components contained within, or connected ~~ith, different other components. It is to he understood that such depicted architectures are merely exemplary. and that in fact many other architectures can be implemented which achieve the same finctionality. In a conceptual sense. any arrangement of components to achieve the same functionality is effectively "associated"
such that the desired functionality is achieved. Hence_ am,- to components herein combined to achieve a particular functionality can be seen as "associated with" each other such that the desired flnetionality is achieved, irrespective of architectures or interlnedial components. Likewise.
any two components so associated can also he vies-%ed as being "operable' connected", or "operably coupled". to each other to achieve the desired hinctionalit"
Claims (13)
1. A test system comprising:
logic to reformat media signals output by a device under test:
logic to receive the reformatted media signals and to analyze them for errors:
and a pluggable interface coupling the device under test to the logic to reformat the media signals.
logic to reformat media signals output by a device under test:
logic to receive the reformatted media signals and to analyze them for errors:
and a pluggable interface coupling the device under test to the logic to reformat the media signals.
2. The test system of claim 1. further comprising:
logic to analyze output signals of the unit under test to detect a make and or model of the unit under test.
logic to analyze output signals of the unit under test to detect a make and or model of the unit under test.
3. The test system of claim 2, further comprising:
logic to apply information about the make and or model of the unit under test to select service provider configuration signals for the unit under test.
logic to apply information about the make and or model of the unit under test to select service provider configuration signals for the unit under test.
4. The test system of claim 3. further comprising:
the service provider configuration signals applied to the unit under test via the pluggable interface.
the service provider configuration signals applied to the unit under test via the pluggable interface.
5. The test system of claim 1, further comprising:
a slide onto which the unit under test is mounted
a slide onto which the unit under test is mounted
6. The test system of claim 5. further comprising:
a control to move the slide to engage a mounted unit under test with the pluggable interface.
a control to move the slide to engage a mounted unit under test with the pluggable interface.
7. The test system of claim 1 further comprising:
logic to select analysis logic to apply to the reformatted media signals according to the make and or model of the unit under test.
logic to select analysis logic to apply to the reformatted media signals according to the make and or model of the unit under test.
8. The test system of claim 2. further comprising:
logic to select the logic to reformat the media signals according to the make and or model of the unit under test.
logic to select the logic to reformat the media signals according to the make and or model of the unit under test.
9. The test system of claim 1. further comprising:
logic to apply media test signals to the unit under test via the pluggable interlace module, the media test signals selected from a source other than a service provider network for the unit under test.
logic to apply media test signals to the unit under test via the pluggable interlace module, the media test signals selected from a source other than a service provider network for the unit under test.
10. The test system of claim 9, further comprising:
logic to select the media test signals according to a make and or model of the unit under test.
logic to select the media test signals according to a make and or model of the unit under test.
11. The test system of claim 1, further comprising:
a retainer to engage and disengage the pluggable interface to and from the test system.
a retainer to engage and disengage the pluggable interface to and from the test system.
12. The test system of claim 9, further comprising:
logic to apply the media test signals to the unit under test via a same physical medium as service provider configuration signals are applied to the unit under test.
logic to apply the media test signals to the unit under test via a same physical medium as service provider configuration signals are applied to the unit under test.
13. The test system of claim 1, further comprising:
the pluggable interface comprising an identification in non-volatile memory of a make and or model of unit under test with which it is compatible.
the pluggable interface comprising an identification in non-volatile memory of a make and or model of unit under test with which it is compatible.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA2739188A CA2739188C (en) | 2011-05-05 | 2011-05-05 | Method and system for automated test of multi-media user devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA2739188A CA2739188C (en) | 2011-05-05 | 2011-05-05 | Method and system for automated test of multi-media user devices |
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| CA2739188A1 true CA2739188A1 (en) | 2012-11-05 |
| CA2739188C CA2739188C (en) | 2020-04-14 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA2739188A Active CA2739188C (en) | 2011-05-05 | 2011-05-05 | Method and system for automated test of multi-media user devices |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10757002B2 (en) | 2016-11-10 | 2020-08-25 | Contec, Llc | Systems and methods for testing electronic devices using master-slave test architectures |
| US10779056B2 (en) | 2016-04-14 | 2020-09-15 | Contec, Llc | Automated network-based test system for set top box devices |
| US10846189B2 (en) | 2009-09-24 | 2020-11-24 | Contec Llc | Method and system for automated test of end-user devices |
-
2011
- 2011-05-05 CA CA2739188A patent/CA2739188C/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10846189B2 (en) | 2009-09-24 | 2020-11-24 | Contec Llc | Method and system for automated test of end-user devices |
| US10779056B2 (en) | 2016-04-14 | 2020-09-15 | Contec, Llc | Automated network-based test system for set top box devices |
| US10757002B2 (en) | 2016-11-10 | 2020-08-25 | Contec, Llc | Systems and methods for testing electronic devices using master-slave test architectures |
| US11509563B2 (en) | 2016-11-10 | 2022-11-22 | Contec, Llc | Systems and methods for testing electronic devices using master-slave test architectures |
Also Published As
| Publication number | Publication date |
|---|---|
| CA2739188C (en) | 2020-04-14 |
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