CA2264789A1

CA2264789A1 - Preamble for the assessment of channel impulse response in a antenna diversity system

Info

Publication number: CA2264789A1
Application number: CA002264789A
Authority: CA
Inventors: Weilin Liu
Original assignee: Individual
Current assignee: Ascom Systec AG
Priority date: 1996-09-04
Filing date: 1996-09-04
Publication date: 1998-03-12
Also published as: EP0931389A1; AU726748B2; AU6730596A; WO1998010531A1; JP2001504648A

Abstract

A preamble in a digital signal transmission system characterized by several different bit sequences (m1-m5) which are suited for packet synchronization and channel assessment. M-sequences with a length of, for instance, 31 bits are used advantageously and repeated three times. This enables antenna selection in a receiver. In addition the frequency offset can be determined on the basis of two sequences (54, 55) captured within a specific time period.

Description

ï»¿CA 02264789 1999-03-01PREAMBLE FOR THE ASSESSMENT OF CHANNEL IMPULSERESPONSE IN A ANTENNA DIVERSITY SYSTEMTechnical FieldThe invention relates to a preamble in a digital signal transmission system. The invention also relatesto a transmitter, a receiver, and a method for a digital signal transmission system with a preamble ofthe type referred to above.State of the ArtIt is known in the art that with regard to the transmission of blocks of data (burst signalling) thepreamble, required for clock and packet synchronization and located at the beginning of the block,is also used to make antenna selections for the purpose of switching diversity. In this context, duringthe reception of the preamble, the signal strength for the available antennas is measured, and theantenna signal with the best output is used for the data detection.P. E. Mogensen et al. propose such a receiver structure for DECT, for example, in the publicationIEEE VTC-95, pp. 514-519, âEvaluation of an Advanced Receiver Concept for DECT,â and deï¬nethe conditions for operating this system (DECT) in such a way that the occurrence of intersymbolinterference is precluded (at most there is fading).ETS 300 652 (ETSI 1995) deï¬nes the technical features for a wireless local high performancenetwork (Hlgh PErforrnance Radio Local Area Network = HIPERLAN). HIPERLAN is a shortrange communication subsystem with a high data transfer rate which typically has an occurrence ofintersymbol interference.Description of the InventionThe object of the invention is to formulate a preamble which is useï¬il for clock and packetsynchronization, as well as for antenna diversity, preferably for estimating the frequency offset.ï»¿CA 02264789 1999-03-012Furthermore, the preamble should also be easily ready for use in an environment with intersymbolinterference.The solution to this problem is deï¬ned in the characterizing features of claim 1. Thus, the signalaccording to the invention contains several different bit sequences, and each sequence is suited forclock and packet synchronization as well as channel estimations.Contrary to systems known in the art, the selected preamble as such does not feature optimalautocorrelation characteristics. Instead, the preamble consists of several short sequences optimizedfor speciï¬c purposes. Each of these sequences has good autocorrelation properties. Consequently,a sequential antenna selection (sequential antenna diversity) can be successfully realized.According to a preferred embodied example, the bit sequences are so-called m-sequences (i.e.maximum length sequences that can be generated, for example, with suitable feedback shift registers).A useful sequence length for the HIPERLAN standard is e.g. m = 31. However, shorter (e. g. m =15) or longer (e.g. m = 63) sequences are also easily possible. Moreover, synchronization bitpatterns, known, for example, from the GSM standard, can also be used instead of m-sequences.Preferably each sequence is repeated several times. The advantage here is the wide ï¬exibility whencalipering the sequences. In fact, it is not important with which bit the scanning process is initiatedas long as the border between two different sequences is not crossed. For example, if the sequencesare repeated three times, the receiver circuit has sufï¬cient time to select and evaluate one completebit pattern of the m-sequence. Naturally, it is not necessary to obtain the number of repetitions of thesequences in whole numbers. It is possible to discontinue the repetition process earlier (for example,after 1 â/2 or 2 â/2 repetitions the user may proceed with the next sequence). If a standard calls fora preamble to be of a certain length (e. g. HIPERLAN requires 450 bits), the repetition process canbe discontinued after the prescribed bit number has been reached.It is not required that all sequences be repeated equally often. The number of repetitions can dependon the available overall length for the preamble, and on the purpose or function allocated to a certainsequence.The receiver for the evaluation of the signal preamble according to the invention has several (i.e. atleast two), in particular, three different antennas at its disposal. Said antennas can be physicallycompletely separate, or constructively partially connected. For example, there are diversity antennaarrangements with minimal distances of less than 7Â»/2.In addition, a circuit is envisioned in the receiver in order to determine the best antenna signal. Thus,the charmel burst response is estimated for each antenna in order to ï¬nd, for example, the antennasignal with the shortest burst response for the actual data detection. A short burst response has theadvantage that, with respect to data detection, it is possible to work with less complex equalizers.Alternatively or in addition, the overall energy contained in the taps of the burst response can alsobe taken into consideration.ï»¿CA 02264789 1999-03-013Depending on the kind of subsequent data processing, the sequences of the preamble can also beevaluated with a suitable frequency offset estimation. This can be carried out, for example, incombination with an estimation of the channel burst response. It is essential for a frequency offsetevaluation, which is developed based on channel burst responses, that at least two burst responsesbe estimated with a predetermined time interval between estimations.Generation of the preamble according to the invention on the transmitter end can take place, forexample, by reading out the predetermined bit pattern from the read-only memory (ROM, EPROM,etc.) If m-sequences are used, several linear feedback shift registers (LFSR = Linear Feedback ShiftRegister) can be envisioned, which are called up one after the other by means of a switch. Therepetition of an m-sequence results automatically when the end of a bit interval is reached and theshift register continues to be clocked.Processing of the preamble according to the invention occurs as follows in the receiver:First, the different antenna signals are evaluated, one after the other, by scarming, respectively, acomplete m-sequence, and by estimating the charmel burst response.For further signal processing â by setting a switch â the antenna with the best reception is selected.Now follows the estimation of the burst response of the selected antenna and of the frequency offset,still in the context of the preamble. The result of this step will be the basis for the detection of thesubsequent data.The estimation of the charmel burst response (i.e. in connection with selecting an antenna as well asregarding the frequency offset) in the embodied example referred to above is repeated because forthe preferred frequency offset estimation, it is necessary to conduct 2 channel estimations with astrictly predetermined time interval between the two. Also, the estimation that is conducted for theantenna selection does not require as high a level of accuracy as does the later one for the datadetection.Based on the following detailed description and the entirety of the patent claims, other advantageousembodied examples and characterizing feature combinations of the invention are possible.Short Description of the DrawingsThe drawings which illustrate the embodied example show:Fig.1: A schematic depiction of a preamble according to the invention;Fig. 2: A block diagram of a receiver circuit for processing the preamble according to the invention;ï»¿CA 02264789 1999-03-014Fig. 3 A block diagram of a circuit apparatus on the transmitter end for generating a preamble inaccordance with the invention.Ways to Realize the InventionFig. 1 shows a preferred embodied example of the invention. Depicted is the preamble (specificallydefined for the system) followed by a data part (which contains the user data), and which is notdescribed in greater detail herein The preamble consists of 5 sections, al to a5. Each section iscomposed of three repetitions of an mâsequence, ml to m5. The length of the m-sequences is e. g.31 bits. Therefore, a section has a length of 93 bits, and the total length is 465 bits. For use withHIPERLAN, where the preamble is 450 bits long by deï¬nition, the ï¬nall 5 bits of the last m-sequencem5 can be omitted.Each section al to a5 contains a different maximum length sequence. Therefore, the periodicity ofthe overall sequence is minimal. The following succession is offered as an example (representationin the format of the generating polynomials):ml (x)=x5+x2+1m2(x)=x5+xâ+x3+x2+1m3(x)=x5+x4+x2+x+lm4(x)=x5+x3+1m5(x)=x5+x3+x2+x+lThe preamble according to ï¬g. 1 is calipered in the receiver (which, naturally, must recognize the m-sequences ml to m5 and the entire format), for example, as follows:In the sections al to a3, one sequence S1 to S3, respectively, of the length 31 (= length of the m-sequences) is calipered; between these sequences it is switched from one antenna to the next. Sincethe m-sequences are repeated three times in each section al to a3, it is not necessary to beginscanning at a specific point in time that is predetermined by the preamble. Rather, it is sufï¬cient tocaliper the predetermined number of bits at any location inside a given section. Therefore, forexample, the ï¬rst sequence S1 can begin with bit 17, the second with bit 108, and the third with bit199.Evaluation of these three sequences S1 to S3 results in the selection of the antenna with the bestreception. Subsequently, with the assistance of sequences S4 and S5, the channel burst response, andthe frequency offset is estimated for that antenna. The distance between the latter sequences S4 andS5 is selected so as to ensure good frequency offset estimations (the distance is e.g. 100 bits).Fig. 2 is a schematic representation of a block diagram of a receiver. For example, the receiver hasthree antennas, 1, 2,3. With a switch 4 it is possible to switch from one antenna to another. Thenfollows a switch 5 which directs the data ï¬ow either to the channel estimator 6, an estimator 8 forthe combined estimation of channel burst response and frequency offset, or a detector 9.ï»¿CA 02264789 1999-03-015In a ï¬rst step the antenna is selected. During this process the switch 4 is successively set for oneantenna after the other, and one entire m-sequence (sequences S1 to S3), respectively, is calipered.With the channel estimator 6 the strongest taps are determined for each antenna 1, 2, 3. Hereafter,the antenna selector 7 selects the antenna with the most favorable transmission quality. Then theswitch 4 is set accordingly to that antenna and remains at that setting for the subsequent processingof data.The documented output contained in the taps is used, for example, as a criterion for the selection ofthe antenna and/or the (low) amount of echos.With completion of the antenna selection, and in a second processing step, the switch 5 is set to theestimator 8. Now the two sequences S4 and S5 are calipered in order to obtain an estimation(preferably a combined estimation) of the channel burst response of the selected antenna, and of thefrequency offset. The result of this estimation is â during a third step â in fact used in detector 9 forthe detection of the data (which follow the preamble), and is directed toward detector 9 by settingthe switch 5 correspondingly.The implementation of the signal preamble shown in ï¬g. l on the transmitter end can be accomplishedwith circuit elements known in the art. Fig. 3, for example, shows a block diagram of a possiblecircuit on the transmitter end. The 5 different m-sequences are generated with 5 linear feedback shiftregisters, 10.1 to 10.5 (The corresponding polynomial description was presented earlier). With aswitch 11 the m-sequences are called up, one after the other, and given out for signal modulation.The switch position is maintained just long enough to give out the necessary number of repetitions.Once the preamble is complete, the switch 13 is set to the data encoder 12 in order to transmit theuser data.Instead of linear feedback shift registers, the use of a read-only memory is also possible. Said read-only memory would contain the entire bit pattern of the preamble.The invention is used, in particular, with HIPERLAN. However, other applications are conceivable;speciï¬cally, the length of the m-sequences and the number of repetitions can be established forindividual applicable needs and/or requirements. M-sequences are preferred, in particular, becausethey are well suited for a combined estimation of channel burst response, and frequency offset.Naturally, other sequences with good autocorrelation characteristics can also be used. The essentialaspect for the invention is, however, that instead of a single, large synchronization sequence, severalshort ones are used. Thus different sequences with optimum properties for different functions canbe utilized.In summary, it can be stated that, with the bit pattern according to the invention, it is possible tooptimally implement an antenna diversity with high data transmission rates and in the presence ofintersymbol interference.

Claims

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS.

1. Preamble in a digital signal transmission system, which is used both for packet synchronization and channel estimation, characterized by several different autocorrelation bit sequences (m1-m5), each of which is repeated numerous times.

2. Preamble according to Claim #1, characterized in that the bit sequences (m1-m5) are maximal length sequences in particular of a length of about 31.

3. Preamble according to Claim #1 or #2, characterized in that the bit sequences (m1-m5) are repeated three times.

4. Digital signal transmission system with a transmitter and a receiver, comprising a) read-only memory in the transmitter with a memorized bit sample to generate and transmit a preamble, b) several antennae (1, 2, 3) in the receiver as well as a switch (4) for sequential dial-up of the antennae (1, 2, 3), c) a channel pulse response estimating device (6) to determine a channel pulse response by evaluating at least one bit sequence (S1-S3) of the transmitting preamble, d) an evaluating device (7) to determine the best channel pulse response to later be able to detect a data division via the antenna (1 or 2 or 3) with the best reception, e) a circuit to execute the packet synchronization based on the transmitted preamble, characterized in that f) the preamble is formed by several different autocorrelation bit sequences (m1-m5), each of which is repeated multiple times.

5. Signal transmission system according to Claim #4, characterized in that the evaluating device (7) is designed to determine the shortest channel pulse response.

6. Signal transmission system according to Claim #4 or #5, characterized by a circuit (8) to determine the frequency offset.

7. Transmitter for a digital signal transmission system with read-only memory with a memorized bit sample or a circuit to generate and transmit a preamble whose purpose consists of being utilized both for packet synchronization and for channel estimation in the receiver, characterized in that the preamble is formed by several different autocorrelation bit sequences (m1-m5), each of which is repeated numerous times.

8. Transmitter according to Claim #7, characterized in that the bit sequences (m1-m5) are m-sequences, in particular of a length of 31.

9. Procedure for the operation of a digital signal transmission system on which a) a preamble is transmitted from a transmitter to a receiver along with data, b) the receiver switches between several antennae (1, 2, 3) sequentially during reception of the preamble, c) a channel pulse response is determined for each antenna, d) the antenna (1 or 2 or 3) with the best channel pulse response is selected for successive detection of data, e) the transmitted preamble is utilized for the execution of packet synchronization, characterized in that f) the preamble is formed by several different autocorrelation bit sequences (m1-m5), each of which is repeated several times, g) a channel pulse response is determined based on each sequence (S1-S3) h) with a complete sequence (S1-S3) being measured for each antenna (1, 2, 3).

10. Procedure according to Claim #9, characterized in that the antenna (1 or 2 or 3) with the shorted channel pulse response is selected.

11. Procedure according to Claim #9 or #10, characterized in that a frequency offset is determined on the basis of two estimations of the channel pulse response that are conducted at intervals.