CA2185847A1 - Method and apparatus for encoding and decoding digital signals - Google Patents
Method and apparatus for encoding and decoding digital signalsInfo
- Publication number
- CA2185847A1 CA2185847A1 CA002185847A CA2185847A CA2185847A1 CA 2185847 A1 CA2185847 A1 CA 2185847A1 CA 002185847 A CA002185847 A CA 002185847A CA 2185847 A CA2185847 A CA 2185847A CA 2185847 A1 CA2185847 A1 CA 2185847A1
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- trellis
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-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/251—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with block coding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/253—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with concatenated codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/256—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with trellis coding, e.g. with convolutional codes and TCM
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/3961—Arrangements of methods for branch or transition metric calculation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0054—Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/136—Reed-Muller [RM] codes
Abstract
A method of encoding a digital signal comprising a sequence of digital words, each comprising a first portion and a second portion, comprises the steps of successively encoding respective first portions using a trellis code to produce a corresponding sequence of trellis-encoded words, using each of the trellis-coded words to select one of a plurality of subcodes of a block code, and using the selected subcode to encode the corresponding second portion of the digital word corresponding sequentially to the trellis-coded word used to select the subcode, thereby providing a sequence of codewords corresponding to the sequence of digital words. After transmission and/or storage, a sequence of codeword vectors comprising the codewords and noise may be decoded by operating upon each of the sequence of codeword vectors using a decoder for each of the subcodes to produce, for each subcode, an estimated decoded second portion and ametric representing the likelihood that the estimated decoded second portion is correct, given that the assumed subcode is correct; using a trellis decoder, operating upon the sequence of likelihood metrics and the associated estimated second portions to provide a sequence of estimated first portions; and associating with each of the estimated first portions the corresponding estimated second portion, thereby providing a sequence of output digital words corresponding to the sequence of digital words originally encoded.
The block code may comprise a Kerdock code, the subcodes being cosets of the Reed-Muller code. The decoder may then comprise a Fast Hadamard Transform unit and a Viterbi algorithm decoder.
The block code may comprise a Kerdock code, the subcodes being cosets of the Reed-Muller code. The decoder may then comprise a Fast Hadamard Transform unit and a Viterbi algorithm decoder.
Description
2~8~847 Method and Apparatus for Encoding and Decoding Digital Signals The invention relates to a method and apparatus for encoding and decoding digital signals. The invention is especially, but not exclusively, applicable to ~
systems which employ spread spectrum techniques, such as direct-sequence, code-5 division multiple access (DS-CDMA), systems and the like.
One reason for using spread-spectrum techniques in digital .
systems is to reduce r Wl~. In direct-sequence, code-division multiple access systems (DS-CDMA) where the same spectrum is sh~ared by signals of multiple users, each using a unique code, the ' ~ e is mainly due to signals of other users. The10 number of users that can be ~ - ' ' is limited by the desired grade of service.
Improving the reliability of data; in such systems allows the system capacity to be increased.
Early spread-spectrum systems used pseudo-random number sequences to expand the bandwidth occupied by the particular user's signal, but it is now recognised that 15 improved system pc;lr can be obtained by using error control coding for both signal spreading and error control. It has been proposed to use for this purpose very low rate codes based upon the co..,l.;.~ of ~,ullvuluLi~ and block codes. A
CtJ.lv. ' l code provides an output symbol sequence that can be expressed as theconvolutions of the input bit sequence with the code generators. A co..v~ ' ~ n~ encoder 20 thusprovidesoutputsumswhicharemovingweightedsumsofthe;llrlllll l;~."sequence encoded. Various examples have been disclosed. Thus, A.J. Viterbi described the application of so-called orthogonal .,u,lvvlulional codes to spread spectrum in an article entitled "Very Low Rate GJl-v.Jlu~iollal Codes for Maximum Theoretical P~,~ru~ ul~
of Spread-Spectrum Multiple-Access Channels", IEEE Journal on Selected Areas in 25 ~'~ s, Volume 8, No. 4, pp 641- 649, May 1990. K. Rikkinen disclosed b;~,. Lhog~ l convolutional coding for a DS-CDMA radio c. .. r.. , ~ system in an article entitled "Comparison of Very Low Rate Coding Methods for CDMA Radio ~ System", Third Ti.~ 1 Symposium on Spread-Spectrum Techniques and Arrii~s~tinnc University of Oulu, Oulu, Finland, July 1994. A "super-30 orthogonal" CtJ,lv, ' l code was disclosed by E. Zehavi and A.J. Viterbi in "On NewClasses of Orthogonal Cu~lv. ' I Codes", (~ , Control and Signal Processing, Elsevier Science Publishers, 1990. These codes are based upon the ~ n of a lineiar UJI-voluLiOildl code with a Hadamard Code or a first order .. , . . . . . .. .. . . .. ~
218~7 Reed-Muller code. An error control code specified in Qualcomm's Interim Standard (IS
95) (Proposed EIA/TIA Wideband Spread Spectrum) consists essentially of the of a cu..v. ' ' code of constraint length 9 and rate 1/3 with a Hadamard code.
S In an article entitled "Channel Coding with Multi-Level/Phase signals", IEEE
Tr~n~ n~ on Inru~ iu~ Theory, Volume IT-28, No. 1, January 1982, G.
Ungerboeck proposed using a trellis code to select different subsets of a large signal cl~n ~ n and mentioned the possibility of assigning short block code words to state transitions in a trellis structure. Although U-~ bucck's coding scheme might be 10 s~ ro~tuly in some situations, it is not entirely s.~ hcluly where bandwidth expansion is involved, such as in spread-spectrum systems. As reported by G.D. Boudreau et al in "A Comparison of Trellis-Coded Versus Cu.-v, ' 'Iy-Coded Spread Spectrum Multiple-Access Systems" IEEE Journal on Selected Areas in C~ - Vol. 8, No. 4, 1990, low rate codes would usually give better pc, rwllld.lce in CDMA systems.
Although these previously-proposed coding schemes might provide better . ro, .. - ~e than early systems, especially those using pseudo random number sequences, there is still room for hl~,uluv~u~
An object of the present invention is to provide an improved method and apparatus for encoding/decoding digital signals which, as compared witb known coding 20 schemes for CDMA systems, gives improved reliability and bit error rates for a given signal-to-noise ratio or, conversely, reduced required signal-to-noise ratio to achieve a given bit error rate.
According to one aspect of tbe present invention, there is provided a method of encoding a digital signal comprising a sequence of digital words, each comprising a first 25 portion and a second portion, to provide a cullu,uu.lJi.lg sequence of codewords, supplying the sequence of codewords to a i or storage medium, extracting a cwl. r " ~ sequence of codeword vectors from the i or storage medium, and decoding the sequence of codeword vectors to extract the originally-encoded sequence of digital words;
30 the encoding comprising the sequential steps of:
using a trellis code, ~U~CeD~;VdY encoding respective first portions of the sequence of digital words to produce a uu~,"~unl;l.~, sequence of trellis-encoded words, each of the trellis-encoded words cull~Jun.l;..g, in the sequence, to one of the digital ,,,,,,,,, ... ,, . ,, . ,,, . .,, .. ,, . . ,, .. ... _ . . . . ... ..
2~8~4~
words;
using each trellis-encoded word to select a CUII~"~II li..6 one of a plurality of subcodes of a block code;
and Susing the selected subcode to encode the second portion of the Wll~,D~Undil.6 digital word;
the decoding comprising the steps of;
operating upon each of the codeword vectors using a decoder for each of the subcodes to produce, for each subcode, an estimated decoded second portion and a10 metric ICi~UI~D~I~t;llg the likelihood that the estimated decoded second portion is correct, given that the assumed subcode is correct;
using a trellis decoder, operating upon the sequence of likelihood metrics and the associated estimated second portions to provide a sequence of estimated first portions;
and 15associating with each of the estimated first portions the UUII~ r ng estimatedsecond portion thereby providing a sequence of output digital words CWI~ UmI;II6 to the sequence of digital words originally encoded.
According to a second aspect of the present invention, a method of encoding a digital signal comprising a sequence of digital words, each comprising a first portion and 20 a second portion, to provide a CUII~D~ ' lg sequence of codewords, comprises the sequential steps of:
using a trellis code, Du.,c~,D~;~/d~ encoding respective first portions of the sequence of digital words to produce a ~ullt;~r ' ~ sequence of trellis-encoded words, each of the trellis-encoded words ~ull. r' ." in the sequence, to one of the digital words;
using each trellis-encoded word to select a ~;u--~one of a plurality of subcodes of a block code;
and using the selected subcode to encode the second portion of the UOll~_r ~- ,, digital word.
According to a third aspect of the invention, there is provided a method of decoding a sequence of codeword vectors formed by encoding a sequence of digitalwords in accu.,' with the method of the above-mentioned first aspect, comprising the , . . _ _, . . .. . . . . . .. . .
~ 2 1 ~
steps of;
operating upon each of the codeword vectors using a decoder for each of the subcodes to produce, for each subcode, an estimated decoded second portion and ametric lt~ the likelihood that the estimated decodcd second portion is correct, 5 given that the assumed subcode is correct;
using a trellis decoder, operating upon the sequence of likelihood metrics and the associated estimated second portions to provide a sequence of estimated first portions;
and associating with each of the estimated first portions the COI~ J " estimated 10 second portion thereby providing a sequence of output digital words ~.UI 1~ r ~ ' lg to the sequence of digital words originally encoded.
According to a fourth aspect of the invention, there is provided apparatus for encoding a digital signal comprising a sequence of digital words. each comprising a first portion and a second portion, to provide a cu-l~ol,Jil.5 sequence of codewords, 15 supplying the sequence of codewords to a i or stosge mcdium, extracting a cc..,, ' sequence of codeword vectors from the i or storage medium, and decoding the sequence of codeword vectors to extract the originally-encoded sequence of digital words;
the apparatus comprising an encoder ~
a trellis code unit for ~u~ ly encoding respective first portions of the sequence of digital words to produce a cu -. r " sequence of trellis-encoded words, each of the trellis-encoded words cull. r " ~ in the sequence, to one of the digital words;
a block code unit for encoding respective second portions of the digital words to 25 provide codewords from the selected ones of subcodes of the block code, the block code unit being controllable to use selected ones of a plurality of subcodes of the block code for such encoding; and selector means responsive to the sequence of trellis-encoded words for controlling the block code unit to select, for each trellis-encoded word output from the trellis code 30 unit, a c~ -sr ' g one of the plurality of subcodes;
the apparatus further comprising a decoding unit, i~
means for operating upon each of the sequence of codeword vectors using a decoder for each of the subcodes to prûduce, for each subcode, an estimated decoded , . , .. ... , ., . , . ,, ., . , . , ,, . , . ,, , .. ,, . , . , ,, ,,, .. , , ., ,,, , . _ . .... .. ..... .
2~8~7 s second portion and a metric IC,~ g the likelihood that the estimated decoded second portion is correct, given that the assumed subcode is correct;
a trellis decoder unit having means for operating upon the sequence of likelihood metrics and the associated estimated second portions to provide a sequence of estimated S frst portions;
and means for associating with each of the estimated first portions the ~,UIIC;~I)Ulldiilg estimated second portion thereby to provide a se~uence of output digital words CWIU~JOn~ S to the sequence of digital words originally encoded.
According to a fifth aspect of the invention, there is provided apparatus for encoding a digital signal comprising a sesuence of digital words, each comprising a first portion and a second portion, to provide a ~ g sequence of codewords, ~ U~
a trellis code unit for successively encoding respective frst portions of the 15 sequence of digital words to produce a cu... r ''' ,, sequence of trellis-encoded words, each of the trellis-encoded words Culll -r ~ ~' ~" in the sequence, to one of the digital words;
a block code unit for encoding respective second portions of the digital words to provide codewords from the selected ones of subcodes of the block code, the block code 20 unit being ull~.I,lc to use selected ones of a plurality of subcodes of the block code for such encoding; and selector means responsive to the sequence of trellis-encoded words for controlling the block code unit to select, for each trellis-encoded word output from the trellis code unit, a Cull~ ulld;l.6 one of the plurality of subcodes.
According to a sixth aspcct of the invention, there is provided a decoder for decoding codeword vectors provided by the apparatus of the abovc-~ -' fifth aspect, the decoder c, means for operating upon each of the codeword vectors using a decoder for each of the subcodes to produce, for each subcode, an estimated decoded second portion and 30 a metric l~ g the likelihood that the estimated decoded second portion is correct, given that the assumed subcode is correct;
a trellis decoder unit having means for operating upon the sequence of likelihood metrics and the associated estimated second portions to provide a sequence of estimated .. . . . ..... . ...... .. . ..... ... _ .. .. .. . ..... .. .. _ _ . . . .
~18~ s first portions;
and means for associating with each of the estimated first portions the ~;Ull~ -r ~' ..
estimated second portion thereby to provide a sequence of output digital words 5 cull~,,,,L,o,lding to the sequence of digital words originally encoded.
In the context of this ~ I;n~ a trellis code is a code whose output is dependent upon its current input and a fixed finite number of past inputs. Such a trellis code may be a convolutional code, the d~ .dt:n~,y being linear (a weighted sum).Preferably, the subcodes are all cosets of each other, the coded words then 0 CUll-_r '-1~, to coset leaders.
In a preferred ~ ,I ,o~l;, r ~I the block code comprises a Kerdock code partitioncd into cosets including a first-order Reed-Muller code. Then, the second portion of the digital word is encoded using a Reed-Muller encoder and the coset leader is added to the Rced-Muller encoded word to provide the codeword.
Various features, objects and advantages of the present invention will become more apparent from the following detailcd description of el~ '' of the inventionwhich are described by way of example only and with reference to the accù.,l~allyh~
drawings.
Figure 1 illustrates the concept of the present invention as applied to the encoding 20 of a se~uence of digital words using a trellis code and selected subcodes of a large block code;
Figures 2A and 2B represent trellis structures for the trellis code per se and for the encoder itself;
Figure 3 is a block schematic lc;~lI,~IILdLiull of a first "".l,o~lh"~ ~l of an encoder 25 according to the invention;
Figure 4 illustrates a trellis structure for the, ~: " of Figure 3;
Figure 5 is a block schematic IC;~ nn of a second . ~ " of an encoder according to the invention; and Figure 6 is a block schematic l~ of a decoder for decoding the code 30 words from either e...l~- ' of encoder to determine the original digital word.
Referring now to Figure 1, an encoder for encoding digital words, each comprising a first portion having b-bits and a second portion having m+l bits, comprises a block code unit 10 for generating codewords of a low-rate block code. The . : 4 ~ 21~
low-rate block code is partitioned into subcodes Bo to B,, each subcode comprising a plurality of n-bit codewords. Although eight subcodes Bo to B7 are illustrated in Figure 1, this is an arbitrary number for illustration only. The encoder also comprises a Jd sel~Li..g trellis code unit 11, the possible outputs of which select the subcodes 5 Bo-B7. The ' ' sel~li.,g trellis code unit 11 has a constraint length K. The first group of b bits of each digital word in the series are applied to the subcode-selecting trellis code unit 11, which encodes them to produce a cu~ D~JolsJ .lg series of trellis-encoded words. Each of the trellis-encoded words selects a ~;ull~,D~undil.t one of the subcodes Bo-B7 of the block code, which is used to encode the remaining m+l bits of 10 the same digital word to provide an n-bit codeword for output from the encoder. Thus, each second portion of m+l bits is applied to the block encoder 10 to select one of the codewords of the selected one of the subcodes Bo-B7. In the specific ~,..lbod to be described with reference to Figures 2 - S, n is much larger than both b and m. The overall code rate is m+b+ 1 and is i..d~,~ ' of the constraint length K of the trellis 15 code.
Referring now to Figures 2A and 2B, the trellis structure of the encoder of Figure 1, shown in Figure 2B, can be derived by replacing each of the branches of the primary trellis structure of subcode-selecting trellis code unit 11, shown in Figure 2A, by a set of parallel branches, each ~ , one of the codewords of the ~ ' g one 20 of the subcodes ~0 to ~7. Although Figure 2b shows a different subcode between each state transition, in practice it would be possible to have the same subcode between two different state transitions. For purposes of il' nn, Figure 2 shows eight parallel branches for each state transition.
Two practical . I " of the encoder will now be described, one designed 25 for simple cu..~llu~lion amd the other for better ~. ' Both use a trellis code which comprises a cu..~,lutiun~l code and a large block code which comprises a so-called Kerdock code as disclosed by A.M. Kerdock in an article entitled "A Class of Low-Rate Nonlinear Binary Codes," Infor~nation and Control, Vol. 20, pp 182-187 (1972). The Kerdock code is a non-linear binary block code with 22m codewords, each 30 of length 2m. Its minimum IIamming distance is 2~ 2 2 , It can also be viewed 2 ~ 7 as the union of the first-order Reed-Muller code (of size 2m+') and 2m-' - 1 of its cosets.
The coset leaders are bent functions with the added property that the sum of any two coset leaders is again a bent function.
Thus, in the following l,...JOI' ', the subcodes are the first-order Reed-MullerS cosets in the Kerdock code and the wllvulutiull~l code generates coset leaders which, when combined with the outputs of the Reed-Muller encoder, give the required codewords.
The trellis code is designed to ensure that the free distance of the overall code is greater than or equal to the minimum Hamming distance of the coset codes. The 10 Kerdock code has a minimum Hamming distance dbloCj~=2m-1-2 2 and the Reed-Muller code has a minimum Hamming distance dl~bCOd6'= 2m 1, so it follows that the cosd sclv~ L;..g trellis code must have a modified free distance dmr 2 2 .
The modified free distance dmf of the code is the minimum modified distance 20 between any two distinct paths in its primary trellis. The modified distance between any two branches ,BI and ~/32 in the primary trellis having ~u~ ul~Jil.~, coset leaders 2~1 and is defined as dm(~ 2) = ~ i f A,; ~
If the minimum Hamming distance of the block code is dblock and the minimum~5 Hamming distance of the subcode is ds~bc~dc~ then the free distance of the encoder is d,;.~ = min{dSabcOd~, dblock x d~
The minimum Hamming distance of the coset codes depends upon the ~Jdl~i~iU~ of the large block code whereas d" f depends upon the co~t ~l~ting trellis code. The objective 21~3~7 is to partition the block code such that dlrb~r,dc > db~c~ and use a cosct scl~ling code such that dmf x db,oc~ 2 ds~bcor.~ The asymptotic coding gain of the resulting encoder over the block code is improved by the ratio of df,Cc/d6loc~. For more details, the reader is directed to the article "Combined Trellis/Reed-Muller Coding for CDMA", J.P. Chaib, H. Leib, 5 PlV~.~i;..~,i~ of the Sixth T I Symposium on Personal, Indoors and Mobile Radio C~ ~ , Toronto, Canada, 1995, which is i~ul~ ' herein by reference.
The following general rules can be used to construct good coset-selecting trellis codes with b inputs:
1. All coset leaders should occur with the same frequency, so that if all datasequences are equally likely, then all codewords are generated with equal probability.
2. The modified free distance must satisfy dmf 2 dr~odJdb~
systems which employ spread spectrum techniques, such as direct-sequence, code-5 division multiple access (DS-CDMA), systems and the like.
One reason for using spread-spectrum techniques in digital .
systems is to reduce r Wl~. In direct-sequence, code-division multiple access systems (DS-CDMA) where the same spectrum is sh~ared by signals of multiple users, each using a unique code, the ' ~ e is mainly due to signals of other users. The10 number of users that can be ~ - ' ' is limited by the desired grade of service.
Improving the reliability of data; in such systems allows the system capacity to be increased.
Early spread-spectrum systems used pseudo-random number sequences to expand the bandwidth occupied by the particular user's signal, but it is now recognised that 15 improved system pc;lr can be obtained by using error control coding for both signal spreading and error control. It has been proposed to use for this purpose very low rate codes based upon the co..,l.;.~ of ~,ullvuluLi~ and block codes. A
CtJ.lv. ' l code provides an output symbol sequence that can be expressed as theconvolutions of the input bit sequence with the code generators. A co..v~ ' ~ n~ encoder 20 thusprovidesoutputsumswhicharemovingweightedsumsofthe;llrlllll l;~."sequence encoded. Various examples have been disclosed. Thus, A.J. Viterbi described the application of so-called orthogonal .,u,lvvlulional codes to spread spectrum in an article entitled "Very Low Rate GJl-v.Jlu~iollal Codes for Maximum Theoretical P~,~ru~ ul~
of Spread-Spectrum Multiple-Access Channels", IEEE Journal on Selected Areas in 25 ~'~ s, Volume 8, No. 4, pp 641- 649, May 1990. K. Rikkinen disclosed b;~,. Lhog~ l convolutional coding for a DS-CDMA radio c. .. r.. , ~ system in an article entitled "Comparison of Very Low Rate Coding Methods for CDMA Radio ~ System", Third Ti.~ 1 Symposium on Spread-Spectrum Techniques and Arrii~s~tinnc University of Oulu, Oulu, Finland, July 1994. A "super-30 orthogonal" CtJ,lv, ' l code was disclosed by E. Zehavi and A.J. Viterbi in "On NewClasses of Orthogonal Cu~lv. ' I Codes", (~ , Control and Signal Processing, Elsevier Science Publishers, 1990. These codes are based upon the ~ n of a lineiar UJI-voluLiOildl code with a Hadamard Code or a first order .. , . . . . . .. .. . . .. ~
218~7 Reed-Muller code. An error control code specified in Qualcomm's Interim Standard (IS
95) (Proposed EIA/TIA Wideband Spread Spectrum) consists essentially of the of a cu..v. ' ' code of constraint length 9 and rate 1/3 with a Hadamard code.
S In an article entitled "Channel Coding with Multi-Level/Phase signals", IEEE
Tr~n~ n~ on Inru~ iu~ Theory, Volume IT-28, No. 1, January 1982, G.
Ungerboeck proposed using a trellis code to select different subsets of a large signal cl~n ~ n and mentioned the possibility of assigning short block code words to state transitions in a trellis structure. Although U-~ bucck's coding scheme might be 10 s~ ro~tuly in some situations, it is not entirely s.~ hcluly where bandwidth expansion is involved, such as in spread-spectrum systems. As reported by G.D. Boudreau et al in "A Comparison of Trellis-Coded Versus Cu.-v, ' 'Iy-Coded Spread Spectrum Multiple-Access Systems" IEEE Journal on Selected Areas in C~ - Vol. 8, No. 4, 1990, low rate codes would usually give better pc, rwllld.lce in CDMA systems.
Although these previously-proposed coding schemes might provide better . ro, .. - ~e than early systems, especially those using pseudo random number sequences, there is still room for hl~,uluv~u~
An object of the present invention is to provide an improved method and apparatus for encoding/decoding digital signals which, as compared witb known coding 20 schemes for CDMA systems, gives improved reliability and bit error rates for a given signal-to-noise ratio or, conversely, reduced required signal-to-noise ratio to achieve a given bit error rate.
According to one aspect of tbe present invention, there is provided a method of encoding a digital signal comprising a sequence of digital words, each comprising a first 25 portion and a second portion, to provide a cullu,uu.lJi.lg sequence of codewords, supplying the sequence of codewords to a i or storage medium, extracting a cwl. r " ~ sequence of codeword vectors from the i or storage medium, and decoding the sequence of codeword vectors to extract the originally-encoded sequence of digital words;
30 the encoding comprising the sequential steps of:
using a trellis code, ~U~CeD~;VdY encoding respective first portions of the sequence of digital words to produce a uu~,"~unl;l.~, sequence of trellis-encoded words, each of the trellis-encoded words cull~Jun.l;..g, in the sequence, to one of the digital ,,,,,,,,, ... ,, . ,, . ,,, . .,, .. ,, . . ,, .. ... _ . . . . ... ..
2~8~4~
words;
using each trellis-encoded word to select a CUII~"~II li..6 one of a plurality of subcodes of a block code;
and Susing the selected subcode to encode the second portion of the Wll~,D~Undil.6 digital word;
the decoding comprising the steps of;
operating upon each of the codeword vectors using a decoder for each of the subcodes to produce, for each subcode, an estimated decoded second portion and a10 metric ICi~UI~D~I~t;llg the likelihood that the estimated decoded second portion is correct, given that the assumed subcode is correct;
using a trellis decoder, operating upon the sequence of likelihood metrics and the associated estimated second portions to provide a sequence of estimated first portions;
and 15associating with each of the estimated first portions the UUII~ r ng estimatedsecond portion thereby providing a sequence of output digital words CWI~ UmI;II6 to the sequence of digital words originally encoded.
According to a second aspect of the present invention, a method of encoding a digital signal comprising a sequence of digital words, each comprising a first portion and 20 a second portion, to provide a CUII~D~ ' lg sequence of codewords, comprises the sequential steps of:
using a trellis code, Du.,c~,D~;~/d~ encoding respective first portions of the sequence of digital words to produce a ~ullt;~r ' ~ sequence of trellis-encoded words, each of the trellis-encoded words ~ull. r' ." in the sequence, to one of the digital words;
using each trellis-encoded word to select a ~;u--~one of a plurality of subcodes of a block code;
and using the selected subcode to encode the second portion of the UOll~_r ~- ,, digital word.
According to a third aspect of the invention, there is provided a method of decoding a sequence of codeword vectors formed by encoding a sequence of digitalwords in accu.,' with the method of the above-mentioned first aspect, comprising the , . . _ _, . . .. . . . . . .. . .
~ 2 1 ~
steps of;
operating upon each of the codeword vectors using a decoder for each of the subcodes to produce, for each subcode, an estimated decoded second portion and ametric lt~ the likelihood that the estimated decodcd second portion is correct, 5 given that the assumed subcode is correct;
using a trellis decoder, operating upon the sequence of likelihood metrics and the associated estimated second portions to provide a sequence of estimated first portions;
and associating with each of the estimated first portions the COI~ J " estimated 10 second portion thereby providing a sequence of output digital words ~.UI 1~ r ~ ' lg to the sequence of digital words originally encoded.
According to a fourth aspect of the invention, there is provided apparatus for encoding a digital signal comprising a sequence of digital words. each comprising a first portion and a second portion, to provide a cu-l~ol,Jil.5 sequence of codewords, 15 supplying the sequence of codewords to a i or stosge mcdium, extracting a cc..,, ' sequence of codeword vectors from the i or storage medium, and decoding the sequence of codeword vectors to extract the originally-encoded sequence of digital words;
the apparatus comprising an encoder ~
a trellis code unit for ~u~ ly encoding respective first portions of the sequence of digital words to produce a cu -. r " sequence of trellis-encoded words, each of the trellis-encoded words cull. r " ~ in the sequence, to one of the digital words;
a block code unit for encoding respective second portions of the digital words to 25 provide codewords from the selected ones of subcodes of the block code, the block code unit being controllable to use selected ones of a plurality of subcodes of the block code for such encoding; and selector means responsive to the sequence of trellis-encoded words for controlling the block code unit to select, for each trellis-encoded word output from the trellis code 30 unit, a c~ -sr ' g one of the plurality of subcodes;
the apparatus further comprising a decoding unit, i~
means for operating upon each of the sequence of codeword vectors using a decoder for each of the subcodes to prûduce, for each subcode, an estimated decoded , . , .. ... , ., . , . ,, ., . , . , ,, . , . ,, , .. ,, . , . , ,, ,,, .. , , ., ,,, , . _ . .... .. ..... .
2~8~7 s second portion and a metric IC,~ g the likelihood that the estimated decoded second portion is correct, given that the assumed subcode is correct;
a trellis decoder unit having means for operating upon the sequence of likelihood metrics and the associated estimated second portions to provide a sequence of estimated S frst portions;
and means for associating with each of the estimated first portions the ~,UIIC;~I)Ulldiilg estimated second portion thereby to provide a se~uence of output digital words CWIU~JOn~ S to the sequence of digital words originally encoded.
According to a fifth aspect of the invention, there is provided apparatus for encoding a digital signal comprising a sesuence of digital words, each comprising a first portion and a second portion, to provide a ~ g sequence of codewords, ~ U~
a trellis code unit for successively encoding respective frst portions of the 15 sequence of digital words to produce a cu... r ''' ,, sequence of trellis-encoded words, each of the trellis-encoded words Culll -r ~ ~' ~" in the sequence, to one of the digital words;
a block code unit for encoding respective second portions of the digital words to provide codewords from the selected ones of subcodes of the block code, the block code 20 unit being ull~.I,lc to use selected ones of a plurality of subcodes of the block code for such encoding; and selector means responsive to the sequence of trellis-encoded words for controlling the block code unit to select, for each trellis-encoded word output from the trellis code unit, a Cull~ ulld;l.6 one of the plurality of subcodes.
According to a sixth aspcct of the invention, there is provided a decoder for decoding codeword vectors provided by the apparatus of the abovc-~ -' fifth aspect, the decoder c, means for operating upon each of the codeword vectors using a decoder for each of the subcodes to produce, for each subcode, an estimated decoded second portion and 30 a metric l~ g the likelihood that the estimated decoded second portion is correct, given that the assumed subcode is correct;
a trellis decoder unit having means for operating upon the sequence of likelihood metrics and the associated estimated second portions to provide a sequence of estimated .. . . . ..... . ...... .. . ..... ... _ .. .. .. . ..... .. .. _ _ . . . .
~18~ s first portions;
and means for associating with each of the estimated first portions the ~;Ull~ -r ~' ..
estimated second portion thereby to provide a sequence of output digital words 5 cull~,,,,L,o,lding to the sequence of digital words originally encoded.
In the context of this ~ I;n~ a trellis code is a code whose output is dependent upon its current input and a fixed finite number of past inputs. Such a trellis code may be a convolutional code, the d~ .dt:n~,y being linear (a weighted sum).Preferably, the subcodes are all cosets of each other, the coded words then 0 CUll-_r '-1~, to coset leaders.
In a preferred ~ ,I ,o~l;, r ~I the block code comprises a Kerdock code partitioncd into cosets including a first-order Reed-Muller code. Then, the second portion of the digital word is encoded using a Reed-Muller encoder and the coset leader is added to the Rced-Muller encoded word to provide the codeword.
Various features, objects and advantages of the present invention will become more apparent from the following detailcd description of el~ '' of the inventionwhich are described by way of example only and with reference to the accù.,l~allyh~
drawings.
Figure 1 illustrates the concept of the present invention as applied to the encoding 20 of a se~uence of digital words using a trellis code and selected subcodes of a large block code;
Figures 2A and 2B represent trellis structures for the trellis code per se and for the encoder itself;
Figure 3 is a block schematic lc;~lI,~IILdLiull of a first "".l,o~lh"~ ~l of an encoder 25 according to the invention;
Figure 4 illustrates a trellis structure for the, ~: " of Figure 3;
Figure 5 is a block schematic IC;~ nn of a second . ~ " of an encoder according to the invention; and Figure 6 is a block schematic l~ of a decoder for decoding the code 30 words from either e...l~- ' of encoder to determine the original digital word.
Referring now to Figure 1, an encoder for encoding digital words, each comprising a first portion having b-bits and a second portion having m+l bits, comprises a block code unit 10 for generating codewords of a low-rate block code. The . : 4 ~ 21~
low-rate block code is partitioned into subcodes Bo to B,, each subcode comprising a plurality of n-bit codewords. Although eight subcodes Bo to B7 are illustrated in Figure 1, this is an arbitrary number for illustration only. The encoder also comprises a Jd sel~Li..g trellis code unit 11, the possible outputs of which select the subcodes 5 Bo-B7. The ' ' sel~li.,g trellis code unit 11 has a constraint length K. The first group of b bits of each digital word in the series are applied to the subcode-selecting trellis code unit 11, which encodes them to produce a cu~ D~JolsJ .lg series of trellis-encoded words. Each of the trellis-encoded words selects a ~;ull~,D~undil.t one of the subcodes Bo-B7 of the block code, which is used to encode the remaining m+l bits of 10 the same digital word to provide an n-bit codeword for output from the encoder. Thus, each second portion of m+l bits is applied to the block encoder 10 to select one of the codewords of the selected one of the subcodes Bo-B7. In the specific ~,..lbod to be described with reference to Figures 2 - S, n is much larger than both b and m. The overall code rate is m+b+ 1 and is i..d~,~ ' of the constraint length K of the trellis 15 code.
Referring now to Figures 2A and 2B, the trellis structure of the encoder of Figure 1, shown in Figure 2B, can be derived by replacing each of the branches of the primary trellis structure of subcode-selecting trellis code unit 11, shown in Figure 2A, by a set of parallel branches, each ~ , one of the codewords of the ~ ' g one 20 of the subcodes ~0 to ~7. Although Figure 2b shows a different subcode between each state transition, in practice it would be possible to have the same subcode between two different state transitions. For purposes of il' nn, Figure 2 shows eight parallel branches for each state transition.
Two practical . I " of the encoder will now be described, one designed 25 for simple cu..~llu~lion amd the other for better ~. ' Both use a trellis code which comprises a cu..~,lutiun~l code and a large block code which comprises a so-called Kerdock code as disclosed by A.M. Kerdock in an article entitled "A Class of Low-Rate Nonlinear Binary Codes," Infor~nation and Control, Vol. 20, pp 182-187 (1972). The Kerdock code is a non-linear binary block code with 22m codewords, each 30 of length 2m. Its minimum IIamming distance is 2~ 2 2 , It can also be viewed 2 ~ 7 as the union of the first-order Reed-Muller code (of size 2m+') and 2m-' - 1 of its cosets.
The coset leaders are bent functions with the added property that the sum of any two coset leaders is again a bent function.
Thus, in the following l,...JOI' ', the subcodes are the first-order Reed-MullerS cosets in the Kerdock code and the wllvulutiull~l code generates coset leaders which, when combined with the outputs of the Reed-Muller encoder, give the required codewords.
The trellis code is designed to ensure that the free distance of the overall code is greater than or equal to the minimum Hamming distance of the coset codes. The 10 Kerdock code has a minimum Hamming distance dbloCj~=2m-1-2 2 and the Reed-Muller code has a minimum Hamming distance dl~bCOd6'= 2m 1, so it follows that the cosd sclv~ L;..g trellis code must have a modified free distance dmr 2 2 .
The modified free distance dmf of the code is the minimum modified distance 20 between any two distinct paths in its primary trellis. The modified distance between any two branches ,BI and ~/32 in the primary trellis having ~u~ ul~Jil.~, coset leaders 2~1 and is defined as dm(~ 2) = ~ i f A,; ~
If the minimum Hamming distance of the block code is dblock and the minimum~5 Hamming distance of the subcode is ds~bc~dc~ then the free distance of the encoder is d,;.~ = min{dSabcOd~, dblock x d~
The minimum Hamming distance of the coset codes depends upon the ~Jdl~i~iU~ of the large block code whereas d" f depends upon the co~t ~l~ting trellis code. The objective 21~3~7 is to partition the block code such that dlrb~r,dc > db~c~ and use a cosct scl~ling code such that dmf x db,oc~ 2 ds~bcor.~ The asymptotic coding gain of the resulting encoder over the block code is improved by the ratio of df,Cc/d6loc~. For more details, the reader is directed to the article "Combined Trellis/Reed-Muller Coding for CDMA", J.P. Chaib, H. Leib, 5 PlV~.~i;..~,i~ of the Sixth T I Symposium on Personal, Indoors and Mobile Radio C~ ~ , Toronto, Canada, 1995, which is i~ul~ ' herein by reference.
The following general rules can be used to construct good coset-selecting trellis codes with b inputs:
1. All coset leaders should occur with the same frequency, so that if all datasequences are equally likely, then all codewords are generated with equal probability.
2. The modified free distance must satisfy dmf 2 dr~odJdb~
3. Non-~l~ u~ ,;ly. The primary encoder trellis must not contain any two infinite paths with a finite number of different coset leaders, but generated from input bit sequences with an infinite Hamming distance between them.
Since df,cC 5 d~bCOt~ the p~;,r~ of the encoder is limited by that of the subcodes that are used, at least for high signal-to-noise ratios. Hence, there is little to 20 be gained by using very powerful trellis codes, i.e. with d,~f ~ dsrb~o~cldblor~-An important r~ of rule (2) is that the number of delay elements neededto implement a good b-input cosct sel~li..~, trellis code is at least equal to b.
The simplest acceptable cùs~t s~l~liag trellis or ~;u..vvl~-fiu..~ code with b inputs uses the minimum number of delay elements, namely one delay element per bit of the 25 first portion of the input digital word. Such an encoder is illustrated in Figure 3 and its trellis is illustrated in Figure 4. In Figure 3, ~;Ul~ Cu~ to ~UIIT
of Figure 1 have the same reference number but with a prime. In the encoder in Figure 3, the subcode-selecting trellis code unit 11' comprises a trellis encoder 12 and a 1-1 mapping device 14, such as a memory, look-up table or other suitable device, having 2b 30 inputs in two equal groups. The first group, identified as inputs 16, to 16b are connected directly to inputs ports 18, to 18b of the encoder to receive the first group of b bits. The second group, identified as inputs 201 to 20b are connected to inputs ports 18, to 18b by way of a ~;Ulll -r ~ g set of b delay elements 22, to 22b to receive the b inputs of the .. . . .. . . _ . ... .. . . .. _ _ _ _ .
218~7 enwder. Each delay is equivalent to the duration of the digital word to be encoded, i.e.
m +b+I bit periods. This set of delay elements 22, to 22b, and the ~.\n~ betweenthe mapping device 14 and the input ports, constitute a simple convolutional encoder 12.
Each 2b bit word input to the mapping device 14 comprises the instant b bits and5 the preceding b bits, which the mapping device 14 maps to a CV11~,0~ , coset leader.
Thus, 0..0, 0..0 maps to ~ ; 0..0, 1..1 maps to ~ b; ~ 0..0 maps to i. ,~1;
and so on, until 1..1, 1..1 maps to ~2b2b The block code unit 10' comprises a Reed-Muller encoder 24 and a binary (modulo-2 addition) vector summing device 26. The latter has its two inputs wnnected 10 to the output of the Reed-Muller encoder 24 and the output of the mapping device 14, ~ti~ly. Each coset leader output from the mapping device 14 comprises 2~ bits which the summing device 26 sums with the COll~ -r )r ~ , word output from the Reed-Muller encoder 24 to produce the codeword which is the output of the encoder. Asindicated in Pigure 3, this would typically be sent to a modulator for ' IDti~m and 15 ~ if the encoder is being uscd in, say, a DS-CDMA cellular telephone system.
It should be noted that all of the wset leaders ~ ~ are distinct. Since the Kerdock code is made up of 2m-' wsets of the first-order Reed-Muller code, each having 2m+l elements, the maximal value of b is bm3,~ = m_l Col-1Dpo~,Jir.61y~ the coding 20 rate is m+b+l for a maximum Of 3m It should also be noted that the encoder 2~ 2Dt~l of Figure 3 requires exactly 2~b coset leaders, which is half the number of available coset leaders. The trellis for 2b states is illustrated in Figure 4 and is self-~ ,' y.
An alternative, preferred t~lllbV~" ' of encoder illustrated in Figure 5 has a wnstraint length slightly larger than that of the encoder illustrated in Figure 3. In 25 Figure 5, ~. . wll~vl,Ji,,6 to those of Figure I or Figure 3 have the same reference numerals but with a double prime. In the encoder of Figure 5, the subcode-_ _ , , ,,, , ,, ... ,, . , .. , .. , . , , . ,,, , , , , . ,, . , . , , . , .. , . , .. _ , ...
, ., . ,, , .. _, 2 i ~
selecting trellis code unit 11 " comprises trellis encoder 12 " and mapping device 14 ", thelatter çon~pri~ing, as before, a memory, look-up table or other suitable device. Trellis encoder 12 " comprises a set of delays 220" to 22b" and summing devices 28, to 28b. The mapping device 14" has b+l inputs identified as 160" to 16b". The encoder has a set 5 of b input ports identified as 18,~ to 18b~. Input port 18,~ is coupled to input 160~ of the mapping device 14" by way of two delay elements 22,~ and 220~ in series. Second input port 18~ is connected to a second delay element 22,~, the output of which is connected to a modulo-2 summing device 28, which sums the instant bit from port 18l~
with the delayed bit from port 182" and applies the sum to input 161a of mapping device 10 14". Likewise, input port 183 ~ is connected to a third delay element 223 a~ the output of which is connected to one input of a modulo-2 summing device 283, the other input of which is connected to input port 18,~. The summing device 283 sums the inst~mt bit from port 18," and delayed bit from port 183" and applies the sum to input 16,~ of mapping device 14". The other input ports and delay elements are connected in a similar 15 manner. The final input port 18b ~ is coupled to delay element 22~ ~, the output of which ;s connected to summing device 28b the other input of which is connected to the preceding encoder input port (not shown) and the output of which is connected to input 16b,a of mapping device 14". Final input port 18b~ is also coupled to one input of a summing device 28" the other input of which is connected to the output of delay element 20 221N. The output of summing device 28l is applied to the last input 16b~ of mapping device 14".
As depicted in Figure 5, the mapping device 14" maps the first trellis-encoded word 0. .0 to coset leader ~,. and so on, the final trellis encoded word l . . l mapping to The output of the mapping device 14" and the output of the Reed-Muller encoder 24" are connected to respective inputs of binary vector summing means 28". The output of the binary vector summing means 28" is the codeword of 2~ bits for output from the encoder. The Reed-Muller encoder 24" is the same as the Reed-Muller encoder 24 of Figure 3 and encodes the second group of m+l bits of the digital word at the input.
The coset-selecting trellis code of the encoder of Figure 5 has a modified free 218~7 distance d",f equal to 2. The coding rate is m+~1 for a maximum of m-1 Indeed, 2~ 2'~
since there are at most 2"'-' distinct coset leaders which must be indexed by the b+l outputs of the trellis code unit, it follows that b""~,, = m-2.
When each group of parallel branches is a coset of the same base block code (e.g.
S cosets of the first-order Reed-Muller block code), the decoding is si6~ir~ ly simplified, since the same processing can be applied to the different coset codes after pre-"i,' by the ,~ rlU~, coset leader. The code structure is enriched, sincedifferent cosets of the same subcode are essentially "i ' ~n~" of each other and have the same distance properties. The ~rdlLiliù..h.6 of the Kerdock code into its first-order 10 Reed-Muller cosets is a ~ , well-suited example since the Fast HadamardTransform (FHl~ can be used to compute the branch metrics in the Viterbi decoding algorithm efficiently.
In a typical CDMA receiver or the like, the signal comprising the sequence of codewords would also include 1"- .~ noise. It would be r1~ ' to produce15 a sequence of received vectors, each having a plurality of elements CO.I. r " v to the plurality of bits of the encoded codeword. The received vectors would be applied to a decoder. A decoder suitable for decoding received vectors .;~ ' lg to the codewords output from either of the i ~ùdh~ of Figures 1 and 3 will now be described with reference to Figure 6.
The decoder shown in Figure 6 comprises a coset leader "sign ', " " unit 30, a block decoder in the form of a Fast Hadamard Transform unit 32, an Absolute Maximum Selector 34 and a Cull~ ' " ' decoder in the form of a modified Viterbi Al6norithm Decoder 36. The Absolute Maximum Selector 34 determines the element of each input vector having the largest absolute value and outputs that value (signed) 25 together with a c. ,, ~ ~~ 'v index which represents the group of m +l bits which was most likely to have been applied to the ~u,l.~r " g block encoder to select the codeword from the selected coset, in the event that the correct coset is assumed in coset leader block 30". The modified Viterbi algorithm decoder 36 then selects exactly one codeword on the trellis branch together with its associated likelihood metric. The 30 decoder will ' data for the entire sequence of received vectors and then be reset, whereupon it will output an estimate of the most likely trellis path and hence the _, _ , _, . .. .
most likely series of codewords which were received. The cycle will then repeat for another series of codewords.
The decoder comprises a vector "addition" unit 30 which applies to each receivedvector, in succession, all of the coset leaders, any one of which the subcode selector 14 5 might have used to select the subcode or coset for use in encoding that particular first group of m+l bits. Where the coset leader bit is a "1", the vector addition unit 30 changes the sign of the ~:OIIC~ , element of the received vector and, where the coset leader bit is "0", leaves the sign of the received vector element ~ , h The Fast Hadamard Transform is an efficient method of decoding first-order 10 Reed-Muller codes. The Fast Hadamard Transform unit 32 produces a cu--~ -r ~- g vector. The Absolute Maximum Selector 34 selects the maximum absolute value, which might be positive or negative, and supplies it (signed) as a metric to the modified Viterbi decoder 34. For each particular magnitude and sign, the Absolute Maximum Selector 28 produces an index, IC~ g the Wll~_r ~' g m+l bits input to the Reed-Muller 15 encoder 24/24" to encode the ~,u -, -r '' ,, word, and supplies it with the metric to the modified Viterbi algorithm decoder 36. The index is determined by the position of the maximum absolute value in the input codeword vector. In essence, whenever the correct coset is assumed, the index represents the most likely m+l bit word fed into the Reed-Muller encoder 24/24".
2û The modified Viterbi Algorithm decoder 36 determines the trellis path. Usually, a Viterbi algorithm decoder is assumed to produce its own metrics. The modified Viterbi Algorithm Decoder 36, however, is modified to operate upon metrics which are supplied to it by the Absolute Maximum detector 34. It is also modified to enable it to associate the metrics with their cull~r ' G indexes. This simply entails additional 25 storage space for the indexes, i.e. storage for m +l-bit indexes associated with the usual memory for the metrics. Otherwise, the Viterbi Algorithm decoder 36 is of CUII~ lLiU
form and so will not be described in detail. For more details of such Viterbi algorithm decoders, the reader is directed to the article "Viterbi Decoding for Satellite and Space (~ ", IEEE Transactions on r Technology, Vol. COM-I9, 30 No. 5, October 1971, Heller et a/, which is LJulatcd herein by reference.
The modified Viterbi Algorithm decoder 36 will process the metrics for each of the coset leaders for each of the L"cdet~ ' number of received vectors, to determine the state transitions of the trellis code unit 12 and map them to the cu.l. r ' g .. . . . . . . . . _ . . _ _ . _ .. .. . _ _ . _ .
sequence of b bit words input to the trellis code unit 12 (Figure 1). Each state transition is associated with a metric and hence with one of the indexes stored in the modified Viterbi Algorithm decoder 36 in association with that metric. ('r~ lly~ the modified Viterbi Algorithm decoder associates the codewords for the different state 5 transitions with their respective indexes and outputs the "most likely" sequence of b+m+l bit digital words which were originally encoded. The cycle is then repeated for another sequence of received codeword vectors.
It should be d~)yl~ that the coset addition unit 30, Fast Hadamard Transform unit 32 and Absolute Maximum Selector 34 will run at a rate which is a multiple of the 10 rate at which the codeword vectors are received. In the specific ~ ~I.orlilll~ J the multiple is 2m-' times. If preferred, however, a form of parallel processing could be used, in which case each of the parallel branches would have a coset addition unit 24, a Fast Hadamard Transform unit 26 and an Absolute Maximum Selector 28. Each branch would add a different one of the possible coset leaders.
There is more than one state transition for each associated coset leader.
Obviously, the ~iUII~ '' g branches need only one branch metric computer. For a particular trellis stage, the same coset leader might be associated with two distinct state transitions. For example, S0--S2 and S3--S7 might have the same coset associatedwith them. In the decoding process, there is no need to repeat the process "coset leader 20 addition + FHT + Absolute maximum selection" because the result is the same.
r~ Lh~ llul~ the high parallelism between different branch metric computers can be exploited to reduce the decoding complexity by using common ' ' results between Fast Hadamard Transforms. On the other hand, if the i - rate is not too large, a single branch metric computer is sufficient; the same Fast Hadamard25 Transform and Absolute Maximum Selector blocks are used lqJ~liLi~ly with varying coset leaders in the coset leader block. Finally, hard-decision decoding is ~LI~6h:rul~.1 to implr-mrnt, and can reduce ~iE,..irl~.LIy the complexity of the Fast Hadamard Transform block at the cost of ,"h.,~ , decoding.
Ellll., ' of the invention are especially useful for cellular radio systems for 30 providing increased system capacity. i~eie.Lh~ , it should be ~ 1l ' that theinvention is not limited to cellular radio systems or CDMA, systems but could be applied to other systems in which digital signals are required to be encoded for ;.... and/or storage, for example, in deep space ~ systems.
. . . _ _ . . _ . . . . .. _ _ . . . . .
2 i 8~4~
F ~~' ' ' of the present invention permit the use of long block codes that ~
rich in structure to be used jointly with a .;usel sel~Li~g trellis code. This is ~Li~,ul~ly a~l\, ~ for multiple-access ~ - systems, ~cuLh;ulally indoor and mobile Ul systems which utilize spread-spectrum multiple access schemes, 5 because the bandwidth of the signal of a given user is much larger than the data rate of that user.
Although the main block code described herein is a Kerdock code, it should be ' that other codes might be used, provided they can be partitioned into subcodes with good distance properties; for example, the second-order Reed-Muller code 10 partitioned into cosets of the first-order Reel-Muller code. Although the preferred e ul,o~ described herein use cosets of the main block code, it would be possible to use other subcodes of a large block code instead.
It should be noted that the b bits are protected to a greater extent than the m+l bits from errors3caused by channel p~li ' This may be exploited to advantage in 15 certain ,.~ , for example speech encoding.
Although ~, ~I,o~ of the invention have been described and illustrated in detail, it is to be clearly understood that the same is by way of illustration and example only and not to be taken by way of the limitation, the spirit and scope of the present invention being limited only by the appended claims.
Since df,cC 5 d~bCOt~ the p~;,r~ of the encoder is limited by that of the subcodes that are used, at least for high signal-to-noise ratios. Hence, there is little to 20 be gained by using very powerful trellis codes, i.e. with d,~f ~ dsrb~o~cldblor~-An important r~ of rule (2) is that the number of delay elements neededto implement a good b-input cosct sel~li..~, trellis code is at least equal to b.
The simplest acceptable cùs~t s~l~liag trellis or ~;u..vvl~-fiu..~ code with b inputs uses the minimum number of delay elements, namely one delay element per bit of the 25 first portion of the input digital word. Such an encoder is illustrated in Figure 3 and its trellis is illustrated in Figure 4. In Figure 3, ~;Ul~ Cu~ to ~UIIT
of Figure 1 have the same reference number but with a prime. In the encoder in Figure 3, the subcode-selecting trellis code unit 11' comprises a trellis encoder 12 and a 1-1 mapping device 14, such as a memory, look-up table or other suitable device, having 2b 30 inputs in two equal groups. The first group, identified as inputs 16, to 16b are connected directly to inputs ports 18, to 18b of the encoder to receive the first group of b bits. The second group, identified as inputs 201 to 20b are connected to inputs ports 18, to 18b by way of a ~;Ulll -r ~ g set of b delay elements 22, to 22b to receive the b inputs of the .. . . .. . . _ . ... .. . . .. _ _ _ _ .
218~7 enwder. Each delay is equivalent to the duration of the digital word to be encoded, i.e.
m +b+I bit periods. This set of delay elements 22, to 22b, and the ~.\n~ betweenthe mapping device 14 and the input ports, constitute a simple convolutional encoder 12.
Each 2b bit word input to the mapping device 14 comprises the instant b bits and5 the preceding b bits, which the mapping device 14 maps to a CV11~,0~ , coset leader.
Thus, 0..0, 0..0 maps to ~ ; 0..0, 1..1 maps to ~ b; ~ 0..0 maps to i. ,~1;
and so on, until 1..1, 1..1 maps to ~2b2b The block code unit 10' comprises a Reed-Muller encoder 24 and a binary (modulo-2 addition) vector summing device 26. The latter has its two inputs wnnected 10 to the output of the Reed-Muller encoder 24 and the output of the mapping device 14, ~ti~ly. Each coset leader output from the mapping device 14 comprises 2~ bits which the summing device 26 sums with the COll~ -r )r ~ , word output from the Reed-Muller encoder 24 to produce the codeword which is the output of the encoder. Asindicated in Pigure 3, this would typically be sent to a modulator for ' IDti~m and 15 ~ if the encoder is being uscd in, say, a DS-CDMA cellular telephone system.
It should be noted that all of the wset leaders ~ ~ are distinct. Since the Kerdock code is made up of 2m-' wsets of the first-order Reed-Muller code, each having 2m+l elements, the maximal value of b is bm3,~ = m_l Col-1Dpo~,Jir.61y~ the coding 20 rate is m+b+l for a maximum Of 3m It should also be noted that the encoder 2~ 2Dt~l of Figure 3 requires exactly 2~b coset leaders, which is half the number of available coset leaders. The trellis for 2b states is illustrated in Figure 4 and is self-~ ,' y.
An alternative, preferred t~lllbV~" ' of encoder illustrated in Figure 5 has a wnstraint length slightly larger than that of the encoder illustrated in Figure 3. In 25 Figure 5, ~. . wll~vl,Ji,,6 to those of Figure I or Figure 3 have the same reference numerals but with a double prime. In the encoder of Figure 5, the subcode-_ _ , , ,,, , ,, ... ,, . , .. , .. , . , , . ,,, , , , , . ,, . , . , , . , .. , . , .. _ , ...
, ., . ,, , .. _, 2 i ~
selecting trellis code unit 11 " comprises trellis encoder 12 " and mapping device 14 ", thelatter çon~pri~ing, as before, a memory, look-up table or other suitable device. Trellis encoder 12 " comprises a set of delays 220" to 22b" and summing devices 28, to 28b. The mapping device 14" has b+l inputs identified as 160" to 16b". The encoder has a set 5 of b input ports identified as 18,~ to 18b~. Input port 18,~ is coupled to input 160~ of the mapping device 14" by way of two delay elements 22,~ and 220~ in series. Second input port 18~ is connected to a second delay element 22,~, the output of which is connected to a modulo-2 summing device 28, which sums the instant bit from port 18l~
with the delayed bit from port 182" and applies the sum to input 161a of mapping device 10 14". Likewise, input port 183 ~ is connected to a third delay element 223 a~ the output of which is connected to one input of a modulo-2 summing device 283, the other input of which is connected to input port 18,~. The summing device 283 sums the inst~mt bit from port 18," and delayed bit from port 183" and applies the sum to input 16,~ of mapping device 14". The other input ports and delay elements are connected in a similar 15 manner. The final input port 18b ~ is coupled to delay element 22~ ~, the output of which ;s connected to summing device 28b the other input of which is connected to the preceding encoder input port (not shown) and the output of which is connected to input 16b,a of mapping device 14". Final input port 18b~ is also coupled to one input of a summing device 28" the other input of which is connected to the output of delay element 20 221N. The output of summing device 28l is applied to the last input 16b~ of mapping device 14".
As depicted in Figure 5, the mapping device 14" maps the first trellis-encoded word 0. .0 to coset leader ~,. and so on, the final trellis encoded word l . . l mapping to The output of the mapping device 14" and the output of the Reed-Muller encoder 24" are connected to respective inputs of binary vector summing means 28". The output of the binary vector summing means 28" is the codeword of 2~ bits for output from the encoder. The Reed-Muller encoder 24" is the same as the Reed-Muller encoder 24 of Figure 3 and encodes the second group of m+l bits of the digital word at the input.
The coset-selecting trellis code of the encoder of Figure 5 has a modified free 218~7 distance d",f equal to 2. The coding rate is m+~1 for a maximum of m-1 Indeed, 2~ 2'~
since there are at most 2"'-' distinct coset leaders which must be indexed by the b+l outputs of the trellis code unit, it follows that b""~,, = m-2.
When each group of parallel branches is a coset of the same base block code (e.g.
S cosets of the first-order Reed-Muller block code), the decoding is si6~ir~ ly simplified, since the same processing can be applied to the different coset codes after pre-"i,' by the ,~ rlU~, coset leader. The code structure is enriched, sincedifferent cosets of the same subcode are essentially "i ' ~n~" of each other and have the same distance properties. The ~rdlLiliù..h.6 of the Kerdock code into its first-order 10 Reed-Muller cosets is a ~ , well-suited example since the Fast HadamardTransform (FHl~ can be used to compute the branch metrics in the Viterbi decoding algorithm efficiently.
In a typical CDMA receiver or the like, the signal comprising the sequence of codewords would also include 1"- .~ noise. It would be r1~ ' to produce15 a sequence of received vectors, each having a plurality of elements CO.I. r " v to the plurality of bits of the encoded codeword. The received vectors would be applied to a decoder. A decoder suitable for decoding received vectors .;~ ' lg to the codewords output from either of the i ~ùdh~ of Figures 1 and 3 will now be described with reference to Figure 6.
The decoder shown in Figure 6 comprises a coset leader "sign ', " " unit 30, a block decoder in the form of a Fast Hadamard Transform unit 32, an Absolute Maximum Selector 34 and a Cull~ ' " ' decoder in the form of a modified Viterbi Al6norithm Decoder 36. The Absolute Maximum Selector 34 determines the element of each input vector having the largest absolute value and outputs that value (signed) 25 together with a c. ,, ~ ~~ 'v index which represents the group of m +l bits which was most likely to have been applied to the ~u,l.~r " g block encoder to select the codeword from the selected coset, in the event that the correct coset is assumed in coset leader block 30". The modified Viterbi algorithm decoder 36 then selects exactly one codeword on the trellis branch together with its associated likelihood metric. The 30 decoder will ' data for the entire sequence of received vectors and then be reset, whereupon it will output an estimate of the most likely trellis path and hence the _, _ , _, . .. .
most likely series of codewords which were received. The cycle will then repeat for another series of codewords.
The decoder comprises a vector "addition" unit 30 which applies to each receivedvector, in succession, all of the coset leaders, any one of which the subcode selector 14 5 might have used to select the subcode or coset for use in encoding that particular first group of m+l bits. Where the coset leader bit is a "1", the vector addition unit 30 changes the sign of the ~:OIIC~ , element of the received vector and, where the coset leader bit is "0", leaves the sign of the received vector element ~ , h The Fast Hadamard Transform is an efficient method of decoding first-order 10 Reed-Muller codes. The Fast Hadamard Transform unit 32 produces a cu--~ -r ~- g vector. The Absolute Maximum Selector 34 selects the maximum absolute value, which might be positive or negative, and supplies it (signed) as a metric to the modified Viterbi decoder 34. For each particular magnitude and sign, the Absolute Maximum Selector 28 produces an index, IC~ g the Wll~_r ~' g m+l bits input to the Reed-Muller 15 encoder 24/24" to encode the ~,u -, -r '' ,, word, and supplies it with the metric to the modified Viterbi algorithm decoder 36. The index is determined by the position of the maximum absolute value in the input codeword vector. In essence, whenever the correct coset is assumed, the index represents the most likely m+l bit word fed into the Reed-Muller encoder 24/24".
2û The modified Viterbi Algorithm decoder 36 determines the trellis path. Usually, a Viterbi algorithm decoder is assumed to produce its own metrics. The modified Viterbi Algorithm Decoder 36, however, is modified to operate upon metrics which are supplied to it by the Absolute Maximum detector 34. It is also modified to enable it to associate the metrics with their cull~r ' G indexes. This simply entails additional 25 storage space for the indexes, i.e. storage for m +l-bit indexes associated with the usual memory for the metrics. Otherwise, the Viterbi Algorithm decoder 36 is of CUII~ lLiU
form and so will not be described in detail. For more details of such Viterbi algorithm decoders, the reader is directed to the article "Viterbi Decoding for Satellite and Space (~ ", IEEE Transactions on r Technology, Vol. COM-I9, 30 No. 5, October 1971, Heller et a/, which is LJulatcd herein by reference.
The modified Viterbi Algorithm decoder 36 will process the metrics for each of the coset leaders for each of the L"cdet~ ' number of received vectors, to determine the state transitions of the trellis code unit 12 and map them to the cu.l. r ' g .. . . . . . . . . _ . . _ _ . _ .. .. . _ _ . _ .
sequence of b bit words input to the trellis code unit 12 (Figure 1). Each state transition is associated with a metric and hence with one of the indexes stored in the modified Viterbi Algorithm decoder 36 in association with that metric. ('r~ lly~ the modified Viterbi Algorithm decoder associates the codewords for the different state 5 transitions with their respective indexes and outputs the "most likely" sequence of b+m+l bit digital words which were originally encoded. The cycle is then repeated for another sequence of received codeword vectors.
It should be d~)yl~ that the coset addition unit 30, Fast Hadamard Transform unit 32 and Absolute Maximum Selector 34 will run at a rate which is a multiple of the 10 rate at which the codeword vectors are received. In the specific ~ ~I.orlilll~ J the multiple is 2m-' times. If preferred, however, a form of parallel processing could be used, in which case each of the parallel branches would have a coset addition unit 24, a Fast Hadamard Transform unit 26 and an Absolute Maximum Selector 28. Each branch would add a different one of the possible coset leaders.
There is more than one state transition for each associated coset leader.
Obviously, the ~iUII~ '' g branches need only one branch metric computer. For a particular trellis stage, the same coset leader might be associated with two distinct state transitions. For example, S0--S2 and S3--S7 might have the same coset associatedwith them. In the decoding process, there is no need to repeat the process "coset leader 20 addition + FHT + Absolute maximum selection" because the result is the same.
r~ Lh~ llul~ the high parallelism between different branch metric computers can be exploited to reduce the decoding complexity by using common ' ' results between Fast Hadamard Transforms. On the other hand, if the i - rate is not too large, a single branch metric computer is sufficient; the same Fast Hadamard25 Transform and Absolute Maximum Selector blocks are used lqJ~liLi~ly with varying coset leaders in the coset leader block. Finally, hard-decision decoding is ~LI~6h:rul~.1 to implr-mrnt, and can reduce ~iE,..irl~.LIy the complexity of the Fast Hadamard Transform block at the cost of ,"h.,~ , decoding.
Ellll., ' of the invention are especially useful for cellular radio systems for 30 providing increased system capacity. i~eie.Lh~ , it should be ~ 1l ' that theinvention is not limited to cellular radio systems or CDMA, systems but could be applied to other systems in which digital signals are required to be encoded for ;.... and/or storage, for example, in deep space ~ systems.
. . . _ _ . . _ . . . . .. _ _ . . . . .
2 i 8~4~
F ~~' ' ' of the present invention permit the use of long block codes that ~
rich in structure to be used jointly with a .;usel sel~Li~g trellis code. This is ~Li~,ul~ly a~l\, ~ for multiple-access ~ - systems, ~cuLh;ulally indoor and mobile Ul systems which utilize spread-spectrum multiple access schemes, 5 because the bandwidth of the signal of a given user is much larger than the data rate of that user.
Although the main block code described herein is a Kerdock code, it should be ' that other codes might be used, provided they can be partitioned into subcodes with good distance properties; for example, the second-order Reed-Muller code 10 partitioned into cosets of the first-order Reel-Muller code. Although the preferred e ul,o~ described herein use cosets of the main block code, it would be possible to use other subcodes of a large block code instead.
It should be noted that the b bits are protected to a greater extent than the m+l bits from errors3caused by channel p~li ' This may be exploited to advantage in 15 certain ,.~ , for example speech encoding.
Although ~, ~I,o~ of the invention have been described and illustrated in detail, it is to be clearly understood that the same is by way of illustration and example only and not to be taken by way of the limitation, the spirit and scope of the present invention being limited only by the appended claims.
Claims (20)
1. A method of encoding a digital signal comprising a sequence of digital words,each comprising a first portion and a second portion, to provide a correspondingsequence of codewords, supplying the sequence of codewords to a transmission or storage medium, extracting a corresponding sequence of codeword vectors from thetransmission or storage medium, and decoding the sequence of codeword vectors toextract the originally-encoded sequence of digital words;
the encoding comprising the sequential steps of:
using a trellis code, successively encoding respective first portions of the sequence of digital words to produce a corresponding sequence of trellis-encoded words, each of the trellis-encoded words corresponding, in the sequence, to one of the digital words;
using each trellis-encoded word to select a corresponding one of a plurality of subcodes of a block code; and using the selected subcode to encode the second portion of the corresponding digital word;
the decoding comprising the steps of;
operating upon each of the codeword vectors using a decoder for each of the subcodes to produce, for each subcode, an estimated decoded second portion and ametric representing the likelihood that the estimated decoded second portion is correct, given that the assumed subcode is correct;
using a trellis decoder, operating upon the sequence of likelihood metrics and the associated estimated second portions to provide a sequence of estimated first portions;
and associating with each of the estimated first portions the corresponding estimated second portion thereby providing a sequence of output digital words corresponding to the sequence of digital words originally encoded.
the encoding comprising the sequential steps of:
using a trellis code, successively encoding respective first portions of the sequence of digital words to produce a corresponding sequence of trellis-encoded words, each of the trellis-encoded words corresponding, in the sequence, to one of the digital words;
using each trellis-encoded word to select a corresponding one of a plurality of subcodes of a block code; and using the selected subcode to encode the second portion of the corresponding digital word;
the decoding comprising the steps of;
operating upon each of the codeword vectors using a decoder for each of the subcodes to produce, for each subcode, an estimated decoded second portion and ametric representing the likelihood that the estimated decoded second portion is correct, given that the assumed subcode is correct;
using a trellis decoder, operating upon the sequence of likelihood metrics and the associated estimated second portions to provide a sequence of estimated first portions;
and associating with each of the estimated first portions the corresponding estimated second portion thereby providing a sequence of output digital words corresponding to the sequence of digital words originally encoded.
2. A method as claimed in claim 1, wherein the trellis code is a convolutional code.
3. A method as claimed in claim 1, wherein the block code comprises a Kerdock code partitioned into cosets of a Reed-Muller code, each coset constituting one of said subcode, and the decoding is performed using a Fast Hadamard Transform and a Viterbi algorithm decoder.
4. A method as claimed in claim 1, wherein the second portions are encoded by operating upon each second portion using a Reed-Muller code and adding to each Reed-Muller encoded word a coset leader, the coset leaders being selected by mapping the trellis-encoded words to respective coset leaders of the Reed-Muller code.
5. A method of encoding a digital signal comprising a sequence of digital words,each comprising a first portion and a second portion, to provide a correspondingsequence of codewords, comprising the sequential steps of:
using a trellis code, successively encoding respective first portions of the sequence of digital words to produce a corresponding sequence of trellis-encodedwords, each of the trellis-encoded words corresponding, in the sequence, to one of the digital words;
using each trellis-encoded word to select a corresponding one of a plurality of subcodes of a block code;
and using the selected subcode to encode the second portion of the corresponding digital word.
using a trellis code, successively encoding respective first portions of the sequence of digital words to produce a corresponding sequence of trellis-encodedwords, each of the trellis-encoded words corresponding, in the sequence, to one of the digital words;
using each trellis-encoded word to select a corresponding one of a plurality of subcodes of a block code;
and using the selected subcode to encode the second portion of the corresponding digital word.
6. A method as claimed in claim 5, wherein the trellis code is a convolutional code.
7. A method as claimed in claim 5, wherein the block code comprises a Kerdock code partitioned into cosets of a Reed-Muller code, each coset constituting one of said subcode.
8. A method as claimed in claim 5, wherein the second portions are encoded by operating upon each second portion using a Reed-Muller code and adding to each Reed-Muller encoded word a coset leader, the coset leaders being selected by mapping the trellis-encoded words to respective coset leaders of the Reed-Muller code.
DECODING
DECODING
9. A method of decoding a sequence of codeword vectors formed by encoding a sequence of digital words, each having a first portion and a second portion, by the sequential steps of, using a trellis code, successively encoding respective first portions of the sequence of digital words to produce a corresponding sequence of trellis-encoded words, each of the trellis-encoded words corresponding, in the sequence, to one of the digital words, using each trellis-encoded word to select a corresponding one of a plurality of subcodes of a block code, and using the selected subcode to encode the second portion of the corresponding digital word;
the method of decoding comprising the steps of;
operating upon each of the codeword vectors using a decoder for each of the subcodes to produce, for each subcode, an estimated decoded second portion and ametric representing the likelihood that the estimated decoded second portion is correct, given that the assumed subcode is correct;
using a trellis decoder, operating upon the sequence of likelihood metrics and the associated estimated second portions to provide a sequence of estimated first portions;
and associating with each of the estimated first portions the corresponding estimated second portion thereby providing a sequence of output digital words corresponding to the sequence of digital words originally encoded.
the method of decoding comprising the steps of;
operating upon each of the codeword vectors using a decoder for each of the subcodes to produce, for each subcode, an estimated decoded second portion and ametric representing the likelihood that the estimated decoded second portion is correct, given that the assumed subcode is correct;
using a trellis decoder, operating upon the sequence of likelihood metrics and the associated estimated second portions to provide a sequence of estimated first portions;
and associating with each of the estimated first portions the corresponding estimated second portion thereby providing a sequence of output digital words corresponding to the sequence of digital words originally encoded.
10. A method as claimed in claim 9, for decoding said codeword vectors produced using a said block code comprising a Kerdock code partitioned into cosets of a Reed-Muller code, each coset corresponding one of said subcodes, wherein the step of operating upon each of the codeword vectors includes the steps of applying each coset leader to each codeword vector, and performing a Fast Hadamard Transform upon the resulting vector, and the step of operating upon the sequence of likelihood metrics and associated estimated second portions comprises applying a Viterbi algorithm thereto.
11. Apparatus for encoding a digital signal comprising a sequence of digital words, each comprising a first portion and a second portion, to provide a correspondingsequence of codewords, supplying the sequence of codewords to a transmission or storage medium, extracting a corresponding sequence of codeword vectors from the transmission or storage medium, and decoding the sequence of codeword vectors toextract the originally-encoded sequence of digital words;
the apparatus comprising an encoder comprising:
a trellis code unit for successively encoding respective first portions of the sequence of digital words to produce a corresponding sequence of trellis-encoded words, each of the trellis-encoded words corresponding, in the sequence, to one of the digital words;
a block code unit for encoding respective second portions of the digital words to provide codewords from the selected ones of subcodes of the block code, the block code unit being controllable to use selected ones of a plurality of subcodes of the block code for such encoding; and selector means responsive to the sequence of trellis-encoded words for controlling the block code unit to select, for each trellis-encoded word output from the trellis code unit, a corresponding one of the plurality of subcodes;
the apparatus further comprising a decoding unit comprising;
means for operating upon each of the sequence of codeword vectors using a decoder for each of the subcodes to produce, for each subcode, an estimated decoded second portion and a metric representing the likelihood that the estimated decoded second portion is correct, given that the assumed subcode is correct;
a trellis decoder unit having means for operating upon the sequence of likelihood metrics and the associated estimated second portions to provide a sequence of estimated first portions;
and means for associating with each of the estimated first portions the corresponding estimated second portion thereby to provide a sequence of output digital words corresponding to the sequence of digital words originally encoded.
the apparatus comprising an encoder comprising:
a trellis code unit for successively encoding respective first portions of the sequence of digital words to produce a corresponding sequence of trellis-encoded words, each of the trellis-encoded words corresponding, in the sequence, to one of the digital words;
a block code unit for encoding respective second portions of the digital words to provide codewords from the selected ones of subcodes of the block code, the block code unit being controllable to use selected ones of a plurality of subcodes of the block code for such encoding; and selector means responsive to the sequence of trellis-encoded words for controlling the block code unit to select, for each trellis-encoded word output from the trellis code unit, a corresponding one of the plurality of subcodes;
the apparatus further comprising a decoding unit comprising;
means for operating upon each of the sequence of codeword vectors using a decoder for each of the subcodes to produce, for each subcode, an estimated decoded second portion and a metric representing the likelihood that the estimated decoded second portion is correct, given that the assumed subcode is correct;
a trellis decoder unit having means for operating upon the sequence of likelihood metrics and the associated estimated second portions to provide a sequence of estimated first portions;
and means for associating with each of the estimated first portions the corresponding estimated second portion thereby to provide a sequence of output digital words corresponding to the sequence of digital words originally encoded.
12. Apparatus as claimed in claim 11, wherein the block code unit comprises a Reed-Muller encoder for encoding the second portions of the digital words to provide a sequence of Reed-Muller encoded words, the selector means comprises means for mapping the trellis-encoded words to coset leaders of cosets of the Reed-Muller code, and the block code unit further comprises a summing device for summing each coset leader with the corresponding Reed-Muller encoded word to provide said codeword, and wherein, in the decoding unit, the means for operating upon each of the sequence of codeword vectors comprises means for combining with each codeword vector each of the coset leaders and Fast Hadamard Transform means for operating upon the vectors resulting from such combination to produce said estimated decoded second portion and the metric representing the likelihood that the estimated decoded second portion is correct, given that the assumed subcode is correct.
13. Apparatus as claimed in claim 11, wherein the trellis code unit comprises a plurality of input ports corresponding to the bits of first portion of the digital signal, each for receiving a respective one of said the bits, a corresponding plurality of delay elements each having an input connected to a respective one of the plurality of input ports, a plurality of summing devices each having a first input connected to an output of a respective one of the plurality of delay elements and an output connected to a respective one of a corresponding plurality of inputs of the selector means, that one of said plurality of delay elements connected to the first of the input ports having its output connected to a second input of that one of said summing device having its first input connected to the last of the input ports and, by way of a further delay element, to a further input of the selector means preceding its plurality of inputs, each of the delay elements having a delay substantially equal to the duration of a said digital word.
14. Apparatus as claimed in claim 12, wherein the trellis decoder comprises a Viterbi algorithm decoder.
15. Apparatus for encoding a digital signal comprising a sequence of digital words, each comprising a first portion and a second portion, to provide a correspondingsequence of codewords, comprising:
a trellis code unit for successively encoding respective first portions of the sequence of digital words to produce a corresponding sequence of trellis-encoded words, each of the trellis-encoded words corresponding in the sequence, to one of the digital words;
a block code unit for encoding respective second portions of the digital words to provide codewords from the selected ones of subcodes of the block code, the block code unit being controllable to use selected ones of a plurality of subcodes of the block code for such encoding; and selector means responsive to the sequence of trellis-encoded words for controlling the block code unit to select, for each trellis-encoded word output from the trellis code unit, a corresponding one of the plurality of subcodes.
a trellis code unit for successively encoding respective first portions of the sequence of digital words to produce a corresponding sequence of trellis-encoded words, each of the trellis-encoded words corresponding in the sequence, to one of the digital words;
a block code unit for encoding respective second portions of the digital words to provide codewords from the selected ones of subcodes of the block code, the block code unit being controllable to use selected ones of a plurality of subcodes of the block code for such encoding; and selector means responsive to the sequence of trellis-encoded words for controlling the block code unit to select, for each trellis-encoded word output from the trellis code unit, a corresponding one of the plurality of subcodes.
16. Apparatus as claimed in claim 15, wherein the block code unit comprises a Reed-Muller encoder for encoding the second portions of the digital words to provide a sequence of Reed-Muller encoded words, the selector means comprises means for mapping the trellis-encoded words to coset leaders of cosets of the Reed-Muller code, and the block code unit further comprises a summing device for summing each coset leader with the corresponding Reed-Muller encoded word to provide said codeword.
17. Apparatus as claimed in claim 15, wherein the trellis encoder comprises a plurality of input ports and a corresponding plurality of delay elements equal in number to the number of bits in said first portion and a plurality of delay elements equal in number to the number of bits in the second portion, each delay element having a delay equal to the duration of a said digital word, the input ports being connected directly to a first set of inputs of the selector unit and via the delay elements to a second set of inputs of the selector unit.
18. Apparatus as claimed in claim 15, wherein the trellis encoder comprises a plurality of input ports corresponding to the bits of first portion of the digital signal, each for receiving a respective one of said the bits, a corresponding plurality of delay elements each having an input connected to a respective one of the plurality of input ports, a plurality of summing devices each having a first input connected to an output of a respective one of the plurality of delay elements and an output connected to a respective one of a corresponding plurality of inputs of the selector means, that one of said plurality of delay elements connected to the first of the input ports having its output connected to a second input of that one of said summing device having its first input connected to the last of the input ports and, by way of a further delay element, to a further input of the selector means preceding its plurality of inputs, each of the delay elements having a delay substantially equal to the duration of a said digital word.
19. A decoding apparatus for decoding codeword vectors produced by encoding a digital signal comprising a sequence of digital words, each comprising a first portion and a second portion, to provide a corresponding sequence of codewords, the sequence of codewords being supplied to a transmission or storage medium, and extracted as acorresponding sequence of codeword vectors from the transmission or storage medium, the codewords being encoded by, using a trellis code, successively encoding respective first portions of the sequence of digital words to produce a corresponding sequence of trellis-encoded words, each of the trellis-encoded words corresponding, in the sequence, to one of the digital words; using each trellis-encoded word to select a corresponding one of a plurality of subcodes of a block code; and using the selected subcode to encode the second portion of the corresponding digital word; the decoding unit comprising;
means for operating upon each of the codeword vectors using a decoder for each of the subcodes to produce, for each subcode, an estimated decoded second portion and a metric representing the likelihood that the estimated decoded second portion is correct, given that the assumed subcode is correct;
a trellis decoder unit having means for operating upon the sequence of likelihood metrics and the associated estimated second portions to provide a sequence of estimated first portions;
and means for associating with each of the estimated first portions the corresponding estimated second portion thereby to provide a sequence of output digital words corresponding to the sequence of digital words originally encoded.
means for operating upon each of the codeword vectors using a decoder for each of the subcodes to produce, for each subcode, an estimated decoded second portion and a metric representing the likelihood that the estimated decoded second portion is correct, given that the assumed subcode is correct;
a trellis decoder unit having means for operating upon the sequence of likelihood metrics and the associated estimated second portions to provide a sequence of estimated first portions;
and means for associating with each of the estimated first portions the corresponding estimated second portion thereby to provide a sequence of output digital words corresponding to the sequence of digital words originally encoded.
20. A decoding apparatus as claimed in claim 19, for decoding said codewords produced by encoding said second portions by operating upon each second portion using a Reed-Muller code and adding to each Reed-Muller encoded word a coset leader, the coset leaders being selected by mapping the trellis-encoded words to respective coset leaders of the Reed-Muller code, wherein, in the decoding apparatus, the means for operating upon each of the sequence of codeword vectors comprises means for combining with each codeword vector each of the coset leaders and Fast Hadamard Transform means for operating upon the vectors resulting from such combination to produce said estimated decoded second portion and the metric representing the likelihood that the estimated decoded second portion is correct, given that the assumed subcode is correct.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA002185847A CA2185847A1 (en) | 1996-09-18 | 1996-09-18 | Method and apparatus for encoding and decoding digital signals |
| US08/715,861 US5870414A (en) | 1996-09-18 | 1996-09-19 | Method and apparatus for encoding and decoding digital signals |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA002185847A CA2185847A1 (en) | 1996-09-18 | 1996-09-18 | Method and apparatus for encoding and decoding digital signals |
| US08/715,861 US5870414A (en) | 1996-09-18 | 1996-09-19 | Method and apparatus for encoding and decoding digital signals |
Publications (1)
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| CA2185847A1 true CA2185847A1 (en) | 1998-03-19 |
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Family Applications (1)
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| CA002185847A Abandoned CA2185847A1 (en) | 1996-09-18 | 1996-09-18 | Method and apparatus for encoding and decoding digital signals |
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| Country | Link |
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| US (1) | US5870414A (en) |
| CA (1) | CA2185847A1 (en) |
Families Citing this family (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5841768A (en) * | 1996-06-27 | 1998-11-24 | Interdigital Technology Corporation | Method of controlling initial power ramp-up in CDMA systems by using short codes |
| ZA965340B (en) * | 1995-06-30 | 1997-01-27 | Interdigital Tech Corp | Code division multiple access (cdma) communication system |
| US7020111B2 (en) * | 1996-06-27 | 2006-03-28 | Interdigital Technology Corporation | System for using rapid acquisition spreading codes for spread-spectrum communications |
| US6360346B1 (en) * | 1997-08-27 | 2002-03-19 | Sony Corporation | Storage unit, method of checking storage unit, reading and writing method |
| US6078625A (en) * | 1997-10-20 | 2000-06-20 | Sicom, Inc. | Pragmatic decoder and method therefor |
| US20020051434A1 (en) * | 1997-10-23 | 2002-05-02 | Ozluturk Fatih M. | Method for using rapid acquisition spreading codes for spread-spectrum communications |
| US6081918A (en) * | 1997-11-06 | 2000-06-27 | Spielman; Daniel A. | Loss resilient code with cascading series of redundant layers |
| CN1531234B (en) | 1999-07-06 | 2010-09-29 | 三星电子株式会社 | Coder and coding method for communication system |
| JP3923743B2 (en) * | 2000-03-29 | 2007-06-06 | 株式会社東芝 | Decoding device and decoding method |
| WO2002015409A1 (en) * | 2000-08-18 | 2002-02-21 | Samsung Electronics Co., Ltd | Channel coding/decoding apparatus and method for a cdma mobile communication system |
| KR100421165B1 (en) * | 2000-10-21 | 2004-03-04 | 삼성전자주식회사 | Apparatus for generating block code and method thereof in communication system |
| US7065148B2 (en) * | 2000-11-06 | 2006-06-20 | Broadcom Corporation | Super-orthogonal space-time trellis codes, and applications thereof |
| US6956891B2 (en) * | 2000-11-15 | 2005-10-18 | Go-Cdma Limited | Method and apparatus for non-linear code-division multiple access technology |
| US20030126545A1 (en) * | 2001-10-05 | 2003-07-03 | Tan Alfred Keng Tiong | Non-linear code-division multiple access technology with improved detection algorithms and error correction coding |
| US7017104B1 (en) * | 2001-08-24 | 2006-03-21 | Mediatek Inc. | Method and system for decoding block codes by calculating a path metric according to a decision feedback sequence estimation algorithm |
| CN1555604A (en) * | 2002-04-04 | 2004-12-15 | 连宇通信有限公司 | Method for time-space block coding based on hyper-set partition principle |
| WO2003085874A1 (en) * | 2002-04-05 | 2003-10-16 | Roke Manor Research | Generation of a block coded terminal identifier |
| US6973579B2 (en) | 2002-05-07 | 2005-12-06 | Interdigital Technology Corporation | Generation of user equipment identification specific scrambling code for the high speed shared control channel |
| US7168028B2 (en) * | 2002-10-31 | 2007-01-23 | Lucent Technologies Inc. | Method and apparatus for MAP decoding of binary hamming codes and related error correction codes |
| KR20040085545A (en) * | 2003-03-31 | 2004-10-08 | 삼성전자주식회사 | Apparatus for decoding error correction doe in communication system and method thereof |
| US7881454B2 (en) * | 2005-06-10 | 2011-02-01 | Teletech Holdings, Inc. | Integrated call management |
| US8098773B1 (en) | 2005-09-19 | 2012-01-17 | Piesinger Gregory H | Communication method and apparatus |
| KR100762283B1 (en) * | 2006-02-07 | 2007-10-08 | 포스데이타 주식회사 | Decoder and Decoding Method |
| CN101094031A (en) * | 2006-06-21 | 2007-12-26 | 株式会社Ntt都科摩 | Data transmission method and device thereof |
| KR100887090B1 (en) * | 2007-09-13 | 2009-03-04 | 삼성전기주식회사 | Direct sequence spread spectrum transceiver |
| US8537787B2 (en) * | 2010-04-28 | 2013-09-17 | FutueWei Technologies, Inc. | System and method for mapping and decoding codewords in acknowledgement information communications |
| EP3979509A1 (en) | 2015-09-21 | 2022-04-06 | Hyphy USA, Inc. | System for transporting sampled signals over imperfect electromagnetic pathways |
| WO2018170546A1 (en) | 2017-03-20 | 2018-09-27 | Rockoff Security | Media interfaces incorporating adaptive compression |
| CN110022278B (en) * | 2019-03-06 | 2020-08-04 | 华中科技大学 | Coding method and coder of (n, n (n-1), n-1) -PGC in communication modulation system |
| US11716114B2 (en) | 2020-11-25 | 2023-08-01 | Hyphy Usa Inc. | Encoder and decoder circuits for the transmission of video media using spread spectrum direct sequence modulation |
| US11769468B2 (en) | 2022-01-19 | 2023-09-26 | Hyphy Usa Inc. | Spread-spectrum video transport integration with timing controller |
| US11842671B2 (en) | 2022-03-07 | 2023-12-12 | Hyphy Usa Inc. | Spread-spectrum video transport source driver integration with display panel |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4295218A (en) * | 1979-06-25 | 1981-10-13 | Regents Of The University Of California | Error-correcting coding system |
| US4761778A (en) * | 1985-04-11 | 1988-08-02 | Massachusetts Institute Of Technology | Coder-packetizer for random accessing in digital communication with multiple accessing |
| US4939555A (en) * | 1987-05-13 | 1990-07-03 | At&T Bell Laboratories | Trellis coding arrangement |
| US5142539A (en) * | 1990-03-06 | 1992-08-25 | Telefonaktiebolaget L M Ericsson | Method of processing a radio signal message |
| US5151919A (en) * | 1990-12-17 | 1992-09-29 | Ericsson-Ge Mobile Communications Holding Inc. | Cdma subtractive demodulation |
| US5218619A (en) * | 1990-12-17 | 1993-06-08 | Ericsson Ge Mobile Communications Holding, Inc. | CDMA subtractive demodulation |
| US5230003A (en) * | 1991-02-08 | 1993-07-20 | Ericsson-Ge Mobile Communications Holding, Inc. | Decoding system for distinguishing different types of convolutionally-encoded signals |
| US5233629A (en) * | 1991-07-26 | 1993-08-03 | General Instrument Corporation | Method and apparatus for communicating digital data using trellis coded qam |
| US5353352A (en) * | 1992-04-10 | 1994-10-04 | Ericsson Ge Mobile Communications Inc. | Multiple access coding for radio communications |
| US5550809A (en) * | 1992-04-10 | 1996-08-27 | Ericsson Ge Mobile Communications, Inc. | Multiple access coding using bent sequences for mobile radio communications |
| US5651032A (en) * | 1993-11-04 | 1997-07-22 | Kabushiki Kaisha Toshiba | Apparatus and method for trellis decoder |
-
1996
- 1996-09-18 CA CA002185847A patent/CA2185847A1/en not_active Abandoned
- 1996-09-19 US US08/715,861 patent/US5870414A/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US5870414A (en) | 1999-02-09 |
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