CA2066195C - Permuted block synchronization - Google Patents

Permuted block synchronization

Info

Publication number
CA2066195C
CA2066195C CA 2066195 CA2066195A CA2066195C CA 2066195 C CA2066195 C CA 2066195C CA 2066195 CA2066195 CA 2066195 CA 2066195 A CA2066195 A CA 2066195A CA 2066195 C CA2066195 C CA 2066195C
Authority
CA
Canada
Prior art keywords
synchronization
words
interest
word
data transmission
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CA 2066195
Other languages
French (fr)
Other versions
CA2066195A1 (en
Inventor
Stephen Norman Levine
Robert Johnson Irvine
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of CA2066195A1 publication Critical patent/CA2066195A1/en
Application granted granted Critical
Publication of CA2066195C publication Critical patent/CA2066195C/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/04Speed or phase control by synchronisation signals
    • H04L7/041Speed or phase control by synchronisation signals using special codes as synchronising signal

Abstract

There is provided a mechanism for block synchronization. It comprises: predeterminally arranging permutations of syn-chronization words about a point of interest, transmitting such arrangement, receiving that transmission having permuted syn-chronization words predeterminally arranged about that point of interest, detecting at least part of certain permutations of those synchronization words, and locating the point of interest with reference to the permutation of one detected word about another and their arrangement about the point of interest.

Description

206~195 PERM[JT~ BLOCK SYNCIIRONIZATION

THE FIELD OF INVENTION

This invention is concerned with block synchronization in data tr~n~mi.~inn systems.

More particularly, this invention is concerned with block synchronization using p~. ",u~ synchronization words.

BACKGROUND OF TEIE INVENIION

For a r~ceivel to decode data mP~s~g~q.s tr~n~mitt~1 to it, it must first locate the data in the tr~n~mi~ion, known as block synchronization. Thus, long synchronizing sequences usually precede data so that the receiver can reliably correlate on the sequence and synchronize to the data. In radio envilvll.llents where the signal is subject to fading, as in land-mobile radio, 20~fil95 W O 91/05423 P~r/US90/04920 the signal may be lost during these long synch sequences and the receiver will have difficulty synchronizing to the data and recovering it.
US Patent No. 4,694,473 to Etoh attempts to solve this 5 problem by preceding the data message by three different synchronization sequences. He locates the data in the transmission by reference to the known distance between the data and that sequence on which the receiver was able to correlate. The disadvantage in this approach is that it 10 requires multiple correlators/correlations, three of them.
This invention takes as its object to overcome these shortcomings and to realize certain advantages presented below.
Rather than using multiple synchronization sequences and 1~ multiple correlators/correlations, this invention uses various permutations of a single synchronizing word (and its inverse), thereby using only one single correlator/correlation.

SUMMARY OF THE INVENTION

There is provided a mechanism for block synchronization. It comprises: predeterminally arranging permutations of synchronization words about a point of interest, transmitting such arrangement, receiving that transmission having 25 permuted synchronization words predeterminally arranged about that point of interest, detecting at least part of certain permutations of those synchronization words, and locating the point of interest with reference to the permutation of one detected word about another and their arrangement about the 3 0 point of interest.

~ WO 91/05423 ~ ~ ~ PCI/US90/04920 { - 3 - 206619~

nF~CRIPTION OF THF DRAWINGS

Additional objects, features and advantages of the invention will be more clearly understood and the best mode contemplated for practicing it in its preferred embodiment will be appreciated (by way of unrestricted example) from the following detailed description, taken together with the accompanying drawings in which:
Figure 1 is an illustration of permuted synchronization according to the invention.
Figure 2 iS a word permutation tree according to the invention .
Figure 3 is a relative phase permutation tree according to the invention.

DFTAII FD DFSCRIPTION

Figure 1 is an illustration of permuted synchronization according to the invention.
Figure 1 illustrates a data message preceded by all eight possible permutations of a synchronization word (S) and its bit-wise inverse (O -- two words taken three at a time consecutively, or 23=8. That is, SSS
~SS
SSS
SSS etc., resulting in the overlapping composite of:
SSSSSSSSSS that contains all eight permutations, each permutation being unique and unambiguous. (In fact, it can be W O 91/05423 PC~r/US90/04920 -shown that if the first eight words are cyclically rotated and then the resultant first two words are appended to the rotated eight, then an equally acceptable initialization vector is generated, or more generally, where J is the number of 5 available words to be permuted and N is the number of consecutive word detections, then the first JN words may be cyclically rotatad and the resultant most significant N-1 words appended to generate a maximal length initialization vector of JN + N -1. This cyclical property can be 10 advantageously utilized to cause receivers having cyclicai rotations of this vector to look for the data of interest to begin at a different, and potentially incorrect locations.) The 23 scheme presented above would correspond to a detection criterion that three consecutive words must be 15 detected to establish the one-in-eight unambiguous permutation (and its corresponding characteristic distance from the data of interest). To reliably detect the synchronization word or its inverse, the word should have high auto-correlation characteristics and low cross-correlation 2 0 characteristics with respect to its inverse, as is well understood by those ordinarily skilled in this field. Thus, on a synch word of say 21 bits, 3 correlation errors or less would correlate to S while errors of 18 or more (in the very same correlator/ correlation) would correlate to the inverse, S.
2 5 Accordingly, only one correlator/ correlation is required to detect one synch word and its inverse. Similarly, only two correlators/correlations are required to correlate to four words, X, L Y, and Y.
Figure 2 is a word permutation tree according to the 30 invention. It illustrates that any given word may be followed by any other available word (i.e., S or S); thus, if the first word is S, it can be followed by either S (moving to the left) ~ WO 91/05423 PCI`/US90/04920 .
206619~

or S (moving to the right), which in turn, can be followed by either S or S.
If the detection criterion is that the data must be locatable from the detection of any two consecutive words, then no 5 identical pairs of two consecutive words can exist; otherwise, one would not know which of the two pairs should be used to locate the information. Each X in Figure 2 represents a permutation that should not be allowed to exist if our detection criterion is not to yield ambiguous results.
10 Accordingly, if pair B were allowed and fading caused node 1 of pair A to have been lost, the pair SS alone would not permit you to determine whether you were now at node 2 (via node 1) or node 3 (via node 2). Thus, node 3 would be a disallowed permutation and is, therefore, marked X; likewise, 15 pair C in view of pair A. As a result, to comply with this detection criterion, the maximum length initialization vectors where any consecutive pair of words would unambiguously locate the data would be: SSSSS or its cyclical rotation:
SSSS$; a complementary tree beginning with S would also 20 exist, having their two inverses, SS~S and SSSSS.
Let's say that the initialization vector SSSS~; is the one of those four selected as the predetermined arrangement to precede the data. Although the synch word, S, is itself a 21-bit string, this initialization vector could be more simply 25 represented in memory by a minimum number of bit symbols, Sc02, S=12. The decoded initialization vector would then be reduced to 001102. If, let's say two consecutive words, 012, were detected, the actual distance from the detected pair to the data is proportional to the intersymbol distance that the 30 detected symbols, 012, must be advanced along the initialization vector symbols 001102, until a match is found.
(The physical implementation would, of course, be through a table and the distance from the beginning of that table to the 3 PCI'/US90/04920 ~
20661~5 corresponding index into that table. The same table, with differing beginning pointers, could be used by the transmitter and receiver to simplify both the encoding and decoding, particularly in cyclical rotations for encryption applications.) Thus, using only one correlator/correlation, and two words (one synch pattern and its inverse), the location of data can be unambiguously established from the unique permutation detected from any two consecutive words.
In QAM phase-modulated systems, rather than differentiating synch words by their high positive and negative (inverse) bit correlations, a single synch word, S, could be differentiated by the absolute phase associated with its complex correlation.
Thus, where transmitter and receiver l/Q channels are phase-synchronized, S would be logically equivalent to synch pattern S (ref: zero degrees) rotated by 180 degrees (in ~/4 QPSK
quadrature modulation, four words X, X, Y, and Y. are easily modeled using one synch pattern, no inverses, but four phases).
Where the transmitter and receiver are not phase-synchronized, the relative phase shift in complex-correlation 2 0 from word-to-word can be used to differentiate the words instead. A phase shift is introduced by inserting, between words, bits whose sole function is to rotate the relative phase of the following word. Figure 3 is a relative phase permutation tree according to the invention. In the same 2~ manner and under the same detection criterion as Figure 2, Figure 3 illustrates, moving to the left, S transmitted at zero degrees relative phase shift with respect to the first and, moving to the right, S transmitted at 180 degrees relative phase shift. If, S = ~0 (no phase change word to word) and S
= ~180 (180 degree phase change word to word), the four maximum length initialization vectors in the relative phase domain are, as illustrated:

~ WO91/OS423 PCI'/US90/04920 ~180 A180 ~0 ~0 ~180 (corresponding to SSSSS) ~180 ~0 A0 ~180 ~180 (corresponding to SSSSS) A0 ~0 ~180 A180 ao (corresponding to SS~S) A0 ~180 ~180 ~0 ~0 (corresponding to SSSSS
5 as in the bit-domain of Figure2).
Thus, there has been provided a mechanism for block synchronization. It comprises: predeterminally arranging permutations of synchronization words about a point of interest, transmitting such arrangement, receiving that 10 transmission having permuted synchronization words predeterminally arranged about that point of interest, detecting at least part of certain permutations of those synchronization words, and locating the point of interest with reference to the permutation of one detected word about 15 another and their arrangement about the point of interest.
The attendant advantages of this invention include a substantial reduction in the number of correlators or correlations required for detection and greater immunity to faded or otherwise lost signals. As a further advantage, it is 2 0 well understood by those ordinarily skilled in this field how to construct the means for carrying out this methodology.
While the preferred embodiment of the invention has been described and shown, it will be appreciated by those skilled in this field that other variations and modifications of this 25 invention may be implemented. Although the permutation tree gets far more complex, the invention accommodates various detection criterion; for example, initialization vector SSSS
satisfies the detection criterion that ANY two (including nonconsecutive) detections unambiguously locate the data, i.e., 30 DDX, DXD, XDD, OR DXXD, where D indicates a detection and X

WO 91/05423 - ~ PCI`/US9~/04920 ~

- 8 - 2 ~ 6 6195 indicates a missed detection or "don't care". Similarly, ~+90 ~-90 ~180 and ~0 satisfies the detection criteria: DD, DXD, and DXXD.

In the same spirit as that of the foregoing invention, the information between synchronization words could embed information about where the data message begins. A variable time delay (a variable number of bits) could be interleaved between successive repetitions of a single synchronization word (S). Thus, in the following initialization vector:

the numerals between successive synchronization words (S) indicates the number of delay bits between sync words.
Since each two successive synch words has a unique characteristics delay between them, the beginning of the data message can be unambiguously located from the detection of the delay between any two successive synch words. Moreover, since the delay is cumulative (22 bits to the second synch, 23 between the second and third, 45 between the first and third, 47 between the second and fourth, etc.), the data can be unambiguously located from the detection of ANY two synch words. The bits so interleaved, more than functioning as mere place-holders, could be utilized to carry other information;
thus, 1+2+3+4+5 or 15 bits of information could be encoded in the delay bits themselves.

Although this technique has been presented utilizing a 3 0 single sync word (S) having high autocorrelation properties to reduced the number of correlators/correlations, it need not be so limited.

.

g These and all other variations and adaptations are expected to fall within the ambit of the appended claims.

Claims (8)

WHAT IS CLAIMED IS:
1. A method of synchronization comprising:
predeterminally arranging synchronization words in a signal in relation to an information of interest, transmitting such arrangement, receiving that transmission having synchronization words predeterminally arranged in relation to that information of interest, detecting at least certain of those synchronization words and their arrangement with respect to one another, and synchronizing to the information of interest using the detected arrangement of one detected word in relation to another and their arrangement in relation to the information of interest.
2. A method of synchronization comprising:
receiving a transmission having synchronization words predeterminally arranged in relation to information of interest, detecting at least certain of those synchronization words and their arrangement with respect to one another, and synchronizing to the information of interest using the detected arrangement of one detected word in relation to another and their arrangement in relation to the information of interest.
3. A method as claimed in claim 2 wherein synchronization words are variably spaced in relation to the information of interest.
4. A method as claimed in claim 1 wherein the step of predeterminally arranging comprises the step of spacing the synchronization words variably in relation to the information of interest.
5. A method of synchronization comprising the steps of:
arranging a first, a second, and a third synchronization word in a data transmission;
transmitting the data transmission from a transmitter;
receiving the data transmission at a receiver;
detecting the first and third synchronization words;
determining the arrangement of the first to the third synchronization words; andsynchronizing the receiver based upon the arrangement.
6. A method of synchronizing a data transmission containing an information of interest comprising the steps of:
inserting a first synchronization word in the data transmission;
inserting a second synchronization word in the data transmission a first predetermined distance from the first synchronization word;
inserting a third synchronization word in the data transmission a second predetermined distance, different from said first predetermined distance, from the second synchronization word;
transmitting the data transmission from a transmitter;
receiving the data transmission at a receiver;
detecting one of said first, second, and third synchronization words;
detecting another of said first, second, and third synchronization words;
determining a distance between the detected synchronization words; and synchronizing to the information of interest using said first detected synchronization word and said determined distance between the detected synchronization words.
7. The method of claim 6 wherein said first, second, and third words each consists of a first bit pattern.
8. A method of synchronizing a data transmission containing an information of interest comprising the steps of:
inserting a first synchronization word having a first bit pattern in the data transmission;

inserting a second synchronization word having said first bit pattern in the data transmission a first predetermined distance from the first synchronization word;inserting a third synchronization word having said first bit pattern in the datatransmission a second predetermined distance, different from said first predetermined distance, from the second synchronization word;
transmitting the data transmission from a transmitter;
receiving the data transmission at a receiver;
detecting one of said first, second, and third synchronization words;
detecting another of said first, second, and third synchronization words;
determining a distance between the detected synchronization words; and synchronizing to the information of interest using said first detected synchronization word and said determined distance between the detected synchronization words.
CA 2066195 1989-09-29 1990-09-04 Permuted block synchronization Expired - Lifetime CA2066195C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US41905289A 1989-09-29 1989-09-29
US419,052 1989-09-29

Publications (2)

Publication Number Publication Date
CA2066195A1 CA2066195A1 (en) 1991-03-30
CA2066195C true CA2066195C (en) 1995-03-28

Family

ID=23660607

Family Applications (1)

Application Number Title Priority Date Filing Date
CA 2066195 Expired - Lifetime CA2066195C (en) 1989-09-29 1990-09-04 Permuted block synchronization

Country Status (4)

Country Link
AU (1) AU639023B2 (en)
BR (1) BR9007691A (en)
CA (1) CA2066195C (en)
WO (1) WO1991005423A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0779746B1 (en) * 1995-12-11 2004-12-01 Hitachi Denshi Kabushiki Kaisha Out-of-synchronization recovery method and apparatus of data transmission system

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3812430A (en) * 1971-08-11 1974-05-21 Communications Satellite Corp Tdma satellite communications system with improved acquisition
NL8003477A (en) * 1980-06-16 1982-01-18 Philips Nv DEVICE FOR PROCESSING SERIAL INFORMATION PROVIDED FOR SYNCHRONIZATION WORDS.
US4763339A (en) * 1984-03-15 1988-08-09 General Electric Company Digital word synchronizing arrangement
JPS61205039A (en) * 1985-03-08 1986-09-11 Oki Electric Ind Co Ltd Block synchronizing communication system
US4876740A (en) * 1985-08-30 1989-10-24 Motorola, Inc. Radiotelephone system employing digitized speech/data signalling

Also Published As

Publication number Publication date
AU639023B2 (en) 1993-07-15
WO1991005423A1 (en) 1991-04-18
AU6336390A (en) 1991-04-28
BR9007691A (en) 1992-07-07
CA2066195A1 (en) 1991-03-30

Similar Documents

Publication Publication Date Title
US4827514A (en) Method and apparatus to detect and recover a pseudo-random sequence
KR950016063A (en) System and method for combined demodulation of CDMA signals
KR960020132A (en) Data rate detector
TW484266B (en) Cell search procedure for time division duplex communication systems using code division multiple access
US7430262B2 (en) Frame synchronization method and system
EP0039150B1 (en) Methods of and apparatuses for processing binary data
JPH0691520B2 (en) Out-of-frame detection method
CA1051133A (en) Parity framing of pulse systems
WO1999034568A1 (en) Circuit for capturing frame sync signal in receiver
CA2066195C (en) Permuted block synchronization
JPS58131767A (en) Digital information signal transmitter/receiver
US5339337A (en) Permuted block synchronization
US20080117952A1 (en) Self-supporting simplex packets
JP3712593B2 (en) Method and apparatus for enabling transmission of variable length coded data in a low S / N ratio environment
EP1046240A1 (en) A method for using circular spreading codes to achieve high bit densities in a direct-sequence spread spectrum communications system
US5588030A (en) Apparatus and method for the synchronization of data in a bit stream
JPH07336347A (en) Frame synchronization detection circuit
CA2439287C (en) Frame synchronization method and system
JPH08186554A (en) Time division multiplex transmitter and decoding circuit
JPH0329434A (en) Frame out of synchronism detection system
US7167111B2 (en) Method of coding and/or decoding binary data for wireless transmission, particularly for radio transmitted data, and equipment for implementing this method
CN1969496B (en) Carrier phase ambiguity correction
KR100556890B1 (en) Method for syncronizing frame of td-scdma
US5398237A (en) Acquisition and tracking of independent quadrature modulated bitstreams
CN105959077B (en) The frame synchornization method that anti-position is slided

Legal Events

Date Code Title Description
EEER Examination request
MKEX Expiry