CA1291215C - Fault detection - Google Patents

Abstract

ABSTRACT

Apparatus for the detection of leakage current in a system includes a power supply (800) and conductors from the supply for supplying power to a load (813) connected to the system. There is an interrupter (806) connected in the system and to a ground point (807) such that a ground leakage current in the system has a closed circuit. Activation of the interrupter every 12 seconds effectively generates a pulse interrupted ground fault signal. Such signal is detected by a magnetic sensor (25) located relative to a multi-feeder system with high capacitive reactance (810). The sensor is immune to random electromagnetic and electrostatic conditions in the distribution system. The sensor (25) is synchronized to operate with the interrupter (806) so that sensing is effected at a steady level of a square wave interrupted pulse.

Description

- FAULT DETEC~ION 3 BACKGROUND

I This invention relates to fault detection particularly, low level DC fault currents. In particular, it relates to an apparatus and a method for detecting ground faults in normally ungrounded multi- -feeder DC distribution systems having significant capacitive reactance components and under the influence of strong electromagnetic fields. These situations are normally associated with utility power generation and distribution, industrial plants, and computer/electronic systems therein. In such systems, ~round faults must be located without taking unaffected equipment out of servlce.

Generating stations and substations use 110 to 240 volt ungrounded battery systems to operate control systems and other DC devices. Some of the control systems are critical to plant operational integrity and must operate at all times. If a ground fault on the ungrounded battery system, if not isolated, will leak battery power to ground. This leakage may be sufficient to af~ect the battery system's operational integrity by lowering battery voltage. I~ two ground faults on opposite polarities of the same battery system occur simultaneously in the system, the battery may be shorted through ground. If two or more simultaneous ground faults on the same conductor occur, an undesirable bypassing of controlling devices may occur and cause malfunction or misoperation, consequently isolation and repair of the first fault must, therefore, be performed as guickly and efficiently as possible to minimize the chances that the whole battery system will be shorted or ~ecome inoperational.

2 ~i~?~ 5 The ma~or components of an ungrounded DC
distribution system usually include the DC battery assembly and battery charger. Main source conductors connect the battery assembly to the circuit breaker of a multi-feeder distribution panel, and the individual loads to those feeders. The type of loads associated with this system are motors, solenoids, relays, electronic monitoring equipment, and electronic control devices. A common characteristic associated with this type of system is, firstly, stray capacitance created by the distribution lines with respect to ground and, secondly, input capacitance reactance of the loads. The value of the stray capacitance ranges from a few picofarads to 200 microfarads or more. This is an important characteristic since it plays an important part in the type of test equipment that can be used to locate ground fault currents.

A basic problem in such systems is the need to identify small DC fault currents, namely, low to high impedance ground faults in the presence of much larger DC load currents and electroTnagnetically induced noise currents.

In DC ungrounded power distribution systems, it is important to determine whether a fault resistance exists between ground and any of the distribution lines or loads attached to those lines. Should a fault occur and the resistance value o~ the fault is below the predetermined alarm value it is important to locate the fault and remove it without interrupting service to the branch or feeder.

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3 ~ 5 One method used to locate ground faults is to - open circuit breakers one at a time until the fault disappears. The ~ault is then isolated during the time the branch circuit is de-energized and repaired. Should a ground fault occur on a critical branch circuit which cannot be opened for ground fault tracing, this method cannot be used.

A known ground detection circuit consists of a center-tapped high resistance connected across the DC
source and an indicating voltmeter between the center tap and ground. A ground fault anywhere on the DC
system causes an indication of the voltmeter. Since thP
high resistance limits the ground ~ault current to a few milliamperes, the faulted equipment will not be tripped off when a fault occurs.

Other detection circuits consists of two resistors of equal value connected from each side o~ the main conductors to ground and a monitor instrument that can be switched between ground and the distribution lines. The monitoring instrument indicates a voltage imbalance when a ground fault exists between line and ground. The imbalance represents a percentage of ground ~ault to be determined. This circuitry is susceptible to changing loads connected to the distribution lines and the influences of electromagnetically induced noise to identify low level fault currents effectively.

In other arrangements, the resistors are replaced by relays or solenoids driven by parallel windings. Each winding is connected between ground and one of the lines. When a ground fault condi~ion exists an imbalance potential is created on one of the windings , 4 ~ .S
which causes current to flow through the windings to acti~ate the electromechanical system and initiate a ground fault condition on the system. The limitation with this type of design is that the instrument is detecting relatively high level fault current condition only but is unable to determine where the fault is located. Additional troublPshooting is needed to determine the location, and may re~uire the injection of an AC signal into the DC system in order to trace the source of the ~ault. This method cannot be used on systems having large stray capacitance or sensitive electronic equipment as loads since the AC injected signal has to overcome very low impedance paths to ground. The lower the impedance the larger the AC
injected signal needs to be to locate the fault. With high energy levels it is possible inadvertently to trip control devices or damage electronic equipment or loads connected to the system. The critical nature of these circuits requires thPm not to be turned off to locate the fault. Thus, a fault detection system is needed to locate the fault. Thus, a fault detection system is needed to locate the faulty equipment without interrupting these critical circuits.

It is also known elsewhere to test for DC
faults in small systems employing grounded 12-volt battery type power supplies in automobiles and the like.
Such grounded DC systems require the connection of an injector across term~nals of the battery supply.
Thereafter, a detector is applied over the wiring system with sound detection means so that an increasing sound would indicate where a DC fault sxists. Such systems operate in response to high DC fault currents in an environment where there is no signi~icant capacitive or . ~, ~ 2~5 inductive reactances of consequence and where the DC
system is effectively shut off when the fault detection is being made.
., It is also known in AC systems to detect ground leakage by a relay which interrupts the system so as to introduce a fault current in the sense of a pulsating input. Such systems, however, are of a nature that a D'Arsonval type meter o~ permanent magnet moving coil meter are used for detection of the pulsating input. Such a meter requires a current transformer suitable for detecting relatively large AC fault currents. This is unsuitable for measuring pulsating DC fault currents of a lower value. These detection systems are particularly unsuitable in high electrostatic and electromagnetic environments.

In another method of ground fault detection, a slope detector is used to detect an interrupt signal having a frequency of 2Hz per second. This signal is obtained by connecting two 5,000 ohm resistors from each side of the DC distribution line through an interrupter relay to ground. By controlling the opening and closing of the relay, the fault current is interrupted to generate a DC fault pulse. At the same time, a magnetic sensor and associated electronics is used to detect the rise and fall, namely, slope, of the interrupted DC
signal. When a positive identification of the fault current is achieved, a periodic audio signal is generated or a flashing LED display is activated. With this detection method should the stray capacitance of the DC distribution system be above about 50 microfarads and the'fault resistance be above about 5,000 ohm, the identiflcation of the fault location may be difficult since khe stray capacitance on the line can absorb most 6 ~2~Z~s of the initial current generated by the interrupt pulse.
This can cause a false slope signal to be produced and the detector circuit will acknowledge this as a fault condition. Also external electromagnetic interferences - 5 can produce an unwanted output signal that can interfere with the detactor.

There is thus a need to overcome disadvantages of the prior systems, and provide an effective means for detecting and locating faults in a supply system.

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SlJMMARY OF 'r~lE I~VENTION

The disadvantages of prior systems are overcome with a detection system using synchronization and a detection circuit operating at low energy level values, and means for eliminating the effects of stray capacitance and unwanted electromagnetic interferences.

According to the invention, there is provided apparatus and a method for the detection of fault signals in a supply system including conductors for supplying powar to a load connected in the system.
There is an impedance element for connection across the power supply, a tapping point to the impedance element and a connector between the tapping point and a point to ground to complete a circuit for a fault signal in the system. An interxupter periodically pulses a ground ~ault signal into the system thereby to generate a pulse interrupted signal, and a maynetic detector relative to the system senses the interrupted signal and thereby provides for detecting the location of the fault. The detector is adapted to operate in synchronization with the interrupter whereby the detector senses a substantial steady state pul~e level.

In the preferred form of the invention, the pulse is a s~uare wave and the detection is ef~ected during the steady state high level o~ the square wave.
The interrupter cixcuit consists of a resistor/capacitor oscillator circuit which generates a synchronization signal or alternatively a crystal oscillator can be used to generate ,the synchronization signal.

The detector assemhly can determine whether a - positive or negative conductor of the conductors hàs the fault.

The stray capacitors in the system is substantially discharged prior to detection of a fault, through a bank of resistors, partly included in the impedance elementl and the cycle for the square wave is determined such that khere is sufficient time for discharging the stray capacitance. A pulser or interrupter is adapted to interrupt the ground fault circuit periodically to generate an interrupted ground fault signal.

There is provided an apparatus and method for the detection of low level ground leakage in a normally ungrounded multi-feeder DC distribution system which includes a DC power supply and conductors from the supply for supplying power to load means connected to the multi-feeder DC distribution system.

The ground fault signal is detected by either a permanently located and/or portable sensor means located relative to the DC system such that a steady level interrupted DC ground ~ault signal can be detected by the sensor means. A low level ground fault can thereby be located in a the DC system.
, The sensor means includes means for suppressing noise, and also includes means for eliminating the effects of distribution system capacitive and inductive reactance, stray capacitance and changing magnetic field effects of undesired electromagnetia and electrostatic sources.

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TheorY of Operation ~ hen the electrical current flows through a conductor it generates a magnetic field in the space - surrounding the conductor. The direction and strength of this magnetic field is dependent on the intensity and direction of the electric current flowing through the conductor and the distance from the center of the conductor. With a toroidal ring of ferromagnetic material placed around the conductor, part of this magnetic field will be confined inside this ringO By cutting a gap through the toroidal ring and placing a magnetic sensitive component inside of this gap this device functions as a probe to detect and provide information defining the direction and intensity of the electric current that flows through the conductor.

When the magnetic saturation point is reached large changes in current flow in the conductor produce small changes to the magnetic field in the toroidal ring surrounding the conductor. One manner of overcoming a saturation condition is to pass through the magnetic - ring an additional conductor (the return path conductor) having a normal operating current flow of the same magnitude but opposite direction. Consequently the net magnetic field inside the magnetic toroidal ring will equal zero. Other external sources of magnetic ~ield such as metal structures have been found to change the zero magnetic balance and produce influencing magnetic ~ields that are detectable by the magnetic probe. To overcome the final magnetic field summation the value is made to equal zero. Any imbalance of current flow in any one of the two conductors being monitored generates l S
a change in magnetic field. This change detected by the magnetic probe provides information about the magnitude of the differential current flowing in the conductors.

DRAWINGS

Figure 1 is a block diagram illustrating an ungrounded DC system with various loads, and in which a ground fault is present in one of the loads, including detector means ~or sensing such fault by means of sensing interrupted pulses.

Figure 2 is a detector circuit block diagram.

Figure 3 and Figure 4 are detailed circuits of the detection circuit block diagram of Figure 2.

Figure 5 is a block diagram of the interrupter means for detecting interrupted ground fault signals.

Figure 6 and Figure 7 are detailed schematic circuits of the interrupter means.

Figure 8 is a bloc~ diagram of the power supply.

Figure 9 is a detailed schematic circuit of tho power supply.

Figure 10 and Figure 11 are general schematics illustrating certain principles of the invention, Figure~
10 being a prior art arrangement.

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Figure 12 is a timing cycle of an interrupter pulse showing the detection timing.

Figure 13 is a block diagram illustrating the electronic system of the detector.

DESCRIPTION

The invention is described in detail with reference to an ungrounded DC system for detection of ground faults.

In Figure 1, apparatus for the detection of low level ground leakage in a normally ungrounded DC
system comprises a DC power battery supply 10. Main bus bars 11 and 12 from the battery supply 10 supply power to different loads 13, 14 and 15 in this exemplary embodiment. Conductors 13a and 13b from main bus bars 11 and 12 connect with load 13. Similarlyl the main bus bars 11 and 12 connect with load 13. Similarly, the main bus bars 11 and 12 are connected to load 14 through conductors 14a and 14b. There are conductors 15a and 15b to load 15.

Across the bus bars or conductors 11 and 12 are resistors 16 and 17 and betw~en these resistor banks 16 and 17 is a tapping point 18. A responsive element in the ~orm of a ground indicator meter 19 is connected between the tapping point 18 and function switch 200 and through function switch 200 to a ground point 235 such that a ground fault leakage in the system closes a ground aircuit to activate the indicator meter 19.
Function switch 200, in one position closes the existing alarm system to ground and in a second position 1 2:~5 activates the ground fault detector system. On interrupter circuit 2000 has an input reference signal connected to point 18 through line 216. Lines 212 and 213 connect the interrupter circuit 2000 to lines 11 and 12. On line 362 there exists a synchronization signal 361 to a detector circuit 125~ Line 209 connects the interrupter circuit 2000 to the function switch 200 and through the function switch 200 to ground point 235. In the interrupter circuit 2000 there is a relay that opens and closes at a frequency of at least 1/12 Hz. In this fashion a steady but interrupted DC fault current is generated through the ground fault circuit and thereby the DC ground fault signal is obtained.

In the one example of the invention, for each load circuit 13, 14 and 15, there is a provided a detector sensor 24 respectivelyO Such detector or sensor 24 includes a magnetic sensing element 25. A
detect:ion circuit 125 indicates whether an interrupted ground signal sensed by the magnetic sensing element, which, for example, is a Hall Effect detector sensing element 25 is related to conductor lines 13a, 13b, 14a, 14b, 15a or 15b, respectively. Line 362 indicates a synchronized signal 361 from the interrupter circuit 2000 to detector circuit 125 in detector 24 to ensure timing operation between pulses from the interrupter 2000 and the operation of the circuit 125 in detector 24. This greatly enhances sensitivity and performance as is more fully described below.

The interrupter 2000 need not be placed into operation until such time as the ground faulk indicator 19 detects the existence of a ground fault current in ~ 4~ 5 the embodiment described. In some cases, however, khe indicator 19 is dispensed with, and the interrupter 2000 is continually applied irrespective of the indicator 19.
With such an arrangement, any portable or permanently located detector 25 and/or sensor 24 indicates a fault current.

Reference is made to Figure 10, Figure 11, Figure 12 and Figure 13, which outline some of the general principles of operation of low level ground leakage detection. Figure 10 is a depiction of prior art problems addressed by the invention as depicted in Figures 11 and 12.

In Figure 10, an ungrounded DC distribution system of, for instance, 130 volts battery supply 800, includes two limiting resistors 801 and 802 of 5000 Ohm connected from each line 803 and 804 to a meter 805.
The meter is connected to an interrupt relay 806 and in turn to station ground 807. When a fault resistance exists at any location on the system, an imbalance voltage between the lines 803 and 804 and station ground 807 is produced. This imbalance is proportional to the fault resistance 808 and is indicated by the instrument 805 monitoring the system. If a direct short circuit from one of the lines 803 and 804 to ground exists, this causes electrical current to flow from the line without the short to the limiting resistor connected to that line. In Figure 10, this is line 803 and resistor 801.
From this resistor 801, current flows to the meter 805, from the meter to the interrupt relay 806, from the interrupt relay 806 to station ground ~07, through ground to a point 817 where the ~ault is located and , .~

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from the fault point through the fault resistor 808 ~o the line 804 with the fault, and back to the DC
distribution system.
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For a short circuit condition the value of the leakage current is about 26 milliamperes. In this condition, stray capacitance 810 associated with the line 804 having the short circuit is dissipated and the interrupt current has an instant value of o and 26 - milliamperes.

For a distribution system with a stray capacitance of 100 microfarads or more and a fault resistance of 40,000 Ohm or more, the system response is different. When the interrupt relay 806 closes the current from the center tap 811 of the two resistors 801 and 802 is divided in three directions. The higher current path is through the 5,000 Ohm resistor 802 attached to the fault line 804. The current value for a 5,000 Ohm resistance 808 is 12.2 milliamperes. The second current path is through the 40,000 Ohm resistor 808 and the value at the first interruption cycle of 806 is 1.5 milliamperes. The third path is the current flow into the stray capacitance 810 of the line and this accumulates as electrical energy.

When the interrupt relay 806 closes, it takes approximately 0.5 seconds for the interrupter circuit to reach steady state. The steady state voltage between line 804 with a fault and ground is 61.0 volts DC. When the interrupter relay opens, it disconnects the meter 805 and the two 5,000 Ohm resistors 801 and 802 from the , . , ~
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ground 807. The electrical energy accumulated on the stray capacitance 810 of the line discharges through the fault resistance 808 as a exponential decay.

The time constant of the electrical circuit formed between the stray line capacitance of capacitor 810 and the leakage fault resistor value of resistor 808 is the product of Rf and Cs. For this particular case the time constant is 4 seconds. Consequently the voltage across the fault resistor 808 and the stray line capacitance 810, 4 seconds after the interrupter relay opens circuit opened, is 28.18 volts which is 38% of the initial steady state voltage of 61.0 volts DC. The voltage value across the fault resistor 808 and stray line capacitance 810, 1 second after the interrupter 15 circuit opened is approximate 50 volts (25% of the time constant). If the interrupter circuit operates at a frequency of 1 cycle per second the differential current through the fault resistance 808 is 0,25 milliamperes.
The reason for only 0. 25 milliamperes is that it is - 20 after the second interruption and thereafter will only produce 11 volts of differential voltage across the fault resistor 808. This leakage current of 0.25 milliamperes is considered very small ~o produce a strong and steady ground fault signal.

In order to overcome the problem o~ detecting very small current values and obtain a higher value of leakage current, through ~ault resistor 808, improvements have been incorporated in the interrupter circuit 806 that produces the ground fault interrupt signal.

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One of such improvement, as illustrated on Fig. 11, is that through electronic switching only the limiting resistor 801 attached to the line without the fault i5 connected to the interrupter relay, the other resistor 802 is removed from the interrupter relay. In this fashion when the interrupter relay closes, the ground fault current will flow through the limiting resistor 801 to ground 807 and from ground 817 through the fault resistor 808 and back to the DC distribution system. At about 0.5 seconds after the interrupter relay closes a steady state is reached and the current flowing through the fault resistor 808 is approximated 2.88 milliamperes. When the interrupt relay 806 opens the voltage across the stray capacitance 810 is approximately 110 volts. In order to discharge the stray capacitance rapidly, a discharge resister 812 is switched from the line with the fault to ground. Should the value of this resistor 812 be equal to the current limiting resistor 801, the time constant to charge the circuit is equal to the time constant to discharge the circuit.

An additional improvement involves the extension of the interrupt relay cycle, which is illustrated in Figure 12. By extending the cycle to a 12 second period, namely, 6 seconds for the fault current to flow and 6 seconds for the stray capacitance to discharge, the leakage current available as a pulse is approximately 2 to 2.75 milliamperes. This value is about 10 times higher as compared with one or two interruptions per second and no discharge resistor;

The circuits of Figure 11 illustrates the system connected to loads 813. Also, the stray capacitance 814 is illustrated in the line 803 without the fault. Limiting resistors 801 and 802 and discharge resistors 812 and 815 are shown. The various resistor connections with the lines 803 and 804 are made through a selector relay 816.

The system is also designed to distinguish in which line, positive or negative, of the system the lo- fault exists. Electronically, the detector can determine this, with the magnetic sensor located about both conductors.

The timing diagram of Figure 12 indicates the period of 12 seconds for the interrupter pulse. The detector is designed electronically to be synchronized to measure and sample the pulse during the flat high current level of the interrupt pulse. Thus, with this timing the sensing i5 effected with a flat DC level and, henc~, noise effects are eliminated. ~y the timing arrangement to effect sensing, spurious electromagnetic effects and changes are balanced and nulled from the system. Extremely small DC signal variations in the DC
system can be thus sensed. This is since the DC
interrupter pulses and the system is overall far more sensitive than prior art sys~ems.
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Fig. 11 illustrates the ground fault detector set-up on one branch of a DC distribution system. An automatic selector circuit 816 detects any imbalance on the DC distribution system and chooses a pair of - -resistors 801 and 812, or 802 and 815, one from the positive line and one ~rom the negative line, to be alternatively connected to the input of the interrupter relay 806 and from the interrupter relay to the function switch 820 and from the function switch to ground 807.
Also, illustrated in Fig. 11 is the magnetic sensor 25, the oscillator 850, the delay circuit 851, and a fault resistance 808 along with the stray capacitance 810, 814 (Cs) associated with the positive and negative lines.

When the oscillator circuit 850 changes from low to high (C2 on Fig. 12) the signal is passed to the lo delay circuit 851 and after 200 milliseconds (C4 on Fig.
12j the signal is applied to the interrupter relay 806 to control the closing operation. When the interrupter relay 806 is activated, 801 and 812 are already connected to the inputs of the interrupter relay.
15 Resistor 801 is first connected to ground through the selector 816 and interrupter relays 806 and through the function switch 820. This condition creates a leakage current through the leakage resistor 808. The magnetic field on the sensor 25 (C5 of Fig. 3) is sensed and fed to the electronic circuit for processing.

When the oscillator circuit 850 goes low, the interrupter relay 806 opens and resistor 801 is disconnected and resistor 812 is connected ~o ground biasing the automatic interrupter relay 806 through the function switch 820. This set-up discharges the stray capacitance 810 of the line with a time constant of less of 4 seconds.

Fig. 12 shows the charge and discharge of the stray capacitance of the line as the C7 wave-form representation. The full line of wave-form C7 represents the voltage across the stray capacitance of the line when resistor 812 is used. The need for this 19 ~ S
arises from the comparative instrument that compares the reference voltage value before the interrupter rPlay closes to the voltage value when the interrupt relay was open. If the stray capacitance of the line is not fully discharged the differential voltage between the two stages is less, and the output of the sensor 25 is partially utilized.

The method is used to read small changes o DC
current (ranging between 2 to 20 milliamperes) on conductors transporting large DC currents (ranging between 1 to 20 Amperes) using magnetic sensor 25. The magnetic sensor 25 illustrated in Fig. 2 is composed of a magnetic ring 324 with a gap with a magnetically sensitive component 325 placed inside this gap. The toroidal ring with sensor component 325 is placed around the two conductors, illustrated in Fig. 1, 803, 804 furnishing power to the loads 813 connected to the conductors. With this arrangement the magnetic field produced by the load current is egual to zero, since the ~0 current flow in each conductor is egual but flows in opposite direction. All other external magnetic ~ield sources produce outputs of the magnetic sensor 25 and the cumulative sources value is used by the system as a zero reference level.

The electronic circuitry required to perform the above task is illustrated on Fig. 13. The signal generated by the magnetic sensor probe 325 is passed through a system ampli~ier circuit 901. Associated with this system amplifier circuit 901 is a negative ~eedback loop 902 which controls the overall gain o~ the system amplifier 901. ~he opening and closing of the ~eedback loop is controlled by a signal generated in an oscillator circuit 850 (C2 signal in Fig. 12).

The output of the system amplifier circuit 901 is fed to a positive amplifier 903 "multiply by +2" and to a negative amplifier 904 "multiply by -2" circuit simultaneously. The output of those two circuits 903, 904 has its input controlled by the C2 signal (Fig. 12).

The combined operation of the oscillator circuit 850, the system amplifier 901, the feedback loop 902, and the "multiply by +2" and "multiply by -~"
circuits 903, 904 operate as follows with reference to fig. 12 and Fig. 13. When the C2 signal that is generated on the oscillator circuit 850 is low the feedback loop 902 is closed and the overall gain of the system amplifier is about 200. At this time the combined output of the two "multiply" circuits 903, 904 is equal to zero. In the next avent, when C2 signal goes high and is applied simultaneously to the feedback loop circuit 902 and to the "multiply by ~2" circuit 903, the following signal changes are taking place. The negative feedback loop opens its input and it will retain at its output the DC control signal that is applied to the input of the system amplifier circuit 901. The "multiply by ~2" circuit 903 opens its input and will retain at its autput the last signal value applied to the comparative resistor network 905. If at this time a magnetic field change is introduced, Cl of - Fig. 12, into the magnetic sensor assembly 325, its output Will change and this change is passed to the system amplifier circuit 901 without any negative feedback being present at this time. Consequently, the system amplifier circuit 901 gain is increased by approximately 100 making the total gain o~ this circuit approximately 20,000 ~200 x 100). The output signal from the signal amplifier circuit 901 is fed only to the input o~ the "multiply by -2" circuit 904 whose output is fed into the comparative resistor network 905.

At the comparative resistor network 905 the signal from the "multiply by ~2" circuit 904 is summed with the fixed value signal produced at the output of the "multiply by +2" circuit 903 and the resulting algebraic summation feeds into the next amplifier stage which controls the displaying LED 906. In order to avoid a race condition between the simultaneous opening of the feedback loop 902 and the "multiply by +2"
circuit 903, with respect to the new added value of DC
fault current on one of the two conductors passing through the magnetic sensor assembly 325, a delay of 200 milliseconds is added to the interrupt signal. This timing delay controls operation of the interrupter relay 806. This in turn controls the release of DC fault current that is used to create the magnetic field variations.

In the block diagram of Figure 2 which is the detector circuit 125, sensor 324 is a magnetic sensor element, essentially a ring core, for detecting interrupted DC ground fault magnetically coupled signals. A magnetic current sensing element 325, such as a Hall E~fect or similar sensor element, receives a composite interrupt signal 300 with superimposed noise 301. These signals and noise are fed ~rom the magnetic sensing element 325 along conductor 326 and this provides balanced signal characteristics.

The balanced composite signal is fed to a DC
precision instrument ampli~ier and low pass filter 3~1, which trans~orms the differential input balanced signal :, .. .. ' .

2~5 to a balanced output signal. Offset balance control 342 conditions the output of device 341. The output signal of 341 is fed along conductor 343 to a second instrument amplifier and low pass filter 344 which transforms the balanced input signal into an unbalanced output signal.
The output signal of 344 is fed along conductor 345 to an operational amplifier and low pass ilter 346. The output of operational amplifier and low pass filter 346 is fed into line 397 and into one side of switch relay 347. The input of switch relay 347 is controlled via line 362 which carries a synchronization signal 361 from interrupter circuit 203 (Figure 5). The output signal of relay switch 347 fed along conductor 350 to a track and hold circuit 351. The output signal of the track and hold circuit 351 is fed along conductor 352 to an operational amplifier and inverter circuit 353. The output signal of circuit 353 is fed along conductor 354 to the input of the instrument amplifier 341.

The output signal from the instrument amplifier 344 is also fed along conductor 345 to an operational amplifier 349 and to one side of the dual switch relay 347. The output signal from half of switch relay 347 is fed into line 360 and to the input of an operational amplifier 348. Operational amplifiers 348 and 349 have offset adjust element 561 and 562. ~he output signal of the operational amplifier 348 is fed into Iine 363 and to one side of a balance control 365 The output signal o~ the operational amplifier 349 is fed into line 364 and to one side of the balance control 365. The center tap of balance control 365 is fed into line 366 and to the input of operational amplifier 348 and low pass filter 367. Operational amplifier 367 has a DC of~set control adjustment 369.

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The output signal from the operational - amplifier 367 i5 fed into lines 368 to the input of an operational amplifier 370, to the input of an operational amplifier 371 and to the input of a network rircuit 372. The output of operational amplifier 370 is fed into lines 394 and into an amplifier circuit 395.
The output of th~ amplifier circuit 395 i5 fed into line 396 and into a positive fault indicator red Light Emitting Diode (LED) 377.

Line 394 also feeds the circuit element filter capacitor 397 and into amplifier circuit 378. The output from amplifier circuit 378 is fed into line 379 and into a negative fault indicator red LED 380.

Line 368 also feeds into the negative voltage eliminator circuit 372. The output of circuit 372 feeds into line 373 and into an amplifier circuit 374. The output of the amplifier circuit 374 feeds into line 375 and into the zero fault indicator green LED 376. Line 368 feeds into operational amplifier and positive voltage network 371. The output of 371 feeds into line 373 and into the green amplifier transistor 374.

'rhis circuit receives the minus ~ volts ~rom the power supply and regulator at point 381 and fed into all operational and amplifiers from line 382. Also, a 10 volt unregulated power supply is connected to point 383, the output from 383 is fed into line 384 and into the input o~ a 5 volt positiVe voltage regulator 385;
tha output voltage regulator 385 is fed into line 386 and to the electronics of the circuit.

Operational amplifier and voltage regulator 387 outputs a control signal into line 388 and into amplifier circuit 389 and device 387 has a DC bias adjust control element 390. The output of amplifier circuit 389 is fed into line 391 and into a current limiting component 392 and into line 393. Line 393 provides a constant voltage source to the magnetic current sensing element 325.

The DC instrument amplifier and low pass filter 341 receives the signal transmitted along conductor 326 from the magnetic current element 325 and passes only those signals that are 30 Hz or less. For proper operation, the differential output voltage range of the DC amplifier 341 is within +2 millivolts.

In order to ensure that the output voltage of the DC amplifier is in the appropriate range, a balance ad~ustment element 342 is provided. The differential output signal of circuit 341 is fed into instrument amplifier 344 and transformed into an unbalanced signal.
The output signal from circuit 344 is split into two paths. One path is to source the automatic gain control (AGC~ loop circuit. The components in this circuit are the relay 347, and circuits 346 and 3~3. The other path sources the display signal circuit which consists of relay 347, circuits 348, 349, balance element 365, operational amplifier circuit 370, 3il, 374, 378 and display LEDs 376, 377 and 380.

Upon the initialing condition, the synchronization signal 361 that feeds into line 362 is low, and dual relay 347 is maintained closed.

The automatic gain control loop provides a 2~
negative feedback loop and the overall gain of instrument amplifier 341, 344 and operational amplifier 346 is approximate 200. The automatic offset adjustment element 342 sets the signal at line 343 to a differential value of zero volts. Consequently there is a DC signal of zero volts on line 345. This signal on line 345 has a steady range of +3 volts. The interpretation of this capture range is that after the offset adjustment element 342 renders line 343 equal to a differential value of zero volt, latsr in time, external magnetic sources can change this differential - zero volt signal on line 343 to values that in turn will modify line 345, due to amplifier circuit 344, to values of + volts. The signal on line 345 simultaneously feeds operational amplifiers 348 and 349, within a range of +3 volts. Thus the output of circuits 348 and 349 will be compared through balance control 365, and the balanced output is fed on line 366 and will have a value of zero volts, for any value of the signal on line 345 between +3 volts. This zero output signal is fed into the input of amplifier 367.
The output signal of amplifier 367 is adjusted to zero volts by a bias offset element 369.

The output signal ~rom 367 is passed to circuits 370, 371 and 372. With this signal equal to zero volts, circuit 370 will be turned off and the positive and negative fault indicator green LED will be turned off and the green LED is turned on indicating fault current. When the synchronization signal on line 362 goes high, the dual relay 347 opens the automatic gain control (AGC) loop and the negative feedback circuit is out of the circuit. The DC value of line 354 will remain consistent due to the track and hold circuit 351 which malntains the last value transferrad at its 26 ~ AL5 output before interruption of relay 347. With the absence of the negat.ive feedback/ the overall gain of the amplification of amplifiers 341 and 344 circuit will be increased by a factor of a thousand. The second half of the relay 347 will open the line between the positive input of operational amplifier 348 and instrument amplifier 344. The operational amplifier 348 acts as a track and hold circuit and its output will not change as long as switch relay 347 is open. A capacitor 548 in operation amplifier 348 holds the output on line 363 fixed when switch 347 is opened.

200 milliseconds after the synchranization signal 361 goes high, switch relay 207 ~Figure 5) of the interrupter card cl~ses. This allows the DC ground fault current to flow and be detected by the magnetic sensor. Should sensor 324 detect a change af its magnetic field, this change causes a change in the output voltage to the input of amplifier 341. This input voltage change is amplified with device 341 and fed into device 344. After amplification and filtering provided by 344, and since relay 347 is open, amplifier 349 is the only device which receives the signal from line 345. With the output of amplifier 348 constant and the output of 349 variable, the balance control 365 ~5 output changes proportional t~ the variation of the input signal. This change is amplified by 367. Should the signal on line 36~ be above 250 mV, the positive fault indicator turns on, and the no fault indica~or green LED goes off. 5hould the signal on line 368 be below - 250 mV, the negative fault indicator turns on and the no fault indicator green LED goes off.

When a portable detector unit is used, a local crystal oscillator ~00, aæ illustrated on ~igure 2, is used to synchronize with the crystal oscillator of the interrupter card as a real time clock. Control current device 501 provides a manual or electronic control DC
offset current through the magnetic sensor via lines 502. The purpose of this arrangement is to place the portable unit around one conductor, for instance, conductor 13a only (Figure 1). Reverse offset adjustment 500 counteracts the magnetic field caused by the normal circuit current and allows the magnetic field caused by lo the fault current only to be detected by the magnetic sensor 325.

Figure 3 and Figure 4 are more detailed descriptions of the circuitry illustrated in the block diagram of Figure 2. The magnetic sensor device 325 is shown connected through conductor 326 to instrument amplifier 341. The differential output of 341 is connected through conductor 343 to the differential input of 344. The unbalance output signal of 344 is connected via conductor 345 to the operational amplifier and low pass filter 346, the output of 346 is applied to half of relay 347, the output of this relay is fed into operational amplifier 351 which is a track and hold circuit. The output from 351 is fed into 353 operational amplifier and the output from 353 is fed into one line of 326. The output signal from 344 is fed through conductor 345 into half of relay 347. The output of the relay 347 is fed through conductor 360 to operational amplifier circuit 348 on Figure 4; the signal on line 345 is fed into invertin~ amplifier 3~9.

The output signal of devices 348 and 349 are compared prior to being input to operational amplifier 367. The output of davice 367 is fed into line 368 and into operational amplifier 370 and 371. Should the 28 ~ LS
input signal to device 370 exceed ~250 mV, LED's 377 or 380 will turn on. Should the signal into line 368 be within ~200mV, the green LED 376 will turn on. Device bias control 390, reference voltage amplifier 387, DC
bias amplifier transistor 389 and limiting resistor 392 are arranyed to provide the magnetic sensor 325 with the necessary bias current as illustrated on Figure 3.

Associated with the magnetic sensor assembly 325 is an current control adjustment element 501 which permits the manual or automatic adjustment of a balance current through the magnetic sensor 325 in order to bring the output of the magnetic sensor 325 to a value suitable for operation of DC amplifier 341.

The interrupter circuit of Figure 5 is now described. The circuit includes a function select switch 200 which, when in the "test" positionr causes an oscillator circuit 201 to produce a square wave signal with a frequence of one cycle every 12 seconds. The output signal from oscillator circuit 201 is fed into line 202 and into amplifier and time delay circuit 203.
Two signals are outputted from circuit 203. One si~nal 361 is fed into line 362 as a synchronization signal 361. The other signal is delayed 200 milliseconds and is ~ed into line 205 to the input ~witching relay 207.
The synchronization signal thus leads the tracking signal signal by about 0.2 seconds. The signal present in line 205 is also ~ed to the yellow LED 206 to provide an indication of fault interruption cycle. YellQw LED
206 turns ON when the pulse from the oscillator 201 is positive to indicate that magnetic sensor 324 is monitoring ~or ~ault current, and is OFF when the pulse is zero, and the ~ault current circuit is apen.

The output si~nal from a switching relay 207 is fed into line 209 and from there into the dual switch relay 210. Attached to relay 210 are four resistors 110, 111, 112 and 113. Resistors 111 and 13 serve the pick up function to create the interrupt DC fault current: only one of them is connected to the DC line, and this is determined by a comparator circuit 215. The resistors are about 5 ohms. A power supply and zero reference circuit 211 is attached to the DC distribution line under test through lines 212 and 213. The output of network 211 is fed into line 214. This ~oltage is one-halP o~ the voltage between battery lines 11 and 12.

The double pole, two position switch 200 is used to control the return current of 210 ohms station ground resistances in the station ground alarm system, and, secondly, the two internal 5 ohm resistors which are used to create the l/12th Hæ frequency ground fault current.

Operational amplifier-comparator 215 has two input lines; line 214 connects to the power supply and zero re~erence circuit 211. Line 216 connects to tha comparator input 217, which input is connected to point 18 (Fig~re 1). The output signal of circui~ 215 is fed into line 218, which ~eeds into the input o~ amplifier circuit 219. The output of circuit 219 if fed into line 220 to the input of dual switching relay 210. The input signal o~ relay 210 determines which current limiting resistor 111 or 112 is selected ~rom the DC main line to ground to complete the circut for fault leakage current that pases through the magnetic sensor assembly. Relay 210 selects resistor 110 or 113 to connect from the main line to one side o~ switching relay 207. The purpose of ~ 2~
these resistors 110 or 113 is rapidly to discharge the stray capacitance of the DC distribution line.

Figure ~ and Fiyure 7 provide a more detailed circuit description of the interrupter. Integrated circuit 201 of Figure 6 acts as a multivibrator with an output frequency of one cycle every 12 seconds. Other crystal oscillator circuits with a fundamental frequency of 6 megaHertz to provide output of l/12 Hertz could be used if needed to replace the integrated circuit 201 and associate components.

The output of circuit 201 is fed into transistor Q3. From the collector of Q3, the synchronization signal 361 is outputted to the detector circuits, and the same output of 201 is fed into the transistor Q2, and from its collector into the interrupter-switching relay 207.

An analog delay circuit comprising a resistor and capacitor is connected to the collector of Q2; and the outputs of relay 207 are connected to the dual switch relay 210 as illustrated on Figure 6 and Figure 7.

In Figure 7, two resistors 701 and 702 and two zener diodes 703 and 704 ~orm a power supply reduction circuit and a floating zero reference circuit 211. This zero reference circuit 211 and the reference siynal from the center tap of elements 16 and 17 of Figure 1 are inputted into operational amplifier 215. The output 218 of amplifier 215 turns transistor 219 ON or OFF
depending on the comparator output signal. When transistor 219 is ON, switch relay 210 connects resistor 113 to the c~nter tap of one side or relay 210. When the transistor 219 is OF~ resistors 111 and 112 are appropriately connected. The two center taps of dual switch 210 are inputted into switching relay 207. The center tap of relay 207 is fed into function select switch 200 which completes the ground fault circuit and the line capacitance discharge circuits. Associated with the interrupter circuit is a positive 5 volts regulated integrated circuit 230, Fig. 6 and circuit 230, Fig. 6.

Figure 8 is a circuit block diagram for the regulated power supply. The external power source 600 is inputted into conductor 601 and routed to a power switch 602. When the power switch 602 is closed, the output of the switch is fed into line 603 and to a power transformer 604. The output of transformer 604 is fed into line 605 and from there into a rectifier circuit 606. The output of the rectifier circuit 606 is fed into line 607 as an unregulated source fed into the +~
volts LED circuit 616 and into all other circuits requiring an +10 volts unregulated power source.

The output of power transformer 604 is also fed into a capacitor coupling circuit 60~ through conductor line 605, and the output of capacitors 608 is ~ed into line 609 and in~o recti~ier circuit 610: The output of recti~ier circuit 610 is fed into line 611 and from there to be -5 volts regulator circuit 612. The - output from -5 volts regulated circuit is fed into line 613 and into LED circuit 61~ and into all circuits connected to line 613. A high voltage protection circuit 615 has an input connected to line 613. A high voltage protection circuit 615 has an input connected to line 613 and an output connected to line 611.

_~

Figure g describes in more detail the circuit of block diagram of Figure 8. The power transformer 604 has an input connected to the main power source through the power switch 602. The output of this transformer 604 is fused by Fl and fed from there to a rectifier bridge D3 of rectifier circuit 606. The output of D3 is filtered with capacitors C8 and C1, and inputs into the +10 volts distribution system along line 607. The output of line 607 also feeds the LED DSl of LED circuit 616.

The output of the transformer 604 is also fed into the coupling capacitors C9 and C10 of circuit 608 and feeds from there to rectifiers diodes D4, D5, D6 and D 7 of rectifier circuit 610. The DC output of the diodes D4, D5, D6 and D7 is filtered with capacitors C2 and C7, and inputs to regulator circuit 612. The output of 612 is fed into the DS2 of LED circuit 614 circuit into the -5 volts distribution line 613 and the high voltage protection circuit 615.

In operation of the DC fault detector, the fault is first verified by observing indicator 19 such : as an alarm system or differential voltmeter (Figure 1) located between the tapping point 18 and station ground 235. This indicates that a fault exists on the DC
distribution bus, however the location is unknown. The interrupter-pulser 2000 is then turned on by closing switch 200. A magnetic current detector-sensing device 25 is designed to detect low level fault currents of at least about +2 milliamps.

The sensing elements 25 are clamped over the conductors 13a, 13b, 14a, 14b, 15a, and 15b, respectively, optionally after verifying with meter 19 33 ~;~0~ ?~ ~
that a fault exists. Thereupon tha input offset adjust and center bias detector 342 (Figures 2, 3 and 4) is adiusted so as effectively to rendPr the sensors 24 operational.

In Figure 1, the isolation and detection of the fault current to ~he branch circuit 13a, 13b, or 14a or 14b or 15a or 15b is determined by a response to the pulsed input signal by either the LED, buzzer, or meter which constitutes the indicator means of the detector 24 in the respective branch having a ground fault. In the example illustrated the response will be in the branch line 14a or 14b in view of the ground fault 23. The detector-circuit 125 of detector 24 will pass interrupted ground fault current as generated by the interrupter pulser 2000 which opens and closes in the ground circuit. The indicator in the detector 24 responds accordingly. In those circuits where there is no ground fault there is no indicator response in the detector 24.

In the circuitry of Figures 2, 3 and 4, there is a green LED 376 response in the sensor 24. The indicated reesponse for a ground ~ault output is repeatedly indicated at about 12 second intervals. In the circuitry o~ Figures 2, 3 and 4, there is a red LED
377 or LED 380 response dependent on the ground fault current direction or line.

In some casas, by moving the detector 25 along the conductors 14a and 14b to a point where the ground ~ault signal ceases to be detected by the sensor, there is provided mearls for detecting the actual location of ~'r~ S
_~ 3~
the ~round fa~lt. The detector ~5 in fact need be placed only about either conductor 14a or 14b to locate more precisely the location of the fault.

Detectors can be permanently located at discreet points. Moreover, an interrupter can also be permanantly in circuit such that on the occurrence of a ground fault, one or more detectors respond thereby enabling the location of the ground fault.

Essentially~ the apparatus and method of the invention ensures that the normally ungroundPd DC system can remain operational in respect of the ungrounded loads and this prevents expensive and unnecessary down time for systems which must continue operation while suffering ground fault problems and also during detection of those problems.

The features of the detector of the invention include the additional following aspects. The detector can be located as a solid state rack mountahle device with multiple independent channels for ground fault detection for different feeders multi-feeder system.
The detector has a capability of detecting ground faults from zero up to 40,000 ohms on a 130 volt DC sy~tem, but not limited to. Having a capacitive reactance of a 100 microfarad, the system itself operates to interrupt a simulated fault current at a frequency of 1/12 Hz. In some cases the frequency range is from a low range of about 1/100 Hz to a higher frequency of several hundred Hz. The frequency chosen will depend on the nature o~
the system in which the fault is being detected, and particularly on the capacitive reactance of that system.

The sen50r and associated circuitry permit for ~ 2 ~ S
the detection of low le~els of DC ground fault current, namely, the fault current which has a magnetic component datection magnitude approximately l/20th of the earth's magnetic field intensity and also lower in magnitude than the surrounding electromagnetic and electrostatic fields. As such, the detector is virtually immune to high level environmental fields and their changes.
Moreover, the detector can simultaneously detect more than one ground in a multi-feeder DC distribution system.

Many changes and variations may be made in the apparatus and method providing widely different embodiments in applications for this invention without departing from scope thereof. All matter contained in the above description as shown in the accompanying drawings should be interpreted as illustrative and not limiting. For instance, in one other form of the invention, the detection of AC faults in an AC single phase systems is possible. Similarly, ~aults in a ZO grounded DC system can be detected~ When ground faults are detected, the precondition of the system may have to be monitored so that deviations ~rom the precondition can be determined as a fault by the detection system.
Suitable microprocessors can be used to determine such conditions if necessary.

Also, although the ungrounded DC system has been described with limiting resistors 16 and 17 and the indicator means 19, it should be clear that these are not necessarily employed. Resistors 110, 111, 112 and 113 appropriately e~fect the requisite limiting resistance as described.

The invention is to be interpreted solely by ~`` 36 ~3~2~.5 the scope of the appended claims.

Claims (98)

1. Apparatus for the detection of a fault signal in a supply system including conductors from a supply for supplying power to a load connected in the system comprising an impedance element for connection across the power supply, a tapping point to the impedance element, a connector between the tapping point and a point to complete a circuit for a fault signal in the system, an interrupter for periodically pulsing a signal into the system effectively thereby to generate a pulse interrupted fault signal, a detector for location relative to the system for sensing the pulse interrupted fault signal and thereby providing for detecting the location of the fault, and means for operating the detector in synchronism with the interrupter whereby the detector senses a substantially steady state level of the pulse interrupted fault signal.

2. Apparatus as claimed in claim 1 wherein the system is a DC system and the pulse is a DC pulse.

3. Apparatus as claimed in claim 2 wherein the DC pulse level is sensed at a time removed from the time of change of the pulse interrupted signal.

4. Apparatus as claimed in claim 3 wherein the interrupted pulse is substantially a square wave and the detection is effected during the steady state high level of the square wave.

5. Apparatus as claimed in any one of claims 1, 2, 3 or 4 wherein the interrupter generates a synchronization signal, and including means for feeding the synchronization signal to the detector.

6. Apparatus as claimed in any one of claims 1, 2, 3, or 4, including a crystal oscillator for genera-ting a synchronization signal, and means for feeding such signal to the detector.

7. Apparatus as claimed in any one of claims 1, 2, 3 or 4, wherein the detector includes a magnetic sensor for location about a positive and a negative conductor of the conductors between the power supply and load, and including means for determining whether the fault signal is in the positive and/or negative conductor between the power supply and load.

8. Apparatus as claimed in claim 4, wherein the period of the pulse is about 12 seconds.

9. Apparatus as claimed in claim 1, including means for eliminating the effect of electromagnetic changes in the system prior to sampling and measuring the steady state interrupted pulse.

10. Apparatus as claimed in claim 1, including means for detecting fault signals at least as low as about 2 milliamperes.

11. Apparatus as claimed in claim 1, including means for detecting a fault signal less than 2 milli-amperes.

12. Apparatus for the detection of a fault signal in a supply system including conductors from a power supply for supplying power to a load and having stray capacitance in the system comprising an imped-ance element for connection across the power supply, a tapping point to the impedance element, a connector between the tapping point and a point to complete a circuit for a fault signal in the system, an inter-rupter for periodically pulsing a signal into the system effectively thereby to generate a pulse inter-rupted fault signal, a detector for location relative to the system for sensing the pulse interrupted fault signal and thereby providing for detecting the loca-tion of the fault, and including means for substan-tially discharging the stray capacitance in the system.

13. Apparatus as claimed in claim 12, wherein the power supply is a DC power supply and the pulse is a DC pulse, and wherein the detector is a magnetic detector and detection is effected after the stray capacitance in the system has been substantially fully charged or discharged.

14. Apparatus as claimed in claim 13, wherein the discharging means includes a resistor bank for selective connection across the power supply.

15. Apparatus as claimed in claim 14, wherein the resistor bank is part of the impedance element and includes four resistors, a pair of resistors being connected to each conductor, and including a switch between at least some of the resistors whereby in one position of the switch, a first resistor is connected with one conductor and another resistor is connected with a second conductor, and in a second position of the switch a third resistor is connected with the first conductor, and a fourth resistor is connected with the second conductor.

16. Apparatus as claimed in claim 15, wherein in the second position of the switch at least one of the resistors acts to discharge stray capacitance while in the first position at least one of the resistors acts as a current limiting resistor.

17. Apparatus as claimed in claim 16, wherein the value of the discharge resistor is determined to be substantially equal to the current limiting resis-tor such that the time constant to charge the circuit is substantially equal to the time constant to dis-charge the circuit.

18. Apparatus as claimed in claim 17, wherein the cycle for interrupting the circuit is about 12 seconds, and wherein about 6 seconds is for the fault signal to flow through the limiting resistor and about 6 seconds is for the stray capacitance to discharge through the discharge resistor.

19. Apparatus as claimed in claim 18, including means for detecting a fault signal as low as about 2 milliamperes.

20. Apparatus for the detection of a ground fault signal in a normally ungrounded DC system including conductors from a supply for supplying power to a load in the DC system comprising an impedance element for connection across the DC power supply, a tapping point to the impedance element, a connector between the tapping point and a ground point to complete a ground circuit for a ground fault in the system, a relay between the tapping point and ground, an interrupter for periodically opening and closing the relay while the ungrounded DC system remains substantially closed and operational, the opening and closing of the relay interrupting the ground circuit effectively thereby to generate a DC pulse interrupted ground fault signal, a magnetic detector for location relative to the DC system for sensing the DC pulse interrupted ground fault signal and thereby providing for detecting the location of the ground fault, the DC
system remaining substantially closed and operational during the ground fault detection, and means for operating the detector in synchronism with the inter-rupter whereby the detector senses a substantially steady state level of the DC pulse interrupted fault signal.

21. Apparatus as claimed in claim 20, wherein the DC pulse level is sensed at a time removed from the time of change of the interrupted signal.

22. Apparatus as claimed in claim 21, wherein the interrupted pulse is substantially a square wave and the detection is effected during the steady state high level of the square wave.

23. Apparatus as claimed in any one of claims 20, 21 or 22, wherein the interrupter generates a synchronization signal, and including means for feeding the synchronization signal to the detector.

24. Apparatus as claimed in any one of claims 20, 21 or 22, including a crystal oscillator for generating a synchronization signal, and means for feeding the synchronization signal to the detector.

25. Apparatus as claimed in any one of claims 20, 21 or 22, wherein the detector means includes a sensor for location about a positive and a negative conductor of the conductors between the power supply and load, and including means for determining whether the fault signal is in the positive and/or negative conductor between the power supply and load.

26. Apparatus as claimed in claim 22, wherein the period of the square wave is about 12 seconds.

27. Apparatus as claimed in claim 20, including means for eliminating the effect of electromagnetic changes in the system prior to sampling and measuring the steady state interrupted pulse.

28. Apparatus as claimed in claim 20, including means for detecting a ground fault signal at least as low as 2 milliamperes.

29. Apparatus as claimed in claim 20, including means for detecting a ground fault signal less than 2 milliamperes.

30. Apparatus for the detection of a ground fault signal in a normally ungrounded DC system including conductors from a supply for supplying power to loads in the DC system having stray capacitance comprising an impedance element for connection across the DC power supply, a tapping point to the impedance element, a connector between the tapping point and a ground point such that a ground fault in the system completes a ground circuit, a relay between the tapping point and ground, an interrupter for periodi-cally opening and closing the relay while the ungrounded DC system remains substantially closed and operational, the opening and closing of the relay interrupting the ground circuit effectively thereby to generate a DC pulse interrupted ground fault signal, a magnetic detector for location relative to the DC
system for sensing the DC pulse interrupted ground fault signal and thereby providing for detecting the location of the ground fault, the DC system remaining substantially closed and operational during the ground fault detection, and including means for substantially discharging the stray capacitance in the system.

31. Apparatus as claimed in claim 30, wherein the discharging means includes a resistor bank for selective connection across the power supply, and detection is effected after the stray capacitance in the system has been substantially fully charged or discharged.

32. Apparatus as claimed in claim 31, wherein the resistor bank is part of the impedance element and includes four resistors, a pair of resistors being connected to each conductor, and including a switch between at least some of the resistors whereby in one position of the switch, a first resistor is connected with one conductor and another resistor is connected with a second conductor, and in a second position of the switch a third resistor is connected with the first conductor, and a fourth resistor is connected with the second conductor.

33. Apparatus as claimed in claim 32, wherein the second position of the switch connects at least one of the resistors to discharge stray capacitance, while in the first position at least one of the resistors acts as a current limiting resistor.

34. Apparatus as claimed in claim 33, wherein the value of the discharge resistor is determined to be substantially equal to the current limiting resis-tor such that the time constant to charge the circuit is substantially equal to the time constant to dis-charge the circuit.

35. Apparatus as claimed in claim 34, wherein the cycle for interrupting the circuit is about 12 seconds, and wherein about 6 seconds is for fault signal to flow through the limiting resistor and about 6 seconds is for the stray capacitance to discharge through the discharge resistor.

36. Apparatus as claimed in claim 35, including means for detecting a fault signal as low as about 2 milliamperes.

37. Apparatus for the detection of low level ground leakage current in a supply system including conductors from a supply for supplying power to a load connected in the system comprising:
resistor elements for connection at one end to conductors from the supply;
a selector relay connected to the resistors at ends opposite to the connection with the conduc-tors;
an interrupter relay connected with the selector relay for periodically connecting selected resistor elements to ground thereby creating a ground circuit for the ground leakage current through selec-ted resistors; and a detector for location relative to the system for sensing the ground current when the current is in a substantially steady state level.

38. Apparatus as claimed in claim 37, including delay means for operating the detector before the interrupter interrupts the ground circuit.

39. Apparatus as claimed in claim 38, including means for generating a synchronous signal, the syn-chronous signal activating the interrupter and activa-ting the detector through the delay means.

40. Apparatus as claimed in any one of claims 1, 2, 3, 4, 20, 21, or 22, including means for synchron-izing the detector to operate in time advance of the pulse interrupted signal.

41. Apparatus as claimed in claim 5, wherein the synchronization signal leads in time the interrupted pulse signal.

42. Apparatus as claimed in claim 5, including means for delaying in time the interrupted pulse signal relative to the synchronization signal.

43. Apparatus as claimed in claim 40, wherein the time advance is about 200 milliseconds.

44. Apparatus as claimed in any one of claims 12, 13, 14, 15, 16, 17, 30, 31, 32, 33 or 34, includ-ing means for synchronizing the detector to operate in synchronization with the interrupter whereby the detector senses a substantially steady state level of the pulse interrupted fault signal.

45. Apparatus as claimed in any one of claims 12, 13, 14, 15, 16, 17, 30, 31, 32, 33 or 34, includ-ing means for synchronizing the detector to operate in time advance of the pulse interrupted signal and in synchronization with the interrupter whereby the detector senses a substantially steady state level of the pulse interrupted fault signal.

46. Apparatus as claimed in any one of claims 12, 13, 14, 15, 16, 17, 30, 31, 32, 33 or 34, includ-ing means for synchronizing the detector to operate in time advance of the pulse interrupted signal and in synchronization with the interrupter whereby the detector senses a substantially steady state level of the pulse interrupted fault signal, and including means for generating a synchronization signal leading in time of the interrupted pulse signal.

47. A method for the detection of a fault signal in a system including conductors from a supply for supplying power to a load connected in the system comprising connecting an impedance element across the power supply, providing a tapping point to the impe-dance element to complete a circuit between the tapping point and a point for a fault signal in the system, periodically interrupting the system with a pulsing signal thereby to generate a pulse interrupted signal in the system, and detecting the location relative to the system of the pulse interrupted signal, the detection being in synchronism with the interrupting signal whereby the detection is effected at a substantially steady state level of the pulse interrupted signal.

48. A method as claimed in claim 47, wherein the system is a DC system and including detecting a DC
pulse.

49. A method as claimed in claim 48, including sensing the DC pulse level at a time removed from the time of change of the interrupted signal.

50. A method as claimed in claim 49, including generating an interrupted pulse which is substantially a square wave, and effecting detection during the steady state high level of the square wave.

51. A method as claimed in any one of claims 47, 48, 49 or 50, including generating a synchronization signal, and feeding the synchronization signal to a detector.

52. A method as claimed in any one of claims 47, 48, 49 or 50, including generating a synchronization signal from a resistor/capacitor oscillator or a crystal oscillator and feeding such signal to a detector.

53. A method as claimed in any one of claims 47, 48, 49 or 50, including sensing the fault current in a positive and/or negative conductor between the power supply and load.

54. A method as claimed in claim 50, wherein the period of the square wave is about 12 seconds.

55. A method as claimed in claim 47, including eliminating the effect of electromagnetic changes in the system prior to sampling and measuring the steady state of the pulse interrupted signal.

56. A method as claimed in claim 47, including detecting fault signals at least as low as 2 milli-amperes.

57. A method for the detection of a fault signal system including conductors from a supply for supply-ing power to a load in the system having stray capaci-tance comprising connecting an impedance element across the power supply, providing a tapping point to the impedance element to complete a circuit between the tapping point and a point for a fault signal in the system periodically interrupting the system with a pulsing signal effectively thereby to generate a pulse interrupted fault signal, detecting the location relative to the system of the pulse interrupted signal and thereby providing for detecting the location of the fault, and substantially charging or discharging substantially the stray capacitance prior to detection of a fault in the system.

58. A method as claimed in claim 57, including selectively connecting a resistor bank across the power supply for discharging the stray capacitance.

59. A method as claimed in claim 58, wherein the resistor bank includes four resistors and connecting a pair of resistors to each conductor, and including switching between at least some for the resistors whereby in one position of the switch a first resistor is connected with one conductor and another resistor is connected with a second conductor, and in a second position connecting a third resistor with the first conductor, and a fourth resistor with a second conduc-tor.

60. A method as claimed in claim 59, including switching in a second position at least one of the resistors to discharge stray capacitance, and while in the first position at least one of the resistors acts to limit current.

61. A method as claimed in claim 60, including selecting the value of the discharge resistor to be substantially equal to the current limiting resistor such that the time constant to charge the circuit is substantially equal to the time constant to discharge the circuit.

62. A method as claimed in claim 61 including interrupting the circuit with a cycle time of about 12 seconds, and wherein about 6 seconds is for the fault signal to flow through the limiting resistor and about 6 seconds is for the stray capacitance to discharge through the discharge resistor.

63. A method as claimed in claim 62, including detecting a fault signal about as low as 2 milli-amperes.

64. A method for the detection of a ground fault signal in a normally ungrounded DC system including conductors from a supply for supplying power to a load in the DC system comprising connecting an impedance element across the DC power supply, providing a tapping point to the impedance element to complete a circuit between the tapping point and a ground point for a ground fault signal in the system having a relay between the tapping point and ground, periodically opening and closing the relay while the ungrounded DC
system remains substantially closed and operational, the opening and closing of the relay interrupting the ground circuit effectively thereby to generate a DC
pulse interrupted ground fault signal, and magnetic-ally detecting the location relative to the DC system of the DC pulse interrupted ground fault signal and thereby providing for detecting the location of the ground fault, the detection being in synchronism with the interrupting signal whereby the detection is at a substantially steady state level of the DC pulse interrupted ground fault.

65. A method as claimed in claim 64, including generating a synchronization signal, and feeding the synchronization signal to the detector.

66. A method for detecting a ground fault signal in a normally ungrounded DC system having conductors from a supply for supplying power to loads in the DC
system with stray capacitance comprising connecting an impedance element across the DC power supply, provid-ing a tapping point to the impedance element to complete a circuit between the tapping point and a ground point for the ground fault, providing a relay between the tapping point and ground, periodically opening and closing the relay while the ungrounded DC
system remains substantially closed and operational, the opening and closing of the relay interrupting the ground circuit effectively thereby to generate a DC
pulse interrupted ground fault signal, magnetically detecting the DC pulse interrupted ground fault signal and thereby providing for detecting the location of the ground fault, and substantially charging or discharging the stray capacitance prior to detection of DC pulse interrupted ground fault in the system.

67. A method as claimed in claim 66, including synchronizing detection to operate in time lay of the pulse interrupted signal.

68. A method as claimed in claim 67, including generating a synchronization signal to lead in time the interrupted pulse signal.

69. A method as claimed in claim 68, wherein the time lag is about 200 milliseconds.

70. A method as claimed in claim 69, including synchronizing the detector to operate in synchronism with the interrupter pulse whereby the detector senses a substantially steady state pulse level.

71. Apparatus as claimed in claim 14, wherein the resistor bank is part of the impedance element and includes four resistors, a pair of resistors being connected to each conductor, and including a switch between at least some of the resistors whereby the switch selectively connects each resistor in turn to complete the circuit for the fault system.

72. Apparatus as claimed in claim 71, wherein one resistor discharges stray capacitance and another resistor limits current.

73. Apparatus as claimed in claim 72, wherein the value of the discharge resistor is determined such that the time constant to charge the circuit is substantially equal to the time constant to discharge the circuit, interrupting the circuit is about 12 seconds.

74. A method as claimed in claim 73, including having the resistor bank contain four resistors and connecting a pair of resistors to each conductor, and including switching between at least some of the resistors whereby, in turn, a first resistor is connected with one conductor and another resistor is connected with a second conductor, and then a third resistor is connected with the first conductor, and a fourth resistor is connected with a second conductor.

75. A method as claimed in claim 74, including selectively switching resistors to discharge stray capacitance, and to limit current.

76. A method as claimed in claim 75, including selecting the value of the discharge resistor such that the time constant to charge the circuit is substantially at least equal or greater than the time constant to discharge the circuit.

77. Apparatus as claimed in claim 30, wherein the resistor bank is part of the impedance element and includes four resistors, a pair of resistors being connected to each conductor, and including a switch between at least some of the resistors whereby the switch selectively connects each resistor in turn to complete the circuit for the fault signal.

78. Apparatus as claimed in claim 77, wherein different resistors act to discharge stray capacitance and limit current.

79. Apparatus for the detection of low level ground leakage in a supply system including conductors from the supply for supplying power to loads connect-ing to the system comprising:
resistor elements connected at one end to conductors from the supply;
a selector relay connected to the resistors at ends opposite to the resistor connection with the conductors;
an interrupter relay connected with the selector relay for periodically connecting selected resistor elements through a function switch to ground thereby creating a ground circuit for ground leakage current through the selected resistors when the function switch is closed; and a detector for location relative to the conductors for sensing the ground leakage current when the ground current is at a substantially steady state level.

80. Apparatus as claimed in claim 79, wherein the interrupter relay acts to cause the ground circuit to be periodically interrupted thereby to generate a pulse interrupted ground fault current.

81. Apparatus as claimed in claim 80, wherein the pulse interrupted ground fault current has a period of about 12 seconds.

82. Apparatus as claimed in claim 80, including delay means for operating the detector before the interrupter interrupts the ground circuit.

83. Apparatus as claimed in claim 82, including means for generating a synchronized signal, the synchronized signal activating the interrupter relay and activating the delay means.

84. Apparatus as claimed in claim 83, wherein the delay means causes the detector to sense the ground leakage current after a substantially steady state level is reached.

85. Apparatus as claimed in claim 84, wherein the delay is sufficient in time so that stray capaci-tive components in the system are substantially charged whereby the detector senses a current level substantially unaffected by stray capacitance.

86. Apparatus as claimed in claim 85, wherein the pulse interrupted ground fault current has a period of about 12 seconds.

87. Apparatus as claimed in claim 86, wherein the resistor elements include four resistors, the one end of a pair of resistors being connected to a first conductor and the one end of another pair of resistors being connected to a second conductor, and wherein the selector relay in turn connects the interrupter relay and function switch through different resistors of the pairs to complete the ground circuit.

88. Apparatus as claimed in claim 87, wherein the different resistors act to discharge stray capaci-tance to limit current in the system.

89. Apparatus as claimed in claim 88, wherein the resistor elements include discharge resistors and the value of the discharge resistors is determined such that the time constant to charge the system is substantially equal to the time constant to discharge the system.

90. A method for the detection of low level ground leakage current in a supply system including conductors between supply loads connected in the system comprising:
connecting one end of resistor elements to the conductors from the supply;
connecting a selector relay to the resistors at ends opposite to the resistor connection with the conductors; connecting an interrupter relay with the selector relay for periodically connecting selector relay and through a function switch to ground thereby creating a ground circuit for the ground leakage current through selected resistors when the function switch is closed; and locating a detector relative to the system for sensing the ground leakage current when the current is at a substantially steady state level.

91. A method as claimed in claim 90, including periodically interrupting the group circuit with the interrupter relay thereby to generate a pulse inter-rupted ground fault current.

92. A method as claimed in claim 91, wherein the pulse current has a period of about 12 seconds.

93. A method as claimed in claim 92, including a delay period for operating the detector before the interrupter interrupts the ground circuit.

94. A method as claimed in claim 93, including generating a synchronous signal for activating the interrupter and for activating the detector before the delay period.

95. A method as claimed in claim 94, wherein the delay period causes the detector to sense the ground current after substantially steady state is reached.

96. A method as claimed in claim 95, wherein the delay period is sufficient so that the stray capaci-tance of the system is substantially charged.

97. Apparatus as claimed in claim 39, wherein the delay means causes the detector to sense the ground current after a substantially steady state is reached.

98. Apparatus as claimed in claim 97, wherein the time delay permits the stray capacitance in the system to be substantially charged prior to the detector detecting the ground current.