CA1228942A - Soft digital image apparatus - Google Patents

Abstract

ABSTRACT
A soft digital image apparatus having a character generating mode for generating alphanumeric characters and attributes (i.e.
blinking, underlining, etc.), and a load mode for loading the alphanumeric characters and attributes in a predetermined pattern of columns and rows in a RAM by utilizing a minimum of hardware in the load mode of the generating mode comprising a single register to provide a path for data to be written into the RAM, together with a load mode flip-flop, and an associated control element is disclosed. A unique process is used in loading the RAM.

Description

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RELATED CASE
The following Canadian Patent application relates to this invention:
"Variable Loadable Character Generator", invented by Gary J. Goss, Thomas O. Holtey and James C. Siwik, Serial Jo.
~56,366 Filed June 12, 1984.
BACKGRUUND OF TOE INVENTION
1. Field of the Invention This invention relates in general to computer systems and more particularly to an apparatus and method for generating the various types of character sets including multiple national language character sets.

2 Description of the Prior Art .

The character generator is the means for translating from the charac-ter code associated with a particular character to be displayed on a cathode ray tube to the dot pattern fox that parti-cular character. In order to achieve suitable speeds, character generators are usually implemented in hardware using a table look-up scheme with a table stored in a dedicated memory, usually a ROM/PROM with the character code serving as a portion of the address to the memory. There are various methods for character generation. No prior art search has been made by the applicants.
However, in a recent decision by the United States District Court for the District of Delaware regarding litigation of the Cole Patent (United States 3,345,458, Master File Docket Number 78-198), the Court opinion provides the following review of the technology.
An Overview of the Technology In designing a system for receiving digital coded data and displaying it in decoded form on a Cathod Ray Tube (CRT), here ~J -1-,~.

~%2~9~ 72434-1 are certain parameters that must be considered. Among these are:
1. The type of scan pattern. The two types of primary la-concern here include one in which the scan covers one character space at a time (a minature raster scan pattern), and one in which each line of the scan covers a horizontal slice of each character in a row, as the beam scans across the entire width o 5 a CRT screen television raster scan pattern).
1'2n The type of CRT. The two principle types being the memory tube, which can hold a picture for minutes, and the non-memory type (including those with high persistance phosphers), of which a TV tube is an example, that needs to be 'refreshed' at a sufficient rate to make the picture appear continuous.
"4. Storage. A storage or memory is required in a system employing a non-memory CRT because the video signal must be applied to the CRT a number of times a second. The memory may, however, be either one that stores the character code prior to decoding or one that stores the video bits produced by the translation process. When the former is used, the system is sometimes characterized as an 'on-the-fly' system, to indicate that the video bits are applied to the input of the CRT as each one is generated by the translator in contrast to a system that has storage of the video bits.
"Each type of raster scan pattern has its advantages and disadvantages. An advantage of the minature raster scan over the ~2~

TV raster scan is that the character code may be presented at a slower rate for the same number of characters per row and rows per screen.
"The two maln advantages in using a TV scan are the cost 5 saving in the display portion of the system (the CRT and deflection circuits), and the ability to superimpose characters on pictures or other video (such as maps, etc.). These advantages generally come into play, however, only if one can operate at speeds at least equal to 'commerciall or 'entertalnment' TV rates Then one can buy a mass produced off the shelf display system relatively inexpensively, or simply transmit messages to TV sets thaw are already being used for other purposes, also mix character signals with other video signals operating at commercial TV rates. At least the first advantage is lost, however, if the cost of producing character video signals at commercial TV rates exceed the cost saving in the display portion.
"As the beam of the CRT scans, the information controlling on/off condition of the beam must be synchronized with the beam ~0 scan This is true whether the be-am follows TV scan pattern or a minature scan pattern. If, however, the TV scan pattern is to opeeate at commercial TV rates, or faster, the requirement of synchronization means that the electronic components must work at rates which were prohibited in the 1950's and too expensive to be commercial through the early 1960's.
"The coded form of input data must be translated to video 4~
data to control the on/off condition of the beam of the OPT as it sweeps in a miniraster or TV raster scan. The patent literature from the 1950's discloses translators in the form of digital circuits, for translating from a 6-bit character code to a pulse 5 train which will display a 5 by 7 character matrix on a CRT.
These are shown in U.S. Patent Number 2,920,312 by Gordon and Patent Number 2,987,715 by Jones.
"Among the analog translators known in the 1950's was the monoscope character generatoc. The monoscope generally does not 10 produce a train of 35 equal-leng~h pulse positionsl each of which can be on or oEf, wherefore, it is not generally associated with a character-matrix type of display. Rather it receives the 6-bit charater code and produces a pulse train in which the pulse lengths correspond to the precise width of the character to be 15 displayed, at various locations along the character height.
Physically, a monoscope is the small CRT, generally cylinderical in shape, which has a target imprinted or stenciled with characters, instead of a screen. rhe beam is deflected to a particular character on the target, in response to the 6-bit 20 character code received, and it then scans the character. In response to this scan, the monoscope produces an output signal which is the pulse train having pulse lengths or duration corresponding to the time the beam is crossing the character.
This pulse train closely replicates the character shape, an, consequently produces much better quality characters than the pin hole from a 5 by 7 character matrix.

"All of the character display CRT systems of interest here use signal storage, so that the CRT screen can be repeatedly 'refreshed'. Thus, a full screen of character~representing signals (sometimes called a 'page') is stored and used repeatedly 5 to 'refresh' the screen. The storage is either of two types.
The first type involves storing the 6-bit character codes that are received. The codes can then be read out from storage, and translated to the video signal, as the CRT beam is scanning. The second type of storage involves translating the 6-bit character 10 codes, as they are received, to their corresponding video signals and thens!t~r~ng the video bits. The video bits can then be read out from storage to the CRT is the CUT beam is scanning. While both o these storage approaches involve the storage of codes, and both codes are generally blnary in nature and represent characters, they can be conveniently referred to as 'character code storage' and 'video bit storage' respectively.
"The disadvantage of video bit storage is that it takes more storage space, since it must store a screen or page of 35-bit character matrix codes--while the character code storage needs only a screen or page of 6-bit character codes. The advantage of video bit storage, however, is that the character codes are only translated once, and the video bits are then stored and read out concurrently with a beam scan--so that the character codes need not be translated concurrently with each scan of a scan line and, therefore, the translation need not keep pace with the high-speed beam scan. Further, video-bit storage , .

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is particularly suited to the variable placement of the characters on the screen"
As noted supra the advantaye of the raster scan technique of generating characters by digital techniques comes into play only 5 if one can operate at speeds at least equal to commercial or entertainment TV rates. This requirement is met in the prior art by util izing ROM/PROMs to achieve the speed. This technique has the limitation of requiring a dedicated memory for character generation/ thus only one character set can be generated and 10 additional character sets including different ormats such as elite and pica and also foreign characters require addi-tional other the form of hardware in ROMs/PROMs. Thisnecessitates that the manufacturer store a variety of these pieces of hardware in order to provide full service to customers 15 throughout the world.
What is needed, therefore, is a character generator that is loadable rather than fixed (RO~/PROM) so that multiple character sets can be provided with a single hardware configuration.
OBJECTS OF THE INVENTION
It is an object of the invention thereore to provide an improved character generator.
It is another object o the invention to provide an improved character generator for use with a computer terminal utilizing a cathode ray tube (CRT) as display.
It is still another object of the invention to provide an improved character generator that is loadable rather than fixed ~æz~

(RO~/PROM) so that multiple character sets can be provided with a single hardware configuration.
It is still a further object of the invention to provide an improved character generator which utilizes a minimum of hardware 5 to make the character generator loadable.
These and other objects of the invention will become obvious upon a reading of the specification together with the drawings.
SUMMARY OF THE INVENTION
The soft loadable character generator of the invention 10 replaces the ROM/PROM by a RAY utilizing 2K by 8 RAY memories, a 4K by 8 memory, 4 MUX chips, and a Motorola 6a45 CRT Controller with various registers.
Eighty characters horizontally and 12 scan lines vertically are utilized per character row. A character code is read out of the display memory or each character position of each scan line.
Each time a new character is read out of display memory, the character code is used as a portion of the address which is used to address the RAY which serves as the character generator. The r0mainder of the address for the character generator is taken rom the scan line number. The address is comprised of 12 bits with the 8 high order bits comprising the character code and the 4 low order bits comprising the scan line number. us each scan line is scanned across the 80 character positions, an appropriate portion of the character will appear at each character-time until after a total of 12 scan lines are completed, the 80 characters are displayed on the screen.

. . r ~æz~2 In accordance with the present invention, there is provided a soft digital image apparatus having a character and attribute (i.e., blinking, underlining) generating mode and character and attribute load mode and including a system clock wherein said soft digital image apparatus is loaded with first and second digital signals on each clock cycle during the load mode representing different characters and attributes, said soft digital image apparatus utilizing the first digital signals for generating alphanumeric characters, and the second digital signals for gener-ating attributes, said soft digital image apparatus comprising:
(a) first means for digitally generating selected characters utilizing selected ones of the first digital signals representing the selected characters;
(b) second means coupled to said first means for providing a path Eor the first digital signals to be loaded into the first means;
(c) third means coupled to said first and second means for enabling said second means so that the contents of said second means may be written into said first means; and (d) fourth means coupled to said first and second means for storing the first digital signals at predetermined addresses in rows and columns, there being sufficient number of columns (c) to store a predetermined number of characters (ch) per row (r), each row further comprising a predetermined number of scan lines (s), there further being a predetermined number of rows (r).

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In accordance with another aspect of the invention, there is provided a soft digital image apparatus having a character and attribute (i.e., blinking, underlining) generating mode and character and attribute load mode and including a system clock wherein said soft digital image apparatus is loaded with the first and second digital signals on each clock cycle during the load mode representing different characters, said soft digital image apparatus utilizing the first digital signals for generating alphanumeric characters, and the second digital signals for generating attri-butes, said soft digital image apparatus comprising:
(a) first means for digitally generating selected attributes utilizing selected ones of said second digital signals represent-ing the selected attributes;
(b) second means coupled to said first means for providing a path for the second dlgital signals to be loaded into the first means;
(c) third means coupled to said first and second means for enabling said second means so that the contents of said second means may be written into said first means; and, (d) fourth means coupled to said first and second means for storing the second digital signals at predetermined addresses in rows and columns, there being sufficient number of columns (c) to store a predetermined number of attributes (a) per row (r), each row further comprising a predetermined number of scan lines (s), there being a predetermined number of rows (r).

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In accordance with another aspect of the invention, there is provided a soft digital image apparatus having a character and attribute (i.e., blinking, underlining) generating mode and character and attribute load mode and ineluding a system clock wherei.n said soft digital image apparatus is loaded with first and seeond digital signals on each eloek eyele during the load mode representing different characters and attributes, said soft digital image apparatus utilizing the first digital signals for generating alphanumeric characters, and the second digital signals Eor generating attributes, said soft digital image apparatus comprising:
(a) first means for digitally generating selected eharaeters utilizing selected ones of the first digi-tal signals representing the seieeted eharaeters;
(b) seeond means eoupled to said first means for providing a path for the first digital signals to be loaded into the first means;
(e) third means eoupled to said first and seeond means for enabling said seeond means so that the eontents of said seeond means may be written into said first means;
(d) fourth means eoupled to said first and seeond means for storing the first digital signals at predetermined addresses in rows and eolumns, there being suffieient number of eolumns (e) to store a predetermined number of eharacters (ch) per row (r), each row further comprising a predetermined number of scan lines (s), there further being a predetermined number of rows (r); and, (e) control means coupled to said first, second and third means for controlling the loading of the first digital signals into said first means at a selected address of said first means.

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BRIEF DESCRIPTION OF THE DRAWINGS
The manner in which the apparatus of the present invention is constructed and its mode of operation can best be understood in the light of the following detailed description, together with 5 the accompanying drawings, in which:
Eigures lA and lB are prior art presentations of the methods of generating characters on a Cathode Ray Tube (CRT) utilizing video signals.
igure 2 is a prior aLt block diagram of the method of 10 generating characters on a CRT utilizing digital signals.
Figure 3 is a schematic drawing of the addressing scheme of the invention for generating characters on a CRT utilizing video signals.
Figure 4 is a high level logic block diagram of the 15 invention.
Figure 5 is a detailed logic block diagram of the CRT
controller and the MUXs of tbe invention.
Figure 6 is a detailed logic block diagram of the transceivers to/from the microprocessor, the screen attribute 20 buffer and screen data buffer of the invention.
Figure 7 is a detailed logic block diagram showing the character generator and various storage resisters and shift registers.
Figure 8 shows a typical organization of data in the Screen 25 Buffer Rays.
Figure 9 shows typical values used for the Starting Address ' ~2;~

and Number of Scan L.ine parameters for sixteen passes of one row.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
In order to understand the instant invention it is necessary to have an understanding of the formation of a picture on the CRT of a television set. The picture is formed by an electron beam which illum-inates various points on the phosphor coating of the screen as it scans the area in which the image is to be displayed. Normally the beam scans across one horizontal line at a time, starting at the top of the screen and moving sequentially down the screen to the bottom. This pattern of scan in which the beam proceeds across the entire width of the CRT screen beEore scanning a second horizontal line is referred to as the television raster scan pattern. By using a digital video control signal to appropriate-ly control the intensity of the beam as it traverses the screen, the beam can be used to :Eorm a recognizable message or image. Because of its speed, the beam's movement is not detectable by the eye.
Each member of a character set (font) can be represented by an array of dots in a rectangular matrix having fixed dimensions ~e.g., 5 dots wide and 7 dots high, or as in the instant invention, 7 dots wide and 9 dots high). The character is displayed on the CRT screen within a char-acter space which includes the dot matrix of the character, and additional blank spaces to separate the characters on the screen (e.g. 9 dots wide by 12 scan lines high). Two such adjacent character spaces are shown in prior art Figure lA. As the beam moves across the screen in a scan line, _ g _ .

the computer codes for each of the characters to be written in a row across the screen are sequentially provided from a memory to a decoder or "character generator". As shown in prior art Figure 2, timing and control circuitry produce count signals which S represent the scan line of the raster and the dot position along the scan line. Character-code inormation, the scan-line count signal, and the dot position count signal are applied to the character generator, Digital to Video Generator 201, which converts the signals into a 2-level, serial digital output. The 10 output signal is applied to the television monitor circuitry 202 as a video signal. One digital level'of the signal corresponds to a dot and turns on the electron beam to write a dot on the television screen. The other digital level corresponds to the absence of a dot, and leaves the electron beam turned off so that 15 no dot is written. Dots thus produced as the electron beam moves along a scan line correspond to the dots in the appropriate horizontal slice of each of the characters to be displayed in the character row. Thus in Figure lA, dots 103 through 105 (for the character "A") and dots 106 through 109 (for the character "B") 20 will be illuminated sequentially as the electron beam moves along the top scan line. The timing and control circuitry of Figure 2 also provides horizontal and vertiral drive pulses to the monitor 202 to synchronize the scanning motion of the beam with the video signal generated as described supra.
After completing one scan line, the electron beam flies back to the starting side of the screen, (but down one position due to the vertical sweep) to start the next scan line. The sequential application of character codes, scan line count and dot position count is then repeated, this time generating the video signals fos the next dot slice of each of the characters in the row.
AE~er the appropriate number of scan lines (e.g., 8 or 12) have been "written" onto the screen, a full row of characters is complete. The entire row has been written onto the screen, one scan line at a time, from top to bottom.
In a like manner the additional rows of characters making lO up the message to be displayed on the screen are written. After the entire screen has been scanned, the procedure is repeated at a rate of 60 times per second so as to "refresh' the screen and create a display which the human eye perceives as the persistent, non-Elickering image.
ReEerring to Figure lB, there is an example of the translation of the code for the character "l" which is to be displayed on the screen. It should be noted that if the binary codes that are used for identiEying the various characters were supplied directly to the CRT, the pattern on the screen would not 20 generally be recognizable. Thus, the 6-bit code OOOlll might represent a number 1171~ but would appear as 3 dark spots followed by 3 bright spots, or vice versa. Consequently it is necessary to translate the 6-bit binary code into a video signal which will represent a normal appearing character. To see how this is done 25 refer to Figure lB which shows the code to pattern translation for the number "l". It should be noted that the video code for the first scan line is OOlO0 and the video signal which represents this code is a pulse in the position where the dot is ko appear. Similarily, for scan line two the video code is 01100 whereby a video signal representing this video code is two pulses 5 causing two dots to appear on scan line two. (When the final scan line is completed, the number "l" appears on the screen.
Referring now to Figure 3, there is shown one character on one row in one column. There are 80 such character columns across the screan, and there are 25 character rows; thus 2000 lO characters can be generated on the page or screen. Figure 3 shows how the letter "A" would be formed within the boundaries 301 to 302 when the total of 12 raster lines comprising one character row have been completed. (It should be noted that 9 raster lines are utilized in character generation; whereas 3 are 15 added as a space between character rowsJ) In order to obtain this character (which may be part of a message), it first must be stored in a memory or buffer 7 shown on ~iyure 4. In order to write this character on the screen, it must be generated by the character generator 14. The character 2~ generator stores different standard characters at different addresses which can be used to generate the characters of any message on the screen which is stored in buffer 7 as previously described. The pattern stored in the character generator 14 is addressed by utilizing the code of the character in the message 25 as part of the address. In this case the hexadecimal code for "A" is 041, while the decimal code is ~5. The address of the ~æz~%

letter "A", therefore, would be 65 x 16 for the first raster line, and for the second it would be (65 x 16) +1, etc. As each raster line progresses across the screen, the patterns for diferent characters of the message are similarly addressed by 5 their codes and a portion of each is generated until one full character row is generated by 9 successive raster lines.
Referring now to Figure 4, there is shown a high level logic block diagram of the invention. Two busses, a 16-bit address bus 1 and an 8-bit data bus 2, are coupled to a commercially 10 available Motorola 6809 microprocessor 20. Under control of the microprocessor 20, the microSystem 6/10 system (not shown) communicates to the terminal, of which the invention is a portion, via the address and data busses 1, 2~ Two commercially available 6116 RAMs 7 and 8 respectively are coupled Jo the 8-bit 15 data bus 2 via commercially available 74LS245 transceivers 9 and 10. The transceivers 9 and 10 can transmit data in either direction from the bus to the RAM or from the RAM to the bus.
The data is placed into the RAM 7 or 8 at addresses controlled by the microprocessor 20 via address bus 1. Selection of the RAM 7 or 8 in which data or attributes is to be stored is done via the low order bit of address bus 1 through logic not shown.
Accordingly, when a message is to be written on the CRT screen (not shown), data (ire. the message) is written into the RAM 7 via transceiver loan addresses provided by the microprocessor 20.
In a similar manner, attributes (i.e. underlining, blinking, etc.) are written via data transceiver g into RAM 8. In order z to write on the CRT screen (not shown), it must be done piecemeal for each character as each scan line progresses across the screen (not shown, as pre-viously described supra. Subsequently, under control of the CRT controllcr CRTC 3, each character of the message is addressed and read out into register 11. Similarly, each attribute corresponding to any given character is simul-taneously read out into register 12. For any character of a message tem-porarily stored in register 11, a full address comprised o:E 8 high-order bits (which in reality represent the character code) and 4 low-order bits (which represent the scan lines, and which count 12 different scan lines 0-11~ is presented to character generator 14. Character genarator 14 is comprised of two commercially available 6116 RAMs which stores a set of character patterns of any distinctive type which can be addressed by the address formed by con-catentating the character code with a scan line code as described above. As each separate scan line of a CRT screen (not shown) progresses through 80 character time-frames a portion of each character is written in each time-frame on each scan line as indicated at each time frame by the character temporarily stored in register 11 for that particular time frame. The scan line address will cycle from 0 to 11, and when 12 complete scan lines have been made on the screen, then 80 characters would be completed on the screen as one row.
The shift register 15 coupled to the character generator 14 are the means for converting parallel data to serial data.
The attribute for a particular character arrives at the screen (not shown) at precisely the same time that the character arrives. This is accomplished by storing the character data in the screen data buffer and the attribute data in the screen attribute buffer. As each address is presented to the screen data buffer and the screen attribute buffer, the character being ~L2Z8~

addressed is placed in register 11 and the attribute being addressed is placed in register 12. Thus the character code and the attribute code are available to the control logic to be written on the screen a-t the same time.
Thus, since both the character information and attribute information is avail-able at precisely the same time, it makes for very precise timing and a clear image on the screen.
It will now be shown that the invention provides a means of loading the character generator RAM 14 of Figure 4 which requires the minimum of additional hardware over that required for the character generation funciion.
The heart of the invention consists of loading the RAM 14 with alphanumeric characters and attributes :Erom RAM 7 having the pattern of Figure 8, and utiliz-ing a load process of Figure together with the following hardware: the single register 14 of Figure 4 to provide a path for the da-ta to be written into the character generator 13, together with a Character-Generator-Load mode flip-flop 17 and associ.ated control element 18 of Figure 7. When this flip-flop is set to the Character-Generator-Load state, the Character Generator RAM is set to Write mode and the tristate output of register 13 described above is enabled so that the contents of the register 13 are written into RAM 14 on every character clock cycle so long as this mode remains in effect. Now, the address at which the data are written is the twelve-lead address consisting of the 4 scan line leads emanating from the CRTC 3 and the 8 leads emanating from the register 11 just as when the RAM 14 is used for its normal character generation function. Also note that register 11 is fed by the "data" screen buffer RAM 7 while the register 13 which contains the data to be written is fed by the "attribute" screen buffer RAM 8.
A combination of a "load" of the screen data and attribute RAMs ..
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~22~g~2 and a programming of the CRTC 3, in conjunction with the Load-Mode hardware described above will cause the desired table to be loaded into the character generator 14. The attribute screen buffer is loaded with the screen patte-rns and the data screen buffer 7 is loaded with the character codes normally used to evoke the associated patterns. These patterns are 12 scan lines in height in the present instance, but, in order to simplify the addressing of the char-acter generator RAM l the patterns are allocated to blocks of 16 sequential locations. This allows for an implementation where the address is simply the concatentation of the character code with scan line number. Since the screen buffer data and attribute RAMs contain 20~8 (2K) locations, there is room for 20~8/16 = 128 patterns in one "load" of the attribute RAM. This is one half of the 256 different patterns which are desired to be loaded into the character generator so that the procedure must be split into two phases. Typically, the split will be according to -the character code set with 128 codes being handled in the first phase and the remai.ning 128 codes being loaded in the second phase. The following description will be directed to the operation of one of these phases, the only distinction between the two phases being in the values of the data which are loaded into the data and attribute RAMs 7 and 8.
At the beginning of each phase, the screen attribute and data buffers are respectively loaded with 128 patterns and the corresponding char-acter codes, each code being replicated 16 times. The details of the ordering of this information within the screen buffer RAMs are governed by the operation of the CRTC 3.
The CRTC 3 is capable of being loaded with certain parameters which will then control its operation, including the following:
Number of characters per row . , ~228~

Number of scan lines per character row Number of character rows Screen buffer starting address.
One purpose of the CRTC is to generate the proper sequence of addresses to address the screen buffers 7 and 8 to allow for the display of the patterns associated with the codes stored in the buffer while also generat-ing scan line numbers to serve as part of the character generator address as explained earlier. Another purpose of the CRTC is to afford ease of scrolling by allowing the beginning of screen to correspond to an arbitrary location in the screen buffer, hence the Starting Address parameter.
The operation of the CRTC consists of emitting a sequence of screen buffer addresses and scan line numbers (as well as synchronizing pulses not covered here). In particular, the initial sequence emitted consists of a linear sequence of screen buffer addresses commencing with the screen buffer Starting Address, the length of the sequence being equal to the Number of Characters per Row parameter, while holding the emitted scan line number at ZERO. AEter a suitable synchronization interval, this identical sequence of screen buffer addresses is repeated while holding the emitted scan line number at a value of ONE. This process is repeated for the number of times specified by the Number of Scan Lines per Character Row parameter. Following this, the entire process is then repeated with the next sequential set of screen buffer addresses, this level of iteration being repeated until the number of repeti-tions is equal to the Number of Character Rows parameter.
Thus, for a display of 80 characters per row with 12 scan lines per character row and 25 character rows, the initial sequence would consist of the first 80 addresses (commencing with the Screen Buffer Starting Address) ~z~

with the scan line number held equal to ZERO followed by a sequence in which these same first 80 addresses with the scan line number held equal to ONE, etc. until the scan line number equals 11. Following this, the second 80 addresses are generated 12 times, etc., until lastly the twenty-fifth set of 80 addresses are generated 12 times with the scan line number ranging from O -11 with each repetition of the same set of addresses).
Now, assume the following example for the purpose of illustrating the loading of the character generator. The following fictitious "parameters"
are loaded into the CRTC to control its operation during the loading function.
Number of characters per row = 128;
Number of character rows = l;
Number of scan lines per character row = variable; and Screen buffer starting address = variable.
Figure 8 represents the organization of data in the screen buffer I~AMs 7 and 8. The left half of each column represents the contents of the "data" buffer 7, while the right half represents the contents of the "attribute"
buffer 8. The numbers across the top represent the number of character patterns to be loaded, whereas the numbers along the left margin show the range of addresses used for each of the scan lines. The case shown in Figure 8 is for the first phase of pattern loading; i.e., for character codes O - 127. Thus, as illustrated, the contents of the data buffer (the left half of each column) constitute this range of character code numbers in sequence, replicated 16 times. The notation "Pa.b" where "a" and "b" are numbers) shown for the con-tents of the right half columns denotes the binary representation for scan line "b" of the pattern for the character whose code is "a'l. Thus, using the example of Figure 3, if the character code for "A" is 65 (which it is in ASCII), ~z~ 2 then P65.0 = 0, P65.1 = 16 (00010000 Binary), P65.2 = 40 (00101000 Binary, etc.
The appropriate character patterns, organized as described, are loaded into the screen attribute buffer by a suitable program residing in the 6806 JUP 20 at the start of each phase.
Due to constraints imposed by the normal functioning of the CRTC, the algorithm for one phase of loading character patterns into the character generator must be divided into 16 passes. For each pass, the CRTC is loaded with parameters as described below, then the character generator is placed in the Load Mode until the entire CRTC sequence has been emitted. (This is determined by monitoring by means not shown the Vertical Sync Signal emitted by the CRTC at the end of each complete sequence that it generates.) Thus, there will be described the loading of patterns with the full range of 16 scan lines recognizing that improvement in loading time would be achieved by only loading those scan lines actually used for the display.
Figure 9 shows the values of the screen buffer Starting Address and Number of Scan Lines per character row parameters for each of the sixteen passes. On the first pass, the Starting Address is set to the address corres-ponding to the beginning oE the last scan line of Figure 8, this being the area where the scan line 15 slices of the character patterns are stored. The CRTC
will sequence through this row of addresses sixteen times over while stepping the scan line number from 0 to 15. Now, since the data buffer 7 location simply contain the sequence 0 - 127 and since this, contains the sequence of numbers 0 - 127 and since each of these numbers, Character Generator RAM 14, the binary representations of scan line 15 patterns (the right halves of each column of the last row of Figure 8) will be written sixteen times into the Character Generator 14. The first fifteen of these iterations are not , ~2Z~

desired, but the sixteenth does load the pattern information of scan line 15 into the proper locations. In the second pass, the Starting Address is set to 1792 the next to last scan line of figure 8) but this time the number of scan lines is programmed for 15. This means that on this pass the scan line numbers generated by the CRTC will only range from 0 to 14 so that the pattern in-formation of scan line 15 which was loaded in the first pass will remain in-tact. Again, on this pass, only the last of the iterations fifteen this time) through the 128 specified addresses in the screen buffer is required. Thus, the process proceeds, moving up one scan line of Figure 8 each time, while decreasing the Number of Scan Lines parameter by one until on the last sixteenth) pass there is only one sequencing through the first 128 locations.
At this point, the half of the character generator appropriate to the current phase is fully loaded.
Referring to Figures 5, 6 and 7, there are shown detailed logic block diagrams of the invention oE Figure 4. It should be noted that elements on Figures 5, 6 or 7 that correspond to similar elements oE Figure 4 have been identified by the same reference numeral. Thus, the character generator of Figure 4, having refernce numeral 14, is also identified by reference numeral 14 on Figure 7.
Referring now to Figure 6, screen data buffer 7 and screen attribute buffer 8 coupled together comprise a 2K x 16 screen buffer. Data -from the 8-bit data bus 2, shown on Figure 4, is applied to data bus leads DBUSOO through DBUS07 of both transceivers 9 and 10. Screen buffer data signals SBDAT0-SBDAT7 on transceiver 10 are applied to the SBDATO-SBDAT7 terminals of screen data buffer 7 when data is being transmitted from the bus to be written into the screen data buffer 7. In a reverse manner, data from ,, .

~2~

screen data buffer 7 can be read out onto bus 2 via transceiver 10. In a similar manner, data representing attributes can be written into or read out of the screen attribute buffer 8, and to or from the bus 2 via the data bus terminals DBUS00 through DBUS07 and screen buffer attribute terminals SP,ATTO
through SBATT7 of transceiver 9. In transferring information into or out of the screen buffer memories 7 and 8, it is transmitted to or from locations addressed by signals on terminals SBAD09 through SBADl9. Additionally the write enable signal WESBAT or WESBDT of screen buffer attribute 8 or screen data buffer 7 must be true. This technique of uslng unique write enable signals to select one or the other memory permits the screen data to be stored in one memory bank; whereas the screen attributes are stored in another memory bank.
When it is desired to generate a character, the inEormation in screen data buffers 7 or 8 is read out into register ll and 12 in synchronism with the scan line time intervals. It will be seen, therefore, that screen buffer data on terminals SBDAT0 through SBDAI'7 will be applied to the SBDATO -SBDAT7 terminals of register 11. In a similar manner, data from screen attri-bute buffer 8 is applied to register 12. T]le information in register 11, for example, is the character code required for that particular time interval.
This character code is applied to the CCODE0 through CCODE7 terminals of the character generator 14. Additionally the raster scan line address slgnals on terminals RASTRl through RASTR4 of CRT controller 3 are applied to the char-acter generator 14 on raster scan address line terminals RASTRl through RASTR4 of character generator 14. Accordingly as raster scan lines 0-11 are addressed, and as each character is presented to the character ganerator in synchronism with the scan line time intervals, the character generator 14 decodes a por-tion of the character and provides video output signals to terminals VIDD00 ~2~:8~

through VIDD01 of shift registers 15 on sheet 3 of Figure 7 Yia lines VIDD00 -VIDD07 of sheet 2 of Figure 7. These signals are input in parallel and are shifted out serially on terrninal YIDOUT.
Referring now to Figure 5, the CRT Controller (CRTC) 3 generates all of the timing for the display. This consists of the screen buffer address sequence emitted on terminals CRTA09-CRTAl9, the raster scan line number se-quence emitted on terminals RASTRl-RASTR~, as well as the horizontal and verti-cal synchronizing signals HSYNCl and VSYNC2 and the display enable signal DISPLY.
The CRTC 3 is capable of being loaded with control parameters by virtue of having the signals UDATA0-UDATA7 from data bus 2 applied to its data terminals and suitable control signals being applied, such as UBUSRD, PHAS.E, ABUS18 and CRTCCS. The multiplexors (MUX) 6 are for the purpose of selecting an address for the screen buffer RAMs, from either the CRTC 3 or from the address bus 1.
The former case is selected during each display character time to allow for reading out of the coded display data and attributes; while the latter case is selected under control of the microprocessor 20 Eor the purpose of causing the information to be displayed to be properly stored in the screen buffers. (The specifications for the controllers, such as the CRT controller are to be found in the Motorola Semiconductor Catalog beginning at ~-~57; while the specifi-cations for other elements are to be found in the Texas Instrument TTL Data Book for Design Engineers, Second Edition.) llaving described the invention so that a person of ordinary skill in the art can make and use it without undue experimentation, those skilled in the art will realize that many variations and modifications can be made to produce the described invention and still be within the spirit and scope of the claimed invention. Thus, some of the hardware and/or steps may be altered or 2~9~

replaced by different hardware and/or steps which will proYide the same result and fall within the spirit of the claimed invention. It is the intent, there-fore, that the invention be l.imited only as indicated by the scope of all the claims.

Claims (16)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. A soft digital image apparatus having a character and attribute (i.e., blinking, underlining) generating mode and character and attribute load mode and including a system clock wherein said soft digital image apparatus is loaded with first and second digital signals on each clock cycle during the load mode representing different characters and attributes, said soft digital image apparatus utilizing the first digital signals for generating alphanumeric characters, and the second digital signals for generating attributes, said soft digital image apparatus comprising:
(a) first means for digitally generating selected characters utilizing selected ones of the first digital signals representing the selected characters;
(b) second means coupled to said first means for providing a path for the first digital signals to be loaded into the first means;
(c) third means coupled to said first and second means for enabling said second means so that the contents of said second means may be written into said first means; and (d) fourth means coupled to said first and second means for storing the first digital signals at predetermined addresses in rows and columns, there being sufficient number of columns (c) to store a predetermined number of characters (ch) per row (r), each row further comprising a predetermined number of scan lines (s), there further being a predetermined number of rows (r).

2. A soft digital image apparatus as recited in Claim 1 wherein said columns are divided into a left and right column and wherein said left column is for storing the first digital signals representing characters and the second column is for storing the second digital signals representing attributes.

3. A soft digital image apparatus as recited in Claim 2 wherein the first digital signals also form a portion of the address for loading the first digital signals into the first means.

4. A soft digital image apparatus as recited in Claim 2 wherein the second digital signals also form a portion of the address for loading the second digital signals into the first means.

5. A soft digital image apparatus as recited in Claim 1 wherein the fourth means stores first digital and second digital signals in the following typical pattern representing one row of characters and attributes wherein the left-hand column representing range of addresses and the numbers at the top of each column representing the character stored and a portion of the address of that character:

6. A soft digital image apparatus having a character and attribute (i.e., blinking, underlining) generating mode and character and attribute load mode and including a system clock wherein said soft digital image apparatus is loaded with the first and second digital signals on each clock cycle during the load mode representing different characters, said soft digital image apparatus utilizing the first digital signals for generating alphanumeric characters, and the second digital signals for generating attributes, said soft digital image apparatus comprising:
(a first means for digitally generating selected attributes utilizing selected ones of said second digital signals representing the selected attributes;
(b) second means coupled to said first means for providing a path for the second digital signals to be loaded into the first means;
(c) third means coupled to said first and second means for enabling said second means so that the contents of said second means may be written into said first means; and, (d) fourth means coupled to said first and second means for storing the second digital signals at predetermined addresses in rows and columns, there being sufficient number of columns (c) to store a predetermined number of attributes (a) per row (r), each row further comprising a predetermined number of scan lines (s), there being a predetermined number of rows (r).

7. A soft digital image apparatus as recited in Claim 6 wherein said columns are divided into a left and right column and wherein said left column is for storing the first digital signals representing characters and the second column is for storing the second digital signals representing attributes.

8. A soft digital image apparatus as recited in Claim 7 wherein the second digital signals also form a portion of the address for loading the second digital signals into the first means.

9. A soft digital image apparatus as recited in Claim 7 wherein the first digital signals also form a portion of the address for loading the first digital signals into the first means.

28 15. A soft digital image apparatus having a character and attribute (i.e., blinking, underlining) generating mode and character and attribute load mode and including a system clock wherein said soft digital image apparatus is loaded with first and second digital signals on each clock cycle during the load mode representing different characters and attributes, said soft digital image apparatus utilizing the first digital signals for generating alphanumeric characters, and the second digital signals for generating attributes, said soft digital image apparatus comprising:
(a) first means for digitally generating selected characters utilizing selected ones of the first digital signals representing the selected characters;
(b) second means coupled to said first means for providing a path for the first digital signals to be loaded into the first means;
(c) third means coupled to said first and second means for enabling said second means so what the contents of said second means may be written into said first means;
(d) fourth means coupled to said first and second means for storing the first digital signals at predetermined addresses in rows and columns, there being sufficient number of columns (c) to store a predetermined number of characters (ch) per row (r), each row further comprising a predetermined number of scan lines (s), there further being a predetermined number of rows (r); and, (e) control means coupled to said first, second and third means for controlling the loading of the first digital signals into said first means at a selected address of said first means.

11. A soft digital image apparatus as recited in Claim 10 wherein said columns are divided into a left and right column and wherein said left column is for storing the first digital signals representing characters and the second column is for storing the second digital signals representing attributes.

12. A soft digital image apparatus as recited in Claim 11 wherein the first digital signals also form a portion of the address for loading the first digital signals into the first means. means.

13. A soft digital apparatus as recited in claim 12 wherein the first digital signals representing a predetermined number of n characters (ch) are loaded sequentially into the left half of (n) columns (c) of the first row (r) of said first means, said first row (r) comprising a predetermined number (m) of scan lines (s), utilizing sequential addresses comprised by sequentially concatenating with the scan lines (s) the code of the character (ch) to be loaded into each column of the first row (r) until the total number (n) of characters (ch) have been repeated (m) times corresponding to the total of scan lines (s) of said first row (r).

14. The soft digital image apparatus as recited in Claim 13 wherein there are predetermined number (k) of rows (r) and the process is repeated for each row (r) until a total number of (k) rows (r) have been loaded.

15. The soft digital image apparatus as recited in Claim 13 wherein the second digital signals representing attributes (att) are loaded into the right side of each column (c) of the first row (r) of said first means, said first row (r) comprising a predetermined number of scan lines (s), utilizing sequential addresses having the notation "P?.B" wherein B refers to the numeric value for scan line (s) for the pattern of the attribute whose code is ?.

16. A soft digital image apparatus as recited in Claim 15 wherein a typical pattern of addresses for loading 1 row (r) having 127 characters and 16 scan lines is shown below: