CA1212473A - Computer controlled energy monitoring system - Google Patents

Abstract

COMPUTER CONTROLLED ENERGY MONITORING SYSTEM

ABSTRACT OF THE DISCLOSURE

Disclosed is a centralized data communications system incorporating a plurality of remote stations, each having a plu-rality of information channels associated therewith. A selected remote station and its associated information channels are tone addressed by a central station communicating with group of re-mote stations over respective communications channel. The re-mote stations may have a current sensor connected to one of the information chennels for sending data corresponding to the amount of current sensed in an electrical path back to the central sta-tion upon being properly addressed. This data, together with data representative of the voltage on the monitored electrical path, is used by the central station to calculate energy consumption. The calculated energy consumption is retained at the central station and used for information and billing purposes. The central sta-tion may also send data to an addressed information channel at a remote station for controlling an operation thereat. The central station can also receive data from various parameter measuring sensors at remote station, e.g. sensor measuring temperature, humidity fluid flow, etc. which may be connected to other infor-mation channels and thus the system may be used as a general pur-pose data gathering or distributing communications system.

Description

'7~3 , This is a divisional of Canadian Application Serial No.
40~,493 fixed June 4, 1982.
BACKC~OUND AND SUMMARY OF THE INVEMTI~N
The present invention relates to a centralized date communications system in which a plurality of groups of remote stations communicate with a central station over a respective plurality of communications channels each of which is shred by all the remote stations of a group. In a preferred arrangement of the system, data communicated from the remote stations to the central station is representative of sensed current in an electric eel path which is used, together with dfita representing the volt-age on the electrical path, by the central station to indicate energy consumption for information and willing purposes.
Various types of centralized data communications systems have been proposed in which plurality of remote stations are addressed by a central station over one or more ~omnunications channels for the purposes of receiving data from or transmitting data to the remote stations. Generally speaking, the type of addressing which is employed is quite complex requiring sophistic acted apparatus at both the central end remote stations. The come plexity of this apparatus neural decreases its reliability and increases its cost, limiting widespread use of centralized date communications systems.
Accordingly one object of the present invention is to provide a relatively simple reliable and low-cost data communique-lions system in which central station tone addresses plurality of remote stations, each containing a plurality of information channels which my send data to or receive data from the Sinatra station Each remote station contains apparatus therein for mounting the number of tones on a communications channel connect-in it to the entoil station and connecting one of the inform-lion channels to the comnunic~tions channel only when the number of counted tones falls within a neural range of tones assigned - a -Thor In addition, etch remote station contains Rpp~r~tus for sequentially connecting the information channels to the communique-lions channel as tones within the predetermined numerical range assigned the remote station are counted. This type of addressing provides centralized data ~omnunications system which is both simple end reliable, while considerably reducing its cost. The simplicity of construction of the remote stations also allows them to be constructed as low cost modules which my be powered solely by the flddressing tones.
An additional object of the invention is the provision of a centralized data communications system which is flexible and versatile, and which can be easily adapted to accurately take various output measurements from various types of sensors which may be connected to information channels at the remote stations.
- An additional object of the invention is the provision of centralized data communications system having a high degree of measurement 6ccurhcy which is achieved by calibrating the out-put of a remote station sensor. This is a~eomplished by first Perceiving and storing it a central station output calibration data from the sensor when measuring a parameter under known conditions.
This calibration data is subtracted rum output data of the sensor when measuring a parameter under unknown conditions thus pro-voiding data that has been normalized to the known conditions.
An additional object of the invention is the provision of on automatic digital gain control circuit which is used at the ventral station ox R centralized data communications system to adjust the level of an incoming signal Jo be within a prude termined measurement range of the central station equipment.
An additional obey of the invention is the provision of a simple and low cost remote station module which is connected to a central station and used to monitor energy consumption or other parameters, which module contains unique circuitry for de coding and responding to tones emitted by the central station during addressing.
An additional object of the invention is the provision of centralized data communications system which, with low cost sensors, is cable of measuring temperature, fluid flow, power an BTU consumption at remote station with a high degree of accuracy.
An additional object of the invention is the provision of a centralized data communications system capable of controlling operations at an addressed remote station by sending tone control signals thereto.
The present invention also relates to a system for monk-toning of energy consumption in an electrical path at a remote - station. At present there are many clectric&l installations such as in commercial buildings, apartments, condominiums, etc. where a single utility meter is provided at on electrical service en-trance. With this arrangement, individual energy consumption in the apartments or other units of the building cannot be India viduall~ monitored or billed This tends to promote waste as the occupants of the apartments have no individual control over total energy consumption and consequently little or no economic insane-live to conserve energy.
Accordingly, an additional object of the invention is the provision of an energy management system which can be in-stalled in a new or existing building not having individual unit metering to monitor end provide an indication of the individual energy consumption in each unit. Monitoring of the energy Jon-gumption enables the provision of an internal billing system for the building in which energy consumed by each unit can be India vidu~lly metered and billed. In the system of the invention each unit contains at lest one remote station communicating with a computer controlled central station over a communications channel.
Each remote station includes nut least one information Noel which is connected to a current sensor which monitors the current passing through an input electrical path providing electrical service to the unit. The central station computer receives date from the current sensor representating current consumption and data representing voltage in the electrical path and calculates power, storing and processing it to provide a periodic Indication of energy consumption which may be used for information or billing purposes. Thus, even though n building my not have individual electrical metering of each of the units, the system of the invent lion provides this function An additional object of the invention is to provide a - unique power calculation circuit for calculating power existing in all electrical path from current in the path and a voltage derived prom the voltage present on the path.
These and many other objects, features end advantages of the invention will become evident from the following detailed description which is presented in conjunction with the accompany-i no d r awl nags .

BRIEF DESCRIPTION OF THE DRAWINGS
Fig 1 is a block diagram of the data communications system of the inanition it. 2 it a schematic diagram of the remote stations illustrated in jig. l;
Figs. 3 and 4, taken together, form a schematic diagram of one of the fiction switches illustrated in Fig. l;
its. 5? PA an 6B, taken together form a schematic dPagr~m ox the controller interface illustrated in Fig. l;

Fig. 7 is a schematic diagram of the master controller illustrated in Fig. l;
Figs. PA and 8B, taken together, form a schematic die-tram of the A/D converter illustrated in jig. l;
Fig. 9 is an overall system flowchart ton the operation of the computer illustrated in Fig. l;
Fig. 10 is a flowchart of the initialization program illustrated in Fig. 9;
Figs. 11 and 12 are flowcharts of the master time in-turret program illustrated in Fig. 9;
Fig. 13 is a flowchart showing the essential steps of the data collecting and professing programs illustrated in Fig. 9;
Pig. 14 is a Lockhart of a sensor interrupt program;
jig. lo is flowchart of the program of Pig. 13 as specifically configured to gather and process data for resist-ante measurement, Figs. AYE and 16B taken together form a flowchart of the program of jig. 13 as peaceful configured to gather and pro-cuss data for a precision resistance change measurement;
jig. 17 is a flowchart of the jig. 13 program as spew ¢ific~lly configured to gather and process data for a ICKY voltage measurement;
jigs. AYE, lob, 18C and 18D together form a flowchart of the Fig. 13 program as specifically configured to gather and pro-cuss data for an AC power measurement;
Fig. 19 is a flowchart of program for processing of gathered calibration data;
jig. 20 is a flowchart ox a program for processing gathered AC power measurement data;
Fig. 21 is a flowchart of & program for processing gathered air temperature data;

d Jo 3 Fig. 22 is a flowchart of program for processing go tiered fire condition data;
Fig. 23 is a flowchart of program for processing gathered fluid slow delta;
jig. 24 is a flowchart of program for processing gathered BTU data;
jigs. AYE , . . arm together form flowchart ox the OIL
program illustrated in Fig. 9;
jig. a illustrates a current sensor which my be used with the invention;
Pig. 27 illustrates on air flow sensing system which may be used with the invention;
jigs. AYE sod 28B illustrate fluid flow sensing system which may be used with the invention; and Fig. 29 illustrates a TAO sensing system which my be us with the invention.
Certain Figures of the drawings which are not arranged in consecutive order are grouted together as follows:
Fig . 5 with Fig. 6B; Fig . 8B with Fugue; Fig. 9 with Fox and 27; Fig. 12 with Figs. 14 and 13B; Fig. 17 with Food;
Fig. 19 with Fig. I Fugue with Fugue; Fig. 22 with Fox an 28B; Fugue with Fogged; Fugue with Fig.25C; Fig. 25B with Fiat 25G; Fig. EYE with Fig. 2SM; Fig.25F with Fig. 25L; Fig. 25~ with Fig. 25J and Fig. 25I with Fig 25K.

DETAILED D~SCRlPTION OF THE INVENTION
The remote station addressing technique and associated apparatus of the invention have applicability to any type of do gathering and/or distribution system wherein ventral station communicates with a plurality of remote stuns. Accordingly this aspect of thy invention will be descried first After this, a More detailed description of the data gstherin~ nor disturb-lion system ox the ir~YentiOn in R pow energy management soys-them for monitoring energy consumption end other printers at remote Station will be provided.
The overall data gathering and/or distribution system of the i~nventiorl is illustrated in jig. 1 which shows central come putter system 23 which comnuni~tes with B plurality of modular remote stations 11 through master controller lug a controller interface 15, on A-D converter 21 and plurality of section - pa -switches 17. The computer system 23 is u conventional commercial-lye available system. One which has been found to be particularly suitable for use with the invention is known us the Month try Horizon. It includes central processing unit (CPU3 27, a random access memory (RAM) 29 for temporarily storing programs end data, Q disc controller 31, a pow disc system 33 for permanently storing progt~ms and data, an interface 35 or communicating with an externally connected video input output terminal 37, and a bus structure 25 to which the CPU 27, RAM 2g disc controller 31, and interface 35 are connected. The bus 25 is known in the industry us on S-100 bus having 100 communication lines respectively con-netted to a like number of terminal pins. Some of the communique-lions lines are dedicated to signals for communicating among the various devices contained within the computer system 23, while others are provided far allowing the computer system 23 to commune irate with external devices keynoted thereto.
Master controller 19 working in conjunction with con-troller interface 15 provides the necessary signals between come putter system 23 and section switches 17 which enables the computer system more particularly CPU 27~ to address and take data from or provide data to 6 selected one of the information channels 10, e.g. wire pairs, located it the remote stations 11. Data is act wired from or sent to the remote stations 11 by means of the section switches 17 which are connected to the remote stations via a system bus 13 and eommunic~tion channels erg. wire pairs, 12.
Each section switch 17 contains two identical portions which connect with respective comnunicQtions channels and up to 18 separate remote stations can be attached to etch communications channel. If 16 remote stations are connected to each communique-lions channel and I section switches are provided etch handling two communications channels, a total of 512 (16 x 16 x I remote I

stations can be handled by the system. If each remote station in turn has I information channels thereat, the computer system 23 can then address any one of 2 information channels (256 inure-motion channels or etch communications chenille.
The information channels 10 my haze various sensors S
or operative devices D connected thereto, the outputs or inputs of which are directly connected to the computer system 23 through the section switches 17 and A/D converter 21 when the information channel 10 corresponding thereto is addressed by the computer system 23. Date coming from the information channels vim the remote stations 11 is converted to digital data by analog to digit to converter I prior to entering computer system 23 which stores the digitized data.
Addressing of the remote stations 11 and the information channels 10 thereat is accomplished by sequenti~ly sending tone bursts down communications channel 12 to which a group of remote stations is connected. The tone bursts are received by each of the remote stations ox the group simultaneously, but etch station is only enabled by a preassigned numerical range of tone bursts (an address Upon receipt of the sequential tone bursts in its preassigned nwnerical range, a remote station sequentially con-newts each ox its information chenille 10 to the communications channel. or example a first remote station may only respond to the first 16 tone bursts transmitted to it to sequentially con-neat, upon each occurrence of a tone burst, respective inform-lion Noel 10 to the communications channel. Other tone bursts outside the assigned numerical range which arc received by that remote station do not cause connection ox any of it information channels 10 lo the communications channel The next remote stay lion of the group my be responsive, for example, to the next _ 9 sequence of 16 tone bursts, the third remote station responsive tug the next 16 tone bursts, etc.
Thus, for any given communications channel interconnect-in section switch 17 with a group of remote stations, each of the remote stations of the group can be addressed by cycling through predetermined number of tone burettes I 16 remote sin-lions each containing 16 information channels are connected to each communi~tions channel, total of 256 tone bursts will serve to address and sequentially connect each of the information chant nets to the communications channel. By repeating the sequence of 25~ tone bursts) the remote stations and information channels thereat can be continually addressed by computer system 23. More-over, the sequential addressing tone bursts can be sent simultane-ouzel over all the communications channels so that every tone - burst sent will cause 32 addressed information enlace to be connected to the central station over 32 communications channels.
A more detailed description of the component parts of the Fig. 2 system now follows.

REMOTE STATIONS
A better understanding OX the addressing of the remote stations 11 can be seen with reference to jig. 2 which shows the remote station apparatus. Terminals Lo and Lo respectively repro-sent the connection points of the remote station to the communique-lions channel which leads to a section switch 17. or the purpose of further discussion, it will be assume the information channels 10 end communications channel I ore wire pairs, but other types of eom~unications links Jan also be employed The section switch itself will be described in more detail below.
The information channels 10 comprise a plurality of terminal pairs cross which various sensors S or operative devices D can be Canada. For purposes of illustra~iong a sensor 47 and operative device 48 have been shown no being respectively con-netted to the second and sixth inform ton channels of the remote station illustrated. Each ox the information channels 10 can be tone burst addressed in sequence end when addressed are connected by analog switches 41 and 43 to an vutpul line 57 which is in turn connected through resistor 59 end fuse 61 to terminal Lo. The terminal LUG is a ground terminal at the remote station.
Terminal Lo is also connected through fuse 61, a keeps-ion 79, and a resistor 81 to if tuned circuit 83 which reacts to the frequency of the tone bursts on the line Lo. Etch time e tone burst of the proper frequency, e.g. 100 KHz, occurs, the output of tuned circuit 83 applies a signal to the input of one shot multi-vibrator 87 which responds by outputting a lock pulse to the elk input of counter 89.
Counter 89 is a 1 of 16 mounter which supplies data output signals corresponding to the instantaneous value mounted.
These output signals occur on lines So which ore connected to analog switches 41 and 43, and control which information channel 10 is connected to output line 57. An additional date line from counter 89 is provided to the inputs of NOD gates 99 and 104.
The output of RAND gate 99 is connected to the input of RAND gate 103. RAND gates 103 sod ln4 are respectively connected to inhibit inputs of analog switches 41 and 43 nod accordingly serve as "en-bluing" gates controlling whether switches 41 and 43 ore operative or not. Wren operative switches 41 and 43 connect one of the information channels 10, as determined by the data inputs thereto from counter I to the output line 57.
Gates 103 End 104 will remain off as long as there is no output signal prom NAN gate 101. The latter gate is connected to the output of a comparison counter 97 which receives as inputs thy output of a programmable address device I sod eke carry output of counter 89. As counter 89 cycles through its 16 count positions, it generates curry output signal each time it completes a count-in cycle. Comparison counter go mounts the carry outputs, and when the counted number of Larry outputs equals the count value set by programmable address devise 909 it provides an output sign net to gate 101 causing Tess 103 and 104 to enable flnalog switches 41 and 43. The programmable address device 90 determines the address of the remote station, or statewide otherwise, the nut metrical tone burst range number of tone bursts) to which the remote station responds. Thus, each group of 16 tone bursts appearing 0l1 line Lo will be directed to a particular remote stay lion. By changing the programmable address in device 90 by digital value of "one" for each successive remote station, each group ox 16 tones appearing on line Lo will address a different remote station by the output ox the respective comparison counter 97. In addition each tone burst in the tone burst group will address the information channels 10 at nun addressed remote station by the data output of counter By.
Eye remote station also includes timing circuit in-eluding capacitor 91, resistor 93 and a diode I in parallel with resistor 93. This timing circuit responds to tone burst appear-in on line Lo for a predetermined time duration longer than the time duration of the tone bursts which are used to address the information channels. The purpose of this timing circuit is to Pecognlze a reset tone burst played on the eommunic~tions channel by the central station end to produce h reset signal to comparison counter 97, counter 89 and one shot multi vibrator 87. The central station sends this reset tone burst just prior to sending another complete addressing sequence ox tone bursts ego ~56 tone bursts.
This ensures that all remote stations will be reset prior to the occurrence of the next (first) addressing tone burst ox the next '73 tone burst sequence on the line. wince the addressing tone bursts are of much shorter duration than the reset tone burst, the timing circuit will not respond to them and thus counters By and 97 are free to perform their counting functions in response only to the addressing tone bursts.
Each remote station is sel-powered and includes power supply circuit 63 which consists of a pair of oppositely polled diodes I and 69 connected to the opposite ends ox a pair of series connected capacitors 71 and 73. The opposite ends of the series connected capacitors in turn are connected across a series pair of Zoner diodes 75 and 77 with the connection point between the cap~eitors 71 and 73 and Zoner diodes US and 77 being con-netted together end to ground. A pair of terminals I nod To are connected to opposite ends of the Zoner diodes and provide opera-live power to switches 41 end 43, all of the gates, one shot mull tivibrntor 87, counter 89, comparison counter I and programmable address device 90. Rower supply circuit 63 derives operative power from the tone bursts which are supplied on line Lo from the central station and in this manner, a separate remote station power supply is not required.
it. 2 also illustrates the information channel switch-in portion of etch remote station by a numeral 39. In some in-stances, for example where the outputs of two or more sensors are to be simultaneously connected to the central station over no-spective communications channels a plurality ox switching port lions 39 it a remote station ore connected in parallel Thus, a remote station can have one or more switching portions 39 connect-Ed to the outputs of mounter I end gates 103 and 1049 as thus-tote in Fig. 2. Fact additional switching portion 3g would have its own information channels 10, input and output terminals I

corresponding to LUG and Lo, but all my derive their vperatiYe power from common power supply circuit I
Two switching devices 39 could be used, for example, to simultaneously connect a current sensor connected to one device I
and voltage sensor connected to the other to the central station so that instantaneous power could be calculated TV X I).
Because of the relative simplicity of the circuit used And the self-contAined power supply, the remote stations my be COnStrlJCted AS low cost modular units of identical construction, the only difference between units being in the address assigned thereto by the programming of address device 90.
A calibration resistor 49 it also shown connected to the first information channel 10. By periodically checking this fixed resistance value when the first information channel is connected to the central station, the central station can ensure that there has been no significant change in the condition of B kimono-lions channel. In other words, resistor 39 is used us caliber-lion standard to diagnose faulty line conditions.
As noted, a group of remote stations 11 may be commonly connected to a single wire pair forming communications channel to the central station. Thus, the terminals LUG and Lo or a pour-amity ox remote stations may be connected in parallel to the come monkeyshines channel which goes to a section switch 17. Moreover a plurality of communications channels each hiving a group of remote stations connected to it, may be used. To further isle-irate the connection of the communications enlace to the section switches reference will be nude to jigs. 3 and 4 which show in detail the construction of each section switch 17. However be-Gore further describing the structures ox the section switch 179 as well as the remaining portions of the system) it is necessary to understand some of the bus line labeling and nomenclature which will be used.

'73 BUS STRUCK lyre .
Figs. 3 to 3 show various circuits connected to terminal ureas desigraated as follows:
En where N is a number. These designations throughout the drawings refer to pin terminals. When appearing on the drawings for the master controller 19 (Fig. 7) nod the analog to digital converter at (Figs. PA and 8B) they identify pin terminals an the S-100 bus 25. When appearing on the drawings for the controller interface 15 (Figs. 5, PA and 6B) and the section switches 17 figs. 3 an 10 4) whey identify terminals on system bus 13~
To further foliate description of the application, a brief description of the pin terminals used on both the S-100 bus 25 and the system bus 13 follows:

S-l 03 By Addressing and Data Signals CPU 27 Pin Data (output Pin Data Input Pin Address Dyes Lines From Dyes Line To Dyes Lines notion CPU 2? nation CPU 27 nation A 79 D00 36 DIP go A 1 80 Do 1 35 DO 1 94 A 31 D03 89 My 42 A 83 D07 90 Lowe 43 '7;3 .

Control Snails Pin Control Signal Control Suckle Dissension Dun _ __ P WRY 77 Timing signal generated by CUP V
during output operation indicating valid date is on S-100 bus SNIP 46 Signal applied Tess bus by CPU during a data input operation STOUT 45 Signal applied to S-100 bus by CPU during a day output operation PDBIN 78 signal provided by CPU
indicating its reading of data from S-100 bus PRY 72 Signal placing CPU in wait state; generated by devices external to CPU 23 PINT 73 Interrupt request line requesting interrupt of CPU
VIM 10 Highest Priority interrupt master interrupt to CPU
V15 g Next highest Priority interrupt (sensor interrupt) to CPU
VIM 8 Lowest Priority interrupt (sampling interrupt) to CPU
ILK 24 System clock 4 MHz SYNC I Synchronizing signal venerated by CPU during input/output yokes POX 99 System reset signal synchronized to CPU clock The system bus 13 may also be a 100 pin bus but the signals on the various pin terminals are different from those on the S-100 bus. For system bus 13~ the pin designations end core spend i no s i gnu 1 s en e us Jo 11 ow:

Al I
, Addressing and Date Seals Data Output Pin Data Input Pin CPU 27 Pin Lines From Design Lines To Dyes Address Dyes-CPU 27 nation CPU 27 nation Lines notion Do 36 DIP 95 A 79 Do 1 35 DO 1 94 A 1 80 D02 88 Die 41 A 81 D04 38 DIP 9 l D`07 90 D17 43 The system data bus 13 also includes pin terminals for the output lines of one or more analog to digital converters.
These output lines AD . . . AUDI are connected to the pins of system bus 13 as follows:

Analog to Doughtily Con crier Outs Awl 75 The 32 incoming wire pairs from the remote stations 11 m&y be grouped into four groups of 8 incoming lines each as follows SPOOL

. D SLY; Sill . . . Sill; SLY . . . $l5L0; end Sill . . .
Sly. These incoming lines are respectively assigned to the pins of bus 13 as follows:

Incoming Lines from Remote Stations Pin Desi~nRtion S0~0 S lL0 5 Sill 6 Sill g ~3L1 11 SLY 1~4 slyly 58 S 1 lL0 60 SLY I

I. 1 56 Loll $9 Incoming Lines from Remote Stations Pin Dissension Sly 61 Bus 13 also contains various control signal lines containing sign nets generated by various portions of the system as follows:

Control Signals Pin Designation Description of Si~nRl SO 23 CPU signal tug clock automatic digital gain control through various gain values Vest 24 Supplies a test voltage to various portions of the system or testing purposes 15 Khz 25 A. clocking signal used by portions of the system.
SPOOKILY 26 A reset signal used to reset the automatic digital gain control system RIO 28 Decoded address from Use CPU used to desigrlate a controller interface input/output operation SSADOFF 30 Control signal sent by CPU to control on/off operation of A to D converter on section switch LINESEL 32 Decoded address from CPlJ which conditions section switches for line assignment C~GSCL 44 Control signal sent by GNU to condition the section! switches to configllre them to operate on a split or non split bus configuration Pin Dissuasion Description of Sisal I 45 Decoded address from CPU which conditions section switches for input/output operation ACGRD 46 Chanterelle signal sent by Cal to ~ctiYate offset voltage compel-station in multiplying circuit of section switch ASP 47 Control signal sent by CPU to enable automatic digital gain control circuit owe Khz 48 Another clocking six net used by portions ox the system Tone Signal 49 A grated tone signal - 20 used for addressing and control of remote stations PER 77 Same as PER orioles bus PDBIN 78 SamePDEtIN owns bus AMEN 97 Control signal sent by CPV to condition section switches or AC measurements SECT I (ON SWIM TECH
leach section switch includes two identical switching end signal processing portions shown in Fig I which are respectively connected to different con~unic~tions channels (input lionized The two identical section switch portions in turn share a common ad-dressing and control signal generating portion illustrated in Since Fig. 4 represents two identical section switch circuits, the unparenthesized line labels (numbers) are for one of the two circuits, end those in parenthesis ore or the other air-cult.
Each section switch portion jig. 4) is connected to 16 of the 32 incoming lines with the other identical portion being connected to the remaining 16 incoming lines. wince each section switch portion jig. I only services one of the 16 lines connect-Ed thereto, a pair of analog selection switches 143 end 145 is used to connect one of the 16 incoming lines to the remainder of the section switch circuit. The selecting data inputs to analog switches 143 and 145 are taken from lines 737, ~39, 741 and 743 which ore taken from the output of a latch 131 in jig. 3. The data inputs to latch 131 originate from CPU 27 data output lines and are supplied to the S-100 bus 25 and ore also connected to system bus 13 pins 90, 4g, 39, 38, 89, 88, 35 and 36 by the con-troller interface lo as described in more detail below.
Half of the output do lines ~737, 739, 741, 743) of latch 131 are coupled in parallel to analog switches 143 and 145 of one section switch portion. The other data output lines 729, 731, 733 and 735 are applied to the analog switches ox the other I section switch portion. Line ~37 which is coupled to the enable input of switch 143 is also coupled through an inventor 147 to the enable input of switch 145. Line 737 serves to select one of the two switches 143 and 145 for opera ion while the remaining three data input lines 739 9 741 end 743 verve to connect one of the input lines to respective switches 143 end 145 to respective out-put lines 151 end 153.
During system initiali~tîon, POW 27 sogginess a section switch portion to one of the incoming lines connected thereto by addressing and supplying data to latch 1310 Once initialization is completed, the section witch remains contested to the incoming line to which it was assigned.

Inventor 147 con be disabled by æ control signal CPGSEL
plywood to line 751~ in a manner described further below, so that the signal applied to line 737 will enable both analog switches 143 and 14S at the same time. In certain applications, it is desirable that Mach section switch portion illustrated In jig. 4 be capable of communicating with two lines simultaneously. For example, if one incoming line was coupled to a voltage sensor and the other to current sensor at a remote station, n section switch portion could simultaneously process current and voltage information to calculate the power being monitored at a remote station. This suckled "split-bus" configuration, is set by the CPU which addresses a latch 371 in the controller interface sup-plying thereto signal CF~SEL which is applied to the section switches by a pin 44 ox system bus 13. Each section switch no-eves the signal CFGS~L from pin 44 (Fig. I and applies it to line 751 to control switch 14g. When it is desired to have a "split-bus" configuration the CFGSEL signal instructs switch 149 to open while for a normal bus configuration the switch 149 no-mains closed. Signal CFGSEL also controls oppression ox innovator ox 147 so that when a splitbus configuration is desired both switches 14~ and 145 ore simultaneously enabled to past one of the incoming lines respectively connected thereto to the respective output lines lo and 153.
The output line 151 of analog switch 143 is connected to an input signal path 150 which is connected Jo one of the switch terminals of analog switch 17~. The output line 153 of analog switch 145 it keynoted Jo input signal line 1S5 directly and through switch 241 to input signal line 2430 When a sensor which is connected to a section switch via an information channel and an incoming line outputs a DC voltage which is Jo be measured by the system, it is applied Jo line 155 I -'73 which is connected as one of the input terminals to switch 19~.
When switch 199 is in the position illustrated in Yip. 4 this I
voltage from the sensor is passed through buffer amplifier 197 to an output line 781 (Jo) which is one of thirty two input lines Jo the A/D corlverter 21 illustrated in Yip 1. Switch 199 is con-trolled by signal AMEN signal applied to line 753 which con-rules whether an AC measurement or I measurement is to be performed. The signal AMEN is applied to the section switches via a system bus pin 97 which receives it from a latch 373 in the controller interface which is addressed and sent data by CPU 27 in a manner more fully described below. When the signal AMEN has an opposite polarity than that which places switch 1~9 in a position illustrated in Fig. 4, the output line 195 of this switch is eon netted to input 191 which in turn is connected to the output of an AC power measurement circuit which is also more fully described below.
Since the output from various sensors connected to the information channels of the remote stations my differ widely in terms of the type of output generated, i.e. changing resistance or changing voltage, as well as in the level of the output sign net, the section switches incorporate voltage offset companies-lion circuit for adding to the sensor output predetermine DC
voltage level which serves to normal the sensor output voltages to be within a predetermined voltage range, or to convert a no-distance sensor output to A voltage signal. The voltage offset compensation is provided by an analog switch 161 nod jumper so-locatable reference voltage bus 159~ Analog switch 161 contains a plurality of inputs 1639 lB5, 167, 169, 171 end 173 which con be jumper connected through respective resistor to one of your reference voltage lines provided at bus 15g. For example, the four lines illustrated my respectively receive voltages ox 0,

2.5, S and 10 volts.
Two additional inputs to analog switch 161 ore from line 781 which receives a tone burst signal from the controller inter-face 15 and from pin 24 which receives R test voltage us described below. Thus, the output of analog switch 161 Jan be any one of the reverence voltages to which lines 163 . . . 173 are connected, the test voltage, or the tone on line 761. The tone burst is used for addressing the information channels at the remote Striations end Snow also be used to control on operative device connected to on addressed information channel. The addressing end control zone bursts are Rut different frequencies and the manner ox generating different frequency tones will be described below with reference to the controller interface 15.
The output 152 of analog switch 161 is selectively con-netted to one of the inputs by means of signals applied to control lines 719, 7217 723 end 727 (725 for the other section switch portion). The latter signal is On enable signal while the firs three signals cause selection of one of the input lines to switch 2G 161 to be connected to output line 152. The signals on lines 719, 721~ 723 and 727 originflte from latch 119 of the section switches (jig. 3) which it coupled to the data output lines of CPV 27 through the system bus 13 and the S-100 bus 25. CPU 27 addresses latch 119 and sends to it dais enabling switch 161 end instructing it to connect a predetermine one of its input to its output.
Assuming for the moment that the output of switch 161 is one of the reference voltages contained on the input lines, this refer-once voltage is supplied to input pith 155 (through on associated resistor) weakly is receiving the output (voltage or resistance) from a sensor. If the sensor output is changing resistance, the reference voltage will be divided between the resistance of the - I -sensor ail resistance associated with the selected reverence volt-age to supply a DO voltage on line 155 which varies with a change in sensor resistance. The voltage on line 155 is supplied to line 133 of switch 199 and through amplifier 197 to line 781 (Jo) which, us noted, is applied as one of thirty-two inputs to the A/D converter Al (jig. l).
A principle feature of the system of the invention is its ability to monitor power consumed in on electrical path lo-acted at a remote station. For this purpose, a current sensing transducer (sensor) is coupled to an information channel at a remote station and it output is multiplied by a signal represent-in a voltage on the monitored electrical path to produce a signal representing power conswned. To perform the power c~lcul~tion, each section switch portion illustrated in jig. 4 includes AC
measurement structures. Included are power collusion circuit identified by dotted block 183 in Fig. 4 which performs actual power calculations and an automatic digital gain control circuit identified by dotted knock 245 in jig. 4, which is used to ensure that the calculated power value falls within a predetermined digit tiring range of A/D ~onvert2r 21 (Fig. 1).
or AC measurements, switch 199 is switched by the sign net AMEN from CPU 27 to a position where output line 195 is con-netted to input line l9l. Input line 191 is connected to the output of amplifier 189 which receives at its input the output of amplifier 187, which in turn receives it its input the output of on analog-to-digit~l multiplier 185. Multiplier l85 and Mali tiers 18~ and 189 form a suckled "four quadrant multiplier".
Multiplier 185 calculate power consumption by multiplying dodgy tat representation of a voltage by On analog representation of I current in a monitored electrical path. The current signal origin notes from a current sensor having voltage output which changes with sensed current and is applied to the input terminal 154 ox switch 241, the output 243 of which is connected to nun amplifier 217. The output of amplifier 217 it ~onneeted to the input of programmable voltage divider 215 having an output connected to the input of an amplifier 213. The output of ~nplifier 213 is con-netted to the input of an ~nplifier 211, the output of which passes to amplifier 209 through a ~apaeitor 205. The output of amplifier 209~ which is a voltage representative of sensed cur-rent, is applied to dun analog input of ~nalog/digit~l multiplier 185. A digitized voltage input is also applied, via a plurality of digital input lines, to multiplier 185.
The digital voltage input to multiplier 185 is received from a tracking analog to digital converter 181 which receives as an input signal the output of an amplifier 179 which receives on its input line 177 a voltage which represents the voltage on the electrical path at the remote station which is being monitored.
This voltage can be obtained from number of sources nod for this reason on analog switch 175 is provided for selectively connecting one of four inputs thereto to its output which is connected to input line 177 of amplifier 179. The input voltage to converter 181 can be taken from pins 33 or 34 of the system bus 13 or from line 150 which is connected to output 151 of witch 143. As de-scribed earlier, the computer can configure switches 143 and 145 Jo that they ore both simultaneously enabled allowing each of output lines 151 and 153 to be connected to a respective section switch input line. In this "split bust' configuration switch 149 it also activated to uncouple the outputs of lines 151 end 153 so that the Output on line 151 is connected us an input Jo switch 175. This allows a remote station voltage sensor connected Jo one ox the section switch input lines to be used as the voltage input to the tracking Analog to digital converter 181, while one of the f~'73 input lines to switch 14S supplies the output of a current sensor it the remote station.
As an alternative manner for generating a voltage repro-sent~tive ox that at the electrical path being monitored, the electrical service entrance to a building can be tapped or a voltage which represents the voltage at the monitored electrical path. system bus 13 pins 33 and 34 which I inputs to switch 175 provide a voltage which is token from the service entrance. A
more detailed description of how these voltages are applied to pins I end 34 follows in the detailed description of the con-troller interface Swept 175 connects one of the inputs thereto Jo line 177 under control of signals DOZILY and VESSEL applied to lines 715 (713 or the other half of the section switch) and 717. These - signals originate at latch 119 (jig. 3) and are supplied thereto by CPU 27 which addresses the latch. The CPU thus determines which of the voltage inputs to switch 175 is used by the trucking A to D converter 181. witch 175 also has on additional voltage input which is received from pin 24 of the system bus 13. This is a test voltage pin which can also be selected under control of the CPU by the MDDESEL find VESSEL signals for testing purposes.
Burr arching the analog input of multiplier 185, the sensor current output passes through an automatic digital gain control circuit 245. This circuit ensures that the multiplied output of the four quadrant multiplier remains within the digitize in range of analog to digital converter 21. It automatically decreases the level of signal applied as an analog input to multi-plier 185 until the output of multiplier 185 is within prude-termined signal range set by a window comparator.
Cain control circuit 245 receives as an input on line 231 the output of the your quadrant multiplier and supplies this - I -`\

output to a window comparison irrupt 225 consisting of h pair ox comparison amplifiers 233 end 235. Window comparator 225 deter-mines if the output of the multiplier is within a predetermined range. If it is not, on output signal is applied through inventor 2~9 to gate 227 us on enable signal allowing gate 227 to pass 15 OH clocking signals on line 749 to the clock terminal of counter 221~ These clocking signals originate in the controller inter-face. As A result, the counter counts clock pulses occurring it a 15 KHz rate whenever the signal at the output of the four quadrant multiplier exceeds a predetermined signal level range. Counter 221 also receives as an alternate clock input a signal SO on line 755 which is received from pin 23 of system bus 13 (Fig. I This signal originates from a lath 371 provided in the controller interface which is addressed and sent dry by CPU 27 US described further below.
A reset terminal is also provided on counter 221 which is connected to line 759 which receives the control signal SPOOKILY
from system bus 13 pin 26. This signal originates at a one shot rnultivibrator 383 (jig. PA) provided in the controller interface.
Reset signal SPOOKILY is generated by the one-shot multivibr~tor at the leading edge of a control signal SUP supplied to a lath 373 in the controller interface by CPU 27. Signal SUP is also sup-plied as an enabling signal to gate 227.
The digital output of counter 221 it sent to a decoder 219 which supplies a digital representation of the counter 221 contents to a prograrr~able voltage divider 215. Programmable voltage divider 215 and amplifier 213 together determine the grin applied by the automatic gain control circuit as to an applied input signal. The multiplying factors of ~mpliiier~ 213 end 211 are such that the m~xirnwm grin of Automatic gain control circuit to .

245 is 32. However, this gain factor is reduced by the program-marble voltage divider 215 BY that the output sign rum ~mpli2ier 211 may hove a gain of 32 or gains of 169 8, I, 2, 1, .5, or .25 as determined by the output of decoder 219. Programmable voltage divider 215 con be wormed by a multiplying analog to digital con-venter similar to that used as multiplier 1&5.
The SPOOKILY reset signal applied to counter 221 on line 759 is received from one shot multivibra~or 383 in the controller interface as described earlier. The one shot multi vibrator 383 supplies a pulse to reset the automatic grin control circuit 245 to maximum gain when CPU 27 instructs the setting of the automatic gain control circuit 245 via the SUP signal applied to line 757, and to one shot multi vibrator 3~3.
As noted, the automatic digital gain control circuit 245 is rendered operative by the SUP signal applied to line 757 which enables gate 2~7 end thus counter 221 to begin counting clock pulses applied to line 749. Whenever window comparator 225 de-toots voltage outside a suitable range of the slog to digital converter 21, gate 227 is enabled to pass the clock pulses to the clock input of counter 221. Accordingly, counter 221 steps through its counting states to progressively decrease the gain factor applied to the signal on line 243 until window comparator 225 provides an output signal indicating that the output of the your quadrant multiplier is within suitable conversion range When this occurs, the output of the window comparator passes through inverted 229 and disables gate 22~. This stops the supply of clocking signals to counter 221 which remains in its last counting state which decoder 219 applies to the progr~nable volt-age divider 215 leaving it in R particular voltage dividirlg state.
As counter 221 cycles through its counting states, de-coder 219 may eventually instruct programmable voltage divider 215 _ I _ c~7~3 to divide by its highest dividing value. This it detected by inventor 223 which operates to inhibit gate 227 prom providing any further clock pulses to mounter 221. Thus, when the programmable voltage divider is cycled through to its highest dividing value, counter 221 is inhibited so that no further changes occur and the programmable voltage divider remains sot in it highest dividing (lowest gain) positiorl.
An alternate lock input CLUCK also provided on counter 2~1 which is connected to line 755 which receives the control signal SO from system bus 13 pin 23 us described previously. This signal, composed of a series of pulses, is sent by the latch 371 under the control of CUP 27 to set the counter 221 to a previously determined state which sets the automatic digital gain control circuit 245 to a desired gain setting rather than allowing the.
automatic setting of the gain as described previously. This would normally only be done for test purposes.
CPU 27 receives the output data value from ~ounteP 221 via lines 70~, 709 and 711 (701, 703 and 705 for the other half of the section switch). This data is furnished through buffer 133 20 phony 3) to the system data bus 13 which in turn furnishes it to the ~-100 data bus as inputs to the CPU 27. In this manner, the CPU 27 receives data representing the mount of attenuation applied to the output signal of amplifier 217. This attenuation value is used by the KIWI 27 when it determines actual power con-summed at a remote location, since the digitized value of current multiplied by voltage provided by the four quadrant multiplier will have been reduced by a factor corresponding to the output of counter 221.
An undesirable by-product ox the current sensor signal path through the automatic gain control circuit 245 end its multiplying A/D converter 185 is a DC offset voltage produced by the various amplifiers in the ennui TV compensate for these offset voltages, capacitors 205 end 203 are respectively provided in the outputs of amplifier 211 and lB9. Prior to the occurrence of an AC power measurement, these capacitors art allowed to charge to the inherent offset voltages by connecting the output side of etch to ground while at the some time grounding the AC path input 243 through switch 241 using control input 747 more fully dye scribed below. The outputs of capacitors 205 and 203 are grounded by respective switches 207 and 2Ul which are activated by CPU 27 prior to an AC measurement being taken. After ~QpaCitors 205 end 203 are charged to the DC offset voltages their eonnectisn to ground us removed by CPU 27 opening switches 207 end 201 so that the accumulated charge on capacitors 205 and 203 acts inversely to cancel the offset voltage Operation of switches 207 and 201 is controlled by the CPU 27 which sends a signal ACGRD to the section switches from system bus 13 pin 46 (Fig. I This signal is fur-nighed to latch 373 (Fig. PA) in the controller intsr~fice by CPU
27 just prior to an AC measurement operation. This signal closes switches 207 and 201 for a period sufficient to charge capacitors 205 and 203 to the offset voltage, Starr which it is removed by CPU 27. A delayed version of ASSURED, ire. DELACGRD~ is generated by a delay circuit 137 provided in the section switches fugue 3) on line 747 which is supplied to switch 241. DE.LACoRD controls switch 241 to onto amplifier 217 input signal line 243 to line 154 u predetermined period of time after capacitors 205 and 2U3 are reversed from ground by ACGRD. Accordingly, sensor output signal is applied to the input of the automatic gain control air-cult as only after putters 205 and ~03 have been charged to the DC offset voltages Fig. 4 also shows that the input to the multiplying A to D converter lB5 may come from system bus 13 pins 309 37, 87, By, '73 85, 84, 83, 82, 76, 75 end 74. These pins are connected to another tracking analog to digital converter provided in the con-troller interface 15 which can be used if tracking A to D con-venter 181 is not provided in the section switches. The trucking A to D converter 1819 when provided in the section switches in the manner illustrated in jig. 4, is enabled by a signal applied to pin 30 of the system bus 13 which receives d signal SSADOF~ sent by CPU 27 to latch 371 in the controller interface.
Fig. 3 illustrates the ¢omnon section switch portion which supplies control signals to the two section switch circuits illustrated in jig. 4.
The bottom of jig. 3 shows various signal lines which are applied eon jig. 4 to control the configuration of the section switch portions. Line 761 contains grated tone which is supplied to switch 161 (Pig. 4). The tone originates in thy controller interface which contain circuitry controlled by CPU 27 for set-twig both the frequency end on/off period of the tone. The tone it supplied to pin 49 of the system bus. The tone is taken from pin 49 and amplified by amplifier 141~ The remaining control signals on lines 745, 747, 749, 751, 753, 755, 757 end 759 and their origination hove been described above nod will not be no-etude.
As noted, each section switch is addressed by the KIWI 27 which supplies data thereto and takes data therefrom. Data is received from the section switches through buffer 133 fig. 33 over lines 701, 703, 705, 707, 7099 end 711 which represent the contents of the counters 2~1 entwined in the two section switch portions fig. 4). The output of buffer 133 is supplied to pins 43~ 03, 92, 91, 42, 419 94, and I ox the system bus 13. From there they are applied through buffer 325 of the controller inter-faze (Fig. 5)9 buffer 62~ of the muster controller fig. I and I

the S-100 bus to the data input lines to POW 27. Buffer 133 is ennobled by RAND gate 121 which receives sexual switch board select input prom address decoder 113. Address decoder 113 is connected through buffers 111 to the address lines of pins 317 81, I end I ox the system bus 13 which are in turn connected to the address lines of the Solo bus through lines 82l of the controller interface (jig. AYE end muster controller jig. 7). Address de-coder ll3 receives addressing signals from CPU 27 and when a preschooler section switch is addressed, supplies a board select signal to gate 121~ Gate 121 also receives as enabling inputs thereto the output of buffer 127 which is connected to system bus 13 pin 45. The controller interface supplies a signal SUE to pin 45 (Fig. 5) which is received from inventor 776 of the muster con-troller (Fig 7). The signal SUE Appears whenever any one of the 16 section switch latches 119 or buffers 133 is being addressed by CPU 27 end is use to condition the section switches for an input/output operation. Gate 121 also receives as on enabling input thereto signal PDBIN on pin 78 of system bus 13. This signal is supplied to pin 73 by the controller interface which receives its inverted form from the muster controller (jig. 7), which in turn receives the signal PDBIN prom pin 78 of the S-100 bus. The PDBIN signal is supplied by CPU 27 when it is reading data prom the S-100 data input terminals. Thus, gate 121 is ever-gibed by a signal (BOARD SELECT indicating it is being sddressed7 a signal requesting a section switch input/output operation . _ (SHEA), end a signal enrolling the inputting of data to CPU 27 (PDBIN). Wren all three signals are present, buffer 133 is en-ambled to pass the signals on lines 7011 703, 705, 707, 709 and 711 to their respective system bus 13 pin terminals Latches 119 and 131 which respectively supply various control signals to the section switch portion illustrated in Fig.

4 are respectively enabled by the outputs of inserters 117 end 125. Inventor 117 receives the output of RAND gate 115. RAND
gate 115 in turn receives enabling signals rerun the board select line from address decoder 113, the SUE signal from pin 45 end signal PER from invert 129 which receives the signal PER from pin OWE The signal PER at pin 77 Is received from the controller inters which in turn receives it from the S-100 bus pin 77 through the master controller. The PER sigrlal is a timing signal generated by POW 27 indicating that data is on the S 100 bus for reception by remote device.
RAND gate 115 responds to the presence of the three input signals to enable latch 119 to receive and latch data from the CPU 27.
RAND gate 123 enables lurch 131 which also receives data from the CPU 279 supplying this to the section switch portion illustrated in Fig. 4. NOD gate 123 receives the board select output prom address decoder 113, the Pi signal from inventor 129 and a line select (LlNESEL) signal from pin 32 of the system bus 13. The LINESEL signal is applies to pin 32 by the controller interface (Fig. 5) which receives its inverted form from the mast ton controller (Fig. 7) as a decoded address signal for I decoded addresses. Each of the 16 addresses corresponds to sue of the 16 section switches. Each section switch NOD gate 123 receives enabling inputs prom the line select signal PER and Board Select signals such that one of the section switches will have the output of its PdANr) gate 123 enable. This signal via invert 1~5 en-blues latch 131 on the selected section switch 17~ theologize allowing the line assignment for that section switch Jo be transferred prom system bus lines 90, 40, 39, 89, 88~ 35 and 36 to latch 131.
Thus, RAND gate 123 enables latch 131 to receive line selecting data from the CPU 27 which operates switches 143 end 145 (Fig. I

" 3 CONTROLLER INTERFA Æ
Referring to Figs. 5 end 6, the controller interface 15 (Fig. 1) will now be described. As evident from the discussion of the section switches 17 above, the controller interface supplies to system bus 13 many of the control signals which the section sweets use to eonfigllre them for a particular function, either receiving sensor outputs or supplying tone control signals to on addressed information channel 10 which is temporarily connected through a communications channel to respective section switch portion (Fig. 4). The controller interface also generates the addressing tones which are sent to the remote stations to connect on information channel to a respective communications channel.
Referring first to jig. 6, the controller interface includes on address decoder ~59 which is connected to address line A, Al, A and A. These address lines, as well as signal line PER c~llectiYely identified by numeral 821 in Fig. 6, are output lines from the master controller 19 as is signal line 8~!5 contain-in RIO The address decoder 359, when enabled by the output of RAND gate 367, decodes four different addresses for respective latches 369, 371, 373 and 375. RAND gate 367 is ended by the presence of the signal PER which is applied to one input thereof via buffer 361 and RAND gate 365 end by the signal IFFY which is applied through buffer 363 to its other input. These signals which come from the muster controller (Fig 7), are supplied by MU 27 whenever the controller interface is to perform an ;nput/output operation.
Latch 369 receives as data inputs signals from data lines 823 via buffer 387 which originate in the master controller (Fig. 7). These in turn are connected Jo respective data vu~put lines of the S-100 bus to which the CPU 27 sends output data.
Accordingly, latch 36g latches data from the CPU 27 whenever

3 7 3 , ., addressed, as determined by address decoder 359. Latch 369 pro-vises output data I . . . I collectively indicated US lines 8177 which are used to program a desired tone frequency into a programmable tone generator 313 (jig. 5).
Latch 371 is likewise addressed by the CPU 27 sending an address corresponding thereto which is decoded by address decoder 359 and which supplies an enable signal causing latch 371 to no-chive data provided by CPU 27 on its data output lines. The out-put dstR of latch 371 includes the signal SSADOF~ which turns the analog to digital converters 181 on the section switches on or off. This signal is applied to pin 30 of system bus 13 which is in turn connected to the section switches us described earlier.
Latch 371 also applies signals SO and CFGSEL to respective pins 23 and 44 of the system bus 13 which ore also used by the section - switches in the manner described earlier.
Another output signal CIFADUFF appears on an output data line of latch 371. This signal is used to enable the buffer amplifiers collectively identified as 379 in Fig. 6 to gate thy output of a trucking analog to digital converter 377 to the pins 37, 87, 86~ 85, 84, 83, 82, 76, 75 and 74 of the system bus 13.
As described earlier, tracking analog to digital converter 377 is used to provide the digital representation of a voltage at a monk-toned electrical path if a like tracking analog to digital con-venter 181 is not provided on the section switch portions (Fig

4). When converter 377 it used, the digital data input to the At multiplier 185 is taken from pins 37, 87, 86, 85, 84, 83, 82, 76 75 and 74, as described earlier with reference to jig. 4.
Another output signs from latch 371 is ATTEST which is used to control two additional grated buffer amplifiers in buffer 379 and the output buffers in latch 375 to allow signals AD
through AUDI respectively token from other output lines AD, Awl '7 3 of latch 371 and ~11 the output lines AD . . . AD of latch 375, to pass to the system bus 13 AD through AD lines (pins 74, 75, 7B, 827 83, 849 85, 86, 8q and 37). Wren Al~rF.ST it present, sign n~ls AD through AD, which form a test word, are applied to no-specie pins of the system bus 13 and these signals are used by the A/D multiplier it of the section switches Jo generate corresponding output which is digitized by A/D converter 21 end checked by the CPU 27 for Azores.
Lath 375 is also enabled by a signal provided as an lo output of address decoder OWE When it is addressed by CPU 27, data applied on date lines 823 is stored by latch 375. When the signal ATTEST is enabled by latch 371 the contents of latch 375 long wit to by is AD and Awl ore passed to the respective pins 37~
I 8B, 85, 84, 83, I 76, 75 and 74 of the system bus 13~ as described in the preceding paragraph. The purpose of latch 375 is to store the eight most significant bits A through A of the test word to be applied by ATTEST to the input of the A/D multiplier 185 to test its operation end Aquarius.
Latch 373 is also addressed by an output of address decoder 3~9. When addressed by CPU 273 it latches data on lines S i gnu 1 S N, AGREED and SUP which are respectively supplied to pins 97, 46, and 47 of the system bus 13~ These signals are used by the section switches in the manner described earlier. Latch 373 also supplies output signals PHI Rod Phi which are applied to 1 of 8 slog switch 337 (Fig. I the operation ox which is de-scribed below.
Latch 373 also applies on respective output lines the signals 1'~7~1, TV and Tea Nash are applied in conTnon to the data selection inputs of 1 ox 8 analog switches 347 and 349 (Fig 6Bj.
These analog switches serve to provide selected test voltage of a selected polarity to pin 24 twig. PA) which is connected Jo one input of 1 of 4 analog switch 1~5 end one input of analog switch 161 of each of the section switches (Pig. 43 for testing end gall-ration purposes.
A prevision reference voltage generator 351 (jig. 6B) is provided which supplies output voltages Ye, V& and Ye to six of the eight input lines to switch 347~ The other two input lines to switch 347 are respectively connected to a 60 ho line voltage input on line 813 and ground. The output line of switch 347 is connected to amplifier 355, the output of which is connected in common to four of the input lines of switch 349. The output of amplifier 355 alto passes through inverting amplifier 357 and the inverted signal is connected to the 4 remaining input lines of swim tech 349 . A selected one of the switches of analog switches 347 and 349 is closed in response to the data selection signals TV, - To and TV supplied thereto, to provide at the output of switch 349 precision voltage (one of V7, V8, V9, -V7 3 -V8 -V9 or R 60 ho reference signal, or Q ground signal), the signal level and polarity of which is determined by data signals TV, TV and TV.
An additional reference voltage is taken directly from the refer-once voltage generator 351 by amplifier 353~ This is applied to the tracking analog to digital converter 377 end is used as a reference level by the converter in performing it converting operation. The input voltage which is digitized by the tracking A/D converter 377 is applied on an input line 804 thereto and this voltage is Rudy from the output of buffer amplifier 333 (Fig. 5) of the controller interface.
The output of analog switch 349 it By is applied to butler amplifier 381 (Fig. AYE end from there to pin 24 of the system bus 13. The voltage on pin 24 is used as on input to an log switch 175 of the section switches (jig. I which my be used 2~'7~

US an input to trucking analog to digital converter lBl for test-in purposes.
The precision voltage at the output ox buffer amplifier 381 is also applied to line 824 which is an input line to analog switch 337 (Fig. 5) which will be described below.
The SUP output of latch 373 (jig. PA) is also applied to a one shot multi vibrator 383 which produces pulse signal of predetermined duration which appears at the output of inventor 385 us the signal SPOOL. This signal is applied to pin 26 of system bus 13 which is applied to line 759 of the section switch to reset counter 221. Fig. PA also illustrates eke coupling of data lines 323 from the master controller through buffer 387 to the pins 90, 40, 39, 38, 89, 88, 35 and 36 of the system bus 13. This signal path serves to couple the CUP data output lines from the So bus to the CPU data output pins of the system bus 13.
The controller interface also includes circuitry for deriving a voltage signal representative ox the voltage in a monk-toned ~lectrieel path at a remote station from the electrical service entrance ox a building. Signal lines 801 collectively 23 represent signal lines connected to two three-phase electrical service inputs to a building. These signal lines ore coupled to the service entrance by trnnsormers snot shown) which step the high voltage entering the building down to low voltage level.
The lines Al-N, Blown, and Of N represent three wires connected to the neutral wire of one of the two three-phase power distribution lines, while the signal lines Al-0, Blue, end Clue respectively Represent the three-phases of the first power line. The second set of power distribution lines are ~esignatsd as ANN, BUN and C2 N or three wires connected to the neutrfll wire and A I, B2-0 3Q and C2-0 for the three phases of the second power line. The power lines collectively illustrated us 801l ore connected to a voltage dividing network 339 and the lines Al-0, B1~0, Clue, Aye By and C2-~ ore respectively coupled Jo different inputs of Noel selection switch 337. Another input to selection switch 337 it the test voltage input on line 824 which is taken from the output of buffer amplifier 381 (Fig. PA).
Analog switch 337 contains two switching sections open rating in parallel which are responsive to date signals applied to lines 807 and 809 to selectively connect one applied input signal to an associated buffer amplifier (333 or 335~ respectively con-netted to the outputs of the two sections of switch 337. The data~pplied to lines 807 and 80g ore the signals PHI and Phi which appear on the output of latch 373. By addressing latch 373 End applying the appropriate signals PHI end Phi thereto CPU 27 con-figures one ho of switch 337 to pass one of the signals on input lines 824, Al-0, Blue or ~1-0 to the input of buffer amplifier 3330 The output of buffer amplifier 333 it applied to pin 33 of system bus 13 end to line 804 which is applied as an input to tracking A to D converter 377 (Fig AYE. Likewise, in response to PHI end Phi the other half of switch 337 couples on of the out-puts prom lines Al-N, Aye, B2-0, or C~-0 to the input of buffer amplifier 335, the output of which is ~onnscted to pin 34 of the system bus 13. The voltages of pins 33 and 34 appear as inputs to analog switch 175 ox the section switches (Fig. 4) as described earlier. Thy voltage applied by buffer amplifiers 333 and 335 to pins 33 and 34 respectively can be used by the tracking analog to digital converter 337 in the controller interface (333 only) or by the tracking analog to digital converters 181 in the section switches (333 or 335) to provide a digital signal representative of the voltage on a monitored electrical path which con be used as the inputs to multiplier 185 for calculating power consumption.

- I -it. 5 also illustrates on oscillator 301, the output ox which is connected to the inputs of frequency dividers 303 end 305. frequency divider 3D3 provides on output signal ox, e.g. 500 Rho, to pin 48 of the system bus 13 to which the evoking input of the trucking A/D converters 1~1 of the section switches ore con-netted (jig. 4). The 500 KHz output of frequency divider 303 is also plywood to signal line 822 which is used us a clocking signal fur tracking analog to digital converter 3~7 (Fig. PA). Preguency divider 305 provides an output signal oil e.g. 15 KHz, to pin 25 of the system bus. The 15 KHz output signal of frequency divider 305 is used as a clocking input to counter 317. Wren counter 317 is enabled by a signal applies to the noble input thereof, it continually counts end the counted output appears on output lines 805 as an input to one of eight analog switch 319. As counter 317 continues to count individual switches of analog switch 319, which hove respective inputs connected to the lines Al-09 By 0, Of 0, Aye, By and C2~, will be successively closed. The out-put line 321 from switch 319 is applied via diode 345 to the input of a comparator 315 consisting of comparison amplifier 343.
20 Comparison ~rnplifier 343 provides an output whenever an input voltage is applied thereto which exceeds a predetermined reference voltage. The purpose ox switch 319, counter YO-YO, end comparator 315 is to provide an automatic adaptive control loop which will continue to step switch 315 until a voltage is wound on one of the power lines Al-0, Blue, Clue, Aye By or C2-0. Won a voltage is found, it is sensed by comparison amplifier 343 which changes state end removes the ennoble input on mounter 317, stopping the counter from counting further clock pulses received from frequency divider 305. This causes analog switch 319 to remain in its last stave effectively locking the switch closed on one of the power lines which his a voltage whereon. The output line 321 from analog switch 319 is applied I an input signal to a phase lock loop (PULL) frequency multiplier 307, the output of which (gut) is thirty-two (32~ times the input frequency (fin). The output of multiplier 307 pyres on line 310 which runs to the master con-troller (Fig 7). This signal is used us a sampling interrupt signal V14 in manner more fully described below.
The output of frequency divider 305 is also applied to pin 25 of system bus 13 which connects to RAND gate 227 of the section switch portions (Figs. 3, 4) us described previously.
The controller interface also Includes programmable frequency divider 313 (Fig. So which receives as an input an out-put of oscillator 301. The frequency of oscillator 301 is divided by a value programmed into the frequency divider 313 on data lines B17. These data lines receive data from latch 369 (Fig. PA) which - is addressed by the CPU 27 to apply data to the latch represent-live of desired tone frequency which is to be sent from the section switches to the remote station lines connected thereto.
One tone frequency, e.g. Lucas, is used or addressing the inform motion channels 10 at the remote stations while other tone Roy quenches can be used to control on operative device connected to on addressed information channel lo it a remote station. The out-put of programmable regains divider 313 is applied to an active foliate 311, the output of which is coupled to a buffer amplifier 309, the output of which is connected to pin 49. As discussed earlier, the section switches are connected to pin 49 (Fig. 3) via amplifier 1~1 to supply a tone on input line 761 of one ox eight analog switch 161, which when appropFiatcly configured by CPU 279 supplies the tone to a remote station communications channel which is connected to a respective section switch.
jig. 5 also illustrates set of buffer amplifiers, 325, which are provided in the controller inter go to couple data on - I -'73 ,-pins 43, 93, 92, 91, 429 41, 94 nil 95 of the system bus 13 to data lines 833 which run eon the master controller (jig. 7) end from there to the POW 27 dot input pins of the ~-100 bus.
Fig. 5 also illustrates lines 827, 829 and 831 which respectively receive thy signals LINESEL, PIN end SUE from the master controller (Fig. 7). These signals are coupled through respective buffer amplifiers 327, 329 sod 331 to pins 32, I and 45 of the system bus 13 end are received and used by the section switches as described earlier with reference to Fig. 3.
A line 811, also originating in the master controller, supplies a tone enable signal tenon) which is inverted by in-venter 323 and applied us an ENAB~G~ input to programmable ire-quench divider 3130 accordingly, the frequency omitted by pro-grumble frequency divider 313 is controlled by data on the input lines 817 and the on/off state of the programmable divider is controlled by the TONE signal on line 811 from the master con-troller.
MASTER CONTROLLER
.
The system master controller 19 (Fig. 1) is illustrated 2Q in greater detail in jig. 7. One of the principal unctions of the muter controller 19 is to provide the CPU 27 with three sepal rate interrupt signals which ore used by CPU 27 to execute various interrupt programs or acquiring and processing data from remote station sensors.
The muster controller includes an oscillator 675 having on output signal which is connected to the input of a frequency divider 677. The output of frequency divider 677 is connected to frequency divider 683 the output of which provides master interrupt timing signal MT0 on line 784~ The output of frequency divider 677 is also couple to the input of a programmable counter illustrated us having two separate programmable counting sections 679 and 681. The programmable counter sections are each Jon-figured to load an eight bit data signal which correspond to a count value which must be reached before an output signal is pro-voided on line 783 from the prograrnnable counter. The two counter sections 679 and ~81 are separately loaded in two successive eight bit bytes of a data signal applied to lines 781 by CPU 27 through buffer 685 which is connected to the CPU data output pins 36, 359 88~ I 38, 397 40 and 90 of the S-100 bus. Date signals from CPU
I program the counter sections 679 and 681 to set the time period (number of clock signals counted) which must transpire before an output signal is placed on line 783. The counter sections 679 and 681 ore respectively loaded by load signals FOP and CUP provided on lines 785 and 781. These signals are generated as separately decoded addresses by address decoder 793 which is connected to address links A, Al and A of the S-100 bus (pins 79, 80 and 81). Signals TO and CUP are Replied to counter sections 679 and 681 after passing through respective buffer ~nplifiers 7~8 and 796. When CPU 27 programs the two sections 679 and 681 of the programmable counter, it successively outputs the signals FOP sod Jo CUP by providing appropriate address signals to address decoder ~92, along with the data which is to be loaded into the counter sections 679 and I plied to lines 781~ by the FOP and CUP
load signals.
The output of the programmable counter (PRO) on line 783 is programmable time duration interrupt onto signal, the purpose of which will become more evident in the discussion ox the interrupt programs executed by CPU 27.
The programmable counter is enabled by PUN a data signal applied by CPU 27 to latch 601 via the S-100 bus data out-put lines through buffer 685. The signal PEN is used to gate the programmable counter on so that after expiration of the time - I -period set therein, the signal PRO will be generated. Other sign n~ls supplied to latch 601 by the CPU 27 ore TENON, PAIR, MOPS, MUIR and YI4EN, the purpose of these signals will be described below.
The tone enable signal THEN from latch 601 is up-plied as an output on line 611 which connects with the con-troller interfuse (Fig. 5) and provides the on/off control signal to the enable input of programmable frequency divider 313 as de-scribed above.
The MOPS signal is an enable signal which is applied by the CPU (through latch 601) to frequency divider 683 to on/off control its operation.
The remaining three signals at latch 601, PAIR, MUIR end INN control the application of three Cypriot interrupt signals to the CPU interrupt lines us more fully described below.
Address decoder 786 is connected to the A, A, A
and A address lines respectively connected to pins 30, 29, 82 and 83 of the S-100 bus. Address decoder 786 serves to decode four groups of sixteen addresses. For purposes of simplifying scrip lion, toe address decoder is illustrated as hazing decoded output lines of 3X9 4X, 5X, and 6X (hex notation). The X represents one ox sixteen possible hexadecimal numbers . . . I so, for exam-pie, the address decoder provides an output on line 3X when it decodes any one of the hex decimal addresses 30. . . OF.
The 3X output is supplied as an input to negative input AND gate 774 which receives at another input thereto the output ox NOR gate 790. Gate 774 is thus enabled whenever an address 3X is decoded and a IN or SMUT signal is detected it respective S-100 bus pins 46 and 45. As described earlier, IN and SOT are sign nets supplied from the CPU 27 to the S-100 bus when it is getting - I -reedy to input data IN so output date (STOUT) so that assay-Ted devices connected to the S-100 bus can suitably reedy them-selves for the input or output oper~tiQns. When gate 774 it enabled it supplies a signal to inventor 776, the output ox which is supplied to negative input OR gate 782 US one enabling input thereof. The output of inventor 776 is also applied to buffer amplifier to generate the the signal SS10 on line B31. This sign net is applied to the controller interface (Fig. 5) which in turn supplies it to pin 45 of the system bus 13 us previously de-scribed.
The 5X decode output of address decoder 786 is applied as one input to d nugget input AND gate 772, the other input of which is connected to the output of NOR gate 790~ When enabled by the concurrent presence of the two input signals gate 772 pro-vises a signal LINESEL which passes through inventor 653 and appears on line 827 as LINEl~G. This signal is applied to the controller interlace (Fig. 5) which in turn supplies it to pin 32 of the system bus 13 and front there to the section switches as described earlier.
The decoded 6X output from address decoder 786 is sup-plied as one input to negative input AND gate 770, the other input of which receives the output of NOR gate 790. When enabled by the concurrent presence of the 6X decode addresses and a SNIP or STOUT
signal from CPU I gate 770 supplies, through buffer 651, a sign net RIO to line 825 which loads to the controller interface (jig.
PA) us previously described.
The respective outputs of gates 7707 772 and 774 are also applied through respective inventors 77B, 780 end 776 as inputs to negative Input or gate 7~2. The output of gee 782 enables, through NOD gate aye, a Whit state generatvl 784 which supplies a writ signal to on output PRY line connected to pin 72 - I -ox the S-100 bus When a wait signal is supplied to pin 72, the CPU stops operating. The writ state generator 784 it e counter which counts through a predetermined counting period upon being enabled. It receives a clock input of for example, 4 M~lz which is available at pin 24 of the S-100 bus. To ensure that timing begins at an appropriate point in the instruction execution cycle of the CPU 27, SYNC signal applied to pin 76 of the S-100 bus by the CPU 27 is also applied as an enabling input to RAND gate 7~2. The SYNC signal synchronizes enablement of the wait state generator with the CPU instruction professing.
As noted, address decoder 793 receives address signals from the address lines A, Al and A. It also receives an enable signal PER through inserter 770 which receives the signal from pin 77 of the S-100 bus. The signal WOW is generated by CPU 27 during an output operation indicating that valid data is on the S-100 CPU data output pins. Address decoder 793 also has two Vega-live enable inputs, one of which is connected to the 4X decoded output from address decoder 786 end the other of which is con-netted to the output of RAND gate 768 which in turn receives at one input the output of NOR gate 790 through inventor 788. The net result of the enable signals end address signals applied to address decoder 793 is that it decodes addresses corresponding to the signals FOP and TO and the enable signal for latch 601 (applied through inventor 794) from the CPU 27~
The muster controller also provides three separate in turret signals MTI, I end TV to respective pins 10, 9 and 8 of the S-100 data bus. These pins ore in turn connected to three interrupt lines of CPU 27. The CPU processes applied interrupts in On order or priority with the MTI interrupt being of highest priority and the YIP interrupt being of lowest priority. Each interrupt his one or more respective interrupt programs associated - I -therewith which CPU a executes upon being interrupted. These programs will be described in detail below.
The three interrupts signals generated by the system are a muster interrupt MTI applied to pin 10 of thy S-100 bus lug.
7), a programmable interrelate PI applied to pin 9 ox the S-100 bus, end sampling interrupt V14 phase locked to on AC power line and applied to pin 8 of the 100 bus. The litter interrupt is generated by the phase lock loop (PULL) frequency multiplier 307 of the controller interface (Fig. 5) and is supplied as & signal VIM
on line 310 to the muster controller. The progran~able interrupt PI is provided on pin 9 upon the appearance of the output signal PRO from programmable counter section 679 on line 783. The master interrupt MTI is provided on pin 10 upon the pureness of the MOO
signal emitted by frequency divider B83 on line 784.
The three interrupt control signals YIP, PRO and MOO ore each connected to respective identical latching and reset circuits in the muster controller. For the purpose of simplifying descrip-lion, only the latching end reset circuit which generates signal PI will be described in detail. The PRO control signal on line 783 is applied to n clock input of a flip-flop 603 the output of which enables buffer amplifiers 607 and 699 to apply ground condition to respective pins 73 and 9 of the S-100 bus. Amply-liens 607 and 60~ respectively generate OUtpllt signals PINT end PI. The PINT signal which is applied to pin 73 of the ~-100 bus goes "low" to indicate to the CPU 27 that an interrupt ha occurred. The CPU 27 then examines its interrupt lines respect lively connected to pins 10, 9 and 8 ox the ~-100 buy to determine which interrupt(s) is occurring. The CPU ashen processes the in-turret program for the highest priority interrupt then occurring.
After the interrupt PI occurs flip-flop 603 must be reset before the ocarina of the next interrupt, otherwise it '73 will not be detected. For this purpose, flip-flop 603 is reset by a signal PAIR which is provided on on output line of latch 601.
CPU 27 supplies the signs PAIR to the lath 601 to reset flip-flop 603 during processing of the interrupt program(s) associated with the PI interrupt. The muster interrupt control signal MOO
on line 784 likewise clocks flip-flop 605 which is reset by signal MUIR also received from the output of latch 601. In like manner, the interrupt control signal VIM received on line 310 clocks flip slop 617 which is reset by the signal VIXEN supplied by latch 601. Whenever any of the interrupt outputs to respective pins 10, 9 or 8 is generated, the associated interrupt request Sigllal PINT is also generated to notify CPU 27 that an interrupt sunnily is present.
jig. 7 also shows a buffer 627 which is used to output data to the data input pins 43, 93, 92J 91, 42, 41, 94 and 95 of the S-100 bus which are connected to the data input lines of CUP
27 The buffer is enabled by the output of negative input AND
gate 623. One input to gate 623 is token from the output of in-venter 625 which has an input cc~nected to pin 78 of the 5-100 bus. This pin has a signal PDBIN applied thereto by CPU 27. As described earlier, this signal is supplied when CPU 27 desires to read input data The other input to gate 623 is taken from the output of inventor 776. Thus, whenever address decoder 786 de-codes a 3X address and CPU I supplies a SNIP signal to MOW gate 790 (enabling negative input AND gate 774) and the signal PDBIN to negative input AND gate B23, the latter is enabled to enable buffer B27 nod allow data to pass to the input pins of the ~-100 data bus.
A/D OONYE~TER
___ jigs. PA and 8B show the details ox the analog Jo digit tat converter 21. issue device receives each ox the output lines from the section switches Jo . . . J31. These output lines con-lain Ho an&log signal representing a sensor output, an AC power calculation signal or & test signal. The analog signals on the section switch output lines are digitized by A/D converter 21 and are then supplied to the data input lines of the S-100 bus or input to the CPU 27.
The A/D converter 21 includes an address decoder 501 (Fig. PA) which is connected to the address lines A, Alp . O A
of the S-100 bus. Address decoder 501 has three output lines 903, 905 and 907~ Output line 907 contains signal when any one of 32 different addresses, corresponding one each to the section switch Fig. 4 portions, are received rum the CUR 27~ This line is an address line for energizing the A/D converter 21. Output lines go undo 905 of address decoder ~01 are two specific addresses - which supply signals to negative input AND gates 515 and 517 no-spectively. These gates respectively enable latches 509 and 513 which receive data from the CPU through buffer 507 connected to the data output pins 90, 40, 39, 38, 89, 88, 35 and 36 of the S-100 bus. Additional input enable signals to gates 515 and 517 arrive prom the output of inventor 519 which has an input con-netted to the output of negative input AND gate 521. The two inputs to gate 521 come respectively from pin 77 of the S-100 bus end NO gate 523 having its inputs respectively connected to pins 45 and 46 of the S-100 bus. NOR gate 523 determines whether the CPU I his supplied either of the signals STOUT or SNIP to the S-100 bus, respectively indicating that output data Jill be supplied or that it will accept input data. When gate 523 detects zither of these signals and the signal PER is ply ted to pin 77 by KIWI 27 when it is ready to do an output operation gate 521 will be en-ambled and either of gates 515 and 517 will thus be enabled depend-in on which is addressed by the CPU 27 via the signal on lines 903 and 905 of address decoder 501.

- I -rJ

Latch 513 receives previously stored offset data from the CPU 27 via buffer 507 which is representative of calibration voltages obtained prom the various sensors which are connected to the information channels at the remote stations during a caliber-lion procedure. This digitized offset data is supplied to the input of D/A converter 511. The c~librQtion voltages are obtained by sequentially scanning the sensors when they are under known loud conditions and they ore stored by the CPU 27 for summation with actual sensor output signals which ore to be digitized. The output of latch 513 represents, in digital form, the upper eight bits of the digitized offset values. The lower two bits come from latch 509 and ore latched therein together with the control sign nets GAIN 4X, SIGN, SUMINV, 11 BIT, TESS and -GATE EN, all of which ore supplies by Pi 27. The control signals configure A/D
converter 21 to different operative states as described below.
Digital to analog converter 511 has a control input which selects the polarity (positive or negative of the analog output. The polarity of the offset is sot by the SIGN control signal a the output of latch 50g.
The analog offset voltage output of D/A converter 511 is fed to summing anpli~ier 512 which receives at its other input the output of 1 of 32 line select switch 503. This device is similar to previously described analog selection switches. A
particular switch is closed to pass one ox the input lines to the output line gel in arcord~nce with the Dressing data signal applied thereto. The selecting of an appropriate input line is accomplished by eonnectin~ the data select input 505 of the fins select switch 503 Jo the address bus lines A . . A of the S-10~ bus. The line inputs to the line select switch 503 are the respective lines Jo . . . J31 exiting from the section switches.
Two lines exit each section swltch9 one for etch of the Pig. 4 I

portions. These lines represent the 32 wire pairs which are no-~pectively connected to I group ox remote stations, Summing ~nplifier 51~ sums the calibration offset volt-ages applied by D/A converter 511 with the output prom the section switches which ore selectively connected to line 901. Summing amplifier 512 has sociably gain. In normal operation it has a grin factor of one) but it can be switched by a control signal GAIN 4X applied from the output of latch 509 to a gain factor of 4. The output of summing amplifier 512 is applied to sociably polarity, unity gain amplifier 514. The polarity of the output of amplifier 514 is set by the control signal SUMINV. The output of amplifier 514 appears at line 914 which is an input line to A/D
converter 553 (Fig. 8B). The output of A/D converter 553 is sup-plied via grated buffers 563, 565 and 567 to data input pins 439 -- 93, 92, 91, 42; 41, 94 and go of the Slowed bus and are thus fed Jo CPU I
Buffers 563, 565 end 567 are used to gate the 11 bit output lines of A/D converter 553 to the 8 bit input data lines of CPU 27. various outputs of the A to D converter 553 are trays-milted to the CPU 27 data input lines by operating buffers 563, 565 and 567 at different times under control of decoder 551 and a lip flop 548 (Fig. 8B~q Decoder 551 decodes the control signal 11 BIT in activate either its "O" or l-ltl output lines depending on the level of 11 BIT. When decoder 551 applies signal to its "O"
output line, gate 563 is enabled. Decoder 551, in turn, is en-abide by the output DO inverted 53g~ When enabled, buffer 563 applies the 8 most significant bits (MOBS) of the output ox A/D
converter 553 to pins 43, I 929 ~1J 42, 41, 94 and 95.
slip flop 548 has its two outputs (Qua Q) respectively connected to the enable inputs of buffer 565 and 567 through grated buffer ~nplifiers 550. The going signal for amplifiers 550 originates at the "1-l output line ox decoder 551. Wren decoder 551 enables amplifiers 550 either buffer 565 or 567 will be en-ambled depending on the state of flip flop 548. By toggling flip flop 548 buffers 565 end 567 con be sequentially enabled.
Buffer 565 has five upper inputs connected to the output of gflte 5S7 through inventor 568 and the next input to the MOB
or By output of converter 553 as described below. The last two bits ox buffer 565 go to bits 9 end of A/D converter 553.
Buffer 567 has its 8 inputs connected to the 8 least significant bits of A/D converter 553. As can be seen, by appropriately con-trolling decoder 551 with the control signal if BIT and operating flip flop 548 with the outputs of gates 531 and S33 (respectively applied to the and CAL inputs) various output bits of the A/D
converter 553 con be Ted under control ox CPU 27 to its data inputs.
The uppermost data input line of buffer 5~3 is connected to the most significant bit MOB and inverted most significant bit MOB output lines of A/D converter 553 through negative input Ox gate 561, nod RAND gates 557 and 559. The purpose of these gates and inventor 555 is to allow the upper date line of buffer 563 and buffer 565 to receive either the MOB or MOB outputs of AND con-venter 553. This is under control of the TESS OOMPH control sign net at the output of latch 509.
The A/D converter 21 also includes various grating air-cults which are used to control operation of the A/D converter 553 us well as to enable decoder 551 and operate flip slop 548. Vega-live input END gate 529 receives the output of NO gaze 523 and the output ox an inventor 527 connected through the buffer 525 to the pin 78 of the S-100 bus which contains the PDBIN signs.
Accordingly when the Pi I outputs either an TOUT or an SNIP
signal and PIN signal, gate 529 is enabled. The output of gate 529 is supplied to the input of RAND gate 531 which has at its other input the output signal on line 903 which it an address decoded by address decoder 501. Wren the address signal end out-put of gate 52~ are present, gate 531 is enabled to supply six-nil to one input of negative input OR gate 537 which receives at its other input the output of RAND gate 533. The inputs of RAND
gate 533 are respectively connected to the output of gate 52g and line 907 which is one of the address select line for the A/D eon-venter 21~ Accordingly, when the A/D converter 21 is addressed to make line 907 true and the CPU supplies the signals PDBIN and either of STOUT or SNIP, MIND gate 533 is enabled. When either of gates 531 or 533 are enabled, negative input OR gate 537 supplies an output signal which is inverted by inventor 539. The output of inventor 539 it passed to the decoder 551 enabling it to supply its decoded output to the "0" or "1" output line. The output of gates 531 and 533 also control the state of flip flop 548 and in turn the enablement of buffers 565 and 567.
The output of NED gate 533 is also connected through inventor 535 to one input of NOD gate 541 which receive as its other input the SYNC signal on Din 76 of the S 100 bus through buffer 525. When enabled by the concurrent presence of the two input signals thereto, RAND gate 541 supplies an enable signal to wait state generfltor 545. Wait state generator 545 is similar to the wait state generator on the master controller. When enabled, it counts a predetermined number of clock pulses before emitting an output signal. The purpose ox wait state generator 545 is to allow data to settle on the incoming section switch lines before A/D converter 553 is instructed to perform conversion operation.
The output signal from wait state genePhtOr 545 is supplied to a convert input terminal of the A/D converter 553 and this starts the Alp conversion operation.

~2~3 The output of RAND gate 541 which enables the wait state generator is also applied us a Lear (CAL,) input to flip-flo~
5750 The output of lip flop 575 posses through NOR gate 573 end activates buffer 569 to pull the line connected to pin 72 of the Slowed bus "low". This supplies a PRY signal to the CPU 27 plea-in it in a wait state. After the wait tote counter counts to its predetermined value (approximately a two microsecond delay), the A/D converter 553 is instructed to begin conversion. At this time the status line STY of A/D converter 553 goes high and no-lo mains high during the conversion process. This signal passes through NOR gate 573 and keeps Burr amplifier 569 enabled to continue application of the PRY signal to pin 72 of the Sly bus. After conversion is completed (approximately two micro-seconds), A/D converter 553 removes the high signal from the status line and also supplies a clock reset signal to flip-flop 575 so that NOR gate 573 is now disabled and removes the control signal from buffer ~npiifier 569 thereby removing the wait signal from PRY pin 72. A set input (line 526) to flip-flop 575 is supplied through buffer S25 from the PI line connected to pin 99 of the Sly bus. This signal is a reset signal which is applied to pin 99 whenever thy system is reset and merely resets flip-flop S75 whenever a main system reset occurs.
A negative input or gate 571 is also provided which receives the NATE EN signal Fran lath 509 and the output of gate 573. It supplies an enabling signal to line select switch 5~3 on line 911 whenever GATE EN is present or when gate 573 is supplying a wait state control signal to grated buyer amplifier 569.

SENSORS
The system as described above has the capability of 30 measuring a sensor output as a Pesistan~e~ a precision resistance Angie a voltage, or a current. The sensor outputs are read and I
.

digitized under control of POW 27 during the time that the ad-dressed information channels ore connected to the central station over one of the 32 line pairs connecting the central station with the various groups of remote stations The outputs of the sensors can represent sensed temperature fluid flow BY consumption, etc. virile without restriction.
Several representative sensors which con be used in the invention and the parameters which they measure will now be de-scribed.
For the purpose ox measuring current in on electrical path at a remote station, a current measuring traducer as shown in Fig. 26 may be ~mplcyed. it comprises a precision wound towardly current transformer 210 having precision resistor 208 mounted junta to the transformer. The precision resistor 208 is connected in parallel with the secondary output of the trays-former and with a pair of back-to~back Zoner diodes 204 and 206.
A resistor 202 is also connected in series with the coil pro-elision resistor and Zoner diodes and the entire assembly is then connected across the terminals of On information channel 10 at a remote station. wince the precision resistor 208 is fixed part of the assembly, the output of the circuit illustrated in Fig. 2 is a voltage, not current, as with a standQId current trays-former. The main advantage of having a voltage output or the current sensor is that the length of wire between the transducer and an actual measuring device is not cryptical as is the case with typical current transformer.
The series resistor 202 at the current transducer output is used to provide a high output impedance which mikes it easy to detect tempering with the current transducer. For example, if various resistive or reactive electrical components are connected across the output ox the current transducer, the resultant impedance change caused can be easily detected. Tampering can thus be detected by periodically operating CPU 27 to check the imp pudency of the current transducer against known reference imp pudency value for the transducer stored during initial calibration of the system. The purpose of Zoner diodes 204 and 206 is to pro-toot precision resistor 208 and the remote station 11 to which the transducer is connected from very high current surges if. line 212 which try to induce very high voltages cross resistor 208.
The present invention Jan Allah be used to economically measure temperature, fluid flow end heft flow at a multiplicity of locutions. This is done by using a combination of resistance end precision resistance change measurements in conjunction with van-ions temperature end flow sensors which have been developed to supply resistance and precision resistance outputs to the informal lion channels 10.
Temperature is measured using a thermistor or other temperature sensitive device which is connected to an information channel 10 it a remote station. CPU 27 operates the A/D converter 21, controller interface 15 and section switches 17 to acquire and store the temperature sensor output as digital data Air flow is determined by measuring the temperature difference between a fist conventional temperature sensor e.g. a thermistor provided in an sir stream end a second temperature sensor provided in the sir stream at a location downstream of the first. jig. a illustrates on air slow Lenin system using a thermistor ~14 and thermistor 218, the latter being thornily bonded to fixed resistor 216 by a thermally conductive epoxy 224, as the first end second temperature sensors. Resistor 218 is connected across a voltage source 222. Also illustrate is a conventional humidity detector 22~. The temperature difference between thermistor 218 and thermistor 214 (etch ox which changes resistance with tempersturer, changes) determines the sir slow since for any given air handling system a curve of sir slow rate versus temperature differences can be experimentally derived.
Although these curves vary somewhat with absolute air temperature and humidity, it is possible to construct families of curves or air Plow rate versus temperature difference which are entered into CPU 27 and used as look up tflbles for determining an air flow knowing the absolute air temperature and the humidity.
Humidity is measured by humidity detector aye which provides an output resistance which changes with air humidity level. Since any one of several conventional devices can be used as humidity detector 220 a detailed description of this device is not provided.
The purpose of fixed resistor 216 end associated voltage - source 222 is to provide a hefted surface in contact with then-mister 218 which is maintained approximately 20 to 30~C above the sir temperature under full flow conditions. Experimentation has shown that the most accurate results are achieved when the heat dissipating area of the downstream sensor comprised of resistor ~16~ thermistor 218 and epoxy housing 224 it small and of con-sistent size and symmetrical shape to minimize the effects of orientation of the sensor in the flow stream which is being measured. The best configuration for the sir slow sensor has been found to be a resistor and thermistor encapsulated in an oval shaped housing made of a highly thermally conductive and low elect tribally conductive epoxy ~24. I've oval shape maces it possible to string the flow sensor across an air flow duct perpendicular to the air flow with a minimum of air disturbance end without concern Pro its rotational position O
Heat transferred in BTU's by if handling heat ox-changers can be determined by using the invention with sensors - I -~Z~73 which measure the input air temperature to on sir heat exchanger (e.g. sensor 214, jig. 27)9 the output air temperature from the exchanger the sir flow rote twig. sensors 214 and 224, jig. 27) and the humidity (sensor 220). or each combination of these parameters, a unique foe value will exist. Thus, CPU 27 can read the values ox these parameters from sensors connected at the no-mote station and calculate the corresponding BTU value Water (or other liquid) flow is measured by the system of the invention in much the same manner as air flow. In this case, however 9 humidity variations are not a consideration. To measure water flow, a thermistor/resistor sensor, similar to that for the air flow, has been devised which is housed in a tiny metal can. This flow sensor is illustrated in jig. AYE and 28B. The sensor 226 comprises a chip resistor 234 which is connected to a voltage source 238 for providing a constant temperature adjacent a thermistor 236 which is mounted by means of highly thermally con-ductile epoxy 232 in thermal contact with resistor 234. The en-tire assembly then is encased in a metal con 230 which is provided in housing 228. The metal con is then inserted into if hole in a pipe ~42 which refines a water flow path. A saddle T or other type of fixation device which will allow penetration of the metal can into the water strew without causing a leak in the pipe is used.
An additional thermistor 244 is mounted upstream of sensor 226. Sensors 244 and 226 operate essentially on the same principal as the two sensors of jig. 27 which measure air flow.
For any given water flow pith, set of curves can be export-mentally obtained representing a temperature difference between the sensors which corresponds to a particular slow rote. Thus, a set of curves can be experimentally obtained sod stored by CPU 27 relating the water flow rate to a difference in temperature sensed _ 59 _ by sensors 244 and 226. The cylindrical shape of the metal can makes it possible to place the flow sensor in pipe perpendicular to the water flow without having to worry about its rotational position. Once the temperature difference is determined, CPU 27 can then calculate a water flow rate.
For TAO measurements of liquid flow heat exchanger, the sensors 244 end 226 con be used on the input line to heat ox-changing devils 231 (Fig. 29). The output line of the heat ox-changing device con also be connected to another temperature sensor 245 identical to sensor 244. By measuring the input end output liquid temperatures with sensors 244 and 245 and the liquid flow rate with sensors 244 end 226 as described above the mount of thermal energy emitted (or collected) by heat exchanger 231 can be determined.
The characteristics of the sir and fluid flow sensors illustrated con be varied by changing the materials, component values, heater power, mechanical configuration and physical size.
Consistency from one sensor to another is achieved when all these parameters are maintained constant. However, even if there ore variations from one sensor to another, the date processing end storage capabilities ox the CPU 27 on obtain consistency between sensors as it can store know flow calibration readings for each sensor so that actual sensor readings can be balanced out using the calibration data. Thus, inexpensive sensors can be used while still achieving a high degree of measurement ~ccur~cy.
CPU prune .____ Sensor data gathering and processing or the system is handled under interrupt control of the CPU 27. Further processing of the sensor data into more meaningful information for the disk play of gathered and processed data is handled by an operator interactive sequential program (ZIP) which runs continuously, except when interrupted by the various system interrupts.
The system uses three interrupts to control the opera-lion of CPU I These have been briefly described above with reference to the system hardware. The highest priority interrupt MTI is generated under control of the muster timer signal MOO
which is the output of divider ~83 in the nester controller. MOO
is a pulse signal generated, for example, at the rate of 512 pulses per hour (one every 7.0~125 seconds).
The text highest priority interrupt PI is generated under control of the output (PRO) of the system's programmable timer formed by programmable counter sections 679 end 681 in the master controller This interrupt is the system's most active interrupt and the time between the occurrence ox PRO is programmed by the CPU 27 during execution of a program. or purposes of subsequent description the PI interrupt will be referred to as the sensor interrupt.
The lowest priority interrupt VIM for the system is generated by the phase lock loop (PULL) multiplier 307 on the con-23 troller interface. The output of the phase lock loop frequency multiplier is 32 equally spaced pulses or etch cycle of an applied 60 Ho input signal; that is, pulse rote of 1920 Ho.
These interrupts are used by CPU 27 to gather end process data for AC power measurements.
The overall program executed by CPV 27 is illustrated in jig. 9. It begins at step 401 where the CPU 27 initializes the system hardware. The initialization program executed at step 401 is shown in Pig. 10 and described in detail below. The overall program next proceeds to step 403 which contains the operator interactive program OIL which it illustrated in greater detail in Figs. AYE . O 25M end also described in more detail below.

During initial system installation end at periodic times there-after, it is desirable to calibrate the system by taking measure-mints under known conditions of the outputs of various sensors which are connected Jo the information channels 10 at the remote stations. Accordingly, step Aye determines whither a calibration routine is desired. If so, the program proceeds to step ~15 where thy CPU 27 obtains And stores initial calibration data from the sensors under control of the sensor interrupt. This data is theist which is supplied by CPU 27 to D/A converter 511 through latches 509 and 513. If no further sensor interrupts occur or when it completes processing a sensor interrupt, CPU 27 returns to the operator interactive program OIL Since the data gathering programs executed during system calibration (step 415) are the some as those executed during normal system operation (described - below) to obtain sensor data, separate discussion of the gall-ration date gathering programs will not be provided.
Assuming that calibration is not desired, the CPU pro-coeds to start the master interrupt timer in step 407. In this step, the CPU 27 removes the MOE reset signal prom latch 601 which allows flip flop 605 to be responsive to the pro output of the master interrupt timer to provide the signal t the output of buffer 613 (pin 10). CPU also supplies signal MOPS to latch 601 which enables frequency divider 683.
In the next step 409, CPU 27 begins collecting end pro-cussing sensor output data under control of the sensor interrupt (PI) appearing at pin 9 of the S-100 bus. Whenever sensor inter ruts are not being processed or when the sensor interrupt stop, the CPU returns to the operator interactive program (OIL) in step 411~
Whenever the high priority master interrupt occurs (swig-net MOE on pin 10 of the 5-100 bus), the POW executes master - So -timer interrupt program which, among other things, sends a reset tone pulse to all the remote stations on the 32 communications lines and begins Gwen collecting and processing sensor data by returning to step 409.
It should be appreciated that the flowchart of go 9 is a macro flowchart and tllRt many individual programs or program steps occur at each operational block illustrated. A more come plate description of CPU 27 operation follows.
The operational steps performed by CPU 27 when executing step 401 of Fig. 9 are shown in greater detail in the flowchart of jig. 10.
When the system hardware is initially activated it must be initialized that is preset, to a particular installation en-vironment. The section switches must be instructed as to which input lines they will handle, the tracking analog to digital con-perter in the section switches must be fed voltage from one of the available voltage sources etc. This is what is accomplished by the initialization program.
In the first step 419 of the initialization program, the CPU supplies the section switch line selector latch 131 with data relating to which incoming line each section switch portion (Fig.
4) will handle, whether in a "split bus" or non split bus" con-figuration. Table I illustrates the line selecting bit value assignments of latch 1~1 for 8 'split bus" configuration, while Table II illustrates the bit value assignments for a non split by s n con f i guy ration.

TABLE I
Lctoh sty 8 Input Lines end 8 Input Lines Latch Outputs 0 1 2 3 4 5 6 7 _ 10 11 12 13 14 15 Ill Aye 1 1 1 1 1 1 1 1 1 Lo Aye 0 0 0 1 1 1 1 0 0 0 0 Lo Alp 0 1 1 0 0 1 1 0 0 1 1 0 0 Ill Aye 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Lo Aye 1 1 1 1 1 1 1 1 1 Lo Aye 0 0 0 1 1 1 1 0 0 0 0 Lo Alp 0 1 1 0 Q 1 1 Q 0 1 1 0 0 Lo Aye 1 0 1 0 1 0 1 0 1 0 1 0 1 Q

TABLE II
etch 131 16 Input Lines Latch Outputs 0 1 2 3 4 5 6 7 8 10 11 12_13 14 15 Lo A 0 0 0 0 0 0 0 0 1 1 Lo A 0 0 0 0 1 1 1 1 D 0 0 0 Lo Al 0 0 1 1 0 0 1 1 0 0 1 1 0 0 Lo A 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Lo A 0 0 0 0 0 0 0 0 1 1 Lo A 0 0 0 0 1 1 1 1 0 0 0 0 Lo Al 0 0 1 1 0 0 1 1 n o 1 1 o o 1 1 Lo A 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 In step 421 latch 119 is addresses by CPU 27 and sup-plied data to configure switch 175 so that one of the voltages applied thereto is supplied as a voltage source to the input ox tracking analog to digital converter 181.
If the configuration is a split bus configuration the correct voltage source is normally selected by resetting MORSEL

and setting VSSEL-Ll and V5SEL-L2 of latch 119 on all the section switches. In this configuration the CF~SEL signal of latch 371 is set and each section switch voltage o'er or the two lines Lo end Lo it his been assigned is selected by the data at the output of latch 119 according to Table III below.

TABLE I I I
First SO Portion Second So Portion selected Line Selected Line Input to SW Input to SW 161 Lath 1 19 ~FSlEl.A 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 - Y$SEL-L~1 1 0 0 1 1 1 11 1 0 0 1 1 1 1 SELL l If the configuration is a normal bus configuration with one volt-age source the correct voltage phase is selected by choosing the phase vim controller interface latch 373 outputs PHI and Phi which control swim tech 33~ according to Table IV below:

Latch 373 Phase selected by SW 337 I
Posse A Phase B Phase C
Pi 1 0 Pal 0 Normally in this configuration the only trucking A/D converter in the system is the one on the controller inters and thus signals SOPHIE- End CIFADt)FF of latch 371 are reset.

If the configuration is normal bus configuration with two voltage sources then signals SSADO~F end CIPAD~P~ of latch 371 are set thus activating the section switch trucking A/D converters 181. In this case the proper voltage source is chosen first by selecting the purse as shown above and then the source by switches 175 according to Table V below TABLF.V
Line 1 Line 2 Switchl75VoltageInputs Switchl75Vol~ageInputs Source 1 Source 2 Source 1 Source pi (pin 33) I (pin 333 MODESEL

VSSEL-Ll X X 1 0 X = don't cure In step 423 CPU 27 enables the controller interlace 15 and section switches 17 to pass a tone signal to all remc9te stay lions connected to the lone which has been selected for each sea-lion switch portion. This initial tone is designed to ehQnge the power supplies I in each of the remote stations.

ennoble Tone" is accomplished by first setting the out-put bits F0 . . . I of latch 369 as shown in Table Al below to select a desired tone frequency:

TABLE VI

F4 Pi Pi F 1 I
40KHz 1 10 O
62.~1z 11 1 1 l o ooze o lo a 1~2.8KHz 0 01 1 0 Then the TONE output ox fetch B01 ox the muster con-troller is set and finally the output lines 719, 721, 723, 725 and 727 of latch 119 of all the Section witches ore set according to the Table Eli below so that switch 161 passes a tone to the input line assigned to section switch portion TABLE VII

L~REFEN
LlREFEN
Russ 0 REFS~.LAl 0 REFUSAL

In step 427 the CUP I addresses lath 371 and sets the DUST signal to turn off the application of test signals Do through AD to pins 74, 75~ 76, 82~ 83, 84, 85, 869 87 and 37 of the system bus 13 through grated buffer 379 and Ted buffer 375.
In step 431 the CPU 27 configures etch section switch to its DC
measurement state by dressing latch 373 in the controller inn-face to set AMEN and Preset ACGRD9 which ore applied to switch 199 _.
(ACUMEN switches ~01 and 207 (ACGRD). Switch 241 receives the signal DELAOGRD, which is generated by delay 137 (Fig. 3).

- I -In step 433, the KIWI 27 sets the controller interface for split or non-split bus configuration of the section switches. The split bus configur~tiorl is selected by setting signal CFGS~L it latch 371. This signal is reset for normal (non split bus) configuration. The split buy configuration is used if voltage output from a sensor Atwood to an information channel 10 at a remote station is to be supplied on line 150 for use by the trucking A/D converter 183. If the voltage sensing is done off an incoming power line, a normal bus configuration would be selected by CPU 27.
In step 437 CPU 27 addresses the nester controller to inhibit the programmable timer and the generation of interrupt signals from the muster controller. CPU a does this by addressing latch 601 to reset the signals PAIR, Norway; VINY PEN and MOPS.
In step 439 CPU 27 addresses latches 513 and S09 in analog to digital converter 21 supplying thereto a data value representative of a zero offset voltage which is applied US an input to D/A converter 511. In step 441 CPU 27 addresses latch 509 in the A/D converter 21 supplying thereto a signal on the CAIN
4X fine which instructs summing amplifier 512 to have grin of 1.
In step 443, CPU 27 sets the polarity of the D/A con-venter 511 to a positive polarity output by the signal SIN which is supplied as data to latch S09.
In step 445, CPU 27 also supplies a GATE EN signal to itch 509 which is applied vim gate 571 to line 911 as on enabling signal to the one of 32 line selector 503. In step 447, CPU 27 supplies the 11 BIT signal to latch 509 to set the AND converter 21 to a mode 0 state (set output "D" of decoder 551 in A/D COIN-venter 21 (Fig. 8B)). finally, in step 44~ CPU I sets A/D con-venter 21 for a stander binary output by setting the TWO'S ROMP
signal on latch S09.

- I -Pi Figs. 11 end lo illustrate the muster timer interrupt programs executed by CPU 27 in step 413 of Fig. 9, when a master timer interrupt nut is received. In step 451 of jig. 11, CUP 27 disables all mask able interrupts by sending its internal interrupt controller the proper signal. In step 453; CPU 27 pushes the contents ox various registers into a stflck memory for later no-trivial in resuming the processing of an interrupted program when processing of the interrupt is finished. In step 455, CPU 27 jumps to the "Tone reset" program illustrated in Fig. 12.
In the first step 457 of the tone reset progr~n CPU 27 applies a tone to all the communicetlons channels (lines) inter-connecting the section switches with the remote station groups.
The steps for enabling a tone were descried earlier with refer-once to step 423 of Fig. 10.
In a subsequent step 459, CPU 27 sets the programmable timer in the master controller with a digital value corresponding So 99.99 milliseconds. This is accomplished by CPU 27 resetting the signals PEN and MUIR at latch 6010 CPU 27 then supplies output data via buffer 685 to the inputs of programmable counter sections 679 and 631 in two successive eight bit loads controlled by load signals CUP and FOP which the CPU also supplies through address decoder 793. Then the signals PEN and MUIR ore set to start the counting of sections 679 and ~81. At the end of the count a sensor interrupt control signal PT0 will occur which initiates a sensor interrupt PI at pin 9 of the ~100 bus (Fig 7).
In step 4619 the CPU 27 next stores the address of a program identified no "Sensor 0 data ga~herlng" a NIPPED which is a pointer to the memory address of the first step of a program to be executed next. In step ~639 CPU 27 "pops" the contents of the stack memory back into the CPU resisters thereby Pestering the _ I _ data which had been previously pushed onto the stack so that CPU
27 can continue to execute a previously interrupted program. In the next step 465, the POW enables the n~sk~ble interrupts by sending its interrupt controller the proper signal.
In step 467, the CPU 27 then returns to processing ox the previously interrupted program end traits the next sensor interrupt. It must be remembered what at this time a tone is being applied to all communications channels through the section switches and that the sensor interrupt timer has been set for ~9.99 my which is the time period for a "reset" tone. Fig. 13 illustrates a series of programs which are entered at various ocarinas of subsequent sensor interrupts. Fig. 14 illustrates the sensor interrupt program which is executed first at each son-son interrupt.
- When the next sensor interrupt occurs under control ox the PT0 signal outputted by the programmable (sensor) interrupt timer (after 99.99 my), CPU 27 firs executes the sensor interrupt program of Fig. 14. In the first step 602 all the interrupts are disabled in the manner described earlier with reference to step 451 of Pig. 11. Then the registers ore "pushed" in step 604 and the program hiving its Address stored at NIPPED is executed in step 606. After execution of the program whose address is at NIPPED, CPU 27 "pops" the registers in step 608 3 enables the interrupts in step 610 end returns to the previously interrupted program in step ~12.
Since the address of the "Sensor I data gathering"
program was previously stored it NIPPED (Step 461 Pig. 12) tie is the first interrupt driven program run after the Pig. 12 program is executed. The "Sensor #0 do gathering" program is shown in jig. AYE, 13B. As first step 46g the resetting zone which was started it step 457 of the Fig. 12 program is turned of. This is - I -accomplished by CPU I addressing the nester controller and out-putting data to latch 601 which resets the TOME EN (tone enable) signal on line 81l. If it is desired to turn of the reset tone only on some lines the Master Controller TONE ON signal is left in the enabling condition end the signals Lo EUPHONY and Lo RYAN at latch 119 of each Section Switch ore reset for etch line where no tone is desired. At this point, the system is reset and Swiss-quint tones (tone bursts) sent to a group of remote stations connected to a respective communieatiorls channel will cause the information channel at the remote stations to be sequentially addressed and connected to the communications channel. As earlier described each remote station of R group is enabled by a numeric eel range of applied tones, e.g. 0-15, 16-31, 32-47, etc., while a different information channel of a remote station is connected to - the communications channel upon the occurrence of each tone in the numerical range to which a remote station responds For system having 16 remote stations each having 16 information channels 256 tones will serve to address Roll information channels. It should also be remembered that there may be, for example, up to 32 groups ox remote stations connected to the central station by respective communications channels to which all tones are supplied Somali-t~neously~ Thus, the CPU is simultaneously addressing, gathering end processing data or 32 sensor outputs, one for each communique-lions channel.
Returning to the "Sensor #0 data gathering' program (~igsO AYE, 13B~, in step Aye CPU I sets the programmable inter-rut timer with a time value sufficient to allow the date on the lines from the sensor to settle. Tupelo this will be 8 mill seconds but may vary depending on the type of sensor which is con-netted to the line. Since the manner in which the programmable timer is addressed and programmed by the GNU 27 was discussed with reference to step 459 of jig. 12 it will not be repented herein.
In step 473, the CPU 27 performs other data gathering steps which my include setting of the programmable timer and other sensor interrupts. These programs will vary depending on the type of sensor output which is being examined. Different types of sensors Snow be used in the present invention to provide measurements of 1) resistance, 2) precision resistance changes, 3) DC voltage and 4) AC power. Specific exemplary programs for the different types of sensor output measurements will be described in detail below.
Upon completion of date gathering step 473, CPU 27 pro-coeds to step ~75 where it stores the address ox the "Sensor I
data processing" program at NIPPED. From there, the CPU 27 pro-coeds to the return step 477. At this point, the CPV has gathered the digitized output date prom Sensor I on all communications channels. Wren the next sensor interrupt is received, CPU 27 again executes the Fix. 14 routine except now NIPPED points to the "tensor #0 data processing" program shown in Fig AYE which is executed at step 606 ox Fig. 14. This program begins at step 479 where the sensor interrupt timer is set for a time sufficient to empty the data buffer. Upon completion of step 479, CPU 27 pro-coeds to step 481 where it stores the Redress ox a "Step to sensor I program at NIPPED. Subsequently, CPU 27 enables the interrupts in a manner described earlier and proceeds to step 485 where it culls the "Process sensor #0 date program. Exemplary programs ton processing various data from the sensors will be described below. After executing the prowesses sensor I data" program, CPU
27 proceeds to return step 487~ and proceeds prom there to steps ~08, 610 and 612 of the sensor interrupt program of jig. 14.
wince NIPPED now contains the address of thy program 'step to sensor lo which is generally show it the top of Fig.
13 as a step to next sensor" program the next sensor interrupt I

causes CPU 27 to execute this program in step 60B of the sensor interrupt program (Pig. 14~ In the first step 514 thereof, the tone is enabled us previously described. This tone causes sensor #l of each group of remote stations to be connected to a respect live communications channel. The sensor interrupt timer is then set for I millisecond in step 516 to define the tone duration end the address of the "Sensor I data gathering" program is set in NIPPED at step 518. The CPU then returns it step OWE Upon occur-fence ox the subsequent sensor interrupts CPU 27 proceeds to execute a "Sensor I date gathering" program end then a "Sensor #l data processing" program corresponding to steps 469 through 487 described earlier with reference to sensor #0.
In like manner, the CPU 27 proceeds upon receipt ox successive sensor interrupt signals, to step through the programs or tone addressing a tensor, and gathering end processing the death for an addressed sensor. Fig. 13B illustrates the execution of the routine for addressing thy lest tensor of a first addressed remote station (e.g., sensor #15) and storing end processing out-put data therefrom. This routine begins at step 497 where the CPU

27 executes the "Step to last sensor" program sue as steps 514~
516, 518 end 519). it then proceeds to step 499 where it executes the programs for gathering and processing data for the last sensor end sets up for sensor #0 of a second remote station (correspond-in to steps 469-487~. At step 502, CPV 27 increments a unit counter which counts the number of remote stations of a group connected to a communications channel which have been addressed end at step S04 the CPU determines if the unit counter equals a maximum number or not. The purpose of the unit counter and the decision step 504 is to test whether all of the sensors at all ox the remote stations of a group have been addressed. The unit counter count the number ox times all sensors ~0-15 have been addressed and processed, which represents the number of remote stations which hove been processed. If all remote stations of a group have not been processed, CPU 27 proceeds to return step 508 where it awaits the next sensor interrupt at which time the "Step to Sensor I program will be executed, this time for the next remote station. If the unit counter equals its maximum, India Crying that the last sensor of the last remote station has been read, the CPU resets the unit counter two zero in step 510 and discontinues any further sensor interrupts and returns to the OIL
program awaiting the occurrence of a master interrupt in step 512. When a muster interrupt occurs, the programs of Figs. 11 through 14 are again executed as described above to begin another sensor addressing and data gathering and processing cycle.
When the "step to next sensor" program is executed for the first time following a master interrupt, the data stored in NIPPED at step 518 will be the address of the "sensor #0 data gathering program; however, for subsequent sensor interrupts, this address will change to correspond with the next sensor, i.e.
I, 2 . . etc. data gathering program which must be executed.
The generalized program illustrated in Fig. 13 for sequentially tone addressing the sensors and gathering and pro-cussing sensor data will change somewhat for different types of sensors which my be used. As noted, some sensors my change a resistance value or an output voltage as a monitored parameter changes. The system is able to perform resistance measurements, precision resistance change measurements, DC voltage measurements, and AC power measurements For each type of measurement, a slightly different "Step to next sneezer, "Sensor data gathering"
and "Sensor data processing program will be used.
For sensor output resistance measurements, the programs of jig. 15, which are slightly modified versions ox the general-iced Pig. 13 programs, are equated - I -I

The step to next sensor" program includes step 614 where tone is enabled, step 616 where the sensor interrupt timer is set for 1 millisecond end step 618 where the address of a "Wait for data to settle" progr~ it stored By NIPPED. Steps 614 end 616 correspond directly with steps 514 and 516 described above with reference to Fig. 13, The first step in the "wait or date to settle' program is 622 where the CPU turns off the tone. This step corresponds to step 469 of Fig. 13. CPU I then proceeds to step 624 where it sets the sensor interrupt timer for sufficient time Al required to allow data from a monitored sensor to settle on the line. This may very Fran sensor to sensor, but is typically ems. In step 626, the CPU sets up the section switches for the resistance measurement mode. Here the CPU sets the signal AMEN and resets the signal ACGRD in latch 373, of the controller interlace (Fig.
PA). CPU 27 then proceeds to step 628 where it selects a proper resistance and voltage source to match the sensor output no-distance range. This is accomplished by setting a proper code on the signal lines REFUSAL, R~FS~LAl, RUSSELL, Lo REFER and Lo REFER at latch 119 by the CPU. Upon completing step 628, the CPU
a proceeds to step 63U where it stores the address of the "Take resistance data" program at NIPPED and then to step 632 where it returns and awaits the next interrupt. Wren the next interrupt occurs, the CPU exits the "Take resistance data" program since this is the program whose address is presently stored it NIPPED
The first step of this program is illustrated as stop ~34 where the sensor interrupt timer is now set for one millisecond. Upon completing step ~347 the CPU advances to step B36 where it equine-tidally converts analog voltage on each ox the 32 communications enlace extending between the section switches and remote stay lions into binary data and stores this in a buffer wreck. Upon I

completing this the POW advances to step 638 where it stores the address of the "Step to next sensor" program at NIPPED. It then proceeds to step 640 where it enables the interrupts and from there to step 642 where it calls the program used to process the d to which has been stored in the buffer area. Upon completing step 64~, the CPU returns to process on interrupted program in step 6~4 and awaits the next sensor interrupt. Whorl the next sensor interrupt occurs the CPU will be instructed by the address at NIPPED to proceed to step 614 of the "Step to next sensor" pro-gram where it enables the tone in step 614. Then in step 616, the CPU sets the sensor interrupt timer for one millisecond. After completing step 616, the CPU 27 advances to step 618 where it stores the address of the "Wait for date to settle" program at NIPPED, which has just been described.
The programs illustrated in Fig. 15 are repeated foreshow of the sensors of h remote station in the manner described above with reference to Figs. AYE and 13B When the last sensor, eye. #15, of a remote station is processed; that is, when step 642 of Fig. 15 is executed for the last sensor of a remote station, the CPU executes a routine consisting of steps 502 . . . 512 (Fig.
13B) to determine if all remote stations of a group have been prosody If Trot, the Fig. 15 programs are repeated until all sensors of all remote stations of a group have been processed at which time the CPU will return to OIL (step 512, Fig. 13B).
The program which is used to process the data stored in the buffer urea which is called at step 642 by CPU 27 may take any one ox a number of different forms depending upon what the measurement represents. The value may represent, for example calibratioIl data, an air or liquid temperature value, or any other measured parameter. Depending on what the data represents, one of the applications programs of Figs. 16 through 20 will be called at step ~42 of Fig. 15.

I -If the measurement represents communication path no-distance calibration date, the program at Pig. I is culled in step 642 of jig. 15. Acquisition of the communication path no-Sistine calibration data occurs when the calibration progr~-n is called for at step Aye of jig. 9, At this time sensor clobber-lion data is gathered from the sensors as just described. hollow-in this, the calibration data is processed according to the it 19 program In the first step 804 of the lug 19 program, the CUP
I sets e line counter N to one. It then fetches the present sensor calibration data rum the buffer in step 806 for line N of the current set of remote stations (units (N represents one of the 32 incoming communications channels. The 32 lines can be identified by & section switch S (0-15) and line L I 1) numbers, but for purposes of simplicity line number N (1-32) can and will also be used in the subsequent discretion. In step 808, the POW fetches the previous sensor calibration data or line N. A
comparison is then made by POW 27 in step 810 between the present and previous sensor calibration data. It they differ by less than I as determined in step 8109 the CPU then adds a value ox 1 to N
in step 812 end proceeds to determine if the sensor calibration data for all lines hove been processed in step 814. If ~11 the lines hove not been processed, the CPU proceeds to step 806 where sensor calibration data for the next line is eschewed If in step 814 CPU 27 decides that sensor data for all lines N (aye of the current set of units have been examined, it returns in step 822.
If in step 810 the present calibration data differs from the previous calibration data for given line N by more than I
thy line number N and the unit remote station) number are all stored in Run error buffer in step 818 after which CPU 27 sets an error slag in step 820. The POW then proceeds to step 812.
If the gathered data represents an air temperature, the application program illustrated in Fig 21 is executed at step 642 ox jig. I This application program begins at a step 836 in which CPU 27 jets a line counter value N to one. In step 838, a present sensor air sample value is fetched from a buffer fur line N of the current set of units. This value is corrected with a previously stored correction value for line N of the current set of units, end on equivalent air temperature value is determined in step 840. In step 842, the KIWI then odds the temperature value to an hourly accumulator and proceeds to step 844 where it increments N. In step 84B, CPU 27 determines if the data for 611 lines N
hove been examined (N=33). I not, the CPU returns to step 838 where the next line sensor temperature sample is processed. If all lines have been processed, CPU 27 proceeds from step 846 to return step 852.
A sensor output my also be used to represent temper-azure which may be monitored for a fire condition. In such a case, the fire process routine of Fig. 22 is used as the program which is culled in step 642 of Fix. 15. In the first step 848 ox this program CPU 27 sets a counter value N to 1. In step ~51 the CPU fetches the present sensor sample date for line N and compares I it with previous sample data for line N. In step 853, deal-soon is made by the CPU as to whether the temperature difference between the compared values exceeds a first predetermined value, thus indicating a fire. If a yes condition is realized in step 853, the CPU then stores in step 356 the unit number (remote sty-lion number) in on action buffer together with the current time.
The CPU then proceeds to step 860 where it sets on action flag in on emergency action status word and when proceeds to step 863 where it increments No In step 8651 the CPU determines it data fop all lines hove been processed (Noah If not, the CPU returns to step 851; it so, the CPU proceeds to return at step 868.
It step 853 indicates there is no fire, that is, the change in sensor rending between two su~essive samples does not - I -exceed the first predetermined value, the CPU advances to step 85~
where it checks to see whether the difference exceeds a second lower predetermined value which my indicate a potential fire. if a yes condition exists in step 854 the CUP proceeds to step 858 where it checks buffer for a potential fire indication from a previous sample. If it finds one in step 862 it proceeds to step 856 and stores information relating to the unit number (smote station number) end current time in the action buffer as described previously If step 862 indicates that there was no previous potential fire indicated, the CPV proceeds to step 866 where it stores an indication of a potential fire in a reference buffer for the current unit for comparison with a subsequent sample of that unit sensor output upon the next execution of the program. From step 866, the CPU then proceeds to step 863 where it increments the line number N. If, in step 85~, the CPU determines that there is no potential fire, it proceeds to step 863 to increment to the unit number N.
If the gathered sensor data represents fluid flow condo-lions at remote station, then the application program of Fig. 23 is executed by the CPU when it retches step 642 of the it 15 program. The first step 870 in this program is the setting of a line counter value N to 1. Then in step 872, CPU 27 fetches first sensor data TWO (temperature of water in) (e.g. the upstream son-son 244 in Fig. AYE) for line N. This data was previously act squired and stored by the CPU in a temporary buffer when processing the data gathering program for this sensor. In step 873, the CPU
27 fetches second sensor (flow) data TWO (temperature of water flow) (e.g. the downstream sensor 226 in Fig. AYE) for line N, which was obtained during processing of the present sensor, sub tr~cting it from the data fetched in step 872 to yield TUT).
In step B74, the value calculated in step 873 is further I

subtracted from previously acquired end stored calibration data TOUGH ( Q TW~O-(TWI-TW~ or line M representing the difference between the data of the first and second sensors under known flow conditions The result of the calculation in step 874 is then used in step ~76 in a table look-up function for the type of son-son employed to determine the actual flow rate. As noted earlier, n table of flow venues con be developed relating the outputs of the upstream end downstream sensors to a flow rate. The data from step 876 is then added to resultant data in a accumulator buffer in step 878 and in step 880 the CPU inurements the unit counter N. In step 882, the CPU determines whether all lines have been processed (N=33) and if not, CPU returns to step 872 where it begins processing data for the next line. If data for all lines has been processed, as determined in step 882, the CPU returns at step 884.
If the gathered sensor data represent BY data, the application program of Fig. 24 is executed at step 642 of Fig.
I in stop 885 of this program, the CPU sets a line counter value N to 1. In step 887, the CPU fetches first sensor data TWO
(temperature of water in) for line N (e.g. an upstream temperature sensor). This data was previously acquired and stored by the POW
in a temporary buffer when processing the data gathering program for this sensor. hollowing this in step 888, the CPU fetches second sensor data TWO (temperature of water flow) for line N
(e.g. a downstream temperature sincere subtracting it Fran the sensor data fetched in step 887 to yield TUT. The subtracted dais is then further subtracted from previously acquired and stored calibration data TAO for line N of the current set of units representing the difference between the do of the first end second sensors under known flow conditions. Following this the CPU proceeds to step 892 where it uses the value calculated in ~2'~73 step 890 ( TWFO~TWI-TW~)) in a table look-up operation to de-termite flow rate through heat exch~ne~er corresponding to the value e~lculated. The CPU then proceeds to step 894 where it fetches third sensor data TWO for line N Sonora 245, Pig. 29), which was also previously acquired and stored by the CPU when processing the data gathering program for this sensor. The third sensor data represents a do Stratton fluid temperature It the out-put of e heat exchanger. This data is corrected with previously acquired calibration data (I ED), and is subtracted from the data TWO obtained in step 887 to determine the difference in temper-azure between the input and output of e heat exchanger. This value is then used in step 896 by the CPU as a value which is multiplied by the flow rate acquired in step 892 for calculation of a thermal energy usage rate; that is, the TAO rate. In step 898, the calculated BTU rate is applied to on accumulating buffer and the CPU then increments the unit mounter N in step 899, after which it determines In step 902 if data from the sensors of ~11 lines has been processed. If not, CPU returns to step 887 where data for the next line is processed. If all units have been pro-cussed us determine in step 902, the CPU returns at step 903.
Figs. AYE, 16B illustrate the programs execllt~d by the CPU 27 when measuring a sensor output which is in the form of prevision resistance change. Some of this program is identical with that illustrated in Fig. lo end accordingly like boxes have been numbered with the same reference numerals The principal difference between this program and that of jig. 15 occurs in how the resistance data which has been taken is processed and this begins at step 904 of go AYE and discussion will begin it this point When an illiterate occurs after the "wake delta resistance doughtily' program has been set in NIPPED by step 630 the sensor inter-rut timer is set for "X" milliseconds (corresponding to the time I

for execution of the "take delta resistance data" program) in step 634 and the CPU then proceeds to step 904 where it sets a line counter L to Nero end to step 906 where it sets a section counter S to zero. In step 9089 the CPU sets reference data previously acquired for the sensor into latches 513 and 509 for section S and line L and in steps 910 and ~12 the CPU configures the A/D con-venter 21 or a delta resistance measurement. A/D converter 21 is set for delta resistance mode in steps 910 and 912 by setting the signals GAIN 4X, SIGN and SUMINV at the output of latch 509 as in Table VIII below:

TABLE VOW

Lucia VC~VI YI-VO VOW) IVY) YOGI OWE) After setting the A/D converter 21, CPU 27 proceeds to step 914 where it converts the analog delta resistance value for the incoming line (one of the 32 incoming lines) to binary form, storing this in a buffer area in step 916. Following this, the line counter is incremented Fiji step 918 and the line counter value is testes in step 920 to determine whether it exceeds a prude-termined line maximum of 1. If net, the CPU then proceeds back to step 908 where it sets the calibration resistance data for the next line (identified by L and S) into the D/A analog converter latches 513 end 509. If the line counter it greater than a - I -maximum of 1 in step 920, the line counter is set to zero in step ~22 end the section Conner is incremented in step ~24. At this point, data or two lines 090 and Do US, L) will have been gathered. Following this, the CPU in step 926 tests whether the section counter is greater than a m~xirnum number (15). If not the CUP returns to step 908 to begin processing data for another line, now identified us 1,0. If a yes condition is achieved in stop 926 indicating that ~11 lines have been processed (S=15), the address of the "Step TV next tensor" program is stored at NIPPED in step 928 following which the interrupts ore enabled in step 930 and the program used to process the data currently stored in the buffer is elude step 932, This program may be one of the apply-cations programs described above with reference to Figs. 19 and 21-Z4 where a change in precision resistance value my represent - any one of change in calibration data, an air temperature, a fire condition, fluid flow, or BTU measurement. Step 932 selects one ox these placation programs for operation on the data why ah has been gathered.
The section and line counters US, L) are used to point to one of the 32 incoming lines. The reason for using these mounters is that previous resistance data for an incoming line must be fetched in step 90~ and inserted into D/A converter 511 for summation with present resistance data for the some line, as etch sensor output is prosody. The S Hod 1, counters enable the CPU to locate and fetch this previously stored data.
The sensors which may be used in the system con also produce a DC voltage output and when such sensors Ore used, the program of Fig. 17 is executed by the CPU to gather and process sensor dais. As WfiS true of the precision resistance measurement program, certain steps are the same as in the program illustrated in Pig. 15 and these have been labeled with the same reference By -numerals. The principal difference in a DC voltage measurement program is that a step 936 appears after the sensor interrupt timer is set in step 624 to alloy sufficient time for date to settle on the lines. Step 936 sets the section switches for DC
voltage measurement me. The Section Switctles ore set for a DC
voltage mode by first setting the AMEN signal and resetting the ACGRD signal it the controller interface latch 373 end then no-setting the Lo end Lo REFER signal on latch 119 of all the Section Switches. Following this, the address of 'take DC voltage data"
program is stored at NIPPED in step 938 following which the CPU
returns in step 940 to await a next interrupt. When the next in-turret occurs the take DC voltage data" program is executed which begins at step 634 where the sensor interrupt timer is set for one millisecond. If the DC voltage on the line is out of the normal operating range ox A/D converter 21, the CPU con in this step control switch 161 to select resistor/voltage combination that will sum with the sensor voltage to bring it within the range of A/D converter 21. Following this, the CPU proceeds to step 942 where it converts the DC voltage on each of the 32 section switch lines into binary data and stores it in a buffer area. Upon come pletion of this, the POW then proceeds to step 944 where it stores the address of the "step to next sensor" program at NIPPED in step 944 and it then enables the interrupts in step 946 and culls the program used to process the data stored in the buffer area in step 948. Again, this can be any one of the application programs de-scribed earlier with references to Figs. 19 and 21-24. Following execution of the program in step 948, the DC voltage measurement program returns at step 950.
As described above Q principal feature of the present invention is the ability ox the CPU to monitor power concision in an electrical path it one ox the remote stations. jigs. AYE, - a -I

lob, 18C, 18D illustrate the flow chart for the program executed by CPU 27 to take the necessary AC measurements which are used to calculate power consumption The "Step to next sensor program which is used for AC
power measurements is similar to the "Step to next sensor" pro-grams previously described for other measurement. As a first step, tone (addressing tone) is enabled in step 1002 following which the CPU 27 sets the sensor interrupt timer for one Millie second in step 1004. After this, the address ox "Check current transducer impedance" program is stored it NIPPED in step 1006 following which the CPU returns in step 1008. When the sensor interrupt timer times out after the one millisecond time interval, the interrupt thus generated causes the POW to execute the "Check current transducer impedance" program which begins it step 1010.
In this step, the CPU turns off the addressing tone and then pro-coeds to step 1012 where it sets the sensor interrupt timer for nine milliseconds. Nine milliseconds is selected US producing enough time for full cycle ox 0 Ho sine squared waveform (120 Ho) to occur which is spooled in subsequent steps of the program.
Following step 1012, the CPU proceeds to step 1014 where it so-feats a current multiplied by current mode of the section switches. The current multiplied by current mode is set by first resetting signal SELL VSSEL-Ll end MDD~5EL at latch 119 ox ~11 the Section Switches Next the C~GSEL signal of latch 371 is reset. The net equity of these controls signals is to connect section witch input line 150 to the input of trucking A/D con verger 181~ If the system utilizes a split bus configuration it will also be necessary to reset LOWE and Lowe of latch 131 on all the Section Switches to disable the external voltage inputs. The third step is to set the AC path g&in to a minimum. This is accomplished by first setting the SO signal ox tech 371 after which the ASP signal of latch 373 is alternately reset and then set gain to set the AC path gain to maximum. Now thy signal SO
at latch 371 is alternately reset end set eight times. The AC
path grin has now been clocked to minimum gain hollowing step 1014 the CPU advances to step 1016 where it selects proper DC test voltage which is applied through a resistor which best matches the current transducer impedance.
This matching resistor is shown in Fig 4 between pin 24 and switch 175.
Thea proper DC test voltage for measuring the current transducer impedance is set by first jetting signal Tea and no-setting signals TV end TV of latch 3l3 this selects Levi for the output of switch 349 end system bus 13 pin 24. The next and last step is to set the signals Lo REFER, Ill R$FEN, RUSSELL, ~EF~ELAl - and RUFUS on latch 119 ox ~11 the section switches This applies the test voltage on pin 24 through switch 161 to the in-coming lines serviced by a section switch for application to a current transducer connected thereto. Upon completing step lows, the CPU proceeds to step 1018 where it enables the AC measurement pith. The AC measurement path is enabled by setting ACGRD end resetting AMEN at latch 373. At this point, an incoming current from & current transducer (in the form of a voltage signal) will be applied to both the A/D converter 181 via path 150~ and the automatic grin control 245 (via input 243) causing A/D multiplier 181 to produce current squired output.
In the next step 1020, the CPU fills a current trays-dicer impedance buffer with data corresponding to hexadecimal "OF"
following which the POW sets an AC measurement interrupt counter to zero in step loan. In step 10249 the POW sets the maximum AC
measurement interrupts which will occur to 16. Upon completion of step 1024 the CPU proceeds to step 1026 where it stores the I

address ox Q program "jet AC current gain" it NIPPED which will be executed upon the occurrence of the next sensor interrupt Following this, at step 1028, the CUR enables the AC measurement interrupts. The AC measurement interrupts are enabled by setting VINY ox the Muster Controller latch 601. There are 32 AC
measurement interrupts generated for each cycle of the 60 Ho main power waveform at the output of the phase lock loop multiplier 307 in the controller interface 15. In step 1030, thy CPU enables the interrupts end then returns in step 1032.
await this point, the next sensor interrupt will cause the CPU to execute the "Set AC current Gwen' program. However, before that, 16 AC measurement interrupts will occur which will cause the AC measurement progP~ms, identified us steps 1034 . . 1056 s. AYE, 18B~, to be executed. Although not shown in Figs. AYE
- and 18B, upon thy occurrence of an AC interrupt the CPU will first disable ~11 interrupts avid push its present register contents to the stack before executing step 1034. Also, prior to executing the return steps 103g, 1049 end 1056, described below, the stack must be popped to restore the register contents End the interrupts again enabled.
The first step of the AC measurement program 1034 causes the CPU to take the current squared reading of ~11 32 lines run-nine from the section switches to the groups of remote stations end this data is stored in a buffer. The POW then proceeds tug step 1036 where it increments on AC measurement interrupt mounter end then proceeds to step 1038 where it tests whether the AC
measurement counter is greeter than 16. If not, the CPU pops the stuck, enables the interrupts and returns and waits for the next AC interrupt which will again cause it to execute the "Check current transducer impedance" program which begins at step 1034.
After this program has been executed 16 times a yes decision will I

be produced at step 1038 causing the CPU to execute step 1042 which disables the AC measurement interrupts. The I measurement interrupts are disabled by resetting V14~N of the Master Controller latch 601.
After disabling the AC measurement interrupts, the CPU
proceeds to step 1044 where it again enables the interrupts.
hollowing this, the CPU 27 proceeds to step 1046 where it compares the lowest value stored in the buffer for each ox the 32 lines with the data stored during calibration of the system. The lowest readings occur when the AC current is zero. Thus the lowest read-in representing transducer output impedance amounts to nothing more than DC re~isthnce reading which is similar to other DC
resistance readings previously described herein. A significant change in transducer impedance may occur by someone deliberately shorting, disconnecting or putting resistive or reactive combo-newts in parallel or in series with the current transducer in an attempt to make the system rend a smaller current than is actually being consumed in the electrical path at remote station.
Accordingly, this portion of the program is designed to test ton tempering or line faults.
If a signifie~nt change in the current transducer output impedance is detected in step 1048, a tampering flag is set in step 1052. This flag is periodically monitored by failure scan program to provide an indication of tampering. After the temper-in slag is set the CPU proceeds to step 1054 where it stores the section switch nwnber, line number, unit number and voltage phase in a tampering buffer This information Jan when be displayed along with location information to help identify a remote station which his been tampered with and to help In the repair process for a faulty line condition. After step 1054, the POW pops the stuck, enables the interrupts and returns in step lost It there was no - I -significant change in the current transducer output impedance detected in step 1048, the CPU would also return in step 1049 after first popping the stack and enabling the interrupts.
The "AC current gunwale program, the address of which was set in NIPPED at step 1026, begin it step 1058 when the next son-son interrupt signal is received. At this point, the CPIJ sets the sensor interrupt timer for nine milliseconds and then proceeds to step 1060 to set the section switches for a voltage multiplied by a current mode.
The voltage multiplied by current mode is set by reset-tying signals Lo REFER end Lo REFER on latch 119 at all the section switches. Following step 1080, the CPU proceeds to select a volt-age source in step 1062 end then to select the automatic gain mode stop 1064.
The procedure for selecting a voltage source was de-scribed earlier and will not be repented here. To select the automatic gain, signal SUP is reset at latch 373 end SO is reset it latch 371. In step lob the AC measurement pith is enabled following which the address of a "Zero AC path offset" program is stored at NIPPED in step 1068. Aster thus. the CUP returns in step 1070.
When the next sensor interrupt occurs, the "zero AC path offset" program is executed which begins it step 1072 where the sensor interrupt timer is set for nine milliseconds. hollowing this, in step 10~4, the AC measurement path it disabled by reset-tying AGREED and jetting AMEN at latch 3~3. In the next step 1076, CPU 27 stores the address of the "Take end prows AC power data"
program at NIPPED following which it returns in step byway The "Tyke end process AC power date" program which is next executed when the next sensor interrupt occurs begins at step 1580 where the sensor interrupt timer is set for 18 milliseconds.

- 8g Following this, the CPU enables the AC measurement path in step 1082 end then sets the AC measurement interrupt counter to zero in step 1084. In step 1085, the AC measurement maximum interrupts is set to 32 and in step 1086 the address of the program stop to next sensor" is stored at NIPPED. In the following step 1088, the AC measurement interrupts are enabled and in step 1090 the CPU
internal interrupt controller is enabled following which the CPU
returns in step 1092.
When the next AC measurement interrupt occurs and at each AC measurement thereafter, a voltage multiplied by current reading is taken on all 32 lines and stored in a buffer by the CPU
in step 1094. In a subsequent step 1098, the AC measurement interrupt mounter is incremented and in step 1098 the AC measure-mint interrupt counter is tested to see ii its content is greater than 32. If not, the CPU returns following step 1098. As earlier noted, the process of disabling interrupts, pushing the register contents to the sleek at the beginning of the AC measurement pro-gram and popping the stack and enabling the interrupts before a return, are all performed by CPU 27, although not shown in its lea . . . 18D. If the AC measurement counter is greater than 32, as determined in step 1098, the CPU proceeds to step 1100 where it disables the AC measurement interrupts following which it executes step 1102 where it disables the AC measurement path (resets ROD
and sets RAGMEN it latch 373). In a subsequent step 1104, the CPU
enables its interrupt controller and then proceeds to step 1106 where it calls the "Process AC measurement data" program. After sxeeution of this program, the POW returns it step 1108.
The flProcess AC measurement data" program executed it step 1106 in jig. lid is illustrated in greater detail in jig. 20.
At the time this program is executed, the CPU has stored 32 samples for each remote station on a line or up to 32 lines - I -I us 1024 ~flmples in Ill. In this program, 32 power samples from a memory buffer for Mach sensor are used to determine power measurement. In first step of the program 1110, the CPU adds 32 samples from the memory buffer or a particular current sensor to determine a power reading. The CPU then proceeds to step 1112 where the sum of the 32 samples is multiplied by a stale factor.
The scale factor is determined by looking at the automatic gain control setting for each line and using the value thereof which WAS previously stored. The scaled sum is then stored in another Jo buffer to indicate the instantaneous power usage in a step 1114.
Following this, the CPU proceeds to step 1116 where it adds the scaled swum to a peak usage buffer sum. After this, the CPU pro-coeds to step 1118 where it adds the scaled sum to on accumulator buffer. In a subsequent step 1119, a line counter is incremented and in a step 1120 the CPU determines whether the line mounter equals 33 or not indicting that ~11 lines have teen processed If not, it returns to step 1110 and repeats ~11 the steps from this point down to step 1118 for each of the lines of the soys-them. When step 1120 indicates that all lines have been prosody the CPU then proceeds to return at step 1122.
The operator interactive program ~03 ox Pig. 9 is illustrated in detail in Figs. AYE . . . 25M. This program is continuously executed by CPU I when it is not processing an in-turret program. It is used to extract and further manipulate processed date which has been provided by the sensor interrupt programs described above.
In the first step 1200 ox the OIL a terminal operator is instructed to select either "look" mode or a "maintenance" mode.
The look mode is primarily designed to enable an operator to in-spent the data acquired from individual remove stations e.g.apartment units, while the Montanans mode performs various housekeeping and data processing functions. or the purposes of further description, it will be assumed that each remote station is located it an apartment unit of a building.
In the first step of the look model the CPU proceeds to step 1202 where it asks the operator whether he knows whit apart-mint he it interested in. If he doe, the CPU proceeds Jo step 1~12 where it searches an apartment index with fin operator in-putted apartment number to determine section number (0-15), line number I 1) and unit number (0-15) which his been assigned to that ~p~rtment. This data is stored by the CPU end is used to identify end access data for the apartment in question. The apartment index is e stored table which kilotons the section Nemo-berm line number and unit numbers assigner to each apartment. The manner in which this index is entered unto the system will be further described below. After completing step 1212, the CPU
proceeds to step 1214 where it calculates the actual memory ad-dresses where the various dais has been stored for the apartment number in question (for the section (S), line AL) and unit MU) numbers assigned thereto). These addresses include a temporary buffer address, a beginning address for parameter data, a monthly buffer address, end the address of on instantaneous power buff for. The CUP also determines from the section, line end unit numbers for a particular apartment, the ~onfiguretion rode there-of. The configuration code represents the type end Rrrsngement of the sensors, what power line phase is being monitored, etch, which are used at the apartment in question. Different configurations may use the CPU Jo calculate energy consumption differently.
If in step 120~ a determination is made that the open rotor does not know the apartment number in question, the POW
I proceeds to step 1204 where it asks the operator to directly input the section number, line number nod unit number for which do is sought. The CPU then proceeds to step 1206 where it determines whether the input I, L end U data is valid, that is that it corresponds to if section, line and unit number used in the system.
If the entered date is not valid, the CPU proceeds to step 1210 where it prints an "invalid" message and returns to step 1204. If the S, L end date is valid, the CPU proceeds to step 1208 where it stores the inputted S, L and U data and looks up the apartment number corresponding thereto in the apartment index. The CPU then prints the apartment number for the operator's information. Upon concluding step 1208, the CPU then proceeds to step 1214 where it performs the operations noted above for ~lculating the various memory addresses for the date requested corresponding to the S, L
and U information The configuration code or the input of So L
end U is also determined in the manner previously described.
Upon completing step 1214, the CPU proceeds to step 1216 (Fig. 25B) where it prints a parameter abbreviation table, This table merely lists all of the parameters for which data has been stored by the CPU, for example, electricity power consumption, sir flow water flow, BTU etc. Also in step 1216, the CPU requests that an operator input a desired parameter. The CPU then branches to a routing corresponding to whatever parameter was selected by an operator and inputted in step 1216. Assuming for the moment that electrical energy use parameter ELM was selected, the CPU
proceeds to step 1218. Here it calculates on energy use rate by first retrieving the energy consumption date for the selected apartment. It then examines the configuration code for the apart-mint unit under consideration to see if any additional processing is required of the data, because of the sensor con~igur~tion. The CPU also fetches calibration scale factor previously stored for use in calculating energy consumption. The elaboration scale factor is factor which is stored in the system by the CPU it the time of instillation. It is determined by using highly accurate calibration meter standard to determine energy consumption in a particular electrical pith in on apartment which is compared with energy consumption as calculated and digitized by the section switches 17 and A/D converter 21. If there is any deviation be-tweet the standard and the power calculated by the hardware struck lures of the invention, this is stored by the POW upon mutual entry of an operator us a calibration scale factor As Q result, any measurement inaccuracy inherent in the system can be accounted for end balanced out.
Prom the power data retrieved, the configuration code end the ~alibrdtion scale factor the CPU thin calculates the rate ox energy usage for the apartment being considered. Appropriate constants ore then applied to this rate to determine energy Usage per hour, per day, and per m~nthO Summary data indicating the amount and cost of all electrical energy use to dote for the present month for this apartment is also calculated. Upon em-pleating all the electoral energy use rate calculations in step 1218, the CPU proceeds to step 1220 where the calculated energy data is displayed.
Upon completing step 1220 the CPU proceeds to step 1222 where it determines if an operator has inputted a control signal instructing the CPV to proceed If no control signal has been entered, the CPU proceeds to step 1223 where it waits for the next input sample of energy data for the apartment selected which occurs under master and sensor interrupt control us described earlier. When the next energy data sample arrives, the CPU no-turns to step 1218 where it recalculates energy use data using the new energy do samples. Upon reception of the control signal in step 12229 the POW proceeds to step 1224 (Fig 25C) where it asks the operator if he wants to view the data for a new parameter If I _ yes, the CPU proceeds buck to step 1216 and begins the sequence of steps described earlier.
If no new parameter is desired, the CPU proceeds from step 1224 to step 12X6 where it asks the operator it he wants to see data for a new apartment. If yes, the CPU proceeds back to step 1202 where it asks whether the apartment is known or not. If the CPU determines in step 1226 that data for a different pretty-mint is not desired, it proceeds to step 1228 where it asks the operator if he wonts another mode. If not the CPU proceeds to step 1220, otherwise it returns to step 1200 end awaits a look or maintenance mode input command.
It in step 1216 the operator selects the parameter AWL
(Average Electrical Energy) the POW proceeds from there to step 1350 (jig. 25J) where it asks the operator how many samples he wishes to include in the averaging. This is input as a value N
which the CPU stores in step 1350 hollowing which it proceeds to step 1352 where it calculates and prints electrical energy use rate datfi.
allowing step 1352, the CPU proceeds to step 1354 where it determines whether all of the samples entered at step 1350 hove been processed. If not, the CPU proceeds to step 1355 where it writs or the next data simple to be collected during processing ox the sensor interrupt programs. After the next sample his been collected, the CPU cycles back to step 13$2 end recalculates and prints the electrical energy use again displaying this informal lion. The samples occur toe rate ox 512 per hour.
When all samples hove been processed as determined in step 1354, the CPU proceed to step 1356 where it asks the owe rotor if he wants another set ox readings. It the operator enters yes, this is determined in step 1358 by the CPU which then cycles buck to step 1350 and repeats the above described process.

If a no is entered by the operator in step 1356~ as detected by the POW in step 1358, the CPU cycles back to the beginning of the OIL program step 1200~
Returning to step 1216 (Pig. 25B) if the CPU determines that on operator has inputted a request for a parameter WAR water Flow Rote) the CUP jumps at step 1217 to a WAR routine (jig. OK
where in the first step 1360 the CPU fetches all water use data for the selected apartment. Water use date is collected by the CPU during execution of the sensor interrupt programs in the same manner as used to collect air flow data describe above in refer once to Fig. 23. That is, the sensed temperature difference be-tweet upstream and downstream temperature sensors nutted in fluid flow path (e.g. Pig. AYE) provides an indication of flow rate.
The flow rote date is multiplied by Q cost factor to provide data represent of total water usage. The CPU then proceeds to step 1362 where it displays data corresponding to the rate Do water usage us well as Yost. upon completing the cowlick-lotion Hod display of water use in step 13S2, the POW then pro-coeds to the next step which is identical to step 1222 in 25B~ being labeled Lowe in Fig. 25K. The WAR program operation proceeds as described above for the ELM program shown in Fig. 25B, so that description will not be reverted.
It in step 1216 (Fig. 25B) the operator sneers the parameter BTU indicating he wishes to review date relating to BTU
eonswnption, the CPU branches to step 1364 (Fig. 25K? where Blue data for a selected apartment is accessed. Appropriate rate data is used by the POW to calculate Yost ox TV usage. The CPU then proceeds Jo step 13~6 where it calculates end displays thermal energy use data. Upon completion step 13669 program operation proceeds us describe for LO and WAR and this description will not be repeated.

Assuming that at the output of step 1200 (Pig. AYE), the CPU has been instructed to enter a maintenance mode, it proceeds to step 1230 (jig. 25D) where it prints a maintenance mode communed list end request an operator input solution The maintenance mode omened list is illustrated in step 1230 of Fig 25D. FIJI
step 1232 the CPU branches to subroutine corresponding to the maintenance mode command selected by an operator. If tune command is ALL or Cal, the CPU proceeds to step 1234 (Fig, EYE) where it asks the operator if he knows the apartment number. Steps 1234, 1236~ 1238, 12409 1242 end 1244 ~11 correspond to respective steps 1202, 12~4, 1206, 1210, 1208 and 1212 which have been previously described. The purpose of these steps is to determine the S, L
and U numbers for the hpnrtment under consideration and a detailed description of these steps will not be repeated herein.
Upon completion of the routine for determining the S, L
end U for the apartment number in question, the CPU at step 1246 branches to either the ALL or CAL routines which were previously selected in step 1230. In the ALL routine, the CPU proceeds to step 1248 where it stores all prompter data for the So L and U
which has been selected in a temporary buffer end ~11 sensor data it printed from the buffer. The CPU then proceeds to step 1~49 where it determines if an operator has input a control code N. If not the CPU proceeds to step 1250 where it waits for the next data snowplow foam the sensors which is inputted during processing of the muster end sensor interrupt programs. When the next sample is received, about seven seconds later, the CPU proceeds back to step 1248 where it stores the new sample date or the So L end U
selected in a temporary buffer and prints this data from the buffer. of in step 1249 the KIWI determines that the control N
rode has been received, it brunches back to step 1200 foe. AYE) which is the beginning of the OIL program.

If during initial execution of step 12307 the POW de-toots an input for CAL, this routine will be entered at branching step 1246 to step 1252.
The EASILY routine is designed to compare power calculated by the invention with an independent calibration meter having a very high degree of flexors. The purpose of this is to determine the calibration sole factor described earlier. Any differences between power calculated by the system of the invention and power calculated by the calibration meter is set into the system as Q

10 calibration scale factor which is used by the system when cowlick-lying power consumed In this manner, the system con by port-odic~lly calibrated to high accuracy.
In the first step 1252 of the CAL routine the CPU
prompts the operator to insert how many samples he wishes the calibration routine to extend over. Twenty samples would be typic eel. The samples correspond to the updating ox the data samples which occurs during processing of the sensor interrupt routines described earlier. The number of samples input by an operator is stored as value N. Following this, thy CPU proceeds to step 1254 Jo where it prints the apartment number, section line end unit numb biers corresponding to the sensor and associated line path being calibrated. Also it step 1254, the CPU asks the operator whether calibration is desired or input phases A, B or C. In many cues a three phase power line runs to an apartment and each my be separately calibrated. In some installations only a single phase power line enters an apartment in which case the operator will only slot that jingle phase for calibration in step 1254~
rum step 1254, the CPU proceeds to step 1256 (Fig. 25~) where it prints the message to the operator to get ready to start the calibration meter. Then in step 1257 the CPV activates tone generator which signals on operator to begin operation of the I

calibration meter. From there the CPU proceeds to step 1258 where it calculates and displays corrected end uncorrected power values for the phase selected by the operator in Beep 1254. The uncork rooted power is that stored by the CPU during sensor interrupt processing which has not been corrected with the c~librRtion scale factor. The corrected power calculation is effected by applying elaboration scale factor to the uncorrected power which was de-roved during a previous execution of an EASILY routine. In step 1258 the CPU also prints the corrected and uncorrected power for the operator selected phase, e.g. B, the power for this phase After an "X" number of samples (which will very between 1 And the operator determined sample number N), the average uncorrected power for the selected phase, the average corrected power for the selected phase, the total uncorrected energy used for the selected phase end the total corrected energy used for the selected phase.
This latter value is the most important for ~alibretion purposes as it yields a watt hour energy consumption value which is Tom-pared with watt hour energy consumption value determined by the calibration meter.
After executing step 1258 the CPU increments the sample counter in Lowe end in step 1262 determines whether the sample count is greater than the value entered by the operator in step 1252. If not, the CPU proceeds to wait for the next simple at step 1263. In this step the POW determines when the next sample of power data is inputted into the system under the master end sensor interrupt processing routines. Wren the next data samples for power have been stored in the appropriate buffer registers, the KIWI tweeds beck to step 1258 where it updates the uncork rooted and corrected power information or etch of the values described previously. Steps 1258, Lowe and 1263 ore continuously repeated until in step 1262 the CPU determines that the number of _ I _ samples which have occurred exceeds that set by the operator it step 1252. The CPU then proceeds to step 1264 where it sounds R
tone instructing the operator to stop the calibration meter. The operator can now compare the contents ox the calibration meter with the total corrected energy for the selected phase which appears on the screen from step 1258. If those respective values differ, the operator may instruct the CPU to change the Mali-ration death which is being used to correct the power. The CPU in step 1265 prompts the operator to either enter the actual scale value which is the rending taken from the calibration meter, or to manually enter a different scale factor by first inputting the code "99". If no change is desired the CPU instructs the open rotor in step 1265 to enter a Al From step 1265, the POW proceeds to step 1266 and 1268 (jig. 25G) where it determines whether a "1", ~99", or a scale factor has been entered by the operator If a "1" has been en-towered the CPU proceeds from step 126~ to step 1272 where it prints the present calibration value. prom there it proceeds to step 1~76 where it asks the operator if he wishes to calibrate another phase. If the answer is yes, the CPU proceeds to step 1254 and repeats the CAL routine for a different phase, If the operator does not desire to calibrate another phase, the CPU pro-coeds from step 127~ to step 1278 where it inquires if the open rotor wishes to calibrate the power lines for another Apartment.
I yes, the CPU proceeds prom step 1278 to step 1~34 (jig. EYE) but if not, the CPU then proceeds directly to step 1280 where it asks the operator it he wishes to have the new calibration date stored on disk. If yes, the CPU proceeds to step 1~82 where it stores the new calibration data on a disk and from there returns to the beginning of the OIL program at step 1200 (Fig. AYE). It the new calibration data is not to be stored on dfskJ the POW

proceeds from step 1280 to thy beginning of the OIL program at step 1200 (Fig. AYE).
If in step 1266 the POW determines that the operator input at step 1265 was not '', it proceeds to step 1268 where it determines if it WAS A t~99~1. If not it proceeds to step 1270 where a scale factor calculated from the calibration meter rending which W&S entered by the operator in step 1265 is stored us a new scale factor to be used for subsequent calibration of incoming power data. prom there the CPU proceeds to step 1272 where it executes steps 1272, 1276, 1278, 1280 end 1282 (Fig. 25~,) in the manner described above.
If in step 12B8 the CPU determines that the operator entered "99" code it prudes to step 1274 where it prompts the operator to input a desired binary scale value as the calibration - stale factor. prom there the CPU proceeds to step 1272 (Fig. 25G) and where it executes the subsequent steps in the manner previous-lye described.
If in the maintenance mode command input step 1230 (Fig.
25D), the CPV determines that the communed APT NO. was entered it proceeds to a routine for finding an apartment number from if SAC-tons line end unit nwmbeF input by the operator. This routing begins at step 1284 it 25H) where the operator is prompted to enter the S, L and U information in sequence. In step 1286 the CPU consults the apartment index and identifies the apartment number associated with the input S, L and U information hollowing which in step 1288 the CPU asks the operator if he wants another apartment number Iran volubly So L and U information. If not, this PQUtine returns to the entry point step 1200 I AYE) of the OIL program. If in step 1288 the operator indicates that on additional apartment number is desired the CPV proceeds back to step 1284 where it reqllests new So L no U information.

If when in the Montanan mode command input step 1230 (Fig. 25D) the operator inputs the SLY command, the CPV branches to a routine for determining the I, L and U information from On inputted apartment number. This routine is also illustrated in jig. 25H end hits as a first step 1290 an input inquiry to the operator requesting an apartment number. Following this, the CPU
searches the apartment index to determine the S, L and U data corresponding to this apartmerlt. rum there the CPU proceeds to step 1294 where it prints the S, L hod U information and then returns to the input of the OIL program step 1200 (Fig. AYE).
If in the Montanans mode command input step 1230 (Fig.
25D) the Operator selects the IT input, the CPV proceeds to an initi~lizQtion routine illustrated in jig. 25H. The first step 1296 of this routine is to request the operator to input his initialization rode. The CPU then compares this initialization rode with previously stored initialization codes representing authorized users ox the system. If the initialization code is roper, as checked in step 1298, the CPU proceeds to initialize the system in step 1300. To initialize the system, the CUP
executes the sensor interrupt routines to gather and acquire I
ration offset data for the sensors operating under known condo-lions. Also in step 1300 the CPU prints on a display screen that the system was initialized end the date and time ox initial-lion.
Upon completion of step 1300, the CPU proceeds to step 1302 where it asks the operator if he wishes to input an apartment index at this time If an apartment index input is not desired, thy CPU determines this in step 1304 and proceeds to a start rout tine which begins at step 1305 (jig. 25H). If in step 1304 the CPU determines that on apartment index is to be inputted it pro-coeds to an apartment index input routine which begins at step 131Q fig. 25I).

The first step Of the start routine 1305 prompts the operator to input a collateral character "S" to start operation of the system. Ill step 1306, the CPU determines whether the start code for an "S" has been input. If so, it starts the system and prints the time the system was started. It no input command "S"
is resolved the CPU at step 1308 branches back to the beginning ox the OIL program at step 1200 jig. AYE).
I as a result of step 1304 it it determined that On apartment index is to be input, the CPU proceeds to step 1310 (jig. 251~ of the apartment index input routine. There it prompts the operator to input an 'it" if an apartment index is to be input or "C" if a previously stored apartment index is to be eon-rooted. hollowing step 1310, the POW proceeds to steps 1312 and 1314 where it determines whether the operator has input an 'I" or a "C". If an I" Wow input 9 the CPU proceeds prom step 1312 to step 1326 where it instructs the Operator that he may exit the apartment index routine by typing an " " code, or tout he can exit 6 present apartment line by entering a "space bar" code or that he may enter an apartment input by entering a "carriage return" rode.
After instructing the operator in step 13~6 the CPU proceeds to step 1323. In this step the CPU first sets a section counter, a line counter and a unit counter to an initial zero state. It then displays eke states of these counters on the screen as S _ L _ , and U Jo where the blanks represent the present contents I the various counters. The CPU then wet en for the operator to enter an apartment number after which he will execute a "carriage return. At this point the POW then assigns the inputted part-mint number to the L and U namers which were printed on the screen prior to the operator entered ~partmealt nwnber. The CPU
then steps the section counter to a new value and displays new S, L and U numbers on the siren following which it awaits a new - 1~3 -Jo apartment n~nber entry by the overtop The CPU then cycles through the section counter until it reaches its maxl~wm value after which 16 S, L and U numbers will hove been assigned to 16 entered apartment numbers by the operator. hollowing this, the CPU increments the line counter and resets the section counter is zero end repents the process for the next 16 apartment entries until the section counter again reaches its maximum. After this the unit counter is incremented and the section Rod line counters reset to zero. After the next 32 entries, the unit counter is again incremented. Eventually, all the counters reach their maxim mum states and the CPU exits at step 1328 to step 1330 where it prints "index full" message to the operator. At this point, the CPU has stored corresponding S, L and V numbers for each entered apartment number. prom step 1330, the CPU proceeds to step 1332 where it asks the operator if he wishes to store the new apartment index on disk. If yes response is entered, the CPU proceeds to step 1324 where the apartment index is stored on disk and then to the OIL program step 1200. If the answer at step 1322 is no, the CPV proceeds back to input step 1200 of the OIL program Returning to step 1310, if the operator input no"
indicatirlg he wished correction ox on existing apartment index, the CPU proceeds to step 1316 where it requests the operator to input S, L and U codes for which an assigned apartment number needs correction The CPU then proceeds to step 1318 where it searches the apartment index and prints the apartment for S, L and U information. It then prompts the operator to enter a corrected apartment number and then stores the corrected apartment number in the apartment index in correspondence to the entered S, L and U
codes. hollowing the step 13189 the CPU proceeds to step 1320 where it asks the operator if he wishes to correct another apart mint number and it the answer is yes the CPU branches back to step 1316.

- 10~ --Returning to the maintenance mode command input step 1230 fig. 25D) another operator selected input mode is TIME. If this is selected at step 1232 the CPU branches to Q TIME routine where in step 1332 (Fig. 25L) it rends a real time clock and prints the present time after which it returns to the beginning of the OIL progr~n9 step 1200 (Fig. AYE. Another maintenance mode input command is TIME SET and if this is selected in step 1230 by an operator the CPU proceeds to a TIME SET routine fig. 25L) where it prompts an operator to enter the present time which the CPU then sets into the system real time clock. After this, the CPU returns to step 1200 of the OIL program.
Another input mode command which an operator can select at step 1230 is DATE. in the first step 1336 of this routine (Fig. 25L), the CPU reads the present month, day and year Fran the - system clock and displays it to the operator. After this, the CUP
returns to step 1200 ox the OIL program.
Another maintenance mode input command is DOW SET and if this is selected by the operator in step 1230, the POW branches to a DATE SET routine illustrated in step 1338 (Fig. 25L). In step 1338 the CPU prompts the operator to enter the present date which the CPU sets into the system clock. Upon completing step 1338, the CUP returns to the beginning of the OIL program it step 1200 (Fig. AYE).
Another maintenance mode input command is APT INDEX. If this command is selected by on operator it step 1230, the POW
enters the APT INDEX routine described earlier which begins at step 1310 (Fig. 25I ) .
Additional input commands in the Montanans mode are ESSAY ERR TO, an TRY The HO routine fig. 25M) which can be so-looted has a step '340 in which the CPU prompts on operator to input an electricity conversion constant which the CPU uses to calculate energy consumption. In the routine ERR (jig. 25M), the CPV proceeds to step 1342 where it prompts on operator to input on electricity rote vet factor. If the routine TO is selected the CPU proceeds to step 1344 (jig. EM where it prompts the oper~tsr to input a thermal conversion constant which is used for BTU eel-~ulations. Finally, if the operator selects the input routine TRY
the Pi proceeds to step 1346 (jig. 25M) where it prompts the operator to input a thermal rate cost figure which is stored and used or thermal energy BUT cost calculations. Upon completion of any of the four foregoing routines, the program proceeds to step 1200 (jig. AYE) of the OIL program.
It should be appreciated from the foregoing description that the present invention provides Q unique data gathering and transmitting system in which a central station is capable of cast-lye addressing each of the remote stations and each of the informal lion channels thereat by e simple sequential tone pulsing scheme Various types of sensors my be connected to the information channels at the remote stations, but the invention finds portico-far utility in measuring power consumption through an electrical path at the remote station by having at least one of the lines at each remote station connecter to a current sensor which provides current data to the central station. This current data is multi-plied by a voltage data which represents the voltage in the elect tribal path which is monitored by the current sensor to provide a consumed power value at the central station which con be stored and accumulated for information or billing purposes.
Although the invention his been described with reference to a specific embodiment, it should be understood that various modifications can be mode to the disclosed invention without de-parting from its spirit or scope. Accordingly, the invention isn't eon be considered as limited my the foregoing description but - 10~ -is only to be considered US limited by the claims which ore appended hereto.

Claims (22)

CLAIMS:

1 . A data communications system comprising:
at least one communications channel;
at least one group of remote stations connected to a respective communications channel, each remote station comprising a plurality of information channels and addressable means for selective and temporarily connecting one of said plurality of information channel, to a respective communications channel in ac-cordance with addressing signals received over a respective com-munication channel, a first temperature sensor connected to a first of said information channels and located so as to be affected by the flow of fluid in a fluid flow path, a second temperature sensor connected to a second of said imformation channels and located so as to be affected by said flow of fluid and located downstream of said first temperature sensor;
a central station commonly connected to each said communications channel and comprising means for sequentially sup-plying addressing signals to each said communications channel to cause sequential temporary connection of the information channels at said remote stations to a respective communications channel associated therewith, means for receiving the output signals from said first and second sensors when the respective information channels associated therewith are temporarily connected to respec-tive communications channel, and, means for calculating a fluid flow rate from said output signals.

2 . A data communications system as in claim 1, wherein said second temperature sensor comprises a temperature sensing device having an output signal which varies in accordance with a sensed temperature, a resistor thermally bonded to said temperature sensing device, and a voltage source connected across said resistor.

3 . A data communications system as in claim 2 , wherein said resistor and temperature sensing device are bonded together by a highly conductive material which forms a housing surrounding at least a portion of said resistor and said temperature sensing devise.

4 . A data communications system as in claim 1, wherein said calculating means comprises a processor means for determining the difference between the outputs of said first and second temperature sensors and for determining said fluid flow rate therefrom.

5 . A data communications system as in claim 4 , wherein said processor means stores a table of fluid flow rates verses temperature difference values and determines said fluid flow rate by looking up a determined temperature difference in said table to find the fluid flow rate corresponding thereto.

6 . A data communications system as in claim 3 , wherein said housing has an oval shape.

7 . A data communications system as in claim 3, wherin said second temperature sensor further comprises a metal layer surrounding said resistor, temperature sensing device and material housing.

8. A data communications system as in claim 5 , wherein said fluid flow is an air flow and said first and second temper-ature sensors are mounted in said air flow

9. A data communications system as in claim 5 , wherein said fluid flow is a liquid flow and at least said second temper-ature sensor is mounted in said liquid flow.

10 . A data communications system as in claim 1 wherein said fluid flow path is on the input side of a heat ex-changing device and wherein a third temperature sensor is con-nected to a third information channel and is located so as to be affected by siad flow of fluid as It exits from said heat exchange ing devise, said processor means further determining a BTU rate for said heat exchanging device from said determined flow rate and the outputs of said first and third temperature sensors.

11. A fluid flow measuring system comprising:
a first temperature sensor mounted to be affected by the flow of fluid in a fluid flow path;
a second temperature sensor mounted to be affected by said flow of fluid and located downstream of said first temper-ature sensor;
a means for receiving the output signals from said first and second temperature sensors, and calculating the dif-ference in temperature detected by said sensors and for deriving a fluid flow rate therefrom, and wherein said second temperature sensor comprises a temperature sensing device having an output signal which varies in accordance with a sensed temperature, a resistor thermally bonded to said temperature sensing device, and a voltage source connected across said resistor.

12. fluid flow measuring system as in claim 11, wherein said resistor and temperature sensing device are bonded together by a highly conductive sensing which forms a housing surrounding at least A portion of said resistor and said temper-ature sensing device.

13. A fluid flow measuring system as in claim 11, wherein said calculating and deriving means comprises a processor mean 3 .

14. A fluid flow measuring systim as in claim 11, wherein said processor means stores table of fluid flow rates versus temperature difference values and determines said fluid flow rate by looking up a determined temperature difference in said table to find the fluid flow rate corresponding thereto.

15 . A fluid flow measuring system as in claim 12 , wherein said housing has an oval shape.

16 . A fluid flow measuring system as in claim 12 , wherein said second temperature sensor further comprises a metal layer surrounding said resistors temperature sensing device and material housing.

17. A fluid flow measuring system as in claim 11, wherein said fluid flow is an air flow and said first and second temperature sensors are mounted in said air flow.

18 A fluid flow measuring system as in clam 11, wherein said fluid flow is a liquid flow and at least said second timprature sensor is mounted in said liquid flow.

19. A fluid flow measuring system as in claim 11 , wherein said fluid flow path is on the input side of heat ex-changing device and wherein a third temperature sensor is located so as to be affected by sad flow of fluid as it exits from said heat exchanging device, said processor further determining BTU
rate for said heat exchanging device from said determined flow rate and the outputs of said first and third timperature sensors.

20 . A data communications system as in claim 1, wherein said current sensor comprises a toroidal coil for surrounding a monitored electrical path, a first resistor connected across the output leads of said coil, a pair of back-to-back series connected Zener diodes connected in parallel with said first resistor, and second resistor connected in series between one end of the series connected Zener diodes and an output termi-nal.

21. A fluid flow measuring system comprising:
a first temperature sensor mounted to be affected by the flow of fluid in a flow path;
a second temperature sensor mounted to be affected by said flow of fluid and located downstream of said first temperature sensor;
a processor means for receiving output signals from said first and second temperature sensors, said processor means forming a difference value from the outputs of said first and second temperature sensors, said processor means storing a table of fluid flow rates verses temperature difference values for said temperature sensors and determining a fluid flow rate by lookinq up a determined temperature difference value in said table.

22. A fluid flow measuring system as in claim 21 wherein said processor means further stores calibration data re-lating to said temperature sensors which is combined with the output signals of said sensors in forming said difference value.