CA1206528A - Voice encryption and decryption system - Google Patents
Voice encryption and decryption systemInfo
- Publication number
- CA1206528A CA1206528A CA000442943A CA442943A CA1206528A CA 1206528 A CA1206528 A CA 1206528A CA 000442943 A CA000442943 A CA 000442943A CA 442943 A CA442943 A CA 442943A CA 1206528 A CA1206528 A CA 1206528A
- Authority
- CA
- Canada
- Prior art keywords
- signal
- discrete
- random number
- output signal
- generating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04K—SECRET COMMUNICATION; JAMMING OF COMMUNICATION
- H04K1/00—Secret communication
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04K—SECRET COMMUNICATION; JAMMING OF COMMUNICATION
- H04K1/00—Secret communication
- H04K1/04—Secret communication by frequency scrambling, i.e. by transposing or inverting parts of the frequency band or by inverting the whole band
Abstract
ABSTRACT
A random number sequence is generated and, in response to a discrete value produced from the sequence, an analog signal to be transmitted is scrambled to produce a first analog signal. The first analog signal and a second discrete signal produced by enciphering the random number sequence are combined, the composite signal being sent out to a receiver.
At the receiver, a procedure opposite to that performed by the transmitter for combining the first and second signals occurs to separate the first analog signal and the second discrete signal. Decryption opposite to the encryption at the transmitter proceeds in response to a discrete value which is produced from a signal provided by deciphering the second discrete signal.
A random number sequence is generated and, in response to a discrete value produced from the sequence, an analog signal to be transmitted is scrambled to produce a first analog signal. The first analog signal and a second discrete signal produced by enciphering the random number sequence are combined, the composite signal being sent out to a receiver.
At the receiver, a procedure opposite to that performed by the transmitter for combining the first and second signals occurs to separate the first analog signal and the second discrete signal. Decryption opposite to the encryption at the transmitter proceeds in response to a discrete value which is produced from a signal provided by deciphering the second discrete signal.
Description
~Z~65Z8 VOICE ENCRYPTION AND DECRYPTION SYSTEM
3ACK~ROUND OF THE INVENTION
The present invention relates to an encryption and decryption system which facilitates synchronization and, more particularly, to an encryption and decryption system for an analog signal.
For communications privacy, various encryption and decryption systems have heretofore been developed.
Particularly, numerous techniques are now available for encrypting and decrypting analog signals. While communications privacy may be insured if encryption or sarambling is applied to a signal to be transmitted in one mode or another, it is a prerequisite for a higher level of privacy to vary the scrambling parameter with respect to time. In order that a receiver may obtain the transmitted signal by decryption or descrambling, it has to perform decryption timed to the encryption which i~ varied at the transmitter with respect to time. Therefore, the receiver is required to set up synchronization with the transmitter.
Implementations heretofore proposed for the synchronization in analog signal encryption and decryp-tion include~ one described in the paper "A Voice Scrambler for Mobile Communication", IEEE Transactions on Vehicular Technology, Vol. VT-29, No. 1, pp. 81-86, 1980. In accordance with the system described in this paper, a synchronization signal is constantly transmit-ted from a transmitter to a receiver together with desired analog information. Because a synchronization . , -` iZ~65Z8 signal corresponds to the period of encryption, a higher level of privacy is unattainable unless the encryption occurs with a long period. This would consume a substantial period of time for setting up synchronization while requiring an intricate synchronizing circuitry.
SU~RY OF THE INVENTION
It is therefore an object of the present invention to provide a voice encryption and decryption system which eliminates the need for a synchronization signal and, thereby, a synchroniz-ing circuit.
It is another object of the present invention to providea voice encryption and decryption system which consumes a minimum of period of time for synchronization for enciphering.
It is ano~her object of the present invention to pro-vide a generally improved voice encryption and decryption system.
The present invention provides an analog signal encryp-tion and decryption system including a transmitter and a receiver, said transmitter comprising: random number sequence signal generator means for generating a random number sequence signal;
discrete value signal generator means for generating a discrete value signal by processing the random number sequence signal;
scrambler means for generating a scrambled analog information signal by scrambling an initial analog information signal to be transmitted in response to the discrete value signal; encipher-ing means for generating a discrete output signal by enciphering the random number sequence signal; and multiplexer means for ~.
` lZ6;~65Z8 -2a-generating a composite signal to be transmitted by multiplexing the scrambled analog information signal and the discrete output signal, said receiver being adapted to descramble said analog signal in response to the discrete signal and inversely to the scrambling by the scrambler means, whereby said system i5 operable without a separate synchronizing signal.
In accordance with the present invention, a random number sequence is generated and, in response . ~zc~G~%8 to a discrete value produced from the sequence, an analog signal to be transmitted is scrambled to produce a first analog signal. The first analog signal and a second discrete signal produced by enciphering the random number sequence are combined, the composite signal being sent out to a receiver. At the receiver, a procedure opposite to that performed by the trans-mitter for combining the first and second signals occurs to separate the first analog signal and the second discrete signal. Decryption opposite to the encryption at the transmitter proceeds in response to a discrete value which is produced from a signal provided by deciphering the second discrete signal.
The above and other objects, features and advantages of the present invention will become apparent from the following detailed description taken with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1 is a block diagram of an encrypting device forming part of a voice encryption and decryp-tion system embodying the present invention;
Figure 2 is a block diagram of a discrete number generator included in the encrypting device shown in Figure l;
Figure 3 is a block diagram of a decrypting device forming the other part of the system of the present inventiOn;
Figure 4 is a block diagram of a practical example of an enciphering circuit shown in Figure 1 and a deciphering circuit shown in Figure 3;
Figure 5 is a spectrum diagram demonstrating the operation of a multiplexer shown in Figure 1.
i26~6528 DESCRIPTION OF THE PREFERRED EMBODIMENT
While the voice encryption and decryption system of the present invention is susceptible of numerous physical embodiments, depending upon the environment and requirements of use, a substantial number of the herein shown and described embodiment have made, tested and used, and all have performed in an eminently satisfactory manner.
Referring to Figure 1 of the drawings, an encrypt-ing device forming part of the system of the presentinvention is shown. An analog signal supplied to an input terminal 10 is applied to a scrambler 12 to be scrambled thereby for secrecy. While various modes are available for the scrambling operation, there may be selected a system which divides an input voice signal into a plurality of sub-bands and then varies the order of the sub-bands. Scrambling with such a principle is practicable using, for example, a scrambler disclosed in U.S. Patent 4,278,840 (Morgan et al). Various combinations may be contemplated for the variation of the order of the sub-bands. Specific one of such combinations is selected by a signal which is produced by a discre*e number generator 16, which is connected to an output terminal of a random number sequence generator 18.
The discrete number generator 16 may be constructed as shown in Figure 2 by way of example. As shown, a random number sequence is supplied from the random number sequence generator 18 to an input terminal 20 of the discrete number generator 16. The random number sequence is sequentially entered into three stages 24, 26 and 28 of a shift register. Assuming a two-level signal as a random number sequence, eight different combinations are available with the discrete number generator 16 due to the use of three-stage :~Z(~6~ZB
shift register. In Figure 2, a conversion circuit 30 is adapted to generate a control signal at an output terminal 32 thereof in response to data stored in the shift register stages 24, 26 and 28, the control signal being applied to the scrambler 12.
Referring again to Figure l, part of the output signal of the random number sequence generator 18 is applied to an enciphering circuit 34 which may operate with the self-synchronized enciphering principle, as shown in Figure 4. In Figure 4, a random number sequence arrived at an input terminal 36 is applied to an adder 38 which performs modulo N addition. Also supplied to the adder 38 is an output signal of a function generator 40 which will be described later.
The summation output of the adder 38 appears at an output terminal 42. Simultaneously, part of the summation output is sequentially routed to shift register stages 44, 46 and 48. The function generator 40, therefore, produces a signal which is unconditionally determined by data stored in the shift register stages 44, 46 and 48. Detailed operation of the function generator 40 will not be described herein because it is well known in conjunction with enciphering techniques and the like.
Referring to Figure 3, there is shown a decrypting device which forms the other part of the system of the present invention. The decrypting device includes a deciphering circuit 50 the operation of which will be described with reference to Figure 4. In Figure 4, a code output from the enciphering circuit 34 is received at an input terminal 52 of the deciphering circuit 50. The input to the circuit 50 is partly applied sequentially to shift register stages 44', 46' and 48' while, at the same time, it is subtracted by an output of a function generator 40' by a subtracter 38'. The 12~6S28 function generator 40' is common in construction and operation to the previously described function generator 40. The output of the subtracter 38' is the same signal as one which is applied to the enciphering circuit 34. To facilitate understanding of such operation, assume a two-level (ZERO and ONE) signal system. Neglecting a signal delay for convenience, the shift register stages 44, 46 an~ 48 of the enciphering circuit 34 and the shift register stages 44', 46' and 48' of the deciphering circuit 50 store same values and, therefore, the outputs of the function generators 40 and 40' are identical.
This implies that a ZERO or a ONE is added to and subtracted from the signal which is applied to the input terminal 36 of the enciphering circuit 34.
As a result, a signal identical with the input signal to the enciphering circuit 34 appears at an output terminal 54 of the deciphering circuit 50. Therefore, if an eavesdropper succeeds to know an output signal of the enciphering circuit 34 , while the transmitter and receiver are in communica-tion, the original signal does not become intelligible to the eavesdropper unless the operation of the deciphering circuit 50, particularly that of the function generator 40' is known.
The enciphering circuit 34 and deciphering circuit 50 discussed above are individually operable with the prior art encrypting and decrypting principle.
Returning to Figure 1, the output of the scrambler 12 and that of the enciphering circuit 34 are combined together by a multiplexer 56. An output of the multiplexer 56 is transmitted to the receiver via an output terminal 58. The multiplexer 56 may be constructed to combine the two inputs 12~6SZ8 while separating them with respect to frequency axis, as shown in Figure 5. In Figure 5, a portion a represents a power spectrum of a scrambled analog signal and a portion _, a spectrum of a signal modulated by a enciphered discrete signal. It should be noted that the modulation is merely adapted to separate the frequency band and may be replaced by simple frequency translation. Another approach to combining the two inputs is the separation with respect to time axis~ The gist is that the combining method allows the receiver to separate the two signals from each other.
In the receiver shown in Figure 3, a demultiplexer 62 separates the signal coming in through an input terminal 60 into the scrambled analog signal and the discrete enciphered signal, which have been mixed at the transmitter. Where separat1on with respect to frequency axis shown in Figure 5 is employed at the transmitter, the demultiplexer 62 may be constructed using a low pass filter and a high pass filter, for example. If modulation by the discrete signal is employed at the transmitter as described, the demultiplexer 62 is ascumed to perform demodulation as well. The discrete enciphered signal is deciphered by the previously mentioned deciphering circuit 50 into the transmitted random number sequence.
The random number sequence is applied to a discrete number generator 64 an output of which is routed to a descrambler 66 as a control signal.
The discrete number generator 64 may operate in the same manner as the discrete number generator 16 by way of example. Data stored in the shift register stages 24, 26 and 28 are identical with those stored in the register stages in the evPnt of scrambling at the transmitter. What is required is, therefore, simply assigning lZ~65Z8 numerical values to the discrete number generators at the transmitter and receiver which cause the scrambled data to be returned to the original data by descrambling for common register data. The transmitted analog signal S is applied to an output terminal 68 as an output of the descrambler 66.
In summary, it will be seen that the present invention provides a voice encryption and decryption system ~hich eliminates the need for transmitting a synchronization signal because a transmitter in the system sends out discrete information used for scrambl-ing it, while a receiver descrambles it with information provided by deciphering the code. The omission of a synchronization signal renders time heretofore required for establishing synchronization and a synchronization circuit needless.
Because the synchronization is needlessl any desired random number sequence, even those derived from physical noise, are usable to promote the use of infinitely close keys.
Besides the shown and described method of encipher-ing a discrete signal, a synchronization type encipher-ing process is known in the art and such a process is also applicable to the present invention. In the synchronization type system, it is necessary to set up synchronization for deciphering. Nevertheless, no limitation is imposed on the random number sequence for encryption and the number of keys is not changed.
Further, the time period required by the system of the present invention for synchronization is shorter than one required by the conventional system because the input signal to an enciphering circuit is a random number sequence, which shortens the period of synchronization.
The random number generator in accordance with the :
lZ~S2~
present invention is not limited in any respect and may even use a data signal to be transmitted or a signal provided by enciphering the data signal. In such a case, the deciphering circuit at the receiver produces the incoming data signal so that data can be trans~itted in parallel with a conversation. While the prior art privaey system has transmitted a synehronization signal in the portion b in Figure 5, for example, wasting khat portion of the band, even such a band is effeetively usable for data transmission with the above-described design.
Various modifications will beeome possible for those skilled in the art after receiving the teaehings of the present disclosure without departing from the scope thereof.
3ACK~ROUND OF THE INVENTION
The present invention relates to an encryption and decryption system which facilitates synchronization and, more particularly, to an encryption and decryption system for an analog signal.
For communications privacy, various encryption and decryption systems have heretofore been developed.
Particularly, numerous techniques are now available for encrypting and decrypting analog signals. While communications privacy may be insured if encryption or sarambling is applied to a signal to be transmitted in one mode or another, it is a prerequisite for a higher level of privacy to vary the scrambling parameter with respect to time. In order that a receiver may obtain the transmitted signal by decryption or descrambling, it has to perform decryption timed to the encryption which i~ varied at the transmitter with respect to time. Therefore, the receiver is required to set up synchronization with the transmitter.
Implementations heretofore proposed for the synchronization in analog signal encryption and decryp-tion include~ one described in the paper "A Voice Scrambler for Mobile Communication", IEEE Transactions on Vehicular Technology, Vol. VT-29, No. 1, pp. 81-86, 1980. In accordance with the system described in this paper, a synchronization signal is constantly transmit-ted from a transmitter to a receiver together with desired analog information. Because a synchronization . , -` iZ~65Z8 signal corresponds to the period of encryption, a higher level of privacy is unattainable unless the encryption occurs with a long period. This would consume a substantial period of time for setting up synchronization while requiring an intricate synchronizing circuitry.
SU~RY OF THE INVENTION
It is therefore an object of the present invention to provide a voice encryption and decryption system which eliminates the need for a synchronization signal and, thereby, a synchroniz-ing circuit.
It is another object of the present invention to providea voice encryption and decryption system which consumes a minimum of period of time for synchronization for enciphering.
It is ano~her object of the present invention to pro-vide a generally improved voice encryption and decryption system.
The present invention provides an analog signal encryp-tion and decryption system including a transmitter and a receiver, said transmitter comprising: random number sequence signal generator means for generating a random number sequence signal;
discrete value signal generator means for generating a discrete value signal by processing the random number sequence signal;
scrambler means for generating a scrambled analog information signal by scrambling an initial analog information signal to be transmitted in response to the discrete value signal; encipher-ing means for generating a discrete output signal by enciphering the random number sequence signal; and multiplexer means for ~.
` lZ6;~65Z8 -2a-generating a composite signal to be transmitted by multiplexing the scrambled analog information signal and the discrete output signal, said receiver being adapted to descramble said analog signal in response to the discrete signal and inversely to the scrambling by the scrambler means, whereby said system i5 operable without a separate synchronizing signal.
In accordance with the present invention, a random number sequence is generated and, in response . ~zc~G~%8 to a discrete value produced from the sequence, an analog signal to be transmitted is scrambled to produce a first analog signal. The first analog signal and a second discrete signal produced by enciphering the random number sequence are combined, the composite signal being sent out to a receiver. At the receiver, a procedure opposite to that performed by the trans-mitter for combining the first and second signals occurs to separate the first analog signal and the second discrete signal. Decryption opposite to the encryption at the transmitter proceeds in response to a discrete value which is produced from a signal provided by deciphering the second discrete signal.
The above and other objects, features and advantages of the present invention will become apparent from the following detailed description taken with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1 is a block diagram of an encrypting device forming part of a voice encryption and decryp-tion system embodying the present invention;
Figure 2 is a block diagram of a discrete number generator included in the encrypting device shown in Figure l;
Figure 3 is a block diagram of a decrypting device forming the other part of the system of the present inventiOn;
Figure 4 is a block diagram of a practical example of an enciphering circuit shown in Figure 1 and a deciphering circuit shown in Figure 3;
Figure 5 is a spectrum diagram demonstrating the operation of a multiplexer shown in Figure 1.
i26~6528 DESCRIPTION OF THE PREFERRED EMBODIMENT
While the voice encryption and decryption system of the present invention is susceptible of numerous physical embodiments, depending upon the environment and requirements of use, a substantial number of the herein shown and described embodiment have made, tested and used, and all have performed in an eminently satisfactory manner.
Referring to Figure 1 of the drawings, an encrypt-ing device forming part of the system of the presentinvention is shown. An analog signal supplied to an input terminal 10 is applied to a scrambler 12 to be scrambled thereby for secrecy. While various modes are available for the scrambling operation, there may be selected a system which divides an input voice signal into a plurality of sub-bands and then varies the order of the sub-bands. Scrambling with such a principle is practicable using, for example, a scrambler disclosed in U.S. Patent 4,278,840 (Morgan et al). Various combinations may be contemplated for the variation of the order of the sub-bands. Specific one of such combinations is selected by a signal which is produced by a discre*e number generator 16, which is connected to an output terminal of a random number sequence generator 18.
The discrete number generator 16 may be constructed as shown in Figure 2 by way of example. As shown, a random number sequence is supplied from the random number sequence generator 18 to an input terminal 20 of the discrete number generator 16. The random number sequence is sequentially entered into three stages 24, 26 and 28 of a shift register. Assuming a two-level signal as a random number sequence, eight different combinations are available with the discrete number generator 16 due to the use of three-stage :~Z(~6~ZB
shift register. In Figure 2, a conversion circuit 30 is adapted to generate a control signal at an output terminal 32 thereof in response to data stored in the shift register stages 24, 26 and 28, the control signal being applied to the scrambler 12.
Referring again to Figure l, part of the output signal of the random number sequence generator 18 is applied to an enciphering circuit 34 which may operate with the self-synchronized enciphering principle, as shown in Figure 4. In Figure 4, a random number sequence arrived at an input terminal 36 is applied to an adder 38 which performs modulo N addition. Also supplied to the adder 38 is an output signal of a function generator 40 which will be described later.
The summation output of the adder 38 appears at an output terminal 42. Simultaneously, part of the summation output is sequentially routed to shift register stages 44, 46 and 48. The function generator 40, therefore, produces a signal which is unconditionally determined by data stored in the shift register stages 44, 46 and 48. Detailed operation of the function generator 40 will not be described herein because it is well known in conjunction with enciphering techniques and the like.
Referring to Figure 3, there is shown a decrypting device which forms the other part of the system of the present invention. The decrypting device includes a deciphering circuit 50 the operation of which will be described with reference to Figure 4. In Figure 4, a code output from the enciphering circuit 34 is received at an input terminal 52 of the deciphering circuit 50. The input to the circuit 50 is partly applied sequentially to shift register stages 44', 46' and 48' while, at the same time, it is subtracted by an output of a function generator 40' by a subtracter 38'. The 12~6S28 function generator 40' is common in construction and operation to the previously described function generator 40. The output of the subtracter 38' is the same signal as one which is applied to the enciphering circuit 34. To facilitate understanding of such operation, assume a two-level (ZERO and ONE) signal system. Neglecting a signal delay for convenience, the shift register stages 44, 46 an~ 48 of the enciphering circuit 34 and the shift register stages 44', 46' and 48' of the deciphering circuit 50 store same values and, therefore, the outputs of the function generators 40 and 40' are identical.
This implies that a ZERO or a ONE is added to and subtracted from the signal which is applied to the input terminal 36 of the enciphering circuit 34.
As a result, a signal identical with the input signal to the enciphering circuit 34 appears at an output terminal 54 of the deciphering circuit 50. Therefore, if an eavesdropper succeeds to know an output signal of the enciphering circuit 34 , while the transmitter and receiver are in communica-tion, the original signal does not become intelligible to the eavesdropper unless the operation of the deciphering circuit 50, particularly that of the function generator 40' is known.
The enciphering circuit 34 and deciphering circuit 50 discussed above are individually operable with the prior art encrypting and decrypting principle.
Returning to Figure 1, the output of the scrambler 12 and that of the enciphering circuit 34 are combined together by a multiplexer 56. An output of the multiplexer 56 is transmitted to the receiver via an output terminal 58. The multiplexer 56 may be constructed to combine the two inputs 12~6SZ8 while separating them with respect to frequency axis, as shown in Figure 5. In Figure 5, a portion a represents a power spectrum of a scrambled analog signal and a portion _, a spectrum of a signal modulated by a enciphered discrete signal. It should be noted that the modulation is merely adapted to separate the frequency band and may be replaced by simple frequency translation. Another approach to combining the two inputs is the separation with respect to time axis~ The gist is that the combining method allows the receiver to separate the two signals from each other.
In the receiver shown in Figure 3, a demultiplexer 62 separates the signal coming in through an input terminal 60 into the scrambled analog signal and the discrete enciphered signal, which have been mixed at the transmitter. Where separat1on with respect to frequency axis shown in Figure 5 is employed at the transmitter, the demultiplexer 62 may be constructed using a low pass filter and a high pass filter, for example. If modulation by the discrete signal is employed at the transmitter as described, the demultiplexer 62 is ascumed to perform demodulation as well. The discrete enciphered signal is deciphered by the previously mentioned deciphering circuit 50 into the transmitted random number sequence.
The random number sequence is applied to a discrete number generator 64 an output of which is routed to a descrambler 66 as a control signal.
The discrete number generator 64 may operate in the same manner as the discrete number generator 16 by way of example. Data stored in the shift register stages 24, 26 and 28 are identical with those stored in the register stages in the evPnt of scrambling at the transmitter. What is required is, therefore, simply assigning lZ~65Z8 numerical values to the discrete number generators at the transmitter and receiver which cause the scrambled data to be returned to the original data by descrambling for common register data. The transmitted analog signal S is applied to an output terminal 68 as an output of the descrambler 66.
In summary, it will be seen that the present invention provides a voice encryption and decryption system ~hich eliminates the need for transmitting a synchronization signal because a transmitter in the system sends out discrete information used for scrambl-ing it, while a receiver descrambles it with information provided by deciphering the code. The omission of a synchronization signal renders time heretofore required for establishing synchronization and a synchronization circuit needless.
Because the synchronization is needlessl any desired random number sequence, even those derived from physical noise, are usable to promote the use of infinitely close keys.
Besides the shown and described method of encipher-ing a discrete signal, a synchronization type encipher-ing process is known in the art and such a process is also applicable to the present invention. In the synchronization type system, it is necessary to set up synchronization for deciphering. Nevertheless, no limitation is imposed on the random number sequence for encryption and the number of keys is not changed.
Further, the time period required by the system of the present invention for synchronization is shorter than one required by the conventional system because the input signal to an enciphering circuit is a random number sequence, which shortens the period of synchronization.
The random number generator in accordance with the :
lZ~S2~
present invention is not limited in any respect and may even use a data signal to be transmitted or a signal provided by enciphering the data signal. In such a case, the deciphering circuit at the receiver produces the incoming data signal so that data can be trans~itted in parallel with a conversation. While the prior art privaey system has transmitted a synehronization signal in the portion b in Figure 5, for example, wasting khat portion of the band, even such a band is effeetively usable for data transmission with the above-described design.
Various modifications will beeome possible for those skilled in the art after receiving the teaehings of the present disclosure without departing from the scope thereof.
Claims (7)
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. An analog signal encryption and decryption system including a transmitter and a receiver, said transmitter comprising:
random number sequence signal generator means for generating a random number sequence signal;
discrete value signal generator means for generating a discrete value signal by processing the random number sequence signal;
scrambler means for generating a scrambled analog information signal by scrambling an initial analog information signal to be transmitted in response to the discrete value signal;
enciphering means for generating a discrete output signal by enciphering the random number sequence signal; and multiplexer means for generating a composite signal to be transmitted by multiplexing the scrambled analog information signal and the discrete output signal, said receiver being adapted to descramble said analog signal in response to the discrete signal and inversely to the scrambling by the scrambler means, whereby said system is operable without a separate synchronizing signal.
random number sequence signal generator means for generating a random number sequence signal;
discrete value signal generator means for generating a discrete value signal by processing the random number sequence signal;
scrambler means for generating a scrambled analog information signal by scrambling an initial analog information signal to be transmitted in response to the discrete value signal;
enciphering means for generating a discrete output signal by enciphering the random number sequence signal; and multiplexer means for generating a composite signal to be transmitted by multiplexing the scrambled analog information signal and the discrete output signal, said receiver being adapted to descramble said analog signal in response to the discrete signal and inversely to the scrambling by the scrambler means, whereby said system is operable without a separate synchronizing signal.
2. A system as claimed in claim 1, in which the random number sequence signal is formed from the analog information signal to be transmitted.
3. A system as claimed in claim 1, in which the random number sequence signal is produced from the scrambled analog information signal.
4. A system as claimed in claim 1, in which the discrete signal generator means comprises a shift register and a conversion circuit for - 10a -generating an output signal for controlling the scrambler means in response to data stored in said shift register.
5. A system as claimed in claim 1, in which the enciphering means comprises a shift register, a function generator for generating a function output signal which is determined by data in said shift register, and an adder for adding the function output signal and the random number sequence signal to each other.
6. A system as claimed in claim 1, in which the receiver comprises means for producing the scrambled analog information signal and the discrete output signal by separating the composite signal, deciphering means for producing a deciphered signal by deciphering the separated discrete output signal, discrete output signal generator means for producing a discrete output signal from the deciphered signal, and descrambler means for producing the initial analog information signal by descrambling the transmitted analog information signal in response to the discrete signal and inversely to the scrambling by the scrambler means.
7. A system as claimed in claim 6, in which the deciphering means comprises a shift register into which the separated discrete output signal is entered, a function generator for generating a function output signal which is determined by data stored in said shift register, and a subtracter for generating the deciphered signal by subtracting the function output signal from the separated discrete output signal.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JPP57-216709 | 1982-12-10 | ||
| JP21670982A JPS59107658A (en) | 1982-12-10 | 1982-12-10 | Method and apparatus of private talk |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1206528A true CA1206528A (en) | 1986-06-24 |
Family
ID=16692686
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000442943A Expired CA1206528A (en) | 1982-12-10 | 1983-12-09 | Voice encryption and decryption system |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JPS59107658A (en) |
| AU (1) | AU561204B2 (en) |
| CA (1) | CA1206528A (en) |
| GB (1) | GB2132857B (en) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2151886A (en) * | 1983-12-21 | 1985-07-24 | British Broadcasting Corp | Conditional-access broadcast transmission |
| US5351297A (en) * | 1991-06-28 | 1994-09-27 | Matsushita Electric Industrial Co., Ltd. | Method of privacy communication using elliptic curves |
| US5272755A (en) * | 1991-06-28 | 1993-12-21 | Matsushita Electric Industrial Co., Ltd. | Public key cryptosystem with an elliptic curve |
| US5442707A (en) * | 1992-09-28 | 1995-08-15 | Matsushita Electric Industrial Co., Ltd. | Method for generating and verifying electronic signatures and privacy communication using elliptic curves |
| US5712912A (en) * | 1995-07-28 | 1998-01-27 | Mytec Technologies Inc. | Method and apparatus for securely handling a personal identification number or cryptographic key using biometric techniques |
| US5541994A (en) * | 1994-09-07 | 1996-07-30 | Mytec Technologies Inc. | Fingerprint controlled public key cryptographic system |
| US5680460A (en) * | 1994-09-07 | 1997-10-21 | Mytec Technologies, Inc. | Biometric controlled key generation |
| US5740276A (en) * | 1995-07-27 | 1998-04-14 | Mytec Technologies Inc. | Holographic method for encrypting and decrypting information using a fingerprint |
| US6289314B1 (en) * | 1996-09-18 | 2001-09-11 | Matsushita Electric Industrial Co., Ltd. | Pay information providing system for descrambling information from plural sources and rescrambling the information before sending to a terminal or terminals |
| DE19715644A1 (en) * | 1997-04-15 | 1998-10-22 | Iks Gmbh Information Kommunika | Identity verification procedures |
| CA2203212A1 (en) | 1997-04-21 | 1998-10-21 | Vijayakumar Bhagavatula | Methodology for biometric encryption |
| KR100611955B1 (en) * | 1999-07-20 | 2006-08-11 | 삼성전자주식회사 | Scrambler |
| US7841539B2 (en) | 2007-02-15 | 2010-11-30 | Alfred Hewton | Smart card with random temporary account number generation |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4052565A (en) * | 1975-05-28 | 1977-10-04 | Martin Marietta Corporation | Walsh function signal scrambler |
| JPS5382101A (en) * | 1976-12-27 | 1978-07-20 | Nissin Electric Co Ltd | Method of transmitting signal |
| US4341925A (en) * | 1978-04-28 | 1982-07-27 | Nasa | Random digital encryption secure communication system |
| GB2042849B (en) * | 1979-02-20 | 1983-04-13 | Payview Ltd | Encoding of information |
| JPS56143744A (en) * | 1980-04-09 | 1981-11-09 | Nec Corp | Data interchanging system |
-
1982
- 1982-12-10 JP JP21670982A patent/JPS59107658A/en active Granted
-
1983
- 1983-12-09 CA CA000442943A patent/CA1206528A/en not_active Expired
- 1983-12-09 GB GB08332970A patent/GB2132857B/en not_active Expired
- 1983-12-09 AU AU22257/83A patent/AU561204B2/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| GB8332970D0 (en) | 1984-01-18 |
| GB2132857A (en) | 1984-07-11 |
| AU2225783A (en) | 1984-06-14 |
| JPH0527291B2 (en) | 1993-04-20 |
| GB2132857B (en) | 1986-09-03 |
| JPS59107658A (en) | 1984-06-21 |
| AU561204B2 (en) | 1987-04-30 |
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| MKEX | Expiry |