CA1051120A - Analog-digital converter - Google Patents
Analog-digital converterInfo
- Publication number
- CA1051120A CA1051120A CA220,877A CA220877A CA1051120A CA 1051120 A CA1051120 A CA 1051120A CA 220877 A CA220877 A CA 220877A CA 1051120 A CA1051120 A CA 1051120A
- Authority
- CA
- Canada
- Prior art keywords
- signal
- random noise
- amplitude
- analog
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/20—Increasing resolution using an n bit system to obtain n + m bits
- H03M1/201—Increasing resolution using an n bit system to obtain n + m bits by dithering
Abstract
Abstract Disclosed is an analog-digital converter comprising a reference random noise source capable of generating random noise signals at a rate of uniform occurrence probability density in a given range (e.g. a given voltage range), and an amplitude comparator circuit capable of comparing the amplitude of the random noise signal with that of a signal relevant to the analog signal to be converted. The converter operates on the principle that the number of pulses from the amplitude comparator circuit corresponds to the value of the analog signal.
Description
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The present invention relates to analog-digital converters of the type capable of converting an analog signal into a digital signal. The invention relates more particularly to an analog-digital converter using a reference random noise source which generates random noise signals at a rate of uniform occurrence probability density in a given range.
Prior art techniques have provided a variety of analog-digital con-verters, which operate on certainty phenomena. Conversely, there have been no analog-digital converters available to operate on uncertainty pheno~
mena by the use of a reference random noise source.
A principal object of the invention is to provide an analog-digital converter simple in construction and capable of operation with high resolu-tion and conversion accuracy.
Another object of the invention is to provide an analog-digital converter capable of operation free of influence due to noises such as com-mon mode noise and noise from power supply lines~
One analog-digital converter provided according to a preferred embodiment of the inventlon, as will hereinafter be described in detail, consists essentially of a reference random noise source capable of generat-ing random noise signals at a rate of uniform sccurrence probability density in a given range (e.g., a given voltage range), and an amplitude comparator circuit capable of comparing the amplitude of the random noise signal with that of a signal relevant to the analog signal to be converted. To provide ;;;
a digital signal from an analog signal given, the analog-digital ~onverter operates on the principle that the number of pulses from the amplitude com-parator circuit corresponds to the value of the analog signal.
According to another aspect of the invention, the analog-digital converter comprises a first amplitude comparator circuit capable of com-paring the amplitude of the random noise signal with that of an analog signal to be converted, and a second amplitude comparator circuit capable of .
The present invention relates to analog-digital converters of the type capable of converting an analog signal into a digital signal. The invention relates more particularly to an analog-digital converter using a reference random noise source which generates random noise signals at a rate of uniform occurrence probability density in a given range.
Prior art techniques have provided a variety of analog-digital con-verters, which operate on certainty phenomena. Conversely, there have been no analog-digital converters available to operate on uncertainty pheno~
mena by the use of a reference random noise source.
A principal object of the invention is to provide an analog-digital converter simple in construction and capable of operation with high resolu-tion and conversion accuracy.
Another object of the invention is to provide an analog-digital converter capable of operation free of influence due to noises such as com-mon mode noise and noise from power supply lines~
One analog-digital converter provided according to a preferred embodiment of the inventlon, as will hereinafter be described in detail, consists essentially of a reference random noise source capable of generat-ing random noise signals at a rate of uniform sccurrence probability density in a given range (e.g., a given voltage range), and an amplitude comparator circuit capable of comparing the amplitude of the random noise signal with that of a signal relevant to the analog signal to be converted. To provide ;;;
a digital signal from an analog signal given, the analog-digital ~onverter operates on the principle that the number of pulses from the amplitude com-parator circuit corresponds to the value of the analog signal.
According to another aspect of the invention, the analog-digital converter comprises a first amplitude comparator circuit capable of com-paring the amplitude of the random noise signal with that of an analog signal to be converted, and a second amplitude comparator circuit capable of .
2~3 comparing the amplitude of the random noise signal with that of the analog signal with its polarity inverted. Being constructed as above, this conver-ter operates on the principle that the difference between the number of out-put pulses from ~he first comparator circuit and that of output pulses from the second comparator circuit corresponds to the value of the signal to bc converted, thereby deriving a digital signal from the analog signal.
In accordance with one aspect of this invention, there is provided an analog-to-digital converter for converting an input analog signal into an output digital signal, comprising: reference random noise source means for generating random noise signals at a rate of uniform occurrence probability ~ -density in a given range; means for generating a triangular wave signal having an amplitude greater than the minimum amplitude increment of said random noise signal; a feed wire and return wire across which the analog signal to be converted is applied; amplitude comparator means for repeatedly comparing the amplitude of said random noise signal with that of the signal appearing on said feed wire and for supplying first output pulses in accord-ance with the comparisons, and for repeatedly comparing the amplitude of said random noise signal with that of the signal appearing on said return wire and for supplying second output pulses in accordance with the comparisons, the triangular wave signal being effectively superposed on one of the signals to be compared prior to the comparisons, and means responsive to the difference between the numbers of the first and second output pulses obtained from said amplitude comparator means to provide a digital output corresponding to the value of said analog signal to be converted.
In accordance with another aspect of this invention~ there is pro-vided an analog-to-digital converter for converting an input analog signal into an output digital signal3 comprising; reference random noise source means for generating random noise signals at a rate of uniform occurrence proba~ility density in a given range; second signal generator means for gen- ~ -~' `' ' , ~ -2-~5~
erating a second signal varying uniformly in a range greater than the minimum amplitude increment of said random noise signal; amplitude comparator means for repeatedly comparing the amplitude of the random noise signal from said reference random noise source means with the amplitude of a signal varying with the analog signal to be converted, the second signal being effectively superposed upon one of the signals to be compared prior to comparison, said amplitude comparison means supplying output pulses in accordance with the comparison; amd means responsive to the number of output pulses obtained from said amplitude comparator means for providing a digital output corresponding to the amplitude value of said analog signal to be converted.
In accordance with another aspect of this invention, there is pro~ .
vided an analog-to-digital converter for converting an input analog signal into an output digital signal, comprising: first reference random noise source means for generating a first random noise signal at a rate of uniform occurrence probability density in a given range; second random noise source :
means for generating a second random noise signal at a rate of uniform occur-rence probability density in a range greater than the minimum amplitude increment of said first random noise signal; a feed wi.re and a return wire .
across which the analog signal to be converted is applied; first adder means for adding up the signal appearing on said feed wire and the random noise sig-:, ..
nal from said second reference random noise source; second adder means for adding up the signal appearing on said return wire and the signa] from second random noise source; amplitude comparator means for repeatedly comparing the amplitude of the output from said first adder means with that of the random noise signal from said first reference random noise source, and for repeatedly comparing the amplitude of the output from said second adder means with that of the random noise signal from said first reference random noise source, and for supplying first and second trains of output pulses in accordance with the respective comparisons, and means responsive to the diference between -2a_ ~S~Z~
the numbers of pulses in the first and second trains of output pulses for providing a digital output corresponding to the value of the analog signal ~
to be converted. ~ :
In accordance with another aspect of this invention there is pro~
vided an analog-to-digital converter for converting an input analog signal ;~
into cm output digital signal, comprising: reference random noise source means for generating random noise signals at a rate of uniform occurrence probability density in a given range; a feeding wire and a return wire across which the analog signal to be converted is applied; first switch means for deriving signals alternately from said feed wire and said return wire on a time-sharing basis; triangular wave signal generator means for generating ;
a triangular wave signal with an amplitude greater than the minimum amplitude value of said random noise signal; amplitude comparator means for repeatedly ;
comparing the signal derived through said first switch with the sum of said triangular wave signal and said random noise signal and for supplying output pulses in accordance with the comparisons; an up-down counter ha~ing an up input terminal and a down input terminal; second switch means operated synchronously with said first switch means for switching the output pulses from said amplitude comparator into said up input terminal or said down input terminal; and display means for displaying~ an output signal corresponding to .
the value counted by said up-down counter.
The invention will now be further described in conjunction with the --accompanying drawings, in which:
Figures l to 4 are block diagrams showing one embodiment of the in-vention, Figure 5 is a diagram showing the waveform of a random noise used for the purpose of the invention, Figure 6A to 6C are diagrams showing how the converter shown in Figure 4 operates with no triangular wave signal applied, -2b-, 1~51~'~0 Figure 7 is a diagram showing a waveform useful for illustrating the operation of the triangl~ar wave signal generator shown in Figure 4~
Figures 8A to 8C are diagrams showing how the converter shown in Figure 4 operates with a triangular ware signal applied~
Figures 9 to 12 are block diagrams showing another embodiment of -the invention, Figures 13A and 13B are diagrams useful for illustrating the opera- . , tion of the converter shown in Figure 12~ .
Figure 14 and 15 are block diagrams showing another embodiment of the invention~
Figure 16 is a diagram showing an example of relationship between two random noise signals used for the converter shown in Figure 15, Figures 17 and 18 are diagrams useful for illustrating the operation of the converter shown in Figure 15, and Figure 19 is a block diagram showing still another embodiment of the `~
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in~ention.
With reference to Figure 1, one embodiment of the invention is illustrated in block form wherein the numeral 1 denotes an input terminal to which an analog signal Ex to be converted is applied, and 2 a reference random noise source capable of generating random noises at a rate of uniform occurrence probability density in a given range such as, for example, a voltage range of OV to ~ ~ V or -E ~ to + ~ MV. This noise source may be constituted, for example, of a digital-analog converter and an M-sequence noise generator which drives the digital-analog converter, or of a digital-analog converter and an L-sequence noise generator ~or an I-sequence noise generator)~ or of a noise diode or a thyratron circuit driven to generate a noise by discharge. The numerals 3 and 4 denote gate circuits, 5 a termin-al to which a clock pulse CP is applied, and 6 an amplitude comparator cir-cuit. The gate circuits are given clock pulses CP and thereby open their gates respectively. The amplitude comparator circuit 6 has one input ter-minal given through the gate circuit 3 a signal Ex which is to be converted, and the other input terminal given a reference random noise signal ER through -the gate circuit 4. The comparator circuit 6 compares the amplitudes of the two signals Ex and ~ with each other and generates a pulse train signal according to the compared result. The numeral 7 denotes a counter capable of cownting pulses from the amplitude comparator circuit 6, and 8 another counter capable of counting clock pulses CP, transferring the counted value n of the counter 7 to a display part 9, and at the same time clearing the data in the counter 7.
This converter operates in the following manner. First, the data in the co~mters 7 and 8 are cleared. When a clock pulse ~P is applied to the terminal 5, the gates 3 and 4 are opened, and the signal Ex to be conver-~ed and the reference random noise signal ER are ~pplied to the input ter-minal of the amplitude comparator 6. The counter 8 counts this clock pulse.
. .
- ~ . . . - .
~05~
The comparator 6 compares the two signals EX and ER with each other and generates an output pulse when Ex> ER. When Ex '- ~ , the comparator does not generate an output pulse. In other words, each time the gates 3 and ~ ~
are opened in response to the clock pulse given, a pulse signal appears a~ ~ -the output terminal of the comparator 6 according to the result of compar-ison of two signals Ex and ER. This output pulse is counted by the counter 7. The counter 8 receives the clock pulses CP and increases its count one by one in response to the clock pulses given. This operation continues un-til the count of the counter 8 reaches a predetermined value N. When the counter 8 counts the value N, the value n which has been counted by the counter 7 is transferred to the display part 9. Concurrently, the data in the counters 7 and 8 are cleared. A series of these operations is there - ;
after repeated.
Equation (1) below indicates the relationship between the signal Ex and the value shown on the display part, i.e., the value n reached by the counter 7 when the counter 8 counted the value N.
Ex = ~ x N ............. ~...... ~1) In eq. (1), EM stands for a maximum of a constant value assumed by -the ran-dom noise signal ~. In other words, the value n counted by the counter 7is proportional to the value of signal Ex, that is, the converter offers a digital signal having a constant relationship with the analog signal Ex.
Figures 2 and 3 shows modifications of the circuit shown in Figure 1. :
In Figure ~, only one gate circuit (instead of gate circuits 3 and 4 in Figure 1) is used between the amplitude comparator circuit 6 and the counter 7.
In Figure 3, the amplitude comparator circuit 6 is constituted of an adder comprising input resistors 61 and 62, a feedback resistor 63, and an operational 10~
amplifier 64; and a comparator 65 for comparing the output of the adder with zero potential. In this circuit, the signal Ex to be converted and the reference random noise signal ~ are added together and then compared with ~ -zero potential. A pulse is present or absent at the output terminal of the comparator 65 according to the values of Ex and ~ .
Referring to Figure 4, another embodiment of the invention is shown in block form wherein the numeral 1 denotes an input terminal to which an analog signal Ex to be converted is applied, and 2 a reference random noise source capable of generating random noise signals at a rate of uniform oc-currence probability density f in a range, for example, of -FRMV to + ~ MV
as shown in Figure 5. In this embodiment, the reference random noise source consists essentially of a clock pulse generator 21, an M-sequence signal generator 22 controlled by the clock pulse from the clock pulse generator 21, and a digital-analog converter 23 driven by the ~-sequence signal gen-erator 22. There is provided a triangular wave signal generator 3 which comprises a selector switch 31 for selecting either reference voltage +ES
or -Es7 an input resistor 32, a capacitor 33g an amplifier 3~, gate circuits 35 and 36, a comparator 37, and a selector switch 38 for selecting either voltage +nLSB or -nLSB from the reference random noise source 2. The re-sistor 32, capacitor 33 and amplifier 34 constitute an integrator 30 which integrat0s the reference voltage supplied through the switch 31. In the comparator 37, the output of the integrator supplied through the gate cir-cuit 35 is compared with the voltage +nLSB or -nkSB supplied from the re-ference random noise source 2 through the gate circuit 36 and selector switch 38. The comparator 37 drives the selector switGhes 31 and 38 according to the compared result. There is provided an amplitude comparator 60 which comprises inpu~ resistors 61, 62 and 63, a feedback resistor 64, and an operational amplifier 65. These resistors and amplifier constitute an adder which adds up the input signals supplied through the input resistors ~;
~3Sl~
61, 62 and 63 respectively. In Fi~lre 4, the numeral h6 denotes a compara-tor which compares the output from the adder with ~ero potential, 7 an up-down counter which colmts up or down the output pulse from the amplitude comparator 60, and 9 a display part which displays the digital signal from the up-down counter 7. The numeral 8 denotes a frequency divider (or a counter) which divides the period of the triangular wave signal in a ratio of 1/m (m: an arbitrary integer) and generates a signal for clearing data in the up-down counter 7 and in the display part 9.
This analog-digital converter will operate in the following manner.
First7 for explanatory simplicity, it is ass~ed that the converter has no triangular wave signal generator 3. Then, the amplitude comparator 60 re-ceives a random noise signal ER from the digital-analog converter 23 of the reference random noise source 2 through the input resistor 62, and a signal Ex through the input resistor 61. These signals are added together by the adder comprising the feedback resistor 64 and operational amplifier 65.
The added result is compared with zero potential by the comparator 66. The amplitude comparator 60 generates a bipolar pulse or no pulse as follows according to the values of two signals ER and Ex.
an up pulse output when ER + Ex ~ 0 no pulse output when ER + Ex = 0 a down pulse output when ER + Ex ~ 0 This output pulse is applied to the up-down counter 7, which in turn counts the pulses for a given period of time dependent on m times the period of the M-sequence signal from the M-sequence signal generator 22. The value thus counted is displayed on the display part 9. At the same time, the M-sequence signal is supplied to the frequency divider 8 from the M-sequence signal generator 22 as indicated by the dotted line. The frequency divider 8 div-ides the period of the M-sequence signal in a ratio of 1/m and generates a signal for clearing data in the up-down counter 7 and in the display part 9O
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The value counted by the co~mter 7 for a given period corresponds to the value of the signal Ex which is to be converted. The reason of this operation will be described by referring to Figures 6A to 6C. me dot (-) indicates an amplitllde value which the random noise signal ER can assume.
(~ote: The minimum amplitude value is represented by 'LSB'.) Figure 6A
shows the instance where Ex = 0, Figure 6B, the instance where Ex = LSB;
and Figure 6C, the instance where Ex = 1.31SB. In Figures 6A to 6C, the number of dots (-) above Ex corresponds to the number of up pulses~ while the number of dots below Ex correspands to *he number of down pulses. Hence ~ -the difference between the numbers of dots above and below Ex corresponds to the value of Ex. (The difference is 0 in Figure 6A, 10 in Figure 6B, , , and i5 in Figure 6C.) The up-down counter 7 counts this difference to make it possible to obtain a digital signal ha~ing a constant relationship with the signal Ex.
When Ex = 1.31SB (Figure 6C), the count value is as large as 15 and hence it is impossible to obtain a digital signal correctly converted from the signal Ex below the resolution (i.e., LSB) of the random noise gn R
~ ence, ;according to the embodiment of the invention illustrated in Figure 4, a triangular wave signal generator 3 is used to improve the ap-parent resolution (~SB) and conversion accuracy as well. The operation with ;
a triangular wave signal SE applied from the triangular wave signal genera-tor 3 will be described. The signal SE, as shown in Figure 7, is determined so that its amplitude value comes exactly in the width being an integral multiple of the value LSB of random noise signal ER~ that is, ~nlSB~ and that its period T equals an integral multiple of the cycle of commercial power source. The amplitude and period of the signal SE can be adjusted by chang-ing the integral time-cons~ant which depends on the value of power source voltage ~Es, the value of power source voltage -k~S~ and the values of ,:
.
l~Sl:~2(~
resistor 32 and cap~citor 33. In the triangular wave signal generator cir-cuit 3, two statuses are assumed; under the status A, the switch 31 is select-ed to the side of -~Es, and the switch 38 to the side of +nLSB; and under the status B, the switch 31 is selected to the side of -Es, and the s~itch 38 to the side of -nLSB~ The period o~ the clock pulse which controls open-ing and closing of the gate circuits 35 and 36 is assumed to be sufficiently smaller than that of the triangular wave signal SE.
Assume the status B in the triangular wave signal generator 3. Then, the triangular wave signal from the integrator 30 continues falling from its initial value as shown by (a) of Figure 7. The comparator 37 compares this signal with the reference voltage -nLSB which is constantly supplied from the digital-analog converter 23. At the timing of clock pulse CP im-mediately after the value of signal SE has become equal to the value of -nLSB, the comparator 37 causes the switch 3t to be selected to the side of +Es, and the switch 38 to the side of +n1SB~ thus causing the status B to be transferred to the status A. At the same time, the comparator resets the up-down counter 7 and the display part 9 through the frequency divider
In accordance with one aspect of this invention, there is provided an analog-to-digital converter for converting an input analog signal into an output digital signal, comprising: reference random noise source means for generating random noise signals at a rate of uniform occurrence probability ~ -density in a given range; means for generating a triangular wave signal having an amplitude greater than the minimum amplitude increment of said random noise signal; a feed wire and return wire across which the analog signal to be converted is applied; amplitude comparator means for repeatedly comparing the amplitude of said random noise signal with that of the signal appearing on said feed wire and for supplying first output pulses in accord-ance with the comparisons, and for repeatedly comparing the amplitude of said random noise signal with that of the signal appearing on said return wire and for supplying second output pulses in accordance with the comparisons, the triangular wave signal being effectively superposed on one of the signals to be compared prior to the comparisons, and means responsive to the difference between the numbers of the first and second output pulses obtained from said amplitude comparator means to provide a digital output corresponding to the value of said analog signal to be converted.
In accordance with another aspect of this invention~ there is pro-vided an analog-to-digital converter for converting an input analog signal into an output digital signal3 comprising; reference random noise source means for generating random noise signals at a rate of uniform occurrence proba~ility density in a given range; second signal generator means for gen- ~ -~' `' ' , ~ -2-~5~
erating a second signal varying uniformly in a range greater than the minimum amplitude increment of said random noise signal; amplitude comparator means for repeatedly comparing the amplitude of the random noise signal from said reference random noise source means with the amplitude of a signal varying with the analog signal to be converted, the second signal being effectively superposed upon one of the signals to be compared prior to comparison, said amplitude comparison means supplying output pulses in accordance with the comparison; amd means responsive to the number of output pulses obtained from said amplitude comparator means for providing a digital output corresponding to the amplitude value of said analog signal to be converted.
In accordance with another aspect of this invention, there is pro~ .
vided an analog-to-digital converter for converting an input analog signal into an output digital signal, comprising: first reference random noise source means for generating a first random noise signal at a rate of uniform occurrence probability density in a given range; second random noise source :
means for generating a second random noise signal at a rate of uniform occur-rence probability density in a range greater than the minimum amplitude increment of said first random noise signal; a feed wi.re and a return wire .
across which the analog signal to be converted is applied; first adder means for adding up the signal appearing on said feed wire and the random noise sig-:, ..
nal from said second reference random noise source; second adder means for adding up the signal appearing on said return wire and the signa] from second random noise source; amplitude comparator means for repeatedly comparing the amplitude of the output from said first adder means with that of the random noise signal from said first reference random noise source, and for repeatedly comparing the amplitude of the output from said second adder means with that of the random noise signal from said first reference random noise source, and for supplying first and second trains of output pulses in accordance with the respective comparisons, and means responsive to the diference between -2a_ ~S~Z~
the numbers of pulses in the first and second trains of output pulses for providing a digital output corresponding to the value of the analog signal ~
to be converted. ~ :
In accordance with another aspect of this invention there is pro~
vided an analog-to-digital converter for converting an input analog signal ;~
into cm output digital signal, comprising: reference random noise source means for generating random noise signals at a rate of uniform occurrence probability density in a given range; a feeding wire and a return wire across which the analog signal to be converted is applied; first switch means for deriving signals alternately from said feed wire and said return wire on a time-sharing basis; triangular wave signal generator means for generating ;
a triangular wave signal with an amplitude greater than the minimum amplitude value of said random noise signal; amplitude comparator means for repeatedly ;
comparing the signal derived through said first switch with the sum of said triangular wave signal and said random noise signal and for supplying output pulses in accordance with the comparisons; an up-down counter ha~ing an up input terminal and a down input terminal; second switch means operated synchronously with said first switch means for switching the output pulses from said amplitude comparator into said up input terminal or said down input terminal; and display means for displaying~ an output signal corresponding to .
the value counted by said up-down counter.
The invention will now be further described in conjunction with the --accompanying drawings, in which:
Figures l to 4 are block diagrams showing one embodiment of the in-vention, Figure 5 is a diagram showing the waveform of a random noise used for the purpose of the invention, Figure 6A to 6C are diagrams showing how the converter shown in Figure 4 operates with no triangular wave signal applied, -2b-, 1~51~'~0 Figure 7 is a diagram showing a waveform useful for illustrating the operation of the triangl~ar wave signal generator shown in Figure 4~
Figures 8A to 8C are diagrams showing how the converter shown in Figure 4 operates with a triangular ware signal applied~
Figures 9 to 12 are block diagrams showing another embodiment of -the invention, Figures 13A and 13B are diagrams useful for illustrating the opera- . , tion of the converter shown in Figure 12~ .
Figure 14 and 15 are block diagrams showing another embodiment of the invention~
Figure 16 is a diagram showing an example of relationship between two random noise signals used for the converter shown in Figure 15, Figures 17 and 18 are diagrams useful for illustrating the operation of the converter shown in Figure 15, and Figure 19 is a block diagram showing still another embodiment of the `~
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in~ention.
With reference to Figure 1, one embodiment of the invention is illustrated in block form wherein the numeral 1 denotes an input terminal to which an analog signal Ex to be converted is applied, and 2 a reference random noise source capable of generating random noises at a rate of uniform occurrence probability density in a given range such as, for example, a voltage range of OV to ~ ~ V or -E ~ to + ~ MV. This noise source may be constituted, for example, of a digital-analog converter and an M-sequence noise generator which drives the digital-analog converter, or of a digital-analog converter and an L-sequence noise generator ~or an I-sequence noise generator)~ or of a noise diode or a thyratron circuit driven to generate a noise by discharge. The numerals 3 and 4 denote gate circuits, 5 a termin-al to which a clock pulse CP is applied, and 6 an amplitude comparator cir-cuit. The gate circuits are given clock pulses CP and thereby open their gates respectively. The amplitude comparator circuit 6 has one input ter-minal given through the gate circuit 3 a signal Ex which is to be converted, and the other input terminal given a reference random noise signal ER through -the gate circuit 4. The comparator circuit 6 compares the amplitudes of the two signals Ex and ~ with each other and generates a pulse train signal according to the compared result. The numeral 7 denotes a counter capable of cownting pulses from the amplitude comparator circuit 6, and 8 another counter capable of counting clock pulses CP, transferring the counted value n of the counter 7 to a display part 9, and at the same time clearing the data in the counter 7.
This converter operates in the following manner. First, the data in the co~mters 7 and 8 are cleared. When a clock pulse ~P is applied to the terminal 5, the gates 3 and 4 are opened, and the signal Ex to be conver-~ed and the reference random noise signal ER are ~pplied to the input ter-minal of the amplitude comparator 6. The counter 8 counts this clock pulse.
. .
- ~ . . . - .
~05~
The comparator 6 compares the two signals EX and ER with each other and generates an output pulse when Ex> ER. When Ex '- ~ , the comparator does not generate an output pulse. In other words, each time the gates 3 and ~ ~
are opened in response to the clock pulse given, a pulse signal appears a~ ~ -the output terminal of the comparator 6 according to the result of compar-ison of two signals Ex and ER. This output pulse is counted by the counter 7. The counter 8 receives the clock pulses CP and increases its count one by one in response to the clock pulses given. This operation continues un-til the count of the counter 8 reaches a predetermined value N. When the counter 8 counts the value N, the value n which has been counted by the counter 7 is transferred to the display part 9. Concurrently, the data in the counters 7 and 8 are cleared. A series of these operations is there - ;
after repeated.
Equation (1) below indicates the relationship between the signal Ex and the value shown on the display part, i.e., the value n reached by the counter 7 when the counter 8 counted the value N.
Ex = ~ x N ............. ~...... ~1) In eq. (1), EM stands for a maximum of a constant value assumed by -the ran-dom noise signal ~. In other words, the value n counted by the counter 7is proportional to the value of signal Ex, that is, the converter offers a digital signal having a constant relationship with the analog signal Ex.
Figures 2 and 3 shows modifications of the circuit shown in Figure 1. :
In Figure ~, only one gate circuit (instead of gate circuits 3 and 4 in Figure 1) is used between the amplitude comparator circuit 6 and the counter 7.
In Figure 3, the amplitude comparator circuit 6 is constituted of an adder comprising input resistors 61 and 62, a feedback resistor 63, and an operational 10~
amplifier 64; and a comparator 65 for comparing the output of the adder with zero potential. In this circuit, the signal Ex to be converted and the reference random noise signal ~ are added together and then compared with ~ -zero potential. A pulse is present or absent at the output terminal of the comparator 65 according to the values of Ex and ~ .
Referring to Figure 4, another embodiment of the invention is shown in block form wherein the numeral 1 denotes an input terminal to which an analog signal Ex to be converted is applied, and 2 a reference random noise source capable of generating random noise signals at a rate of uniform oc-currence probability density f in a range, for example, of -FRMV to + ~ MV
as shown in Figure 5. In this embodiment, the reference random noise source consists essentially of a clock pulse generator 21, an M-sequence signal generator 22 controlled by the clock pulse from the clock pulse generator 21, and a digital-analog converter 23 driven by the ~-sequence signal gen-erator 22. There is provided a triangular wave signal generator 3 which comprises a selector switch 31 for selecting either reference voltage +ES
or -Es7 an input resistor 32, a capacitor 33g an amplifier 3~, gate circuits 35 and 36, a comparator 37, and a selector switch 38 for selecting either voltage +nLSB or -nLSB from the reference random noise source 2. The re-sistor 32, capacitor 33 and amplifier 34 constitute an integrator 30 which integrat0s the reference voltage supplied through the switch 31. In the comparator 37, the output of the integrator supplied through the gate cir-cuit 35 is compared with the voltage +nLSB or -nkSB supplied from the re-ference random noise source 2 through the gate circuit 36 and selector switch 38. The comparator 37 drives the selector switGhes 31 and 38 according to the compared result. There is provided an amplitude comparator 60 which comprises inpu~ resistors 61, 62 and 63, a feedback resistor 64, and an operational amplifier 65. These resistors and amplifier constitute an adder which adds up the input signals supplied through the input resistors ~;
~3Sl~
61, 62 and 63 respectively. In Fi~lre 4, the numeral h6 denotes a compara-tor which compares the output from the adder with ~ero potential, 7 an up-down counter which colmts up or down the output pulse from the amplitude comparator 60, and 9 a display part which displays the digital signal from the up-down counter 7. The numeral 8 denotes a frequency divider (or a counter) which divides the period of the triangular wave signal in a ratio of 1/m (m: an arbitrary integer) and generates a signal for clearing data in the up-down counter 7 and in the display part 9.
This analog-digital converter will operate in the following manner.
First7 for explanatory simplicity, it is ass~ed that the converter has no triangular wave signal generator 3. Then, the amplitude comparator 60 re-ceives a random noise signal ER from the digital-analog converter 23 of the reference random noise source 2 through the input resistor 62, and a signal Ex through the input resistor 61. These signals are added together by the adder comprising the feedback resistor 64 and operational amplifier 65.
The added result is compared with zero potential by the comparator 66. The amplitude comparator 60 generates a bipolar pulse or no pulse as follows according to the values of two signals ER and Ex.
an up pulse output when ER + Ex ~ 0 no pulse output when ER + Ex = 0 a down pulse output when ER + Ex ~ 0 This output pulse is applied to the up-down counter 7, which in turn counts the pulses for a given period of time dependent on m times the period of the M-sequence signal from the M-sequence signal generator 22. The value thus counted is displayed on the display part 9. At the same time, the M-sequence signal is supplied to the frequency divider 8 from the M-sequence signal generator 22 as indicated by the dotted line. The frequency divider 8 div-ides the period of the M-sequence signal in a ratio of 1/m and generates a signal for clearing data in the up-down counter 7 and in the display part 9O
l~S~
The value counted by the co~mter 7 for a given period corresponds to the value of the signal Ex which is to be converted. The reason of this operation will be described by referring to Figures 6A to 6C. me dot (-) indicates an amplitllde value which the random noise signal ER can assume.
(~ote: The minimum amplitude value is represented by 'LSB'.) Figure 6A
shows the instance where Ex = 0, Figure 6B, the instance where Ex = LSB;
and Figure 6C, the instance where Ex = 1.31SB. In Figures 6A to 6C, the number of dots (-) above Ex corresponds to the number of up pulses~ while the number of dots below Ex correspands to *he number of down pulses. Hence ~ -the difference between the numbers of dots above and below Ex corresponds to the value of Ex. (The difference is 0 in Figure 6A, 10 in Figure 6B, , , and i5 in Figure 6C.) The up-down counter 7 counts this difference to make it possible to obtain a digital signal ha~ing a constant relationship with the signal Ex.
When Ex = 1.31SB (Figure 6C), the count value is as large as 15 and hence it is impossible to obtain a digital signal correctly converted from the signal Ex below the resolution (i.e., LSB) of the random noise gn R
~ ence, ;according to the embodiment of the invention illustrated in Figure 4, a triangular wave signal generator 3 is used to improve the ap-parent resolution (~SB) and conversion accuracy as well. The operation with ;
a triangular wave signal SE applied from the triangular wave signal genera-tor 3 will be described. The signal SE, as shown in Figure 7, is determined so that its amplitude value comes exactly in the width being an integral multiple of the value LSB of random noise signal ER~ that is, ~nlSB~ and that its period T equals an integral multiple of the cycle of commercial power source. The amplitude and period of the signal SE can be adjusted by chang-ing the integral time-cons~ant which depends on the value of power source voltage ~Es, the value of power source voltage -k~S~ and the values of ,:
.
l~Sl:~2(~
resistor 32 and cap~citor 33. In the triangular wave signal generator cir-cuit 3, two statuses are assumed; under the status A, the switch 31 is select-ed to the side of -~Es, and the switch 38 to the side of +nLSB; and under the status B, the switch 31 is selected to the side of -Es, and the s~itch 38 to the side of -nLSB~ The period o~ the clock pulse which controls open-ing and closing of the gate circuits 35 and 36 is assumed to be sufficiently smaller than that of the triangular wave signal SE.
Assume the status B in the triangular wave signal generator 3. Then, the triangular wave signal from the integrator 30 continues falling from its initial value as shown by (a) of Figure 7. The comparator 37 compares this signal with the reference voltage -nLSB which is constantly supplied from the digital-analog converter 23. At the timing of clock pulse CP im-mediately after the value of signal SE has become equal to the value of -nLSB, the comparator 37 causes the switch 3t to be selected to the side of +Es, and the switch 38 to the side of +n1SB~ thus causing the status B to be transferred to the status A. At the same time, the comparator resets the up-down counter 7 and the display part 9 through the frequency divider
3. This makes measurement ready to start. In the status A, the triangular wave signal SE continues rising. The comparator 37 compares the value of this signal with the value of the reference voltage +nLSB whioh is constant-ly supplied ~rom the digital-analog converter 23. At the instant the trian-gular wave signal output SE reaches +nLSB, the status A is transferred to the status B by the output of the comparator 37. As a result, the triangular wave signal begins falling. In this manner, the statuses A and B come alter-natel~ and thus a triangular wave signal output with the amplitude +nLSB
is obtained at the output terminal of khe integrator 300 This triangular wave signal is then applied to the amplitude co~-parator 60 through the resistor 63. The adder comprising the feedback re sistor 64 and the operational amplifier 65 adds up the random noise signal ~05~
ER, the signal Ex to be converted, and the triangular wave signal SE. The comparator 66 compares the sun of these signals with zero potential. Then the amplitude comparator 60 generates a bipolar pulse or no pulse as follows according to the values of signals ~ , Ex and SE.
an up pulse output when ER + Ex + SE >0 no pulse output when ER + Ex + SE = 0 a down pulse output when ER+ Ex + SE < o These pulses are co~mted by the up-do~ counter 7 for a given period which depends on n times the period of the triangular wave signal~ The value counted is displayed on the display part 9.
The amplitude comparison operation with the use of signal SE ~rill ~ .
be described by referring to Figures 8A to 8C; 8A is the instance where Ex = 0; 8B, the instance where Ex = +ISB; and 8C, the instance where Ex = :
+1.3LSB.
When Ex = ~1.3LSB, the co~mt value is 1.3, which agrees with the value of the signal to be converted. In other words, the apparent resolu-tion can be increased without changing the minimum amplitude LSB of the random noise signal ~.
In this embodiment, the triangular wave signal generator is constit-uted of a circuit comprising the integrator 30 and the comparator 37. In-stead, the triangular wave signal generator may be constituted of a circuit capable of generating a triangular wave signal whose amplitude is larger than the minimum amplitude of the random noise signal ER.
Figures 9 and 10 show in block form another embodiment developed from the converter shown in Figure 1. In Figure 9, an analog signal Ex to be converted is applied between input terminals 1. An amplitude comparator ;
61 has one input terminal given the signal Ex through a gate circuit 31, and the other input terminal given a random noise signal ER from a refer-ence random noise source 2 through a gate circuit 33. The comparator 61 )5~
compares the amplitude of the signal Ex with that o~ the signal ER and generates a pulse train signal according to the compared result. An amp-litude comparator 62 has one input terminal given an inverted signal -Ex through a polarity inverter 30 and a gate circuit 32, and the other input terminal given a random noise signal ER through the gate circuit 33. The comparator 62 compares the amplitudes of the two signals -Ex and ER with each other and generates a pulse train signal according to the compared re-sult. When a clock pulse CP is applied to a terminal 50, the gates 31, 32 and 33 are opened in response to the clock pulse CP to cause the ampli-tude comparators 61 and 62 to generate or not to generate a pulse signalaccording to the value of signal Ex relati~e to ER, and signal -Ex relative to ER. The output pulse from the amplitude comparator 61, and the output pulse from the amplitude comparator 62 are counted by counters 71 and 72 respectively. The values n1 and n2 counted by the counters 71 and 72 re-spectively when a counter 80 counts to a predetermined value N are supplied to an up-down counter 9, which in turn counts the value (nl - n2) and dis-plays the result.
The relationships between the signal Ex to be converted and the count values nl and n2 reached by the counters 71 and 72 when the counter 80 counts to a given value N may be expressed by Eqs. (2) and ~3) below.
Ex + V = ~ .......................... (2) -Ex + V = ~ ......................... (3) where V represents the reference value of the random noise signal ER in-cluding common mode noise. From Eqs. ~2) and (3)g the following is derived.
n ~ ............................ .(4) As apparent from Eq. (4)~ the difference between the values nl and n2 co~ted by the counters 71 and 72, i.e., the value counted (or the value displayed) by the counter 7 is proportional to the value of the signal Ex to be con-verted. Thus a digital signal having a constant relationship with the , _ 10 --~s~
analog signal Ex can be obtained.
Figure 10 is a block diagram showing another embodiment of the invention. According to this embodiment, the output terminals of amplitude comparators 61 and 62 are connected respectively to the input terminals of exclusive 0~ circuit 44. The output terminal of this OR circuit is con-nected through a switch circuit 46 to the input terminal oE an up-down counter 9. There is provided an AND circuit 45 which receives outputs from the amplitude comparator 61 and OR circuit 44. The switch circuit 46 is con-trolled by the output signal from the AND circuit 45. In other words, the switch circuit 46 is operated so that an output pulse, when supplied from only the amplitude comparator 61, is applied to the up terminal 92 (i.e., the adding terminal) of the up-down counter 9, and that an output pulse, when supplied from only the amplitude comparator 62, is applied to the down terminal 92 (i.e.~ the subtracting terminal) of the up-down counter ~.
Thus, according to this embodiment, the counter 9 directly indicates the value (n1 - n2) comprised in Eq- (4).
In this embodiment, a triangular wave signal SE may be added to the signals Ex and -Ex like in the converter shown in Figure 4 whereby this embodiment will become able to offer the same effects as available with the converter shown in Figure 4.
Figure 11 shows in block form another embodiment of the invention wherein an analog signal to be converted is applied between a feed wire 13 and a return wire 14. An amplitude comparator 61 compares the amplitude of a signal Exl on the feed wire 13 with that of a random noise signal ER. An amplitude comparator 62 compares the amplitude of a signal Ex2 on the return wire 14 with that of a random noise signal ER. Thus, at the output termin-als of the comparators 61 and 62, a pulse signal is generated or not gen-erated according to the value of Ex1 + V relative to ER~ and a + v relative to ER (where V denotes a signal such as common mode noise).
~5~
In this converter, the relationships between the signal Ex to be converted and the values n1 and n2 counted by the counters 71 and 72 at the instant the co~mt by the counter 80 has reached the predetermined value N
can be expressed by the following equations.
Ex + V = ~1 ............................. (5) 0 + V = N ............................... (6) The following equation is derived from Eqs. ~5) and ~6).
Ex = ~ .................................. (7) As apparent from Eq. ~7)~ the difference between n1 and n2 which are the values counted by the counters 71 and 72~ that is, the value counted by the up-down counter 9, corresponds to the signal Ex which is to be converted.
Figure 12 shows in block form another embodiment of the invention developed from the one shown in Figure 11. In Figure 12, adders 41 and 42 are inserted into a feed wire 13 and a return wire 14 respectively~ and a triangular wave signal SE from a triangular wave signal generator 3 is super-posed on a signal Ex1 on the feed wire 13 and a signal Ex2 on the return wire 14. In this circuit, the construction of the triangular wave signal generator 3 and reference random noise source 2 is similar to that employed for the converter shown in Figure 4~ The output pulses from amplitude com-parators 61 and 62 are treated by a circuit similar to the one shown inFigure 10. men the analog signal given is digitally counted and displayed by the up-down oounter 9.
Figure 13A is a diagram useful for illustrating the operations of amplitude comparators 61 and 62. In Figure 13A, the dot ~-) represents an amplitude value which the random noise signal ER can assume (where LSB is the minimum amplitude value). The number of dots included in the area I
below the line Ex1 + SE -~ V corresponds to the number nl of pulses generated from the amplitude comparator 61. Similarly, the number of dots included in the area II below the line Ex2 + SE + V corresponds to the number n2 f . : . . . . . : : ....... .
pulses generated from the amplitude comparator 62. These relationships can be given as Ex1 -~ SE + V = n~ (8) Ex2 ~ SE + V = n2 ~ --(9) Then the following equation is derived from Eqs. (8) and (9).
Ex1 - Ex2 n1 2 -~ 10) In Figure 12~ when the signal Ex is applied between the terminals 11 and 12, the relationship Ex1 - Ex2 = Ex exists. Hence the signal Ex is proportional to the value n1 - n2. Thus a digital signal having a constant relationship with the signal Ex ~an be obtained from the up-down counter 9.
Figure 13B is a diagram useful for illustrating the operations of amplitude comparators 61 and 62 without the triangular wave signal SE super-posed on the signal Ex1 on the feeding wire and the signal Ex2 on the re-turn wire. In this case, when the signal Ex1 changes as indicated by the dotted line, this change does not appear as the change in the number of the output pulses if the change in the signal Ex1 is small such as, for example, below the value of minimum amplitude LSB of random noise signal ER. In other words, without the triangular wave signal SE applied, the conversion accuracy depends on the minimum amplitude value LSB of random noise signal R
In the converter of this embodiment, the triangular wave signal SE is superposed on both the signal Ex1 on the feeding wire and the signal Ex2 on the return wire. Therefore a slight change (as indicated by the dot-ted line) in the signal Ex1 appears as the change in the n~ber of dots, which in turn represents the change in the number of output pulses.
Therefore, according to this embodiment, an analog-digital converter operable with high resolution and conversion accuracy can be realized. In this converter, the signal Ex to be converted can be expressed in terms of the difference between the number of output pulses from the amplitude comparator 61 and that of output pulses from the amplitude comparator 62.
This makes it possible to realize an analog-digital converter operable free from time and temperature drift in the reference value of random noise sig-nal ER and in other constants of circuit elements, as well as from noises such as common mode noise.
Figure 14 shows another arrangement of the converter shown in ~igure 11. In this example, one amplitude comparator 60 is used in place of two amplitude comparators 61 and 621 The comparator 60 has one input terminal given the signal Ex1 on the feed wire 13 or the signal Ex2 on the return wire 1~ through a selector switch S1 and a gate circuit 31, and the other input terminal given the random noise signal ER from the reference random noise source 2 through a gate circuit 32. The comparator 60 compares the signal Exl or Ex2 with the signal ER and generates a pulse train signal according to the compared result. The selector switch S2 operates synchronously with the switch S1 to switch ~he output pulse of the comparator 60 into the co~ters 71 and 72. ;
Ihis converter is functionally similar to the one shown in Figure 11, excepting that the comparator 60 compares the signals Exl ¦EX2) with the signal ER on a time-sharing basis.
Figure 15 shows in block form another embodiment of the invention ~ -developed from the converter shown in Figure 14. In thîs example, an adder ADl is inserted into the feed wire 13, and an adder AD2 into the return wire 14. There are provided first and second reference random noise sources 201 and 202 capable of generating random noise signals ~ 1 and ER2 respec-tively. This converter operates in the following manner. The adder AD1 adds up the signal Exl applied to the terminal 11, the common mode noise V, and the random noise signal ER2 from the second reference random noise source 202, and generates the output Ex1 -t V -t ER2 over the feed wire 13'. ;~
Similarly, the adder AD2 adds up the signal Ex2 applied to the terminal 12, ~511~
the common mode noise V~ and the random noise signal ER2 from the second random noise source 202, and generates the output Ex2 + V + ER2 over the return wire 14'. Under the state where switches Sl and S2 are positioned at contact a (this state will hereinafter be referred to as "~irst phase~
the amplitude comparator 60 compares the signal on the feed wire 13' with the random noise signal ERl from the first reference random noise source 201. As a result of comparison, the comparator 60 generates an output pulse when Ex1 + V ~ ~ 2 ~ or does not generate an output pulse when Exl + V + ~ 2 ~- ~ 1 The up-down counter 9 counts (or adds up) the out-put pulses from the comparator 60. These operations continue until n num~bers of clock pulses are applied to a circuit 45 which drives the switches Sl and S2. The drive circuit 45, when given n numbers of clock pulses, drives the switches S1 and S2 to be positioned at contact b. (This state is referred to as "second phase".) In the second phase, the amplitude com-parator 60 compares the signal on the feed wire 14' with the random noise signal ~ 1- Then, as in the first phase, the comparator 60 generates an output pulse when Ex2 + ~ + ~ 2 ~ ~ 1' or does not generate an output pulse when Ex2 ~ V + ~ 2 ~ ~ 1 The up-down counter 9 counts (or subtracts) these output pulses. A series of these operations continue until n numbers of clock pulses are applied to the drive circuit 45 after the end of the first phase (after the start of the second phase~. In this manner, the first and second phases are repeated alternately. The repetition of the first and second phases continues until m numbers of clock pulses are applied to a frequency divider 81.
When m1 numbers of clock pulses are appl;ed to the frequency divider 81, the frequency divider sends a reset pulse to the up-down counter 9 where the difference nl - n2 between the two kinds of pulses generated in the first and second phases is displayed as the result of co~mt.
Equations (11) and (12) below indicate the relationships between the ` - ~
~s~
signal Ex to be converted and the total numbers nl and n2 of output pulses from the comparator 60 in the first and second phases respectively.
Exl + V + ER2 nl/ 1 ................ (11) Ex2 + V ~~ ER2 n2/ 1 ~ o~ (12) (where V represents a common mode noise) Because the signal Ex is applied between the feed wire 13 and the re-turn wire 14, the following equation is obtained by subtrating Eq. (12) from Eq. (11).
Ex Exl 2 ml ........................ ~13) As apparent from Eq. (13~, the difference, nl-n2, between the numbers of out-put pulses generated in the first and second phases, that is, the value counted by the up-down counter 9 for unit time length, has a constant re--lationship with the signal ~x. Thus a digital signal in a constant relation-ship with the signal Ex can be obtained without being affected by external causes such as common mode noise.
One noteworthy feature of this embodiment lies in that the random noise signal ER2 from the second reference random noise source 202 is sup-erposed on both the signal Exl on the feed wire 13 and the signal Ex2 on the return wire 14. This feature will be described in more detail. From the viewpoint of practical operation, the period of the clock pulse CP2 ;
which drives the M-sequence signal generator 22 of the second reference random noise source 202 is determined to be longer than that of the clock pulse CPl which drives the M-sequence signal generator 22 of the first reference random noise source 201. The frequency divider 82 divides the clock pulse from the clock pulse generator 21 in a ratio of 1/m2. By this arrangement, the frequency of the random noise signal ER2 from the second reference random noise source 202 is held low and the band-widths of the ;
adders ADl and AD2 are limited.
Figure 16 is a diagram useful for illustrating the relationship '' ,:
_ 16 -5~
between the random noise signal ~ 1 of the first reference random noise source 201 and the rando~ noise signal ~ 2 of the second reference random noise source 202. Figure 16 signifies the fact that the value of ~ 1 varies irregularly as often as m2 times from X11 to X1m2 for the period where the signal ~ 2 is in the value Xl. When the M-sequence signal is used for the generation of signals ~ 1 and ~ 2~ it is desirable that the ~I-sequence per-iods T1 and T2 be determined to be prime relative to each other in a practi-cal point of view~ In this case, the dividing ratio m1 of the frequency divider 81 is determined as follows with respect to the periods T1 and T2.
m1 = n.T1.T2/~ (n = 1,2,3,.--) where ~ denotes the periodof clock pulse CP
The operation without the random noise signal ER2 applied will be described by referring to Figure 18. The dot (.) indicates an amplitude value which the random noise signal ~ 1 can assume. The number of dots ;
below Exl+V corresponds to the number nl of the output pulses generated from the amplitude comparator 60 in the first phase. While the ~umber of dots below ~x2+V corresponds to the number n2 of the output pulses generated from the comparator 60 in the second phase. In other words, the difference, nl-n2, between the numbers of output pulses from the comparator 60 in the first and second phases corresponds to the value of the signal Ex to be con-verted.
If the value of the signal Ex changes as indicated by the dotted ;
line in the range below the resolution (minimum ~nplitude value) of the random noise signal ~ 1~ such change does not emerge as the change in the number of output pulses. In this event, it is impossible to convert the signal Ex into a digital signal with an accuracy higher than the resolution of the random noise signal.
In this embodiment, the second reference random noise source 202 is employed with the aim to improve the apparent resolution and conversion accuracy. More specifically, Figure 18 shows the illustration of operations where the random noise signal ~ 2 is applied from the second reference ran-dom noise source 202. As shown, Ex1 + ~ 2 + V and Ex2 + ER2 + V are the sig-nals centering Exl + V and Ex2 + V respectively. Thus, if small changes in the values Exl + V and Ex2 + V occur, such changes are picked up in terms of the change in the number of output pulses, to enable greater apparent resolution to be reali~ed.
This operation will be described by the use of Eq. (14) below. The signal F,x to be converted may be expressed by Eq. (14) when the circuit is ;
operated without the random noise signal ER2 applied from the second refer-ence random noise source 202.
Ex = (Ex1 + V) - (Ex2 + V) = n~d + r > 0 ............................ ...~14) n = 1,2,3, ....
d: the minimum amplitude value of ~ 1 -r: a fraction 0- r < d Wheraa~ with the random noise signal ER applied from the second re-ference random noise source 202, the converted value (or measured value) when ~ 2 = X is expressed as~
Measured Value = ~d ......................... (15) he e M [ + r + n~d ~ ~ l : Gauss' notation The value ~2 = X varies at a uniform amplitude in the range -d ~
X ' d. The measured Va~Ne reached after a given length of time or after a given number of comparison is provided in terms of mean value on X~ as ex-pressed by the following equation.
Measured Value =5 d ~d 2d dx = 1 ( 5 d r ndx + 5 d r (n+l)dx + 5 -r (n+ ) + S dr ndx~ ~ ................. o.~........ (16) ~ d + r J
~05~
As apparent from Eq. (16), the measured value incl~ldes a fraction r. In other words, with the signal ER2 applied, it becomes feasible to obtain the reading of a fraction r.
In Eq. (16~, when it is assumed that the value X which the signal ER2 can assume varies at a uniform amplitude in the range -~d - 2d ~- X c 2d +
~d. Then the measured value may be given in four ways as follows.
Measured Value = n*d + r+4+v~ {( ~+ P) (d - r) - ~d} .... o~(17) when 0 ~-~ _ 1 ~ d- ' -~ - d :
Measured Value = n~-d -~ r + 4~ + ~ - 1) (d - r)~ ............. ..... (18) when 1 ~ d ~- ~- 1, '-~ - d Measured Value = n*d + r ~ 4~ + ~) (d - r)-(~ )d+r~ O(19) when 0 _ ~ ' 1 ~ d~ d - ~
Measured Value = n~d + r + 4+~+~ -1) (d - r)- ~d + r~ ....(20) when 1 ~ -d - ~- 1, d G ~_ 1 In Eqs. (17) to (20)g the third term is the error term. Hence, to avoid allowing the error term to be dependent on the value to be measured (i.e., on the value r), the factor of r in the third term should be zero.
me following table shows the conditions where the factor of r assumes zero.
E conditions error term remarks qs. factor of r = 0 _ _ (17) ~+~ = 0 _ 4 ~ d error term = 0 _ _ . ~ . _ (18) ~+~ = 1 0 . . _ . ..
(19) ~+~= 1 O :
. _. _ . . ~ _ _ _ (20) +~ = 2 _ -- 6 (1 -~ )d error term 0 i By determining the range of ~2 to meet the above conditions, the error can be minimized or eliminated.
In this embodiment, the induction noise from commercial power sources ~s~z~
can readily be removed when the period of one measurement, i.eO, the period for resetting the up-down counter 9 is determ;ned to be an integral multiple of the period of commercial power source frequency.
Figure 19 shows in block form another embodiment of the invention wherein resistors lS and 16 are connected between input terminals 11 and 12, and the junction between these resistors is connected to a common line 17.
The signal Exl on the feed wire 13, and the signal Ex2 on the return wire 14 are derived through selector switch Sl and amplified by an amplifier 40, and then applied to one input terminal of amplitude comparator 60. The triangular wave signal SE from the triangular wave signal generator 3 is added in series to the random noise signal ER from the reference random noise source 2. The resultant signal is applied to the other input terminal of the amplitude comparator 60. The output of the comparator 60 is supplied to either the up terminal or the down terminal of the up-down counter 9 through the selector switch S2. The amplitude comparator 60 is operated in the same manner as one shown in Figure 15. The operation that the triangu-lar wave signal SE is applied in series to the random noise signal ER, and the effects of such operation are similar to those available with the conver-ter shown in Figure 4 or 12.
While the principles of the inverltion have been described above in connection with specific embodiments, and particular modifications thereof, it is to be understood that this description is made only by way of example and not as a limitation on the scope of the invention. ~ -, .
' ,. . : . . - ., ~ . . : : ,
is obtained at the output terminal of khe integrator 300 This triangular wave signal is then applied to the amplitude co~-parator 60 through the resistor 63. The adder comprising the feedback re sistor 64 and the operational amplifier 65 adds up the random noise signal ~05~
ER, the signal Ex to be converted, and the triangular wave signal SE. The comparator 66 compares the sun of these signals with zero potential. Then the amplitude comparator 60 generates a bipolar pulse or no pulse as follows according to the values of signals ~ , Ex and SE.
an up pulse output when ER + Ex + SE >0 no pulse output when ER + Ex + SE = 0 a down pulse output when ER+ Ex + SE < o These pulses are co~mted by the up-do~ counter 7 for a given period which depends on n times the period of the triangular wave signal~ The value counted is displayed on the display part 9.
The amplitude comparison operation with the use of signal SE ~rill ~ .
be described by referring to Figures 8A to 8C; 8A is the instance where Ex = 0; 8B, the instance where Ex = +ISB; and 8C, the instance where Ex = :
+1.3LSB.
When Ex = ~1.3LSB, the co~mt value is 1.3, which agrees with the value of the signal to be converted. In other words, the apparent resolu-tion can be increased without changing the minimum amplitude LSB of the random noise signal ~.
In this embodiment, the triangular wave signal generator is constit-uted of a circuit comprising the integrator 30 and the comparator 37. In-stead, the triangular wave signal generator may be constituted of a circuit capable of generating a triangular wave signal whose amplitude is larger than the minimum amplitude of the random noise signal ER.
Figures 9 and 10 show in block form another embodiment developed from the converter shown in Figure 1. In Figure 9, an analog signal Ex to be converted is applied between input terminals 1. An amplitude comparator ;
61 has one input terminal given the signal Ex through a gate circuit 31, and the other input terminal given a random noise signal ER from a refer-ence random noise source 2 through a gate circuit 33. The comparator 61 )5~
compares the amplitude of the signal Ex with that o~ the signal ER and generates a pulse train signal according to the compared result. An amp-litude comparator 62 has one input terminal given an inverted signal -Ex through a polarity inverter 30 and a gate circuit 32, and the other input terminal given a random noise signal ER through the gate circuit 33. The comparator 62 compares the amplitudes of the two signals -Ex and ER with each other and generates a pulse train signal according to the compared re-sult. When a clock pulse CP is applied to a terminal 50, the gates 31, 32 and 33 are opened in response to the clock pulse CP to cause the ampli-tude comparators 61 and 62 to generate or not to generate a pulse signalaccording to the value of signal Ex relati~e to ER, and signal -Ex relative to ER. The output pulse from the amplitude comparator 61, and the output pulse from the amplitude comparator 62 are counted by counters 71 and 72 respectively. The values n1 and n2 counted by the counters 71 and 72 re-spectively when a counter 80 counts to a predetermined value N are supplied to an up-down counter 9, which in turn counts the value (nl - n2) and dis-plays the result.
The relationships between the signal Ex to be converted and the count values nl and n2 reached by the counters 71 and 72 when the counter 80 counts to a given value N may be expressed by Eqs. (2) and ~3) below.
Ex + V = ~ .......................... (2) -Ex + V = ~ ......................... (3) where V represents the reference value of the random noise signal ER in-cluding common mode noise. From Eqs. ~2) and (3)g the following is derived.
n ~ ............................ .(4) As apparent from Eq. (4)~ the difference between the values nl and n2 co~ted by the counters 71 and 72, i.e., the value counted (or the value displayed) by the counter 7 is proportional to the value of the signal Ex to be con-verted. Thus a digital signal having a constant relationship with the , _ 10 --~s~
analog signal Ex can be obtained.
Figure 10 is a block diagram showing another embodiment of the invention. According to this embodiment, the output terminals of amplitude comparators 61 and 62 are connected respectively to the input terminals of exclusive 0~ circuit 44. The output terminal of this OR circuit is con-nected through a switch circuit 46 to the input terminal oE an up-down counter 9. There is provided an AND circuit 45 which receives outputs from the amplitude comparator 61 and OR circuit 44. The switch circuit 46 is con-trolled by the output signal from the AND circuit 45. In other words, the switch circuit 46 is operated so that an output pulse, when supplied from only the amplitude comparator 61, is applied to the up terminal 92 (i.e., the adding terminal) of the up-down counter 9, and that an output pulse, when supplied from only the amplitude comparator 62, is applied to the down terminal 92 (i.e.~ the subtracting terminal) of the up-down counter ~.
Thus, according to this embodiment, the counter 9 directly indicates the value (n1 - n2) comprised in Eq- (4).
In this embodiment, a triangular wave signal SE may be added to the signals Ex and -Ex like in the converter shown in Figure 4 whereby this embodiment will become able to offer the same effects as available with the converter shown in Figure 4.
Figure 11 shows in block form another embodiment of the invention wherein an analog signal to be converted is applied between a feed wire 13 and a return wire 14. An amplitude comparator 61 compares the amplitude of a signal Exl on the feed wire 13 with that of a random noise signal ER. An amplitude comparator 62 compares the amplitude of a signal Ex2 on the return wire 14 with that of a random noise signal ER. Thus, at the output termin-als of the comparators 61 and 62, a pulse signal is generated or not gen-erated according to the value of Ex1 + V relative to ER~ and a + v relative to ER (where V denotes a signal such as common mode noise).
~5~
In this converter, the relationships between the signal Ex to be converted and the values n1 and n2 counted by the counters 71 and 72 at the instant the co~mt by the counter 80 has reached the predetermined value N
can be expressed by the following equations.
Ex + V = ~1 ............................. (5) 0 + V = N ............................... (6) The following equation is derived from Eqs. ~5) and ~6).
Ex = ~ .................................. (7) As apparent from Eq. ~7)~ the difference between n1 and n2 which are the values counted by the counters 71 and 72~ that is, the value counted by the up-down counter 9, corresponds to the signal Ex which is to be converted.
Figure 12 shows in block form another embodiment of the invention developed from the one shown in Figure 11. In Figure 12, adders 41 and 42 are inserted into a feed wire 13 and a return wire 14 respectively~ and a triangular wave signal SE from a triangular wave signal generator 3 is super-posed on a signal Ex1 on the feed wire 13 and a signal Ex2 on the return wire 14. In this circuit, the construction of the triangular wave signal generator 3 and reference random noise source 2 is similar to that employed for the converter shown in Figure 4~ The output pulses from amplitude com-parators 61 and 62 are treated by a circuit similar to the one shown inFigure 10. men the analog signal given is digitally counted and displayed by the up-down oounter 9.
Figure 13A is a diagram useful for illustrating the operations of amplitude comparators 61 and 62. In Figure 13A, the dot ~-) represents an amplitude value which the random noise signal ER can assume (where LSB is the minimum amplitude value). The number of dots included in the area I
below the line Ex1 + SE -~ V corresponds to the number nl of pulses generated from the amplitude comparator 61. Similarly, the number of dots included in the area II below the line Ex2 + SE + V corresponds to the number n2 f . : . . . . . : : ....... .
pulses generated from the amplitude comparator 62. These relationships can be given as Ex1 -~ SE + V = n~ (8) Ex2 ~ SE + V = n2 ~ --(9) Then the following equation is derived from Eqs. (8) and (9).
Ex1 - Ex2 n1 2 -~ 10) In Figure 12~ when the signal Ex is applied between the terminals 11 and 12, the relationship Ex1 - Ex2 = Ex exists. Hence the signal Ex is proportional to the value n1 - n2. Thus a digital signal having a constant relationship with the signal Ex ~an be obtained from the up-down counter 9.
Figure 13B is a diagram useful for illustrating the operations of amplitude comparators 61 and 62 without the triangular wave signal SE super-posed on the signal Ex1 on the feeding wire and the signal Ex2 on the re-turn wire. In this case, when the signal Ex1 changes as indicated by the dotted line, this change does not appear as the change in the number of the output pulses if the change in the signal Ex1 is small such as, for example, below the value of minimum amplitude LSB of random noise signal ER. In other words, without the triangular wave signal SE applied, the conversion accuracy depends on the minimum amplitude value LSB of random noise signal R
In the converter of this embodiment, the triangular wave signal SE is superposed on both the signal Ex1 on the feeding wire and the signal Ex2 on the return wire. Therefore a slight change (as indicated by the dot-ted line) in the signal Ex1 appears as the change in the n~ber of dots, which in turn represents the change in the number of output pulses.
Therefore, according to this embodiment, an analog-digital converter operable with high resolution and conversion accuracy can be realized. In this converter, the signal Ex to be converted can be expressed in terms of the difference between the number of output pulses from the amplitude comparator 61 and that of output pulses from the amplitude comparator 62.
This makes it possible to realize an analog-digital converter operable free from time and temperature drift in the reference value of random noise sig-nal ER and in other constants of circuit elements, as well as from noises such as common mode noise.
Figure 14 shows another arrangement of the converter shown in ~igure 11. In this example, one amplitude comparator 60 is used in place of two amplitude comparators 61 and 621 The comparator 60 has one input terminal given the signal Ex1 on the feed wire 13 or the signal Ex2 on the return wire 1~ through a selector switch S1 and a gate circuit 31, and the other input terminal given the random noise signal ER from the reference random noise source 2 through a gate circuit 32. The comparator 60 compares the signal Exl or Ex2 with the signal ER and generates a pulse train signal according to the compared result. The selector switch S2 operates synchronously with the switch S1 to switch ~he output pulse of the comparator 60 into the co~ters 71 and 72. ;
Ihis converter is functionally similar to the one shown in Figure 11, excepting that the comparator 60 compares the signals Exl ¦EX2) with the signal ER on a time-sharing basis.
Figure 15 shows in block form another embodiment of the invention ~ -developed from the converter shown in Figure 14. In thîs example, an adder ADl is inserted into the feed wire 13, and an adder AD2 into the return wire 14. There are provided first and second reference random noise sources 201 and 202 capable of generating random noise signals ~ 1 and ER2 respec-tively. This converter operates in the following manner. The adder AD1 adds up the signal Exl applied to the terminal 11, the common mode noise V, and the random noise signal ER2 from the second reference random noise source 202, and generates the output Ex1 -t V -t ER2 over the feed wire 13'. ;~
Similarly, the adder AD2 adds up the signal Ex2 applied to the terminal 12, ~511~
the common mode noise V~ and the random noise signal ER2 from the second random noise source 202, and generates the output Ex2 + V + ER2 over the return wire 14'. Under the state where switches Sl and S2 are positioned at contact a (this state will hereinafter be referred to as "~irst phase~
the amplitude comparator 60 compares the signal on the feed wire 13' with the random noise signal ERl from the first reference random noise source 201. As a result of comparison, the comparator 60 generates an output pulse when Ex1 + V ~ ~ 2 ~ or does not generate an output pulse when Exl + V + ~ 2 ~- ~ 1 The up-down counter 9 counts (or adds up) the out-put pulses from the comparator 60. These operations continue until n num~bers of clock pulses are applied to a circuit 45 which drives the switches Sl and S2. The drive circuit 45, when given n numbers of clock pulses, drives the switches S1 and S2 to be positioned at contact b. (This state is referred to as "second phase".) In the second phase, the amplitude com-parator 60 compares the signal on the feed wire 14' with the random noise signal ~ 1- Then, as in the first phase, the comparator 60 generates an output pulse when Ex2 + ~ + ~ 2 ~ ~ 1' or does not generate an output pulse when Ex2 ~ V + ~ 2 ~ ~ 1 The up-down counter 9 counts (or subtracts) these output pulses. A series of these operations continue until n numbers of clock pulses are applied to the drive circuit 45 after the end of the first phase (after the start of the second phase~. In this manner, the first and second phases are repeated alternately. The repetition of the first and second phases continues until m numbers of clock pulses are applied to a frequency divider 81.
When m1 numbers of clock pulses are appl;ed to the frequency divider 81, the frequency divider sends a reset pulse to the up-down counter 9 where the difference nl - n2 between the two kinds of pulses generated in the first and second phases is displayed as the result of co~mt.
Equations (11) and (12) below indicate the relationships between the ` - ~
~s~
signal Ex to be converted and the total numbers nl and n2 of output pulses from the comparator 60 in the first and second phases respectively.
Exl + V + ER2 nl/ 1 ................ (11) Ex2 + V ~~ ER2 n2/ 1 ~ o~ (12) (where V represents a common mode noise) Because the signal Ex is applied between the feed wire 13 and the re-turn wire 14, the following equation is obtained by subtrating Eq. (12) from Eq. (11).
Ex Exl 2 ml ........................ ~13) As apparent from Eq. (13~, the difference, nl-n2, between the numbers of out-put pulses generated in the first and second phases, that is, the value counted by the up-down counter 9 for unit time length, has a constant re--lationship with the signal ~x. Thus a digital signal in a constant relation-ship with the signal Ex can be obtained without being affected by external causes such as common mode noise.
One noteworthy feature of this embodiment lies in that the random noise signal ER2 from the second reference random noise source 202 is sup-erposed on both the signal Exl on the feed wire 13 and the signal Ex2 on the return wire 14. This feature will be described in more detail. From the viewpoint of practical operation, the period of the clock pulse CP2 ;
which drives the M-sequence signal generator 22 of the second reference random noise source 202 is determined to be longer than that of the clock pulse CPl which drives the M-sequence signal generator 22 of the first reference random noise source 201. The frequency divider 82 divides the clock pulse from the clock pulse generator 21 in a ratio of 1/m2. By this arrangement, the frequency of the random noise signal ER2 from the second reference random noise source 202 is held low and the band-widths of the ;
adders ADl and AD2 are limited.
Figure 16 is a diagram useful for illustrating the relationship '' ,:
_ 16 -5~
between the random noise signal ~ 1 of the first reference random noise source 201 and the rando~ noise signal ~ 2 of the second reference random noise source 202. Figure 16 signifies the fact that the value of ~ 1 varies irregularly as often as m2 times from X11 to X1m2 for the period where the signal ~ 2 is in the value Xl. When the M-sequence signal is used for the generation of signals ~ 1 and ~ 2~ it is desirable that the ~I-sequence per-iods T1 and T2 be determined to be prime relative to each other in a practi-cal point of view~ In this case, the dividing ratio m1 of the frequency divider 81 is determined as follows with respect to the periods T1 and T2.
m1 = n.T1.T2/~ (n = 1,2,3,.--) where ~ denotes the periodof clock pulse CP
The operation without the random noise signal ER2 applied will be described by referring to Figure 18. The dot (.) indicates an amplitude value which the random noise signal ~ 1 can assume. The number of dots ;
below Exl+V corresponds to the number nl of the output pulses generated from the amplitude comparator 60 in the first phase. While the ~umber of dots below ~x2+V corresponds to the number n2 of the output pulses generated from the comparator 60 in the second phase. In other words, the difference, nl-n2, between the numbers of output pulses from the comparator 60 in the first and second phases corresponds to the value of the signal Ex to be con-verted.
If the value of the signal Ex changes as indicated by the dotted ;
line in the range below the resolution (minimum ~nplitude value) of the random noise signal ~ 1~ such change does not emerge as the change in the number of output pulses. In this event, it is impossible to convert the signal Ex into a digital signal with an accuracy higher than the resolution of the random noise signal.
In this embodiment, the second reference random noise source 202 is employed with the aim to improve the apparent resolution and conversion accuracy. More specifically, Figure 18 shows the illustration of operations where the random noise signal ~ 2 is applied from the second reference ran-dom noise source 202. As shown, Ex1 + ~ 2 + V and Ex2 + ER2 + V are the sig-nals centering Exl + V and Ex2 + V respectively. Thus, if small changes in the values Exl + V and Ex2 + V occur, such changes are picked up in terms of the change in the number of output pulses, to enable greater apparent resolution to be reali~ed.
This operation will be described by the use of Eq. (14) below. The signal F,x to be converted may be expressed by Eq. (14) when the circuit is ;
operated without the random noise signal ER2 applied from the second refer-ence random noise source 202.
Ex = (Ex1 + V) - (Ex2 + V) = n~d + r > 0 ............................ ...~14) n = 1,2,3, ....
d: the minimum amplitude value of ~ 1 -r: a fraction 0- r < d Wheraa~ with the random noise signal ER applied from the second re-ference random noise source 202, the converted value (or measured value) when ~ 2 = X is expressed as~
Measured Value = ~d ......................... (15) he e M [ + r + n~d ~ ~ l : Gauss' notation The value ~2 = X varies at a uniform amplitude in the range -d ~
X ' d. The measured Va~Ne reached after a given length of time or after a given number of comparison is provided in terms of mean value on X~ as ex-pressed by the following equation.
Measured Value =5 d ~d 2d dx = 1 ( 5 d r ndx + 5 d r (n+l)dx + 5 -r (n+ ) + S dr ndx~ ~ ................. o.~........ (16) ~ d + r J
~05~
As apparent from Eq. (16), the measured value incl~ldes a fraction r. In other words, with the signal ER2 applied, it becomes feasible to obtain the reading of a fraction r.
In Eq. (16~, when it is assumed that the value X which the signal ER2 can assume varies at a uniform amplitude in the range -~d - 2d ~- X c 2d +
~d. Then the measured value may be given in four ways as follows.
Measured Value = n*d + r+4+v~ {( ~+ P) (d - r) - ~d} .... o~(17) when 0 ~-~ _ 1 ~ d- ' -~ - d :
Measured Value = n~-d -~ r + 4~ + ~ - 1) (d - r)~ ............. ..... (18) when 1 ~ d ~- ~- 1, '-~ - d Measured Value = n*d + r ~ 4~ + ~) (d - r)-(~ )d+r~ O(19) when 0 _ ~ ' 1 ~ d~ d - ~
Measured Value = n~d + r + 4+~+~ -1) (d - r)- ~d + r~ ....(20) when 1 ~ -d - ~- 1, d G ~_ 1 In Eqs. (17) to (20)g the third term is the error term. Hence, to avoid allowing the error term to be dependent on the value to be measured (i.e., on the value r), the factor of r in the third term should be zero.
me following table shows the conditions where the factor of r assumes zero.
E conditions error term remarks qs. factor of r = 0 _ _ (17) ~+~ = 0 _ 4 ~ d error term = 0 _ _ . ~ . _ (18) ~+~ = 1 0 . . _ . ..
(19) ~+~= 1 O :
. _. _ . . ~ _ _ _ (20) +~ = 2 _ -- 6 (1 -~ )d error term 0 i By determining the range of ~2 to meet the above conditions, the error can be minimized or eliminated.
In this embodiment, the induction noise from commercial power sources ~s~z~
can readily be removed when the period of one measurement, i.eO, the period for resetting the up-down counter 9 is determ;ned to be an integral multiple of the period of commercial power source frequency.
Figure 19 shows in block form another embodiment of the invention wherein resistors lS and 16 are connected between input terminals 11 and 12, and the junction between these resistors is connected to a common line 17.
The signal Exl on the feed wire 13, and the signal Ex2 on the return wire 14 are derived through selector switch Sl and amplified by an amplifier 40, and then applied to one input terminal of amplitude comparator 60. The triangular wave signal SE from the triangular wave signal generator 3 is added in series to the random noise signal ER from the reference random noise source 2. The resultant signal is applied to the other input terminal of the amplitude comparator 60. The output of the comparator 60 is supplied to either the up terminal or the down terminal of the up-down counter 9 through the selector switch S2. The amplitude comparator 60 is operated in the same manner as one shown in Figure 15. The operation that the triangu-lar wave signal SE is applied in series to the random noise signal ER, and the effects of such operation are similar to those available with the conver-ter shown in Figure 4 or 12.
While the principles of the inverltion have been described above in connection with specific embodiments, and particular modifications thereof, it is to be understood that this description is made only by way of example and not as a limitation on the scope of the invention. ~ -, .
' ,. . : . . - ., ~ . . : : ,
Claims (9)
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. An analog-to-digital converter for converting an input analog sig-nal into an output digital signal, comprising: reference random noise source means for generating random noise signals at a rate of uniform occurrence probability density in a given range; means for generating a triangular wave signal having an amplitude greater than the minimum amplitude increment of said random noise signal; a feed wire and return wire across which the analog signal to be converted is applied; amplitude comparator means for repeatedly comparing the amplitude of said random noise signal with that of the signal appearing on said feed wire and for supplying first output pulses in accord-ance with the comparisons, and for repeatedly comparing the amplitude of said random noise signal with that of the signal appearing on said return wire and for supplying second output pulses in accordance with the comparisons, the triangular wave signal being effectively superposed on one of the signals to be compared prior to the comparisons and means responsive to the difference between the numbers of the first and second output pulses obtained from said amplitude comparator means to provide a digital output corresponding to the value of said analog signal to be converted.
2. An analog-to-digital converter as claimed in claim 1 wherein said amplitude comparator means comprises a first amplitude comparator for com-paring the amplitude of said random noise signal with that of the triangular wave signal superposed on the signal appearing on said feed wire, and a second amplitude comparator for comparing the amplitude of said random noise signal with that of the triangular wave signal superposed on the signal ap-pearing on said return wire.
3. An analog-to-digital converter as claimed in claim 1 wherein said amplitude comparator means is arranged on a time sharing basis for alternately effecting (a) a comparison among the amplitude of said random noise signal, the superposed triangular wave signal, and the signal appearing on said feed wire, and (b) a comparison among the amplitude of said random noise signal, the superposed triangular wave signal, and the signal appearing on said re-turn wire.
4. An analog-to-digital converter for converting an input analog sig-nal into an output digital signal, comprising; reference random noise source means for generating random noise signals at a rate of uniform occurrence probability density in a given range; second signal generator means for gen-erating a second signal varying uniformly in a range greater than the minimum amplitude increment of said random noise signal; amplitude comparator means for repeatedly comparing the amplitude of the random noise signal from said reference random noise source means with the amplitude of a signal varying with the analog signal to be converted, the second signal being effectively superposed upon one of the signals to be compared prior to comparison, said amplitude comparison means supplying output pulses in accordance with the comparison; and means responsive to the number of output pulses obtained from said amplitude comparator means for providing a digital output corresponding to the amplitude value of said analog signal to be converted.
5. An analog-to-digital converter as claimed in claim 4 wherein said second signal generator means generates a triangular wave signal with an amplitude greater than the minimum amplitude increment of said random noise signal.
6. An analog-to-digital converter as claimed in claim 4 wherein said second signal generator means generates a second reference random noise sig-nal at a rate of uniform occurrence probability density in a range greater than the minimum amplitude increment of the first random noise signal.
7. An analog-to-digital converter for converting an input analog sig-nal into an output digital signal, comprising: first reference random noise source means for generating a first random noise signal at a rate of uniform occurrence probability density in a given range; second random noise source means for generating a second random noise signal at a rate of uniform occur-rence probability density in a range greater than the minimum amplitude increment of said first random noise signal; a feed wire and a return wire across which the analog signal to be converted is applied; first adder means for adding up the signal appearing on said feed wire and the random noise sig-nal from said second reference random noise source; second adder means for adding up the signal appearing on said return wire and the signal from second random noise source; amplitude comparator means for repeatedly comparing the amplitude of the output from said first adder means with that of the random noise signal from said first reference random noise source, and for repeatedly comparing the amplitude of the output from said second adder means with that of the random noise signal from said first reference random noise source, and for supplying first and second trains of output pulses in accordance with the respective comparisons; and means responsive to the difference between the numbers of pulses in the first and second trains of output pulses for providing a digital output corresponding to the value of the analog signal to be con-verted.
8. An analog-to-digital converter as claimed in claim 7 wherein the range of the random noise signal of said second reference random noise source means satisfies one of the conditions .alpha. + .beta. = 0 .alpha. + .beta. = 1 .alpha. + .beta. = 2 when the value X which the random noise signal of said second reference ran-dom noise source can assume varies in the range -.beta.d - id ? X ? id + .alpha. d, where d is the minimum amplitude value of the random noise signal of said first reference random noise source, and i is an arbitrary integer.
9. An analog-to-digital converter for converting an input analog sig-nal into an output digital signal, comprising: reference random noise source means for generating random noise signals at a rate of uniform occurrence probability density in a given range; a feeding wire and a return wire across which the analog signal to be converted is applied; first switch means for deriving signals alternately from said feed wire and said return wire on a time-sharing basis; triangular wave signal generator means fox generating a triangular wave signal with an amplitude greater than the minimum amplitude value of said random noise signal; amplitude comparator means for repeatedly comparing the signal derived through said first switch with the sum of said triangular wave signal and said random noise signal and for supplying output pulses in accordance with the comparisons; an up-down counter having an up input terminal and a down input interminal; second switch means operated synchronously with said first switch means for switching the output pulses from said amplitude comparator into said up input terminal or said down input terminal; and display means for displaying an output signal corresponding to the value counted by said up-down counter.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2390074A JPS548434B2 (en) | 1974-02-28 | 1974-02-28 | |
| JP2390374A JPS5417548B2 (en) | 1974-02-28 | 1974-02-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1051120A true CA1051120A (en) | 1979-03-20 |
Family
ID=26361342
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA220,877A Expired CA1051120A (en) | 1974-02-28 | 1975-02-27 | Analog-digital converter |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US4034367A (en) |
| CA (1) | CA1051120A (en) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4674062A (en) * | 1984-04-20 | 1987-06-16 | General Electric Company | Apparatus and method to increase dynamic range of digital measurements |
| JPH0611114B2 (en) * | 1984-12-31 | 1994-02-09 | ティアツク株式会社 | Analog-digital converter |
| DE3854414T2 (en) * | 1987-09-25 | 1996-04-18 | Nec Corp | AD converter with excellent signal-to-noise ratio for small signals. |
| FR2746756B1 (en) * | 1996-04-01 | 1998-06-12 | Matra Transport International | FAULT-TOLERANT MOBILE PASSAGE DETECTION DEVICE |
| US6028543A (en) * | 1997-10-03 | 2000-02-22 | Eg&G Instruments, Inc. | Apparatus for improvement of the speed of convergence to sub-least-significant-bit accuracy and precision in a digital signal averager and method of use |
| US6559788B1 (en) * | 2002-02-12 | 2003-05-06 | Charles Douglas Murphy | Parallel and shared parallel analog-to-digital conversion for digital imaging |
| US7315277B2 (en) * | 2002-04-30 | 2008-01-01 | The Johns Hopkins University | Bit depth reduction for analog to digital conversion in global positioning system |
| US7224305B2 (en) * | 2004-06-08 | 2007-05-29 | Telefonaktiebolaget L M Ericsson (Publ) | Analog-to-digital modulation |
| US7477180B2 (en) * | 2006-04-03 | 2009-01-13 | Realtek Semiconductor Corp. | Noise shaping comparator based switch capacitor circuit and method thereof |
| US7570182B2 (en) * | 2006-09-15 | 2009-08-04 | Texas Instruments Incorporated | Adaptive spectral noise shaping to improve time to digital converter quantization resolution using dithering |
| TWI504158B (en) * | 2011-11-07 | 2015-10-11 | Linear Techn Inc | Systems and methods for randomizing component mismatch in an adc |
| US9866780B1 (en) | 2016-11-17 | 2018-01-09 | Northrop Grumman Systems Corporation | Pixel information recovery by oversampling a comparison of pixel data and a noise signal |
| US10298256B1 (en) * | 2017-11-21 | 2019-05-21 | Raytheon Company | Analog to digital conversion using differential dither |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2941196A (en) * | 1955-02-24 | 1960-06-14 | Vitro Corp Of America | Analog-to-digital converter |
| US3244808A (en) * | 1962-01-12 | 1966-04-05 | Massachusetts Inst Technology | Pulse code modulation with few amplitude steps |
| GB1102539A (en) * | 1965-12-23 | 1968-02-07 | Kent Ltd G | Improvements in or relating to electric signal integrating apparatus |
| US3560957A (en) * | 1966-01-26 | 1971-02-02 | Hitachi Ltd | Signal conversion systems with storage and correction of quantization error |
| GB1218015A (en) * | 1967-03-13 | 1971-01-06 | Nat Res Dev | Improvements in or relating to systems for transmitting television signals |
| US3662376A (en) * | 1969-04-09 | 1972-05-09 | Takeda Riken Ind Co Ltd | Analogue-digital converting apparatus |
| US3656152A (en) * | 1970-02-16 | 1972-04-11 | Hughes Aircraft Co | Improved a-d/d-a converter system |
| AT327589B (en) * | 1971-08-03 | 1976-02-10 | Norma Messtechnik Gmbh | CIRCUIT ARRANGEMENT FOR CONVERTING ANALOG ELECTRICAL SIGNALS OR CHARACTERISTICS THEREOF INTO BINAR PULSE TRAINS |
| US3824584A (en) * | 1972-05-15 | 1974-07-16 | Gen Signal Corp | Analog-digital converter circuit |
| US3877022A (en) * | 1973-05-14 | 1975-04-08 | Weston Instruments Inc | Enhancing resolution in analog-to-digital conversion by adding statistically controlled noise to the analog input signal |
| US3879724A (en) * | 1973-11-19 | 1975-04-22 | Vidar Corp | Integrating analog to digital converter |
| JPS5081715A (en) * | 1973-11-23 | 1975-07-02 |
-
1975
- 1975-02-20 US US05/551,283 patent/US4034367A/en not_active Expired - Lifetime
- 1975-02-27 CA CA220,877A patent/CA1051120A/en not_active Expired
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| Publication number | Publication date |
|---|---|
| US4034367A (en) | 1977-07-05 |
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