BR112015013487A2 - system and method for allocating memory to different memory devices using quality of service - Google Patents

system and method for allocating memory to different memory devices using quality of service

Info

Publication number
BR112015013487A2
BR112015013487A2 BR112015013487A BR112015013487A BR112015013487A2 BR 112015013487 A2 BR112015013487 A2 BR 112015013487A2 BR 112015013487 A BR112015013487 A BR 112015013487A BR 112015013487 A BR112015013487 A BR 112015013487A BR 112015013487 A2 BR112015013487 A2 BR 112015013487A2
Authority
BR
Brazil
Prior art keywords
memory
memory devices
service
quality
allocating
Prior art date
Application number
BR112015013487A
Other languages
Portuguese (pt)
Other versions
BR112015013487B1 (en
Inventor
T Chun Dexter
Calin Cascaval Gheorghe
A Stewart Richard
K De Subrato
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US13/726,537 external-priority patent/US8959298B2/en
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of BR112015013487A2 publication Critical patent/BR112015013487A2/en
Publication of BR112015013487B1 publication Critical patent/BR112015013487B1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0607—Interleaved addressing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0638—Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1041—Resource optimization
    • G06F2212/1044—Space efficiency improvement
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Power Sources (AREA)

Abstract

resumo “sistema e método para alocar memória para dispositivos de memória diferentes utilizando qualidade de serviço”. são apresentados sistemas e métodos para alocar memória para aparelhos de memória dessemelhantes. uma modalidade exemplar inclui um método para alocar memória para aparelhos de memória dessemelhantes. é determinada uma razão de largura de banda de intercalação, que compreende uma razão de larguras de banda para duas ou mais aparelhos de memória dessemelhantes. os aparelhos de memória dessemelhantes são intercalados de acordo com a razão de largura de banda de intercalação de modo a se definirem dois ou mais zonas de memória com níveis de desempenho diferentes. solicitações de endereço de memória são alocados para as zonas de memória com base em uma qualidade de serviço (qos).abstract system and method for allocating memory to different memory devices using quality of service. Systems and methods for allocating memory to dissimilar memory devices are presented. an exemplary embodiment includes a method for allocating memory to dissimilar memory devices. an interleaving bandwidth ratio is determined, which comprises a ratio of bandwidths for two or more dissimilar memory devices. dissimilar memory devices are interleaved according to the interleaving bandwidth ratio so as to define two or more memory zones with different performance levels. Memory address requests are allocated to memory zones based on a quality of service (qos).

BR112015013487-4A 2012-12-10 2013-11-04 SYSTEM AND METHOD FOR ALLOCING MEMORY TO DIFFERENT MEMORY DEVICES USING QUALITY OF SERVICE BR112015013487B1 (en)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US201261735352P 2012-12-10 2012-12-10
US61/735,352 2012-12-10
US13/726,537 2012-12-24
US13/726,537 US8959298B2 (en) 2012-12-10 2012-12-24 System and method for managing performance of a computing device having dissimilar memory types
US13/781,366 US9092327B2 (en) 2012-12-10 2013-02-28 System and method for allocating memory to dissimilar memory devices using quality of service
US13/781,366 2013-02-28
PCT/US2013/068217 WO2014092883A1 (en) 2012-12-10 2013-11-04 System and method for allocating memory to dissimilar memory devices using quality of service

Publications (2)

Publication Number Publication Date
BR112015013487A2 true BR112015013487A2 (en) 2017-07-11
BR112015013487B1 BR112015013487B1 (en) 2023-01-31

Family

ID=50882302

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112015013487-4A BR112015013487B1 (en) 2012-12-10 2013-11-04 SYSTEM AND METHOD FOR ALLOCING MEMORY TO DIFFERENT MEMORY DEVICES USING QUALITY OF SERVICE

Country Status (8)

Country Link
US (2) US9092327B2 (en)
EP (1) EP2929440A1 (en)
JP (1) JP5916970B2 (en)
KR (1) KR101613826B1 (en)
CN (1) CN104871143B (en)
BR (1) BR112015013487B1 (en)
TW (1) TWI534620B (en)
WO (1) WO2014092883A1 (en)

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Also Published As

Publication number Publication date
TWI534620B (en) 2016-05-21
BR112015013487B1 (en) 2023-01-31
US9092327B2 (en) 2015-07-28
CN104871143A (en) 2015-08-26
CN104871143B (en) 2018-04-24
US10067865B2 (en) 2018-09-04
KR20150095725A (en) 2015-08-21
EP2929440A1 (en) 2015-10-14
WO2014092883A1 (en) 2014-06-19
KR101613826B1 (en) 2016-04-19
TW201439760A (en) 2014-10-16
JP2016503911A (en) 2016-02-08
US20150286565A1 (en) 2015-10-08
US20140164690A1 (en) 2014-06-12
JP5916970B2 (en) 2016-05-11

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Legal Events

Date Code Title Description
B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B06U Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]
B06G Technical and formal requirements: other requirements [chapter 6.7 patent gazette]
B09A Decision: intention to grant [chapter 9.1 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]

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