AU8733182A

AU8733182A - Signal booster for digital data transmission through transmission lines

Info

Publication number: AU8733182A
Application number: AU87331/82A
Authority: AU
Inventors: Robert W. Harris
Original assignee: Gould Inc
Current assignee: Gould Inc
Priority date: 1981-06-10
Filing date: 1982-06-04
Publication date: 1983-01-04

Description

SIGNAL BOOSTER FOR DIGITAL DATA TRANSMISSION THROUGH TRANSMISSION LINES

BACKGROUND OF THE INVENTION

This invention relates to a circuit for boost- ing a digital data signal which is transmitted on a transmission line.

In the field of telemetry, there are a number of systems which employ a plurality of sensors for sens¬ ing physical events (e.g., sound, light, movement, tem- perature, stress, etc.) and for transmitting sensor sig¬ nals over electronic transmission lines to a central re¬ ceiving station. One example of such a telemetry system is a towed sonar array system which comprises a plurality of hydrophones connected to a transmission line (e.g., a coaxial cable) which is in turn connected to a central data receiving station. The towed array is placed in water and is towed by a vessel (e.g., a submarine) for detection purposes. Each of the sensors is capable of generating an analog sensing signal which is converted into a digital data signal by an A/D converter. The dig¬ ital data signal is injected onto the transmission line for transmission to the central data receiving station.

Due to the limited data transmission capacity of metallic transmission cables there has been a need in the art for circuitry which is capable of compensating for the propagation losses of the digital data signals transmitted on the transmission lines. Such circuits have, in general, consisted of repeater circuits which are placed at predetermined intervals along the transmis- sion line in order to amplify the signal. However, be¬ cause of the serial nature of these repeater circuits, sensor array systems employing these repeater systems are unreliable. That is, if one repeater in the array fails, data transmission is seriously attenuated or ceases al¬ together. In addition, the prior art repeater systems are relatively heavy, making them less desirable for use in the sea water environment of the towed sonar array. Thus, there is a need in the art for a circuit for boost¬ ing a digital data signal, which is^' both light in weight and which does not have a seriality problem, so that if one of the booster circuit fails, the remaining booster circuits are capable of amplifying the digital data sig- nals to compensate for any propagation losses.

SUMMARY OF THE INVENTION

An object of the present invention is to pro¬ vide a circuit for boosting digital data signals trans¬ mitted on transmission lines, which overcomes the defi- ciencies of prior art repeater circuits.

In particular, it is an object of the present invention to provide a booster circuit for enhancing the edges of a digital data waveform by preserving their am¬ plitude, sharpness and timing in spite of the attenuation caused by the transmission line and the noise which is present on the transmission line.

A further object of this invention is to pro¬ vide a booster circuit which has no seriality problem, so that a plurality of the booster circuits of the present invention may be coupled at spaced points along a trans¬ mission line, wherein if one or several of the plurality of booster circuits fails, the remaining operative booster circuits will compensate for the failed booster circuits. The booster circuit of the present invention has a number of novel features, as set forth below. The booster circuit comprises a negative impedance bistable device which is connected to a transmission line. The negative impedance bistable device is an edge sensitive device which detects the edges of a digital data waveform and injects a fixed amplitude signal onto the trans is- sion line to preserve^' the amplitude and sharpness of the edges of the digital data waveform. In addition, the negative impedance bistable device is weakly coupled to the transmission line, so that if the negative impedance bistable device fails, it does not attenuate the digital data signal to any great extent. Thus, the booster cir¬ cuit of the present invention provides significant advan¬ tages as a booster for boosting digital data signals transmitted on a transmission line.

These together with other objects and advan- tages, which will become subsequently apparent, reside in the details of construction and operation as more fully hereinafter described and claimed, reference being had to the accompanying drawings, forming a part hereof, wherein like numerals refer to like parts throughout.

BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 is a block diagram of the booster cir¬ cuit of the present invention;

Figure 2 is a graph illustrating a digital data signal, a booster signal and a boosted digital data out- put signal;

Figure 3A is a circuit diagram of a first em¬ bodiment of the booster circuit of the present invention; Figure 3B is a circuit diagram of a second em¬ bodiment of the booster circuit of the present invention; Figure 4 is a block diagram illustrating the connection of the second embodiment of the booster cir¬ cuit of the present invention in a sensing station;

^fREAT OMH__ £ \ Figure 5 is a graph illustrating how succeeding booster circuits in an array compensate for the failure of a booster circuit by boosting the digital data signal so that it asymptotically approaches its normal level;

5 and

Figure 6 is a schematic diagram used for ex¬ plaining the determination of the proper design for the booster circuit of the present invention when an array of boosters is to be connected to a transmission line.

10 DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

Figure 1 illustrates the booster circuit 20 of the present invention coupled to a transmission line 22. In the preferred embodiment, the transmission line 22 is a coaxial cable; however, any suitable transmission line

15 could be employed (e.g., a twisted wire pair). As illus¬ trated in Figure 1, the booster circuit 20 is not con¬ nected in series with the transmission line 22, as are prior art repeater circuits, so that even if the booster circuit 20 fails, a digital data signal can propagate

20 along the transmission line 22, with the failed booster circuit causing only slight attenuation of the signal.

Figure 2 illustrates the digital data signal as it appears on the transmission line 22 at the input of the booster circuit 20 and as it appears on the trans is-

25. sion line 22 at the output of the booster circuit 20 af¬ ter being boosted. As illustrated in Figure 2, the booster circuit 20 has a threshold level below which no digital data is detected, so that all noise below the threshold level is attenuated. Once a waveform edge,

30 which is above the threshold level, has been detected by the booster circuit 20, the booster circuit 20 injects a constant amplitude signal on the transmission line 22, so that the waveform of the signal which is output on the transmission line 22 has a slightly larger amplitude and a sharper edge than the input signal which is propagating on the transmission line 22 at the input of the booster circuit 20. Thus, the booster circuit 20 of the present invention attenuates noise while sustaining the digital data signal and compensating for changes in the cable characteristics which may occur due to temperature, pres¬ sure, flexure, age, etc. As noted in the Background of the Invention section above, the booster circuit 20 of the present in¬ vention is particularly suitable for use in boosting data signals which are generated by a sensor array. When used in this manner, a plurality of booster circuits 20 are coupled to the transmission line 22 to boost the digital data signals which are transmitted along the transmission line 22. In the preferred embodiment, the injected con¬ stant amplitude signal is a current transient having a fixed-amplitude which is determined by the logic swing at the output of the booster circuit 20. Since this fixed component is added to the digital data signal, the effec¬ tive gain in dB varies with signal strength, so that sig¬ nals which are weakened by a previously failed booster are boosted more than normal, thereby asymptotically re- storing the digital data signal to its normal amplitude as it propagates past additional booster circuits 20 on the transmission line 22.

As illustrated in Figure 5, the failure of one or more of the plurality of booster circuits 20 will not cause the data signal to be severely attenuated, nor will it cause the entire sensor array to fail. Figure 5 is a graph illustrating the amplitude of the digital data sig¬ nal as it propagates along the transmission line 22. In particular. Figure 5 illustrates an example in which a θMPl__ booster, located at a point 80 meters along the transmis¬ sion line 22, has failed. Thus, the digital data signal drops from an amplitude of approximately .7 volts at 60 meters to .45 volts at 100 meters due to the attenuation caused by the failed booster circuit 20 which is located at the 80 meter point. However, the succeeding booster circuits 20 (located at 100, 120, 140, 160, 180 and 200 meters) boost the digital data signal so that it asymp¬ totically approaches its normal level. Thus, a booster system which employs the booster circuit 20 of the pres¬ ent invention overcomes the serial reliability problem of prior art repeater systems.

Figure 3A is a first embodiment of the booster circuit 20 which is designed to cooperate with a trans- mission line 22 comprising a coaxial cable. Alterna¬ tively, the booster circuit 20 of Figure 3A could be adapted to operate with a twisted pair transmission line. The booster circuit 20 of Figure 3A is further de¬ signed to be coupled to a transmission line 22 on which the digital data signal to be boosted comprises binary signals having constant height edges and a lower bound on the time interval between the successive edges. Refer¬ ring to Figure 3A, the booster circuit 20 includes a dif¬ ferential line receiver 24 having an input 26 and an in- verted input 28. The input 26 is coupled to the trans¬ mission line 22 by a capacitor 30, while the inverted in¬ put 28 is coupled to the transmission line 22 by a capac¬ itor 32. The differential line receiver 24 has an output 34 connected to a feedback resistor 35 and an inverted output 36 connected to a feedback resistor 37. In the preferred embodiment, the differential line receiver 24 is one third of a Model F 10116 triple differential line receiver manufactured by Fairchild Semiconductor, Inc. and the outputs 34 and 36 are differential emitter coupled logic outputs. Each waveform edge of the digital data signal on transmission line 22 is coupled into the differential line receiver 24 through the capacitors 30 and 32, thereby causing the differential line receiver 24 to change state, following the signal state. Each time the differential line receiver 24 changes state, a cur¬ rent transient is injected onto the transmission line 22 through a capacitor 40. The current transient boosts each waveform edge, thereby enhancing its amplitude and rise time as illustrated in Figure 2.

The initial state of the booster circuit 20 when power is turned on is arbitrary. If the booster circuit 20 is initially of a logic level which is oppo¬ site to that on the transmission line 22, the first wave- form edge of the digital data signal does not cause the booster circuit 20 to change state. Thereafter, the booster circuit 20 functions correctly, i.e., its logic state follows the logic state of the digital data signal. As noted above, the booster circuit 20 does not boost noise signals corresponding to waveform edges which are below the threshold level. Therefore, noise and par¬ tial reflections are attenuated by the transmission line 22 and by the loading effect of the booster circuit 20, while the digital data signals, which are above the threshold, are boosted. The threshold level is deter¬ mined by the amount of positive feedback which is pro¬ vided through the resistors 35 and 37 and can be varied with the particular design.

The booster circuit 20 couples to the transmis- sion line 22 only through its capacitors (30, 32 and 40). Thus, the DC offset between the booster power sup¬ ply and the transmission line 22 is arbitrary. In addi¬ tion, although the booster cirucit 20 is only AC coupled,

O PI it follows the digital data signal including its DC con¬ tent. This is because the DC content of a bilevel wave¬ form can be inferred from its edges and because the booster can sense the edges via its AC coupling. Figure 3B is a second embodiment of the booster cirucit 20 of the present invention, wherein elements which are referenced by the same numerals in Figures 3A and 3B represent corresponding elements. In the embodi¬ ment of Figure 3B, the inverted output of the differen- tial line receiver 24 is not used for feedback purposes. Capacitor 60 is a DC blocking capacitor. Capacitor 62 and resistor 64 perform the same coupling function as capacitor 40 in Figure 3A. Capacitor 66 and resistors 68 and 70 are used for biasing purposes in the embodiment of the booster circuit 20 illustrated in Figure 3B. Figure 3B also illustrates the input of a soft sync signal. This signal is discussed further in conjunction with Figure 4.

In an alternate embodiment, the booster circuit 20 may be coupled to the transmission line 22 by a trans¬ former (e.g. a ferrite transformer) so that the booster becomes directional. That is, the booster circuit 20 can be coupled by a transformer (and capacitors) such that it will boost only forward travelling waves on the tranεmis- sion line 22 and will ignore reverse travelling waves. This directional boosting feature is especially relevant to the use of a plurality of booster circuits 20 in a sensor array.

In another alternate embodiment the booster circuit 20 is implemented by a Schmitt trigger circuit. The Schmitt trigger circuit is bistable when no pulse is present, but is set high by positive pulses which exceed its hysteresis zone and is set low by negative pulses which exceed its hysteresis zone. In a further alternate embodiment, the booster circuit 20 is used as a line receiver by tapping the booster cirucit 20 at line 45.

The following analysis of the performance of an infinite string of boosters spaced at uniform intervals on the data transmission line 22 is provided, with refer¬ ence to Figure 6 of the drawings. Figure 6 illustrates the transmission line 22 and the booster circuit 20. It is assumed that a single rising edge, hereinafter re- ferred to as eigentransient, is propagating along the transmission line 22 and has evolved into a waveform shape which propagrates with no further change in shape or amplitude except for a periodic variation, _.the period of which is the booster circuit spacing. The eigentran- sient of the system, as a function of the capacitor 40, the booster circuit spacing, the transmission line char¬ acteristics, and other system parameters, is considered below.

The object of a boosted transmission line de- sign is to obtain an eigentransient which approximates a step function. It should have a rapid rise and minimal distortions such as overshoot, preshoot, ringing, sag, swell, or ghosts (i.e., delayed, attenuated secondary steps) . Any or all of these distortions could occur as a result of single and multiple reflections from the booster circuits 20 and the dispersion and attenuation characteristics of the transmission line 22. If a system can be designed having an eigentransient which is suit¬ ably step-like, then the digital data signal logic wave- forms will propagate since each edge will be independ¬ ently boosted. The maximum data rate will be governed by the rise time of the eigentransient, since accurate oper¬ ation requires that the adjacent edges of the waveforms remain separate.

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^?*RNAT Referring to Figure 5, Z₀(ω ) represents the characteristic impedance of the transmission line 22. The impedance Z₀(ω) is complex and frequency dependent. P(ω) represents the propagation loss and delay of a cable segment having length L, where L is the spacing between the booster circuits 20. The propagation function P(ω ) has the attributes of a transfer function: it is complex and frequency dependent, and its magnitude and phase de¬ termine the loss and phase shift, respectively. The phase of P(ω ) includes the effect of phase lag due to propagation delay in the transmission line segment. V(ω ) refers to the voltage at a booster circuit 20 denoted BOOSTER #0. (It is assumed that the string of booster circuits 20 extend infinitely in both directions from BOOSTER #0.) Iι(ω) refers to the current signal in the transmission line 22 immediately to the left of the BOOSTER #0 (as seen in Figure 6). For any combination of V(ω) and I_j_(ω ) the situation immediately to the left of the booster may be viewed as the superposition of a trav- elling wave to the right, A(a ) and a travelling wave to the left, B(ω). This is true for any impedance Z₀(ω) of the transmission line 22. The current and voltage in the transmission line are related to the travelling waves ac¬ cording to the following equations: l iiiz ) = (A(ω) - B{ω))/Z₀(ω) (1)

V(cc ) = A(ω) + B(α- ) (2)

Similarly, the current, l2(^ω)/ in the transmis¬ sion line immediately to the right of BOOSTER #0 can be viewed as a travelling wave to the right C(ω ) and a trav- elling wave to the left D(ω), which are related to the current and voltage in the line according to the follow¬ ing equations:

I₂(ω) = (C(ω) - D(ω))/Z₀(ω) (3)

V(ω) = C(c-) ÷ D(c-) (4) The propagation function P(ω ) applies to trav¬ elling waves travelling in either direction. Applying P(ω ) to Figure 6, the following equations are obtained: A^• (ω ) = C(ω ) P(ω ) (5) D (ω ) = B'(ω ) P(ω) (6) where A'(ω) and B' ( ω) are defined in a manner similar to A(ω) and B(ω) except that they represent the travelling waves which are located immediately to the left of BOOSTER #1. Since it has been assumed that the' waveform propagating through the system is the eigentransient, A'(^ω) and B'(^ω) are simply delayed replicas of A(ω) and B(ω). The delay from one booster to the next is denoted T. In the frequency domain, time delay is a phase lag which is proportional to frequency. The eigentransient assumption therefore is expressed by the following equa¬ tions:

A'(ω) = exp(-jωT) A(ω ) (7)

B'(ω) = exp(-juT) B(ω) (8) G(ω) denotes the frequency domain representa¬ tion of the current transient delivered into a short- circuit by the booster circuit 20 when it switches from a "0" to a "1" state at t=0. Z_j_(^ ) denotes the impedance of the booster circuit 20 as seen by the transmission line 22, when the booster circuit is at a fixed logic state. The functions G(ω ) and Z--_(ω) can be calculated for any booster circuit within a general class of booster circuits 20, so that this analysis is not restricted to the particular circuit which is illustrated in Figure 3. The functions defined with respect to Figure 6, have an additional constraint due to the conservation of current at the point where the booster circuit 20 is at¬ tached to the transmission line 22, so that:

0 = Iτ_(ω) - I₂(ω) - V( )/Z₂(co) + G(- ) (9) Equations 1 through 9 constitute simultaneous linear equations in the unknowns A, A¹, B, B', C, D, I_j, Z _- and V. From these equations, a solution for V can be ob¬ tained:

From equation 10 the eigentransient in the fre¬ quency domain can be calculated. The voltage eigentran¬ sient in the time domain can then be calculated by numer¬ ically applying the inverse Fourier transform to the fre- quency domain result. By varying G(ω), Z (ω), Z_Q(O> ) and P(ω) the effects of various booster designs and various transmission line characteristics and booster spacings can be determined. This is most suitably performed as a computer analysis to obtain the desired design for the transmission line 22 and booster circuit 20.

To solve equation 10, one must assume a value for the parameter T which represents the propagation time of the eigentransient between adjacent boosters. If the value of T is varied while G, P, Z₀ and ^~_- are fixed, the calculated eigentransient changes shape and exhibits a shift along the time axis. Since t=0 is defined as the beginning of the current transient generated by the BOOSTER #0, and letting t - denote the response time of the booster circuit 20, the BOOSTER #0 must detect the eigentransient at -t^. Thus, the eigentransient must cross the threshold of the booster at -t_d, and this crossing must not be preceded by any earlier crossing. In use of equation 10, T is varied iteratively until this condition is met. Through this iterative process, equa- tion 10 yields the correct value of T in addition to the eigentransient shape, based upon any assumed booster threshold, booster delay time, booster impedance A_j_, booster output transient G, booster spacing L, transmis¬ sion line attenuation and dispersion P, and transmission line impedance Zg.

From the above, a booster circuit 20 can be de- signed for a specific transmission line 22, taking into account various choices for the booster circuit imped¬ ance, the transmission line impedance and the transmis¬ sion line attenuation, dispersion, and propagation delay. As previously stated, the booster circuit 20 of the present invention is particularly suitable when used in a sensor array. Examples of sensor arrays in which the booster circuit 20 of the present invention might be employed include towed sonar arrays which are towed through the water by vessels for sonar detecting pur- poses, and the related streamers which are towed sensor arrays used in oil exploration. Figure 4 is a block dia¬ gram illustrating the connection of the second embodiment of the booster circuit 20 of the present invention (Figure 3B) in one of a plurality of sensing stations 50 which make up a sensor array. Each sensing station 50 receives digital sensing data (local data in) from a sen¬ sor such as a hydrophone (not shown). A controller cir¬ cuit 52 receives the digital sensing data and controls the timing of the transmission of the digital sensing data on the transmission line 22 by the particular sens¬ ing station 50. The controller circuit 52 also provides a soft sync signal to the booster circuit 20 in order to vary the timing of the booster signal which is injected onto the transmission line 22 relative to the received edge of the propagating digital data signal. An injector circuit 54 injects the digital sensing data which has been detected at the sensing station 50 onto the trans¬ mission line 22 under the control of the controller cir¬ cuit 52 and a performance monitoring/fault locating (PM/F ) circuit 56. The PM/F circuit 56 disables the injector circuit 54 so as to inhibit all untimely trans¬ missions of the digital sensing data which is detected at the sensing station 50. Thus, there is no transmission by the injector circuit 54 unless both the controller circuit 52 and the PM/FL circuit 56 allow such transmis¬ sion.

In a sensor array, there are a plurality of sensing stations 50 and each sensing station is given a particular time slot during which the digital sensing data which is detected at the particular sensing station 50 can be injected onto the transmission line 22. It is this timing which is controlled by the controller circuit 52 and the PM/FL circuit 56. The soft sync signal which is generated by the controller circuit 52 is employed to enhance fault toler¬ ance by enabling the booster circuit 20 to heal isochro¬ nous distortion (i.e., edge timing errors) of the signal in additional to amplitude distortion. The soft sync signal causes a slight shift in the edge of the booster signal so as to maintain the proper timing of the propa¬ gating digital data signal. In practice, the input edge rise time of the digital data signal is 12 nsec whereas the injected edge rise time injected by the booster cir- cuit 20 is 2 nsec. The soft sync signal is employed to vary the timing of the booster injection relative to the received edge of the input digital data signal. The pri¬ mary effect of the soft sync signal is a slight shift in the effective time center of the edge of the output sig- nal.

The circuit of the present invention may be im¬ plemented in numerous ways. For example, the booster circuit 20 may be implemented by any negative impedance bistable device or circuit and may be employed with any electronic transmission line. In addition, the booster circuit 20 is suitable for any number of applications in the field of telemetry. Thus, the booster circuit 20 can be used in various types of sensing arrays to boost dig- ital data signals propagating on a transmission line. Further, the booster circuit 20 of the present invention may be employed to boost digital data signals transmitted on a transmission line connecting two or more computers. The booster circuit 20 also has industrial and commercial remote control applications, and may be used in scien¬ tific data gathering systems.

The many features and advantages of the inven¬ tion are apparent from the detailed specification and thus it is intended by the appended claims to cover all such features and advantages of the system which fall within the true spirit and scope of the invention. Fur¬ ther, since numerous modifications and changes will read¬ ily occur to those skilled in the art, it is not desired to limit the invention to the exact construction and operation shown and described and, accordingly, all suit¬ able modifications and equivalents may be resorted to, falling within the scope of the invention.

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Claims

WHAT IS CLAIMED IS:

1. A circuit for boosting a digital data sig¬ nal transmitted on an electronic transmission line, com¬ prising a negative impedance bistable device, coupled to the transmission line, for enhancing the amplitude and rise time of the digital data signal.

2. A circuit as set forth in claim 1, wherein the negative impedance bistable device comprises a Schmitt trigger circuit.

3. A circuit as set forth in claim 1, wherein said negative impedance bistable device comprises: a differential line receiver having first and second inputs coupled to the electronic transmission line, so that a waveform edge of the digital data signal is coupled to said differential line receiver, said dif¬ ferential line receiver having a first output, coupled to the electronic transmission line, for injecting a booster signal on the electronic transmission line, and having a second output; and means, operatively connected between the first input and the first output, for feeding back the booster signal to said differential line receiver.

4. A circuit as set forth in claim 3, further comprising: a first capacitor operatively connected be¬ tween the electronic transmission line and the first in- put of said differential line receiver; a second capacitor operatively connected between the electronic transmission line and the second input of said differential line receiver; and a third capacitor operatively connected be- tween the electronic transmission line and the first out¬ put of said differential line receiver.

5. A circuit as set forth in claim 3 or 4, wherein said means comprises a resistor.

6. A circuit, comprising: means for providing a digital data signal; a transmission line, operatively connected to said means for providing a digital data signal, along which the digital data signal propagates; and a first negative impedance bistable device, coupled to the transmission line, for boosting the dig¬ ital data signal which propagates along the transmission line.

7. A circuit as set forth in claim 6, further comprising a second negative impedance bistable device, coupled to the transmission line, for boosting the dig¬ ital data signal which propagates along the transmission line.

8. A circuit, comprising: means for providing a digital data signal; a transmission line, operatively connected to said means for providing a digital data signal, along which the digital data signal propagates; and a plurality of negative impedance bistable devices, each of which is coupled to the transmission line for boosting the digital data signal which propa¬ gates along the transmission line.

9. Any and all features of novelty described, referred to, exemplified, or shown.