AU627485B2 - Switched electrical power conversion and balancing - Google Patents

Description

OPI DATE 19/02/90 APPLN. ID 39795 89 n m A P TE 9/03/90 PCT NUMBER PCT/AU89/00306 V I RN TION L AILICIION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (51) International Patent Classification 4 (11) International Publication Number: WO 90/01230 H02J 3/26, 3/28, 3/32 A l (43) International Publication Date: 8 February 1990 (08.02.90) (21) International Application Number: PCT/AU89/00306 Published (22) International Filing Date: 20 July 1989 (20.07.89) With international search report.

Priority data: PI 9375 20 July 1988 (20.07.88) AU (71) Applicant: POWER REFLEX PTY. LTD. [AU/AU]; Innovation House West, Technology Park, The Levels, S.A.

5000 (AU).

(72) Inventor: PIECHNICK, John, Joseph 94 Fifth Avenue, Joslin, S.A. 5070 (AU).

(74) Agent: R.K. MADDERN ASSOCIATES; 345 King Williram Street, Adelaide, S.A. 5000 (AU).

(81) Designated States: AT (European patent), AU, BE (European patent), CH (European patent), DE (European patent), FR (European patent), GB (European patent), IT (European patent), LU (European patent), NL (European latent), SE (European patent).

(54)Title: SWITCHED ELECTRICAL POWER CONVERSION AND BALANCING Bla Bib (57) Abstract The invention relates to a converter which can operate as a rectifier to rectify alternating current into direct current running in one direction (for example to charge batteries) or a converter where DC (from the batteries) can be converted to AC and supplement AC power, for example to supplement an alternator output in peak load conditions. The converter comprises a uni-directional electrical energy source (Bl) and a bi-directional energy source (B2) which is capable of initiating an alternating current when controlled by thyristors (Qla Qlb Q6a Q6b) fired in sequence and with such periods that a sine wave can be simulated.

The switches are controlled by a thyristor trigger logic circuit control unit which may for example be a microprocessor.

WO90/01230 PCT/AU89/00306 SMfam EmJrAA HKE& ONaESIai AD BmLIC GW This invention relates to an electrical converter which can be used for converting AC to DC, DC to AC, or DCs or ACs to supplement the AC generated by an alternator, for balancing three phase loads, for dynamic power conditioning, for load levelling of electric grids, and for other purposes.

Where AC power is required in some areas, for axample on board ships, or in small towns or large homesteads, the power supply must be sufficient to meet peak loads and these are often several times.average load conditions.

One object of the invention is to provide a converter which can make it unnecessary to have a large generator if the average load is say less than half peak load, so that a much smaller engine and alternator assembly (thereby being of lower cost) is all that is required, providing there is a storage battery system. An object of the invention therefore is to provide a converter, which in some embodiments may function as a rectifier, that is, wherein an alternator can charge batteries, but, in the inverter mode, the battery bank can be used to supplement the output of the alternator when that is required.

In an embodiment of the invention, a converter device comprises a uni-directional electrical energy source having two ends and a bi-directional energy source having two ends and a centre tap, a pair of conductor rails extending from the unidirectional energy source, a first bridging conductor having two portions extending between said ends of the bi-directional energy source and respective said rails, a second bridging conductor extending between the rails, a first pair of switches one in each said first conductor portion, a second pair of switches in the second bridging conductor portion, an electrical load connected between the centre tap and an electrical conductor between the switches of the second pair, f so arranged that, upon selective opening and closing of the switches, current flow in the first said energy source is unidirectional, and in the second said energy source is bidirectional.

pCT/AU89/003 WO 90/01230 2 06' In this invention, waipe current flow is into said unidirectional energy source when the converter is a rectifier and hee current flow is out of the said uni-directional energy source when the converter is an inverter.

The uni-directional electrical energy sources herein described are battery banks, which have the advantage that they store energy during low load demands from an alternator (for example), but can supplement the alternator output upon high demand, the converter then being in an inverter mode.

The bi-directional energy sources herein described are also batteries, but since in operation, sometimes the energy storage required is for only one half of a sine wave period (one hundredth of a second for a 50Hz supply), other less expensive devices can be satisfactory.

In one specific embodiment of this invention an AC/DC converter having a DC/AC inverter mode of operation comprises a transformer, a DC power source having a battery or a bank of batteries, a bi-directional second power source and a plurality of switch means, and switch control means, said transformer having a first winding with a centre tap and a second winding, and said DC power source also having a centre tap connected to a first end of the first winding through a said switch, an end of said first winding being connected to a negative rail of said battery or batteries through a first said switch means and to the positive rail thereof through another said switch means, and to a first AC terminal through a further said switch means, said bi-directional second power source/power sink coupled to said second winding, said centre tap connecting to a second AC terminal of the converter, the said first AC terminal being referenced to a negative or positive rail of said DC power source through another said switch meats, r WO 90/01230 PCT/AU89/00306 -3said switch ccntrol means being operatively coupled to said switch means to control opening and closing of said switch means in a sequence wherein each switch thereof makes contact before its predecessor switch breaks contact, actuation of each switch occurring when the instantaneous voltage difference across the incoming switch approximates zero as a result of variation of voltage of said bi-directional second powert source, and minimal voltage change occurs at that time across said first winding, resulting in no change (or minimal) in voltage at the AC terminals.

While a converter may consist of a single device, in many instances there is advantage in a cascade array of converter devices. Such an array, for example, is required for sine wave AC transmission, and in another embodiment the invention consists of a plurality of devices each embodying the above defined features, and arranged in a cascade array to fire sequentially and produce a stepped wave compatible with a sine wave, and thereby adapted, when connected to an AC power source of the same frequency, to function as an AC to DC converter or a DC to AC inverter.

In a further embodiment of this invention an AC/DC converter having an inverter mode of operation comprises two transformers, a DC power source having a battery or a bank of batteries a bi-directional second power source and a plurality of switch means, and switch control means, said first transformer having a first winding with a centre tap, a second winding, identical with the first winding, Tand a third winding, a first end of said first winding being connected to a second end of said second winding through a said switch means, said second transformer having a first winding, a second winding and a third winding, wherein the said first and second windings are identical and the third winding end is connected to the two AC terminals, the second end of said first winding of first transformer being connected to a negative rail of said battery or batteries WO 90/01230 PCT/AU89/00306' -4through a said switch means and to the positive rail thereof through another said switch means, and to the first end of the said first winding of the second transformer through a further said switch means, the first end of said second winding of first transformer being connected to said negative rail through a said switch means and to the positive rail through a said switch means, and to second end of said second winding of second transformer through a said switch means, said centre tap of first winding connecting to the second end of the said first winding of second transformer and said centre tap of the second winding connecting to the first end of the said second winding of the second transformer, said bi-directional second power source/power sink coupled to said third winding of first transformer the said first end of the first winding of the second transformer also being referenced to the negative and positive rails through said switches, the said second end of the second winding of the second transformer also being referenced to the negative and positive rails through said switches, said switch control means being operatively coupled to said switches to control opening and closing of said switches in a sequence wherein each switch makes contact before its predecessor switch breaks contact, actuation of each switch occurring when the instantaneous voltage difference across the incoming switch becomes zero (or near zero with different types of semiconductor switches) as a result of variation of the said bi-directional second power source, and so arranged that minimal voltage change occurs at that time across said first and second windings of first transformer, resulting in minimal change in voltage at the AC terminals.

The invention is not limited merely to AC/DC and DC/AC conversion or supplementation, but can be applied in other areas of electrical engineering such as the balancing of the phases of a three phase supply. By utilising three devices I each as described hereafter, the invention is equally I applicable to a three phase supply, as it is to a single phase

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WO 90/01230 PCT/AU89/00306 supply. Where required, it could also be used for a two phase supply.

An embodiment of the invention is described hereunder in some detail with reference to, and is illustrated in the accompanying drawings, in which: Fig. 1A shows the designation used herein for a bidirectional energy source (which need not necessarily be a battery), Fig. 1B diagrammatically shows the bi-directional energy source when it comprises a battery with individually switched cells, Fig. 2A is a non-practical diagram which serves to explain the underlying theory of the invention, Fig. 2B is a similar diagram (but showing the relationship of batteries B1 and B2 connected in the opposite sense), Fig. 3A is a diagram similar to Fig. 2A but showing battery B2 isolated from battery B1 by a transformer TI, Fig. 3B is a diagram similar to Fig. 2B but showing battery B2 isolated from battery B1 by a transformer T1, Fig. 4A is a diagram of a practical converter device showing four switches which, when closed in a sequence described hereunder, control actuation of the device in an inverter mode, but is also usable in the rectifier mode, Fig. 4B graphically illustrates the wave forms at the unidirectional energy source B2 and the output terminals X and Y of the device, Fig. 5 is a diagram corresponding to Fig. 4A, but showing battery B2 isolated from battery B1 by a transformer Ti (as in 1:l WO 90/01230 PCT/AU89/00306' 6 Figs. 3A and 3B), these wave forms being also valid if the load is a generator, Fig. 6 is a diagram similar to Fig. 5 but showing a centre-tap battery B1 having two portions Bla and Bib connected to transformer T1 through switch S2, Fig. 6A illustrates the voltage at battery B2 and the voltage at output terminals X and Y, when the device of Fig. 6 is operated in inverter mode, and the switch firing sequence to achieve those voltages, Fig. 7A is a diagram corresponding to Fig. 6 but showing a further switch (55) which avoids danger of short circuit of battery B1 in the event that the other switches "make before break", Fig. 7B illustrates the alternative switch firing sequence to achieve similar voltages with the inclusion of S5 in F.g.

7A, Fig. 8 illustrates a more elaborate device circuit wherein the centre-tap of battery B1 of Fig. 7A is eliminated, Fig. 9A shows two converter devices (each of which can be in accordance with any one of Figs. 5, 6, 7A or 8) arranged in a cascade array, Fig. 9B shows the frequencies and voltages at batteries B1 and B2, and the output at X and Y, of the Fig. 9A cascade array, Fig. 10A shows a simple wave form imparted to battery B2 of Fig. 9A in another cascade array, Fig. 10B shows the cascade array associated with Fig. Fig. 10C shows the closing sequence of switches S1 to S4 of Fig. 10B and the output voltage at terminals X' and Y', I I- WO 90/01230 PCT/AU89/00306 7 Fig. 10D shows a stepped sine wave at the AC outputs of a system of two converters as connected in Fig. 10B, and Fig. 10E shows the transformer connections between stages 1 and 2 of Fig. Fig. 11 shows in more specific details the thyristor switching which would be used in Fig. 7A, and the trigger logic circuit, Fig. 12A illustrates a condition which exists prior to "toggling" the thyristors of one pair to another, Fig. 12B shows a condition wherein a thyristor (Q2a) conducts, Fig. 12C shows a possible flow of undesirable current from battery B2 into battery Bla (which is to be avoided), Fig. 12D shows a flow of current through thyristor Q6a, Fig. 13A shows the condition wherein thyristors Q3a/Q3b are to be brought into circuit while thyristors Q2a/Q2b are to be taken out of circuit, Fig. 13B illustrates the current flow immediately before the condition of Fig. 13A, Fig. 13C corresponds to Fig. 12C wherein undesirable current flow from battery B2 into battery B1 must be avoided, Fig. 13D corresponds to Fig. 12D (but with reverse current flow),

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Fig. 14 is a block diagram of a systems configuration particularly showing transformer antisaturation,

S.

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n WO 90/01230 PCT/AU89/00306' 8 Fig. 15 shows induced output wave form distortion required to reduce DC component in the transformer T2 in Fig. 14, Fig. 16A is a table showing stages of magnitude of DC component correction, Fig. 16B is a control circuit which produces DC component corrections for transformer T2 in Fig. 14, Fig. 17 is a chart showing the wave form period variation for DC component correction in transformer T1 in Fig. 14, Fig. 18 is a circuit for implementing DC component correction for transformer Ti in Fig. 14, Fig. 19 is a block diagram of the circuit which controls thyristor firing sequence and period, Fig. 20 is a block diagram detecting circuit for current direction, Fig. 21 is a block diagram showing logic implementation for thyristor selection, and Fig. 22 is a block diagram of the logic circuit which avoids the difficulties of high current circulation, as shown in Figs. 12 and 13.

Many of the accompanying diagrams use the symbol of Fig.

1A which represents a variable voltage source/sink derived from a battery B2 as shown in Fig. IB. Voltage variations are by means of steps so as to produce a "staircase" waveform, although for simplicity the wave forms are not herein illustrated (except in Fig. The converter concept is based on Figs. 2A and 2B. In Fig. 2A the battery B2 is in series with battery B1 but in the i' reverse sense such that the voltage at the output terminals X t and Y is less than voltage VB1 provided that the maximum value WO 90/01230 PCF/AU89/00306 9 of voltage VB2 does not exceed voltage V B. In this configuration the load current I charges B2 and discharges B1.

In Fig. 2B battery B2 is connected in the forward sense such that an increase in the value of VB 2 increases the voltage across the load. Here, both batteries will be discharged.

Figs. 3A and 3B are derived from Figs. 2A and 2B respectively. The function of the transformer T1 is to alter the magnitude of the steps in VB 2 and to isolate batteries BI and B2 but, during voltage change, the action of B2 is the same as in the previous cases (ignoring non-ideal transformer characteristics).

In Fig. 4A, battery BI has rails R+ and and battery B2 is divided into two components which are always equal and (VB2a VB2b) 1 V. VBI is connected through bridging conductor portions BC1 and BC2 to rails R+ and R- through switches S2 and S1 respectively. Bridging conductor BC3 bridges rails R+ and R- through switches S4 and S3 respectively. With switches S1 and S3 closed the voltage at the load RL is directly proportional to VB2b. With switches S2 and S4 closed the voltage at the load is given by VBI VB2a. Fig. 4b shows (in simplified form) the resultant waveform that will be obtained across the load. Switches S1 and S2 should be "make before break" action so as to preserve continuity of output during switching. The switches are controlled to change over when VB 2 VB1 and therefore at that :instant no current will circulate around the loop formed by Bi, B2a and B2b whilst S1 and S2 are both closed as the operation of B2 changes from discharge to charge. Switches S3 and S4 switch over at zero VRL (voltage at load RL) to reference the load alternately to the negative and positive terminals of B1 thus producing a bipolar output. It should be noted that when S1 and S3 change over to S2 and S4, the switch must be a "break before make" action so that the battery B1 does not short circuit.

In Fig. 5, the dual battery B2a and B2b of Fig. 4A are i replaced by a single battery B2 and transformer Ti which has a centre tapped secondary.

WO 90/01230 PCT/AU89/00306 10 The required transformer ratio to produce ±1/ 2 VBI across each half of the centre tapped secondary is 2:1:1. The resultant waveform appearing at the output terminals X and Y is the same as Fig. 4B.

The concept is extended by using a centre-tapped battery B1 as shown in Fig. 6.

Fig. 6 is derived from Fig. 5 by centre tapping battery B1 and connecting S2 to that centre tap, by connecting a new switch S6, from the battery B1 positive to switch Si, and by changing T1 turns ratio to 4:1:1 where B2 B1 as before.

In Fig. 6, the peak voltage across each half of the transformer secondary winding is one quarter of VBi, and it follows that the peak positive voltage that can appear across the load RL 1 VB1 as shown in Fig. 6B.

The following is the switch sequence for Fig. 6: The first switch sequence is from centre tap of secondary winding b to X, through load RL, switch S1 and switch S3 back to secondary winding, terminal Energy is derived from B2.

Next switch sequence is b to x, through RL, switch S3, battery portion Bib, S2 to connection C on T1 winding. Voltage at RL is then proportional to voltage of Bib plus or minus Svoltage of B2.

Next switch sequence is b to x, through RL, through S3, Bib and Bla, S6 to connection of a Ti. Voltage produced across RL equals Bla Bib, plus or minus 4 B2.

These sequences are reversed back to then to For Negative Half-cycle: i WO 90/01230 PCT/AU89/00306 11 The first switch sequence is from centre tap b of transformer Ti to X, through load RL, switch S4 switch S6, back to terminal a of transformer T1.

The next sequence is b to x, through RE through S4, through Bla, through S2 to C on Tl winding. Voltage across RL Bla plus or minus j B2.

The final sequence is from b to x, through RL, through S4, through Bla, Bib, to conversion of a T1. Voltage across RL Bla, Blb, plus or minus 4 B2.

These sequences are reversed back to then A further innovation is provided by switch S5 in Fig. 7A.

Most real loads do have an inductive component such that when the voltage produced by Fig. 6 is zero, there may still be a reactive current flowing. At this time as shown in Fig. 6B, S1 and S3 switch over to $6 and $4 (or vice versa) but not before a "make before break" action. The inclusion of S5 results in a switching sequence that allows all switch overs to occur with a "make before break" action. This results because the switch combination S1 and S3 plus the switch combination S6 and S4 in Fig. 6 no longer occur. This has been taken over by S5 as shown in Fig. 7A. Thus the switching sequence S1 to S6 and S3 to S4 no longer occurs and the short circuit problem will not occur because of a "make before break" switch action. The following is the switch sequence for Fig. 7A: For Positive Half-cycle: The first switch sequence is from centre tap of secondary winding 6 to X, through load RL, switch S5 back to secondary winding, terminal Energy is derived from B2.

WO 90/01230 PCT/AU89/0030 6 -12- Next switch sequence is b to x, through RL, switch S3, battery portion Bib, 2 to connection C on T1 winding. Voltage at RL is then proportional to voltage of Bib plus or minus voltage of B2.

Next switch sequence is b to x, through RL, through S3, Blb and Bla, S6 to connection of a T1. 'Voltage produced across RL equals Bla Bib, plus or minus k B2.

These sequences are reversed back to then to For Negative Half-cycle: The first sequence is identical to above.

The next sequence is b to x, through RL, through S4, through Bla, through S2 to C on T1 winding. Voltage across SRL Bla plus or minus I B2.

The final sequence is from b to x, through RL, through S4, through Bla, Bib, S1, to conversion of a Ti. Voltage across RL Bla, Bib, plus or minus h B2.

These sequences are reversed back to then The waveform resulting from Fig. 7A is shown in Fig. 7B.

The current flow path sequence through the switches and RL is now S5 to S2 and S3 then to S6 and S3 then back to S2 and S3 and then back to S5, then to S2 and S4, then to S1 and S4 then back to S2 and S4 and then back to The period of VB2 is one fifth that of the output. All switches are switched into and out of circuit with zero volts across them.

In a further embodiment the battery centre tap of Fig.

7A is eliminated as shown in Fig. 8. This is achieved by i having effectively two stages of Fig. 7A operating in series/ parallel but 180' out of phase. Switches Sla and Slb are i 'f WO 90/01230 PCT/AU89/00306 13 operated together as are S3a and S3b etc. The battery centre tap is eliminated because the two stages and are Soperated in series when S2 is closed with the current path being S3a, transformer la, winding of Ti, S2, winding T1, winding B of T2, S3b or S4a, S2, S4b. The close coupling of the two windings a and b of T2 ensure equal voltage division of the two stages. The operation of the switches is the same as in Fig. 7B. Since the switches are connected in reverse polarity to battery Bi, the and stages are 180' out of phase. The series/parallel at the output is achieved through the transformer T2. The battery centre tap is eliminated because the two stages of Fig. 7A are in series across battery B1 when S2 is closed with exactly 50% voltage division across each stage. Hence, no power would flow into or out of the battery centre tap if it were connected.

The circuit of Fig. 8 has a number of features.

The explanation of Fig. 7A is relevant.

1. The voltage across the open switches except for S2 does not exceed V B. The voltage across S2 reaches twice VBi.

2. The frequency of VB2 is five times that at the output terminals x and y.

3. The peak input/output power of B2 is one fifth the output n 25 power at x and y.

4. The switches are all switched into and out of circuit with zero volts across them.

For a given total output power in Fig. 8, the current rating of the switches is halved since each half of the i 30 circuit generates half of the output power.

6. The size of the transformer T1 is small in comparison to the output transformer T2 since it handles only one fifth of the total output power and operates at five times the frequency. L Also, for a sine wave there will always be a fundamental r l component present in T1 the magnitude of which is a function of i the output voltage amplitude. (This is explained hereunder). i' 'i 4 WO 90/01230 PCT/AU89/00306' 14 Dynamic voltage control is effected by decreasing the number of steps in the output waveform by switch control means and/or by the time occurrence of each step.

Several circuits similar to Fig. 8 may be cascaded in order to increase the number of steps which make up the output waveform. A two stage arrangement is shown in Fig. 9A and the corresponding waveforms are shown in Fig. 9B.

As VB2 now constitutes a minor part of the output waveform, it can be replaced by the simple stepped waveform shown in Fig. 10A and is generated by the circuit of Fig. Switches Sl, S2, S3, and S4 of Fig. 10B breach the ideal that all swicches be opened or closed with zero volts across them.

However, as this stage operates at only a small fraction of the total output power, the associated complexities and problems ar,' scaled down. The switching order is shown in Fig. In practice the switches in stage 1 and stage 2 and SI, S2, S3, and S4 of Fig. 10B are made up from semiconductor switches, that is thyristors, (or silicon controlled rectifiers (SCR), although it is not limited to SCR's. Transistors or other devices could be used). Thyristors capable of withstanding continuous voltages exceeding 4000 volts with RMS current ratings exceeding 3000 amps are available.

The thyristor, which conducts current in one direction only, has two stable states on and off. A single low voltage low current trigger pulse is all that is required to latch the thyristor on. It then remains on until the voltage across its anode and cathode is held at zero volts for a small time. This time is to allow the electrons and holes in the viciL .ty of the junctions of the pnpn structure of the thyristor to diffuse so that it is rendered open circuit. This turn-off time is very much reduced by applying a reverse voltage across the anode and cathode terminals. This reverse voltage must be high enough and for long enough to ensure that the thyristor turns off i under the worst case conditions. Turn off time increases as SWO 90/01230 PCT/AU89/00306 15 the junction temperature increases and as the forward anode current to be turned off commutated) increases.

A sine wave output illustrated in Fig. 10D is produced by sequencing the switches with a variable period determined by the control circuitry (Fig. 11) and the devices configuration of Fig. 10B. The voltage at x" y" is produced as in Fig. and by Fig. 10C. The timing of the switches is also shown in Fig. 10D to show their relative timings. Some switches are not shown here but their relationship is as shown in Fig. 7B. T1 (as in Fig. 8) in stage 2 of Fig. 10B would have a transformer ratio of 5:1:1 as the voltage at x and y is 1%VB. T2 in stage 1 and T1 in stage 2 can be a common transformer instead of two separate transformers and their ratios would be as illustrated in Fig. 10E such that the peak voltage produced across the outer connection of each centre tapped winding k VB.

Each switch used in Fig. 7A has been replaced with a pair of "back to back" thyristors in Fig. 11. A pair of thyristors must be used in order to allow current flow to be controlled in both directions since the given battery voltage source may be charged or discharged during the various phases of the output cycle. In fact the whole convertor concept is bi-directional.

Control is effected by known art methods, using control unit CU having logic circuit which triggers the thyristors Qla, Qlb, Q2a, Q2b, Q3a, Q3b, Q4a, Q5a, Q5b, Q6a, Q6b. Where timing is required this is best achieved with a crystal oscillator and a frequency divided circuit. Such circuits are well known.

There are four possible conditions to consider when S"toggling" between one pair of thyristors and another pair.

Four conditions are analysed for toggling between thyristors 2a/2b and 3a/3b in Fig. 12A (compare Fig. 7A). Note the corresponding positions of Q2a, Q2b, Q3a and Q3b in Figs. 11 and 12a. Transformer T1 has been omitted for clarity, butlVB 2 1 SV^Blal Condition 1: Resistive external Qload In Fig. 12A, Q6a/Q6b are to be brought into circuit and *4 WO 90/01230 PC/AU89/00306 -16- Q2a/Q2b are to be taken out of circuit. Prior to this, current flow is as per the circuit of Fig. 12B.

If Q6a/Q6b were triggered when (VB2a B2b) Bla there would be two current paths. Current would continue to flow from Bib to the load through Q2a but a very high undesirable current would flow from B2 into Bla through Q2a and Q3b as shown in Fig. 12C.

This solution to this problem is not to trigger Q6a/Q6b when VB 2 is at a maximum but to quickly ramp VB2 down at maximum pace until (VB2a VB2b) VB and then trigger Q6a/ Q6b. At this point the load current will begin to flow through Q6a as shown in Fig. 12D while Q2a will be commutated due to the reverse voltage now appearing across it (VBla VB 2 when VBla VB2).

After sufficient time has been allowed for commutation, the converter logic circuits return to their normal sequence.

The small ramp down will appear as a small pulse on the output waveform at the load. This made of commutation is hereunder called an "unforced" commutation since it was not forced to occur by the additional voltage available from VB2 for the purpose (see condition 2).

Condition 2: Resistive External Load Q2a/Q2b are to be brought into circuit and Q6a/Q6b are to be taken out of circuit. Prior to this, current flow is as per the circuit of Fig. 12D.

Q2a/Q2b are triggered when VB2 is at a maximum, i.e. (VB2a VB2b) Vbl a Q2a now forward conducts current to the load as per Fig. 12B while the additional voltage from VB 2 appears as a reverse bias across Q6a and commutates it. As Q2a comes into circuit a small voltage pedestal given by (VBa VB2) will appear across the load for a duration of one step of the output waveform. This mode of commutation will from hereon be S WO90/01230 PCT/AU89/00306 17 called a "forced" commutation since it was forced to occur due to the additional voltage available from VB2 for the purpose.

B2 Condition 3: The load is a current source causing current to flow into the converter In Fig. 13A as in condition 1, Q6a/Q6b are to be brought into circuit while Q2a/Q2b are to be taken out of circuit.

Prior to this, current flow is as per the circuit of Fig. 13B.

Q6a/Q6b are triggered when VB2 is at a maximum, i.e. (VB2a VB2b) VB a Q6a now forward conducts current from the load as per Fig. 13D while the additional voltage from VB 2 appears as a reverse bias across Q2b and commutates it. As Q6a comes into circuit a small voltage drop given by (VBla VB2) will appear across the load for a duration of one step of the output waveform. This is a "forced" commutation as per condition 2.

Condition 4: The load is a current source causing current to flow into the converter As in condition 2, Q2a/Q2b are to be brought into circuit while Q6a/Q6b are to be taken out of circuit. Prior to this, current flow is as per the circuit of Fig. 13D.

If Q2a/Q2b were triggered when (VB2a VB2b) VB there would be two current paths. Current would continue to flow from the load via Q6b into Bib but a very high undesirable current would flow from B2 into Bla through Q2a and Q3b as shown in Fig. 13C.

As in condition 1, the solution to the problem is not to trigger Q2a/Q2b when VB2 is at a maximum but to quickly ramp VB2 down at maximum pace until (VB2a VB2b) Vga once again and then trigger Q2a/Q2b. At this point, current from the external current source will begin to flow through Q2b as shown in Fig. 13B while Q6b will be commutated due to the reverse voltage now appearing across it (VB1a VB2 where VBla VB2) r;U I- II~I C ~II~~ WO 90/01230 P<7/AU9/00306 18 The small ramp down will appear as a small pulse on the output voltage waveform. This is an "unforced" commutation as per condition 1.

The four switches in Fig. 10B have been termed the exciter stage, stage 1 the driver stage and stage 2 the output stage.

TRANSFORMER ANTISATURATION SYSTEMS The three stage configuration of the converter concept requires two interstage transformers as shown in the block diagram of Fig. 14. The negative feedback loop derived from the output is required in order to maintain the magnitude, frequency and waveshape of the output voltage. However, a serious side effect of negative feedback in a system that is capable of instantaneously changing its output level is that it will always tend to saturate any transformer within the loop by introducing DC components to the AC waveform. An antisaturation system, which takes into account the peculiarities of the prevailing primary waveform is required for each transformer. The following sections describe the waveforms appearing across the primary windings of each transformer and the associated antisaturation systems.

DRIVER OUTPUT TRANSFORMER (T2 of FIG. 14) If the integral of the primary voltage waveform of T1 (Fig. 8) over one full output voltage cycle is non-zero, there will exist a DC component which will tend to saturate the magnetic core. In order to force this DC component to zero, the antisaturation system must be able to vary the average area of the primary waveform that is above and below zero volts.

However, amplitude control is difficult except at the points marked and attempting to control these would introduce unacceptable distortion of the output waveform.

Another method to control the DC component is shown in Fig. 15. In this example the area of the primary waveform below zero has been increased and that above zero has been 1I WO 90/01230 PCT/AU89/00306 19 decreased so as to produce a nett negative DC component. Only the zero crossing points have been moved while the peaks of the waveform are unaffected. Note that the resultant output waveform distortion is quite small and consists of high order harmonics. In order to cause this distortion when required, the sine wave reference signal for the main converter feedback loop (Fig. 14) must be modified with a mathematical function which varies according to which of ten amplitude levels that the converter output waveform occupies at any instant. The function, detailed in Fig. 16A, contains three factors: 1. The core flux of T2 the average of which is to be controlied to zero. The flux signal is derived from a small hall effect sensor (H2) embedded in the core of T2.

2. The primary voltage (Vp) which is sampled via the differential amplifier Al in Fig. 14.

3. A constant which is normally preset to be equal to the peak value of Vp.

Inspection of this function shows that it has maximum effect when Vp=O and when the flux offset is greatest as required. The function has no effect when I Vpj=I KI m.e. at the peaks of the primary waveform. The arithmetic signals have been chosen so as to produce negative feedback for all ten amplitude "stages".

From Figs. 15 and 16A it can be seen that the sign of k follows the polarity of the primary voltage waveform and that the polarity of the overall function alternates with each "stage" number. A system which will generate the functions of Fig. 16A is shown in Fig. 16B. The output of this system is summed with the converter since wave reference FPgnal as shown in Fig. 14.

EXCITER DRIVER TRANSFORMER f In order to generate the triangular output waveforms from I 1 WO 90/01230 PCT/AU89/00306 20 the driver and output stages, the exciter waveform is as shown in Fig. 6A. However, if the converter output is made to track a sine wave as in Fig. 14, then the exciter output waveform at the primary of T1 will become very asymmetrical and will be at its worst at the peaks of the converter output sine wave. This asymmetry combined with the effects of negative feedback would cause a large DC voltage component across the primary of TI.

Before describing a solution it would be advantageous to reconsider how the converter tracks the reference sine wave (see main feedback loop section for more detail). In Fig. 14, a sample of the output waveform (V is compared in a 0 difference amplifier (S2) with the sine wave reference signal and the error signal is passed on to the analog section of the thyristor control system. The latter system has two voltage comparators which set an upper and lower limit for the error signal from S2. The two comparators in effect present a "window" in which the error signal can remain without causing the thyristor control system to react. However, if the error signal became too large in the positive direction and it crossed the upper window limit, the thyristor control system would count down until the error was back within the confines of the window. Similarly, if the error became too large in the negative direction it would cross the lower (negative) window threshold and cause the thyristor control system to count up.

Normally this window is fixed in dimensions fixed thresholds) but the T1 antisaturation system requires that the window can be collapsed or expanded by simply varying a control voltage. It should be noted that if the window is collapsed then the control loop will become more sensitive to any error signal present (positive or negative) and will cause the thyristor control system to count up or down a fraction "earlier" than normal. Similarly, if the window is expanded, the thyristor control system will be delayed a little before counting up or down.

SI-

_J

WO 90/01230 PCT/AU89- -21- There are three factors which determine then and i direction the thyristor control system should count whe upon by the T1 antisaturation system: /00306 n which n acted 1. The magnitude and direction of the DC flux component in the core of T1. The greater the flux the more urgent is the need to take evasive action.

2. Which of the four possible states the exciter waveform is currently at.

3. The polarity of the error signal. This directs the antisaturation circuit which way to go in order to avoid fighting the action of the main converter feedback loop. This last factor is inherently taken care of by controlling the window width since the p. irity of the error signal is an indicator of which way the main loop is intending to go.

The window control is therefore only influenced by factors 1 and 2 and can be shown to obey the table of Fig. 17. The stage number is decoded from logic signals in the thyristor control sequencer.

Fig. 18 shows the block diagram of a system which would satisfy the above requirements.

SINE WAVE GENERATOR AND MAIN FEEDBACK LOOP Fig. 21 shows a block diagram of this section of the converter. A crystal oscillator, the main frequency reference for the converter, is first divided down by a section of a diesel/generator synchronisation system. The divider output drives a set of up/down counters, the outputs of which address a sine function lookup table in an Eprom. The Eprom data outputs are converted to an analog sine wave by the D/A converter. The D/A analog voltage reference is switches to A i WO 90/01230 PCT/AU89/00306 22 negative polarity by the quadrant decoder for the negative half cycles of the sine wave. I The reference sine wave is compared with a sample of the converter output voltage and the resultant analog error signal is passed on to two voltage comparators. If the error signal remains within the "window" formed by the thresholds of the two comparators, no count up or count down outputs will be generated and the converter output will not change. If the error signal exceeds one of the window boundaries then the corresponding count up or count down pulse that is generated will cause the converter output to step in a direction which reduces the magnitude of the error.

The sensitivity of the two voltage comparators to the amplitude of the error signal may be varied by the "window width" control signal from the exciter-driver interstage transformer antisaturation system. The section on antisaturation systems contains a description of operation.

CURRENT DIRECTION SENSING The concept of the converter is inherently bi-directional but, as described in the "basic converter concept" section, the method of commutation of certain thyristors (forced or I? unforced) depends on the diro.,tion of current flow at the output of the stage containing those thyristors. Therefore the output current direction of each stage must be monitored by a system (one per stage) and the information must be sent to the thyristor sequencer system.

The obvious method is to insert a small resistor in series with the output of each stage and monitor the voltage developed across it. However, at the power levels envisaged, the power dissipation in this resistor would be very high. If the f resistance is made small to reduce the power dissipation then iiii WO 90/01230 PCF/AU9/00306 23 the voltage developed is extremely small and puts stability constraints on the analog circuitry.

A better method is to make use of the voltage drops that already exist across the converter thyristors, since it is the current direction that is required, not the magnitude. Fig. 11 shows that the output current of the converter stage is returned through terminal y and therefore must pass through one of the following thyristor pairs: Q3a/Q3b, Q4a/Q4b or The forward voltage drop across a conducting thyristor is of the order of 1 volt but the voltage sense mechanism must be able to withstand the full potential of VB1 when neither thyristor in a pair is conducting. The thyristor sequencer logic is used to select a voltage sense circuit in unison with selection of thyristor pairs. Fig. 22 shows a block diagram of the system.

THYRISTOR SEOUENCER The following describes the logic required to sequence the thyristor pairs. The description relates to the configuration of Fig. 10B, incorporating in stage one and two the circuitry of Fig. 11.

The waveform of Fig. 10A is produced by a full bridge auxiliary commutated stage, termed the "Exciter".

The heart of the logic "thyristor sequencer" comprises a six bit up/down counter and a logic decoder (Fig. 21). Each binary value out of the counter equates with a set of thyristors in the exciter, driver and output stages, through the decoder. Clocking of the counter sequences the thyristors through their combinations to produce the waveforms of Fig. 9B.

The counter is clocked up until the maximum voltage is produced. The counter then counts down until the minimum voltage (most negative) is produced.

Ii F- WO 90/01230 PCT/AU89/00306 24 Fig. 22 is an expansion of Fig. 21.

The sequencer counter outputs are first decoded to indicate to the forced/unforced decoder the next sequencer counter toggle will result in a output and/or driver thyristor toggle. The forced/unforced decoder will then determine in conjunction with the direction of current flow through the thyristors whether there will need to be a forced or unforced commutation.

If a forced commutation, the counter is inhibited for a fixed period of time in the sequencer (up/down) counter controller so that the resultant reverse voltage across the thyristor going out of circuit exceeds in time the maximum turn off time for the thyristors at worst case conditions. Also allowed for here is that the complete transfer of current from one thyristor pair to another takes a finite time which is mostly determined by the series inductance in the circuit.

This series inductance comprises mostly the leakage inductance of the interstage transformers.

The interstage transformers are therefore specially wound to result in the minimum of leakage inductance.

If an unforced commutation is required the incoming thyristors are inhibited from being fired untl. the voltage across the interstage transformer is low enough to ensure that no reverse current flow will occur as outlined in thyristor toggling conditions 4 and 1, previously.

In most instances, the DC power source will not be provided with a centre tap but it will be seen for example in Fig. 7A that this is not an essential element of the invention.

Fig. 8 is the electrical equivalent of Fig. 7A, but nevertheless avoids a need for that centre tap. In other instances, by careful control of time, there can be a finite but very small I V WO 90/01230 PC/AU89/00306 gap between the times the switches break and make.

It is advantageous to have the DC power source in a form of a plurality of batteries which can store electrical energy, and this stored energy can be used to supplement the energy from an alternator, by careful adjustment of timing of introduction of the DC power to the alternated power. However the DC power source could also be a rotary DC machine (for example, a DC generator) carried on an alternator shaft or otherwise driven by the diesel engine. The batteries can be replaced by fuel cells, which can be regarded as electrical equivalents. Since the energy stage time of the batteries is small they could be substituted for a small capacitor, or a capacitor bank could be used.

For load levelling applications the convertor appears like a rotary device comprising a AC alternator and DC motor utilising control means which are well known. The converter t a +'iiyoc a in T1 v R+h 1k4 a 4 t T f .rriirvn,- .T voltage at start up into an electricity grid by starting at say 1 output step in the first half cycle and then building up steps each half cycle until full output is achieved. This can be achieved by controlling the switch sequencing and timing.

For operation in parallel with diesel generators the converter matches frequency or phase and voltage to the generator and brings in a contactor. Power factor to the generator is maintained by slightly varying the converter output voltage until the required current and voltage phase relationship is achieved measured through current and voltage transformers t

Claims (19)

1. A converter device comprising a uni-directional electrical energy source having two ends and a further energy source having two ends and a centre tap to be a bi- directional energy source, a pair of conductor rails extending from the uni-directional energy source, a first bridging conductor having two portions extending between said ends of the bi-directional energy source and respective said rails, a second bridging conductor extending between the rails, a first pair of switches one in each said first conductor portion, a second pair of switches in the second bridging conductor portion, an electrical load connected between the centre tap and an electrical conductor between the switches of the second pair, so arranged that, upon selective opening and closing of the switches, current flow in the first said energy source is "uni-directional, and in the second said energy source is bi- directional.

2. A converter device according to claim 1 wherein current flow is into said uni-directional energy source when th converter functions as a rectifier, and wherein the current flow is out of said uni-direction' energy source when the 5 converter functions as an inverter.

3. A converter device according to claim 1 or claim 2 wherein said uni-directional energy source is a rechargeable battery.

4. A converter device according to any preceding claim wherein said bi-directional energy source is a battery assembly having at least two effective but separate batteries.

I RA4, __I 27 A converter device according to claim 1 or claim 2 wherein said bi-directional energy source comprises a transformer having a primary winding and a secondary winding, said ends being the ends of the primary winding and said centre tap of the bi-directional energy source being a centre tap of the secondary winding.

6. A converter device according to any preceding claim wherein said switches are arranged to open and close when there is little or no voltage across them.

7. A converter device according to any preceding claim wherein said switches are electronic switches arranged to open and close at an alternating current frequency.

8. A converter device according to claim 7 wherein said electronic switches are thyristors and comprise 4 a thyristor trigger logic circuit which effects said opening and closing of said switches by controlling ON and OFF periods of said thyristors. o a"t:

9. A converter comprising a plurality of converter devices according to claim 8 wherein said thyristors arranged in a cascade array to fire sequentially and produce a stepped wave t compatible with a sine wave, and thereby adapted, when connected to an AC power source of the same frequency, to 06 "function as an AC to DC converter or a DC to AC inverter.

An AC/DC converter having an inverter mode of operation, r* comprising a transformer, a DC power source having a bank of batteries, a second power source and a plurality of switch means, and switch control means, a transformer having a first winding with a centre tap and a second winding, and said DC power source centre tap connected to a first end of the first winding through a said switch, RA T- I 4 28 a second end of said first winding being connected to a negative rail of said batteries of the DC power source through a first said switch means and to the positive rail thereof through another said switch means, and to a first AC terminal through a further said switch means, a second power source/power sink coupled to said second winding, said centre tap connecting to a second AC terminal of the converter, a said first AC terminal being referenced to a negative or positive rail of said DC power source through further said switch means, said switch control means being operatively coupled to all said switch means to control opening and closing of said switch means in a sequence wherein each switch thereof makes contact before its predecessor switch breaks contact, actuation of each switch occurring when the instantaneous voltage difference across the incoming switch approximates zero as a result of variation of voltage of said bi- directional second power source, and minimal voltage change Soccurs at that time across said first winding, resulting in no change (or minimal) in voltage at the AC S"terminals.

11. A converter device according to claim 10 excluding the further switch extending between a said second end of the first winding and the First AC Terminal where all switching II.! is not by a make before break action.

12. An AC/DC converter having an inverter mode of operation comprising first and second transformers, a DC power source having a battery or a bank of batteries, a second power source, a plurality of switch means, and switch control means, ry 0dNTO I 29 said first transformer having a first winding with a centre tap, a second winding, identical with the first winding, and a third winding, a first end of said first winding beiqg connected to a second end of said second winding through a said switch means, said second transformer having a first winding, a second winding and a third winding, wherein the said first and second windings of the second transformer are identical and the third winding end is connected to two AC terminals, the second end of said first winding of first transformer being connected to a negative rail of said battery or batteries through a said switch means and to the positive rail thereof through another said switch means, and to the first end of the said first winding of the second transformer through a further said switch means, ".the first end of said second winding of first transformer being connected to said negative rail through one S of said switch means and to the positive rail through another eoe of said switch means, and to second end of said second winding of second transformer through another of said switch *Oo means, said centre tap of first winding connecting to the second end of the said first winding of second transformer and said centre tap of the second winding connecting to the •2.G first end of the said second winding of the second transformer, the said second power source/power sink coupled to said third winding of first transformer the said first end of the first winding of the second transformer also being referenced to the negative and positive rails through said switches, the said second end of the second winding of the second transformer also being referenced to the negative and positive rails through said switches, 30 said switch control means being operatively coupled to said switch means to control opening and closing of said switch means in a sequence wherein each switch makes contact S before its predecessor switch breaks contact, actuation of each of said switch means occurring when the instantaneous voltage difference across the incoming switch becomes zero (or near zero with different types of semiconductor switches) as a result of variation of the said second power source, and so arranged that minimal voltage change occurs at that time across said first and second windings of first transformer, resulting in minimal change in voltage at the AC terminals.

13. A converter comprising: an exciter stage, a driver stage and an output stage, a pair of interstage transformers interconnecting those ee. stages in cascade, said driver stage and output stage being in accordance with claim 8, a negative feedback loop derived from the output stage, and a pair of antisaturation systems coupled to the feedback loop and applied to windings of each respective said transformer.

14. A converter according to claim 13 wherein each said •i antisaturation system comprises means operable to vary the average area of input wave form of the driver stage and output stage above and below zero volts.

A converter according to claim 14 further comprising a respective Hall sensor magnetically coupled to the core of each said transformer, a primary voltage sensor, and calculating means which modifies control of said thyristors in response to sensed transformer core flux and primary voltage amplitude. fl 31

16. A converter comprising a plurality of converter devices in cascade, each device being in accordance with claim 7, and thyristor control devices which control timing of firing of the thyristors and the time periods between said firings so that the output of the cascade of devices approximates a sine wave.

17. A converter according to claim 16 further comprising a sine wave generator having a crystal oscillator, a frequency divider, a set of up/down counters, an Eprom having a sine function look-up table, a digital/analogue device, means connecting those said elements in that sequence to comparators which identify error, and error correction means coupled to the converter.

18. A converter device according to claim 1 and substantially as described and illustrated in any one of Figs. 4A, 5A, 6, 7A, 8 or 11. too

19. A converter comprising a plurality of converter devices according to claim 18 arranged in a cascade array. Dated this 14th day of April, 1992. POWER REFLEX PTY. LTD., By its Patent Attorneys, R.K. MADDERN ASSOCIATES V.i 61 R A4,