AU6140098A - Automatic transitioning between acpi c3 and c2 states - Google Patents

Automatic transitioning between acpi c3 and c2 states

Info

Publication number
AU6140098A
AU6140098A AU61400/98A AU6140098A AU6140098A AU 6140098 A AU6140098 A AU 6140098A AU 61400/98 A AU61400/98 A AU 61400/98A AU 6140098 A AU6140098 A AU 6140098A AU 6140098 A AU6140098 A AU 6140098A
Authority
AU
Australia
Prior art keywords
acpi
states
automatic transitioning
transitioning
automatic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU61400/98A
Inventor
David Poisner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of AU6140098A publication Critical patent/AU6140098A/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215Monitoring of peripheral devices
    • G06F1/3225Monitoring of peripheral devices of memory devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815Cache consistency protocols
    • G06F12/0831Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
AU61400/98A 1997-03-31 1998-02-02 Automatic transitioning between acpi c3 and c2 states Abandoned AU6140098A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US83147297A 1997-03-31 1997-03-31
US08831472 1997-03-31
PCT/US1998/001907 WO1998044405A1 (en) 1997-03-31 1998-02-02 Automatic transitioning between acpi c3 and c2 states

Publications (1)

Publication Number Publication Date
AU6140098A true AU6140098A (en) 1998-10-22

Family

ID=25259141

Family Applications (1)

Application Number Title Priority Date Filing Date
AU61400/98A Abandoned AU6140098A (en) 1997-03-31 1998-02-02 Automatic transitioning between acpi c3 and c2 states

Country Status (4)

Country Link
AU (1) AU6140098A (en)
DE (1) DE19882269T1 (en)
GB (1) GB2338806A (en)
WO (1) WO1998044405A1 (en)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG65097A1 (en) * 1998-12-28 2001-08-21 Compaq Computer Corp Break event generation during transitions between modes of operation in a computer system
US6633987B2 (en) * 2000-03-24 2003-10-14 Intel Corporation Method and apparatus to implement the ACPI(advanced configuration and power interface) C3 state in a RDRAM based system
US6725384B1 (en) * 2000-06-30 2004-04-20 Intel Corporation Method and apparatus for enabling a wake-up event by modifying a second register to enable a second wake-up event responsive to detecting entry of data in a first register
US20030163745A1 (en) * 2002-02-27 2003-08-28 Kardach James P. Method to reduce power in a computer system with bus master devices
AU2003283550A1 (en) 2003-01-13 2004-08-10 Arm Limited Data processing performance control
KR100563691B1 (en) 2003-06-09 2006-03-28 엘지전자 주식회사 Apparatus and method for managing power in computer system
GB2403561A (en) * 2003-07-02 2005-01-05 Advanced Risc Mach Ltd Power control within a coherent multi-processor system
US7363523B2 (en) * 2004-08-31 2008-04-22 Intel Corporation Method and apparatus for controlling power management state transitions
US7664970B2 (en) 2005-12-30 2010-02-16 Intel Corporation Method and apparatus for a zero voltage processor sleep state
US7412570B2 (en) 2005-11-15 2008-08-12 Sun Microsystems, Inc. Small and power-efficient cache that can provide data for background DNA devices while the processor is in a low-power state
US7958312B2 (en) 2005-11-15 2011-06-07 Oracle America, Inc. Small and power-efficient cache that can provide data for background DMA devices while the processor is in a low-power state
US7873788B1 (en) 2005-11-15 2011-01-18 Oracle America, Inc. Re-fetching cache memory having coherent re-fetching
US7516274B2 (en) 2005-11-15 2009-04-07 Sun Microsystems, Inc. Power conservation via DRAM access reduction
US7934054B1 (en) 2005-11-15 2011-04-26 Oracle America, Inc. Re-fetching cache memory enabling alternative operational modes
CN100377041C (en) * 2005-12-02 2008-03-26 威盛电子股份有限公司 Power source management device and method for multi-processor system
CN100397301C (en) * 2006-01-09 2008-06-25 威盛电子股份有限公司 Power-saving method of central processor
TW200727127A (en) 2006-01-12 2007-07-16 Via Tech Inc Central processing unit power saving method and system
CN100397302C (en) * 2006-01-17 2008-06-25 威盛电子股份有限公司 Power saving method and system for CPU
CN100380282C (en) * 2006-03-02 2008-04-09 威盛电子股份有限公司 Power-supply saving method and system for central processing unit
TWI326817B (en) * 2006-07-07 2010-07-01 Via Tech Inc A power saving method and a system thereof applied to a cpu
US9207747B2 (en) * 2012-10-24 2015-12-08 Insyde Software Corp. Method and device for advanced configuration and power interface (ACPI) sleep-state support using CPU-only reset
US9710041B2 (en) * 2015-07-29 2017-07-18 Intel Corporation Masking a power state of a core of a processor

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69031807T2 (en) * 1989-06-30 1998-04-09 Fujitsu Personal Syst Inc Method for reducing the power consumption of a computer
GB2260631B (en) * 1991-10-17 1995-06-28 Intel Corp Microprocessor 2X core design
US5615376A (en) * 1994-08-03 1997-03-25 Neomagic Corp. Clock management for power reduction in a video display sub-system
US5669003A (en) * 1994-12-23 1997-09-16 Intel Corporation Method of monitoring system bus traffic by a CPU operating with reduced power
US5713029A (en) * 1995-09-29 1998-01-27 International Business Machines Corporation Information handling system including doze mode control
US5721935A (en) * 1995-12-20 1998-02-24 Compaq Computer Corporation Apparatus and method for entering low power mode in a computer system
US5740454A (en) * 1995-12-20 1998-04-14 Compaq Computer Corporation Circuit for setting computer system bus signals to predetermined states in low power mode

Also Published As

Publication number Publication date
GB9922090D0 (en) 1999-11-17
DE19882269T1 (en) 2000-05-11
GB2338806A (en) 1999-12-29
WO1998044405A1 (en) 1998-10-08

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