AU5703200A - Process and system for carrying out parallel packet processing - Google Patents

Process and system for carrying out parallel packet processing

Info

Publication number
AU5703200A
AU5703200A AU57032/00A AU5703200A AU5703200A AU 5703200 A AU5703200 A AU 5703200A AU 57032/00 A AU57032/00 A AU 57032/00A AU 5703200 A AU5703200 A AU 5703200A AU 5703200 A AU5703200 A AU 5703200A
Authority
AU
Australia
Prior art keywords
carrying
packet processing
out parallel
parallel packet
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU57032/00A
Inventor
Shlomo Cohen
Ran Kahn
Joseph Lifshitz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BRIGHTCOM TECHNOLOGIES Ltd
Coresma Ltd
Original Assignee
BRIGHTCOM TECHNOLOGIES Ltd
Coresma Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from IL13079699A external-priority patent/IL130796A/en
Priority claimed from IL13262899A external-priority patent/IL132628A0/en
Application filed by BRIGHTCOM TECHNOLOGIES Ltd, Coresma Ltd filed Critical BRIGHTCOM TECHNOLOGIES Ltd
Publication of AU5703200A publication Critical patent/AU5703200A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/2801—Broadband local area networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
AU57032/00A 1999-07-05 2000-07-04 Process and system for carrying out parallel packet processing Abandoned AU5703200A (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
IL130796 1999-07-05
IL13079699A IL130796A (en) 1999-07-05 1999-07-05 Packet processor
IL13262899A IL132628A0 (en) 1999-10-28 1999-10-28 Process and system for carrying out parallel packet processing
IL132628 1999-10-28
PCT/IL2000/000392 WO2001006725A2 (en) 1999-07-05 2000-07-04 Process and system for carrying out parallel packet processing

Publications (1)

Publication Number Publication Date
AU5703200A true AU5703200A (en) 2001-02-05

Family

ID=26323864

Family Applications (1)

Application Number Title Priority Date Filing Date
AU57032/00A Abandoned AU5703200A (en) 1999-07-05 2000-07-04 Process and system for carrying out parallel packet processing

Country Status (2)

Country Link
AU (1) AU5703200A (en)
WO (1) WO2001006725A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001061935A1 (en) * 2000-02-17 2001-08-23 Conexant Systems, Inc, Cable modem having a programmable media access controller

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5787483A (en) * 1995-09-22 1998-07-28 Hewlett-Packard Company High-speed data communications modem

Also Published As

Publication number Publication date
WO2001006725A2 (en) 2001-01-25
WO2001006725A3 (en) 2001-07-19

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase