AU3143395A - Method for semaphore communication between incompatible bus locking architectures - Google Patents

Method for semaphore communication between incompatible bus locking architectures

Info

Publication number
AU3143395A
AU3143395A AU31433/95A AU3143395A AU3143395A AU 3143395 A AU3143395 A AU 3143395A AU 31433/95 A AU31433/95 A AU 31433/95A AU 3143395 A AU3143395 A AU 3143395A AU 3143395 A AU3143395 A AU 3143395A
Authority
AU
Australia
Prior art keywords
bus locking
architectures
semaphore communication
incompatible bus
incompatible
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU31433/95A
Inventor
William Todd Krein
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Apple Inc
Original Assignee
Apple Computer Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Apple Computer Inc filed Critical Apple Computer Inc
Publication of AU3143395A publication Critical patent/AU3143395A/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/4031—Coupling between buses using bus bridges with arbitration
    • G06F13/4036—Coupling between buses using bus bridges with arbitration and deadlock prevention

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
AU31433/95A 1994-07-21 1995-07-20 Method for semaphore communication between incompatible bus locking architectures Abandoned AU3143395A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US27827494A 1994-07-21 1994-07-21
US278274 1994-07-21
PCT/US1995/009313 WO1996003697A1 (en) 1994-07-21 1995-07-20 Method for semaphore communication between incompatible bus locking architectures

Publications (1)

Publication Number Publication Date
AU3143395A true AU3143395A (en) 1996-02-22

Family

ID=23064369

Family Applications (1)

Application Number Title Priority Date Filing Date
AU31433/95A Abandoned AU3143395A (en) 1994-07-21 1995-07-20 Method for semaphore communication between incompatible bus locking architectures

Country Status (2)

Country Link
AU (1) AU3143395A (en)
WO (1) WO1996003697A1 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5845107A (en) * 1996-07-03 1998-12-01 Intel Corporation Signaling protocol conversion between a processor and a high-performance system bus
US5764934A (en) * 1996-07-03 1998-06-09 Intel Corporation Processor subsystem for use with a universal computer architecture
US7089555B2 (en) 2001-06-27 2006-08-08 International Business Machines Corporation Ordered semaphore management subsystem
US7454753B2 (en) 2001-06-27 2008-11-18 International Business Machines Corporation Semaphore management subsystem for use with multi-thread processor systems
US7143414B2 (en) 2001-09-26 2006-11-28 International Business Machines Corporation Method and apparatus for locking multiple semaphores
US7406690B2 (en) 2001-09-26 2008-07-29 International Business Machines Corporation Flow lookahead in an ordered semaphore management subsystem
GB2388929B (en) 2002-05-23 2005-05-18 Advanced Risc Mach Ltd Handling of a multi-access instruction in a data processing apparatus
EP3493069B1 (en) * 2017-11-29 2021-02-17 ARM Limited Resource allocation for atomic data access requests

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5175829A (en) * 1988-10-25 1992-12-29 Hewlett-Packard Company Method and apparatus for bus lock during atomic computer operations
US5293491A (en) * 1990-12-28 1994-03-08 International Business Machines Corp. Data processing system and memory controller for lock semaphore operations
US5379384A (en) * 1992-06-05 1995-01-03 Intel Corporation Configuration data loopback in a bus bridge circuit

Also Published As

Publication number Publication date
WO1996003697A1 (en) 1996-02-08

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