AU2993600A - Patterned silicon-on-insulator devices - Google Patents

Patterned silicon-on-insulator devices

Info

Publication number
AU2993600A
AU2993600A AU29936/00A AU2993600A AU2993600A AU 2993600 A AU2993600 A AU 2993600A AU 29936/00 A AU29936/00 A AU 29936/00A AU 2993600 A AU2993600 A AU 2993600A AU 2993600 A AU2993600 A AU 2993600A
Authority
AU
Australia
Prior art keywords
patterned silicon
insulator devices
insulator
devices
patterned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU29936/00A
Inventor
Michael L. Alles
Julian G. Blake
Robert P. Dolan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibis Technology Corp
Original Assignee
Ibis Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibis Technology Corp filed Critical Ibis Technology Corp
Publication of AU2993600A publication Critical patent/AU2993600A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76243—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76267—Vertical isolation by silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76281—Lateral isolation by selective oxidation of silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76283—Lateral isolation by refilling of trenches with dielectric material

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
AU29936/00A 1999-02-12 2000-02-14 Patterned silicon-on-insulator devices Abandoned AU2993600A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11971699P 1999-02-12 1999-02-12
US60119716 1999-02-12
PCT/US2000/003744 WO2000048245A1 (en) 1999-02-12 2000-02-14 Patterned silicon-on-insulator devices

Publications (1)

Publication Number Publication Date
AU2993600A true AU2993600A (en) 2000-08-29

Family

ID=22385941

Family Applications (1)

Application Number Title Priority Date Filing Date
AU29936/00A Abandoned AU2993600A (en) 1999-02-12 2000-02-14 Patterned silicon-on-insulator devices

Country Status (2)

Country Link
AU (1) AU2993600A (en)
WO (1) WO2000048245A1 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4322453B2 (en) * 2001-09-27 2009-09-02 株式会社東芝 Semiconductor device and manufacturing method thereof
US6737332B1 (en) * 2002-03-28 2004-05-18 Advanced Micro Devices, Inc. Semiconductor device formed over a multiple thickness buried oxide layer, and methods of making same
FR2847077B1 (en) 2002-11-12 2006-02-17 Soitec Silicon On Insulator SEMICONDUCTOR COMPONENTS, PARTICULARLY OF THE MIXED SOI TYPE, AND METHOD OF MAKING SAME
JP4790211B2 (en) 2003-06-13 2011-10-12 シルトロニック・ジャパン株式会社 SOI substrate, semiconductor substrate and manufacturing method thereof
US7274072B2 (en) * 2005-04-15 2007-09-25 International Business Machines Corporation Hybrid bulk-SOI 6T-SRAM cell for improved cell stability and performance
US8703516B2 (en) 2008-07-15 2014-04-22 Infineon Technologies Ag MEMS substrates, devices, and methods of manufacture thereof
US8361829B1 (en) 2011-08-31 2013-01-29 International Business Machines Corporation On-chip radiation dosimeter
DE102017212437B3 (en) 2017-07-20 2018-12-20 Infineon Technologies Ag Method for producing a buried cavity structure

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02218159A (en) * 1989-02-17 1990-08-30 Nissan Motor Co Ltd Manufacture of semiconductor substrate
JP3012673B2 (en) * 1990-08-21 2000-02-28 三菱電機株式会社 Method for manufacturing semiconductor device
JPH065826A (en) * 1992-06-18 1994-01-14 Fujitsu Ltd Manufacture of semiconductor device
US5399507A (en) * 1994-06-27 1995-03-21 Motorola, Inc. Fabrication of mixed thin-film and bulk semiconductor substrate for integrated circuit applications
JPH0922951A (en) * 1995-06-07 1997-01-21 Sgs Thomson Microelectron Inc Zero power sram with embedding oxide separation formed in pattern
JPH10107233A (en) * 1996-09-25 1998-04-24 Nippon Steel Corp Semiconductor memory device and its manufacture
US5956597A (en) * 1997-09-15 1999-09-21 International Business Machines Corporation Method for producing SOI & non-SOI circuits on a single wafer

Also Published As

Publication number Publication date
WO2000048245A1 (en) 2000-08-17

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase