AU2358500A - Method, system, and computer program product for error detection and correction in a synchronization word - Google Patents

Method, system, and computer program product for error detection and correction in a synchronization word

Info

Publication number
AU2358500A
AU2358500A AU23585/00A AU2358500A AU2358500A AU 2358500 A AU2358500 A AU 2358500A AU 23585/00 A AU23585/00 A AU 23585/00A AU 2358500 A AU2358500 A AU 2358500A AU 2358500 A AU2358500 A AU 2358500A
Authority
AU
Australia
Prior art keywords
correction
computer program
program product
error detection
synchronization word
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU23585/00A
Inventor
Sunghun Choi
Moe A. Lwin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ADVANCED WIRELESS TECHNOLOGIES Inc
Original Assignee
ADVANCED WIRELESS TECHNOLOGIES
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ADVANCED WIRELESS TECHNOLOGIES filed Critical ADVANCED WIRELESS TECHNOLOGIES
Publication of AU2358500A publication Critical patent/AU2358500A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0054—Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/042—Detectors therefor, e.g. correlators, state machines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/438—Interfacing the downstream path of the transmission network originating from a server, e.g. retrieving encoded video stream packets from an IP network
    • H04N21/4382—Demodulation or channel decoding, e.g. QPSK demodulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Multimedia (AREA)
  • Artificial Intelligence (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Radio Relay Systems (AREA)
  • Circuits Of Receivers In General (AREA)
AU23585/00A 1998-12-11 1999-12-13 Method, system, and computer program product for error detection and correction in a synchronization word Abandoned AU2358500A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US20929298A 1998-12-11 1998-12-11
US09209292 1998-12-11
PCT/US1999/029445 WO2000034846A2 (en) 1998-12-11 1999-12-13 Method, system, and computer program product for error detection and correction in a synchronization word

Publications (1)

Publication Number Publication Date
AU2358500A true AU2358500A (en) 2000-06-26

Family

ID=22778186

Family Applications (1)

Application Number Title Priority Date Filing Date
AU23585/00A Abandoned AU2358500A (en) 1998-12-11 1999-12-13 Method, system, and computer program product for error detection and correction in a synchronization word

Country Status (2)

Country Link
AU (1) AU2358500A (en)
WO (1) WO2000034846A2 (en)

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4646303A (en) * 1983-10-05 1987-02-24 Nippon Gakki Seizo Kabushiki Kaisha Data error detection and correction circuit
US5031218A (en) * 1988-03-30 1991-07-09 International Business Machines Corporation Redundant message processing and storage
KR950001439B1 (en) * 1990-04-30 1995-02-24 삼성전자주식회사 Coding apparatus of error correction
DE19614737A1 (en) * 1996-04-15 1997-10-16 Bosch Gmbh Robert Error-proof multiplex process with possible retransmission
JP3566007B2 (en) * 1996-11-12 2004-09-15 富士通株式会社 Descramble circuit, scramble pattern generation circuit, and scramble pattern generation method
US5920439A (en) * 1997-02-21 1999-07-06 Storage Technology Corporation Method for determining longitudinal position on a magnetic tape having an embedded position count field
US5889793A (en) * 1997-06-27 1999-03-30 Integrated Device Technology, Inc. Methods and apparatus for error correction
US5999110A (en) * 1998-02-17 1999-12-07 International Business Machines Corporation Defect tolerant binary synchronization mark

Also Published As

Publication number Publication date
WO2000034846A2 (en) 2000-06-15
WO2000034846A3 (en) 2000-11-23
WO2000034846A9 (en) 2001-05-10

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase