AU2146900A - Emulation for synchronous behavior in a plesiosynchronous environment - Google Patents

Emulation for synchronous behavior in a plesiosynchronous environment

Info

Publication number
AU2146900A
AU2146900A AU21469/00A AU2146900A AU2146900A AU 2146900 A AU2146900 A AU 2146900A AU 21469/00 A AU21469/00 A AU 21469/00A AU 2146900 A AU2146900 A AU 2146900A AU 2146900 A AU2146900 A AU 2146900A
Authority
AU
Australia
Prior art keywords
plesiosynchronous
emulation
environment
synchronous behavior
synchronous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU21469/00A
Inventor
Paul M. Sweazey
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
INTERA SYSTEMS Inc
Original Assignee
INTERA SYSTEMS Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by INTERA SYSTEMS Inc filed Critical INTERA SYSTEMS Inc
Publication of AU2146900A publication Critical patent/AU2146900A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0421—Circuit arrangements therefor
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/07—Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/403—Bus networks with centralised control, e.g. polling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/64—Hybrid switching systems
    • H04L12/6418—Hybrid transport
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0647—Synchronisation among TDM nodes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0658—Clock or time synchronisation among packet nodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
AU21469/00A 1998-11-09 1999-11-09 Emulation for synchronous behavior in a plesiosynchronous environment Abandoned AU2146900A (en)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US10773298P 1998-11-09 1998-11-09
US60107732 1998-11-09
US12458199P 1999-03-16 1999-03-16
US60124581 1999-03-16
US12726299P 1999-03-31 1999-03-31
US60127262 1999-03-31
PCT/US1999/026486 WO2000028683A2 (en) 1998-11-09 1999-11-09 Emulation for synchronous behavior in a plesiosynchronous environment

Publications (1)

Publication Number Publication Date
AU2146900A true AU2146900A (en) 2000-05-29

Family

ID=27380349

Family Applications (1)

Application Number Title Priority Date Filing Date
AU21469/00A Abandoned AU2146900A (en) 1998-11-09 1999-11-09 Emulation for synchronous behavior in a plesiosynchronous environment

Country Status (2)

Country Link
AU (1) AU2146900A (en)
WO (1) WO2000028683A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004055105A1 (en) * 2004-11-15 2006-05-24 Bosch Rexroth Aktiengesellschaft Method for time synchronization in a cyclic communication system
TW200708022A (en) * 2005-06-13 2007-02-16 Koninkl Philips Electronics Nv Electronic device, method for frame synchronization, and mobile device

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3511352A1 (en) * 1985-03-28 1986-10-09 Siemens AG, 1000 Berlin und 8000 München Method and coupling device for distribution of plesiochronous broadband digital signals
DE3619371A1 (en) * 1986-06-09 1987-12-10 Siemens Ag Method for multiplexing and demultiplexing plesiochronous digital signals
US5138615A (en) * 1989-06-22 1992-08-11 Digital Equipment Corporation Reconfiguration system and method for high-speed mesh connected local area network
SE468495B (en) * 1991-05-29 1993-01-25 Ellemtel Utvecklings Ab SETTING AND DEVICE TO SYNCHRONIZE TWO OR MULTIPLE MULTIPLE TYPE COMMUNICATIONS
KR100304063B1 (en) * 1993-08-04 2001-11-22 썬 마이크로시스템즈, 인코포레이티드 2-point interconnection communication utility

Also Published As

Publication number Publication date
WO2000028683A2 (en) 2000-05-18
WO2000028683A3 (en) 2000-11-09
WO2000028683A9 (en) 2002-08-22

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase