AU2006303865B2 - Multiple machine architecture with overhead reduction - Google Patents

Multiple machine architecture with overhead reduction Download PDF

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AU2006303865B2
AU2006303865B2 AU2006303865A AU2006303865A AU2006303865B2 AU 2006303865 B2 AU2006303865 B2 AU 2006303865B2 AU 2006303865 A AU2006303865 A AU 2006303865A AU 2006303865 A AU2006303865 A AU 2006303865A AU 2006303865 B2 AU2006303865 B2 AU 2006303865B2
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computers
memory locations
computer
memory
machine
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AU2006303865A1 (en
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John Matthew Holt
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Waratek Pty Ltd
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Waratek Pty Ltd
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Priority claimed from PCT/AU2006/001451 external-priority patent/WO2007045014A1/en
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Abstract

A multiple computer environment is disclosed in which an application program executes simultaneously on a plurality of computers (M1, M2, ....Mn) interconnected by a communications network (53) and in which the local memory of each computer is not maintained substantially the same by updating in due course. An address table mechanism is provided to permit access to an asset, object, or structure (ie memory location) for the purpose of updating, for example. Since not all computers have the same memory, it is not necessary for all computers to be updated and so the volume of traffic on the communications network (53) is reduced.

Description

WO 2007/045014 PCT/AU2006/001451 MULTIPLE MACHINE ARCHITECTURE WITH OVERHEAD REDUCTION FIELD OF THE INVENTION The present invention relates to computing and, in particular, to the 5 simultaneous operation of a plurality of computers interconnected via a communications network. BACKGROUND ART International Patent Application No. PCT/AU2005/000580 (Attorney Ref 10 5027F-WO) published under WO 2005/103926 (to which US Patent Application No. 11/111,946 and published under No. 2005-0262313 corresponds) in the name of the present applicant, discloses how different portions of an application program written to execute on only a single computer can be operated substantially simultaneously on a corresponding different one of a plurality of computers. That simultaneous 15 operation has not been commercially used as of the priority date of the present application. International Patent Application Nos. PCT/AU2005/001641 (Attorney Ref 5027F-D1-WO) to which US Patent Application No. 11/259885 entitled: "Computer Architecture Method of Operation for Multi-Computer Distributed Processing and Co-ordinated Memory and Asset Handling" corresponds and 20 PCT/AU2006/000532 (Attorney Ref: 5027F-D2-WO) in the name of the present applicant and unpublished as at the priority date of the present application, also disclose further details. The contents of the specification of each of the abovementioned prior application(s) are hereby incorporated into the present specification by cross reference for all purposes. 25 Briefly stated, the abovementioned patent specifications disclose that at least one application program written to be operated on only a single computer can be simultaneously operated on a number of computers each with independent local memory. The memory locations required for the operation of that program are 30 replicated in the independent local memory of each computer. On each occasion on which the application program writes new data to any replicated memory location, that new data is transmitted and stored at each corresponding memory location of each computer. Thus apart from the possibility of transmission delays, each computer has - 1- WO 2007/045014 PCT/AU2006/001451 a local memory the contents of which are substantially identical to the local memory of each other computer and are updated to remain so. Since all application programs, in general, read data much more frequently than they cause new data to be written, the abovementioned arrangement enables very substantial advantages in computing speed 5 to be achieved. In particular, the stratagem enables two or more commodity computers interconnected by a commodity communications network to be operated simultaneously running under the application program written to be executed on only a single computer. 10 In many situations, the above-mentioned arrangements work satisfactorily. This applies particularly where the programmer is aware that there may be updating delays and so can adjust the flow of the program to account for this. However, there are situations in which the use of stale contents or values instead of the latest content can create problems. 15 The need to update each local memory when any change is made to any memory location, creates a substantial overhead burden for the communications network which interconnects the multiple computers. It is towards reducing the above-mentioned overhead that the present invention is directed. 20 SUMMARY OF THE INVENTION In accordance with a first aspect of the present invention there is disclosed in a multiple computer environment in which a different portion of an application program written to execute on only a single computer executes substantially simultaneously on 25 a corresponding one of a plurality of computers, each having an independent local memory and each being interconnected via a communications network, and in which some memory locations are able to be referred to by a first plurality of said computers and in which other memory locations are able to be referred to by a second, and different, plurality of said computers, and after each occasion at which any one of said 30 memory locations has its contents written to, or re-written, with a new content, or otherwise manipulated, any corresponding memory locations in said computers are in due course updated or manipulated via said communications network, the further -2- WO 2007/045014 PCT/AU2006/001451 improvement comprising the steps of: (i) maintaining a record of which memory locations are present on which computers, and (ii) only in due course updating or manipulating those memory locations 5 which correspond in said maintained record to an initially updated or manipulated memory location, thereby reducing the volume of updating or manipulating instructions passing over said communications network. 10 In accordance with a second aspect of the present invention there is disclosed a computer program product comprising a set of program instructions stored in a storage medium and operable to permit a plurality of computers to carry out the above defined method. 15 In accordance with a third aspect of the present invention there is disclosed a plurality of computers interconnected via a communications network and operable to ensure carrying out of the above described method. In accordance with a fourth aspect of the present invention there is disclosed a 20 computer system comprising a plurality of computers each having an independent local memory and each being interconnected via a communications network wherein a different portion of an application program written to execute on only a single computer executes substantially simultaneously on a corresponding one of said plurality of computers, some memory locations being referable to by a first plurality 25 of said computers and other memory locations being referable to by a second, and different plurality of said computers, said system further comprising updating means associated with each said computer to in due course update each said memory location via said communications network after each occasion at which each said memory location has its content written to, or re-written, with a new content, or otherwise 30 manipulated, wherein said updating means includes a record means of which memory locations are present on which computers, and said updating means only in due course updating, or manipulating, those memory locations which correspond in said record -3- WO 2007/045014 PCT/AU2006/001451 means to an initially updated or manipulated memory location, thereby reducing the volume of updating or manipulating instructions passing over said communications network. 5 In accordance with a fifth aspect of the present invention there is disclosed a single computer adapted to co-operate with at least one other computer in order to carry out the above method or form the above computer system. BRIEF DESCRIPTION OF THE DRAWINGS 10 Fig. 1A is a schematic illustration of a prior art computer arranged to operate JAVA code and thereby constitute a single JAVA virtual machine, Fig. 1B is a drawing similar to Fig. 1A but illustrating the initial loading of code, Fig. 1C illustrates the interconnection of a multiplicity of computers each 15 being a JAVA virtual machine to form a multiple computer system, Fig. 2 schematically illustrates "n" application running computers to which at least one additional server machine X is connected as a server, Fig. 3 is a schematic map of the memory locations of four computers, and Figs. 4, 5 and 6 are each a different form of tabulation or listing of which 20 memory objects are present in which computers DETAILED DESCRIPTION The embodiments will be described with reference to the JAVA language, however, it will be apparent to those skilled in the art that the invention is not limited 25 to this language and, in particular can be used with other languages (including procedural, declarative and object oriented languages) including the MICROSOFT.NET platform and architecture (Visual Basic, Visual C, and Visual C++, and Visual C#), FORTRAN, C, C++, COBOL, BASIC and the like. 30 It is known in the prior art to provide a single computer or machine (produced by any one of various manufacturers and having an operating system (or equivalent control software or other mechanism) operating in any one of various different -4- WO 2007/045014 PCT/AU2006/001451 languages) utilizing the particular language of the application by creating a virtual machine as illustrated in Fig. 1A. The code and data and virtual machine configuration or arrangement of Fig 1A 5 takes the form of the application code 50 written in the JAVA language and executing within the JAVA virtual machine 61. Thus where the intended language of the application is the language JAVA, a JAVA virtual machine is used which is able to operate code in JAVA irrespective of the machine manufacturer and internal details of the computer or machine. For further details, see "The JAVA Virtual Machine 10 Specification" 2 nd Edition by T. Lindholm and F. Yellin of Sun Microsystems Inc of the USA which is incorporated herein by reference. This conventional art arrangement of Fig. 1A is modified in accordance with embodiments of the present invention by the provision of an additional facility which 15 is conveniently termed a "distributed run time" or a "distributed run time system" DRT 71 and as seen in Fig. lB. In Figs. lB and IC, the application code 50 is loaded onto the Java Virtual Machine(s) Ml, M2,...Mn in cooperation with the distributed runtime system 71, 20 through the loading procedure indicated by arrow 75 or 75A or 75B. As used herein the terms "distributed runtime" and the "distributed run time system" are essentially synonymous, and by means of illustration but not limitation are generally understood to include library code and processes which support software written in a particular language running on a particular platform. Additionally, a distributed runtime system 25 may also include library code and processes which support software written in a particular language running within a particular distributed computing environment. A runtime system (whether a distributed runtime system or not) typically deals with the details of the interface between the program and the operating system such as system calls, program start-up and termination, and memory management. For purposes of 30 background, a conventional Distributed Computing Environment (DCE) (that does not provide the capabilities of the inventive distributed run time or distributed run time system 71 used in the preferred embodiments of the present invention) is -5- WO 2007/045014 PCT/AU2006/001451 available from the Open Software Foundation. This Distributed Computing Environment (DCE) performs a form of computer-to-computer communication for software running on the machines, but among its many limitations, it is not able to implement the desired modification or communication operations. Among its 5 functions and operations the preferred DRT 71 coordinates the particular communications between the plurality of machines Ml, M2,...Mn. Moreover, the preferred distributed runtime 71 comes into operation during the loading procedure indicated by arrow 75A or 75B of the JAVA application 50 on each JAVA virtual machine 72 or machines JVM# 1, JVM#2,... JVM#n of Fig. 1C. It will be appreciated 10 in light of the description provided herein that although many examples and descriptions are provided relative to the JAVA language and JAVA virtual machines so that the reader may get the benefit of specific examples, the invention is not restricted to either the JAVA language or JAVA virtual machines, or to any other language, virtual machine, machine or operating environment. 15 Fig. IC shows in modified form the arrangement of the JAVA virtual machines, each as illustrated in Fig. lB. It will be apparent that again the same application code 50 is loaded onto each machine Ml, M2.. .Mn. However, the communications between each machine Ml, M2... Mn are as indicated by arrows 83, 2O and although physically routed through the machine hardware, are advantageously controlled by the individual DRT's 71/1.. .71/n within each machine. Thus, in practice this may be conceptionalised as the DRT's 71/1, ...71/n communicating with each other via the network or other communications link 53 rather than the machines Ml, M2... Mn communicating directly themselves or with each other. Contemplated 25 and included are either this direct communication between machines Ml, M2... Mn or DRT's 71/1, 71/2.. .71/n or a combination of such communications. The preferred DRT 71 provides communication that is transport, protocol, and link independent. The one common application program or application code 50 and its 30 executable version (with likely modification) is simultaneously or concurrently executing across the plurality of computers or machines Ml, M2...Mn. The application program 50 is written to execute on a single machine or computer (or to -6- WO 2007/045014 PCT/AU2006/001451 operate on the multiple computer system of the abovementioned patent applications which emulate single computer operation). Essentially the modified structure is to replicate an identical memory structure and contents on each of the individual machines. 5 The term "common application program" is to be understood to mean an application program or application program code written to operate on a single machine, and loaded and/or executed in whole or in part on each one of the plurality of computers or machines Ml, M2... Mn, or optionally on each one of some subset of 10 the plurality of computers or machines Ml, M2... Mn. Put somewhat differently, there is a common application program represented in application code 50. This is either a single copy or a plurality of identical copies each individually modified to generate a modified copy or version of the application program or program code. Each copy or instance is then prepared for execution on the corresponding machine. 15 At the point after they are modified they are common in the sense that they perform similar operations and operate consistently and coherently with each other. It will be appreciated that a plurality of computers, machines, information appliances, or the like implementing embodiments of the invention may optionally be connected to or coupled with other computers, machines, information appliances, or the like that do 20 not implement embodiments of the invention. The same application program 50 (such as for example a parallel merge sort, or a computational fluid dynamics application or a data mining application) is run on each machine, but the executable code of that application program is modified on 25 each machine as necessary such that each executing instance (copy or replica) on each machine coordinates its local operations on that particular machine with the operations of the respective instances (or copies or replicas) on the other machines such that they function together in a consistent, coherent and coordinated manner and give the appearance of being one global instance of the application (i.e. a "meta 30 application"). -7- WO 2007/045014 PCT/AU2006/001451 The copies or replicas of the same or substantially the same application codes, are each loaded onto a corresponding one of the interoperating and connected machines or computers. As the characteristics of each machine or computer may differ, the application code 50 may be modified before loading, or during the loading 5 process, or with some disadvantages after the loading process, to provide a customization or modification of the application code on each machine. Some dissimilarity between the programs or application codes on the different machines may be permitted so long as the other requirements for interoperability, consistency, and coherency as described herein can be maintained. As it will become apparent 10 hereafter, each of the machines Ml, M2.. .Mn and thus all of the machines Ml, M2... Mn have the same or substantially the same application code 50, usually with a modification that may be machine specific. Before the loading of, or during the loading of, or at any time preceding the 15 execution of, the application code 50 (or the relevant portion thereof) on each machine Ml, M2... Mn, each application code 50 is modified by a corresponding modifier 51 according to the same rules (or substantially the same rules since minor optimizing changes are permitted within each modifier 51/1, 51/2... 51/n). 20 Each of the machines Ml, M2... Mn operates with the same (or substantially the same or similar) modifier 51 (in some embodiments implemented as a distributed run time or DRT71 and in other embodiments implemented as an adjunct to the application code and data 50, and also able to be implemented within the JAVA virtual machine itself). Thus all of the machines M1, M2... Mn have the same (or 25 substantially the same or similar) modifier 51 for each modification required. A different modification, for example, may be required for memory management and replication, for initialization, for finalization, and/or for synchronization (though not all of these modification types may be required for all embodiments). 30 There are alternative implementations of the modifier 51 and the distributed run time 71. For example, as indicated by broken lines in Fig. 1 C, the modifier 51 may be implemented as a component of or within the distributed run time 71, and -8- WO 2007/045014 PCT/AU2006/001451 therefore the DRT 71 may implement the functions and operations of the modifier 51. Alternatively, the function and operation of the modifier 51 may be implemented outside of the structure, software, firmware, or other means used to implement the DRT 71 such as within the code and data 50, or within the JAVA virtual machine 5 itself. In one embodiment, both the modifier 51 and DRT 71 are implemented or written in a single piece of computer program code that provides the functions of the DRT and modifier. In this case the modifier function and structure is, in practice, subsumed into the DRT. Independent of how it is implemented, the modifier function and structure is responsible for modifying the executable code of the application code 10 program, and the distributed run time function and structure is responsible for implementing communications between and among the computers or machines. The communications functionality in one embodiment is implemented via an intermediary protocol layer within the computer program code of the DRT on each machine. The DRT can, for example, implement a communications stack in the JAVA language and 15 use the Transmission Control Protocol/Internet Protocol (TCP/IP) to provide for communications or talking between the machines. These functions or operations may be implemented in a variety of ways, and it will be appreciated in light of the description provided herein that exactly how these functions or operations are implemented or divided between structural and/or procedural elements, or between 20 computer program code or data structures, is not important or crucial to the invention. However, in the arrangement illustrated in Fig. 1 C, a plurality of individual computers or machines Ml, M2... Mn are provided, each of which are interconnected via a communications network 53 or other communications link. Each individual 25 computer or machine is provided with a corresponding modifier 51. Each individual computer is also provided with a communications port which connects to the communications network. The communications network 53 or path can be any electronic signalling, data, or digital communications network or path and is preferably a slow speed, and thus low cost, communications path, such as a network 30 connection over the Internet or any common networking configurations including ETHERNET or INFINIBAND and extensions and improvements, thereto. Preferably, the computers are provided with one or more known communications ports (such as -9- WO 2007/045014 PCT/AU2006/001451 CISCO Power Connect 5224 Switches) which connect with the communications network 53. As a consequence of the above described arrangement, if each of the machines 5 M1, M2, ... , Mn has, say, an internal or local memory capability of 10MB, then the total memory available to the application code 50 in its entirety is not, as one might expect, the number of machines (n) times 10MB. Nor is it the additive combination of the internal memory capability of all n machines. Instead it is either 10MB, or some number greater than 10MB but less than n x 10MB. In the situation where the 10 internal memory capacities of the machines are different, which is permissible, then in the case where the internal memory in one machine is smaller than the internal memory capability of at least one other of the machines, then the size of the smallest memory of any of the machines may be used as the maximum memory capacity of the machines when such memory (or a portion thereof) is to be treated as 'common' 15 memory (i.e. similar equivalent memory on each of the machines M1.. .Mn) or otherwise used to execute the common application code. However, even though the manner that the internal memory of each machine is treated may initially appear to be a possible constraint on performance, how this 20 results in improved operation and performance will become apparent hereafter. Naturally, each machine Ml, M2... Mn has a private (i.e. 'non-common') internal memory capability. The private internal memory capability of the machines Ml, M2, ... , Mn are normally approximately equal but need not be. For example, when a multiple computer system is implemented or organized using existing computers, 25 machines, or information appliances, owned or operated by different entities, the internal memory capabilities may be quite different. On the other hand, if a new multiple computer system is being implemented, each machine or computer is preferably selected to have an identical internal memory capability, but this need not be so. 30 It is to be understood that the independent local memory of each machine represents only that part of the machine's total memory which is allocated to that - 10 - WO 2007/045014 PCT/AU2006/001451 portion of the application program running on that machine. Thus, other memory will be occupied by the machine's operating system and other computational tasks unrelated to the application program 50. 5 Non-commercial operation of a prototype multiple computer system indicates that not every machine or computer in the system utilises or needs to refer to (e.g. have a local replica of) every possible memory location. As a consequence, it is possible to operate a multiple computer system without the local memory of each machine being identical to every other machine, so long as the local memory of each 10 machine is sufficient for the operation of that machine. That is to say, provided a particular machine does not need to refer to (for example have a local replica of) some specific memory locations, then it does not matter that those specific memory locations are not replicated in that particular machine. 15 It may also be advantageous to select the amounts of internal memory in each machine to achieve a desired performance level in each machine and across a constellation or network of connected or coupled plurality of machines, computers, or information appliances Ml, M2, ... , Mn. Having described these internal and common memory considerations, it will be apparent in light of the description 20 provided herein that the amount of memory that can be common between machines is not a limitation. In some embodiments, some or all of the plurality of individual computers or machines can be contained within a single housing or chassis (such as so-called 25 "blade servers" manufactured by Hewlett-Packard Development Company, Intel Corporation, IBM Corporation and others) or the multiple processors (eg symmetric multiple processors or SMPs) or multiple core processors (eg dual core processors and chip multithreading processors) manufactured by Intel, AMD, or others, or implemented on a single printed circuit board or even within a single chip or chip set. 30 Similarly, also included are computers or machines having multiple cores, multiple CPU's or other processing logic. - 11 - WO 2007/045014 PCT/AU2006/001451 When implemented in a non-JAVA language or application code environment, the generalized platform, and/or virtual machine and/or machine and/or runtime system is able to operate application code 50 in the language(s) (possibly including for example, but not limited to any one or more of source-code languages, 5 intermediate-code languages, object-code languages, machine-code languages, and any other code languages) of that platform and/or virtual machine and/or machine and/or runtime system environment, and utilize the platform, and/or virtual machine and/or machine and/or runtime system and/or language architecture irrespective of the machine or processor manufacturer and the internal details of the machine. It will 10 also be appreciated that the platform and/or runtime system can include virtual machine and non-virtual machine software and/or firmware architectures, as well as hardware and direct hardware coded applications and implementations. For a more general set of virtual machine or abstract machine environments, 15 and for current and future computers and/or computing machines and/or information appliances or processing systems, and that may not utilize or require utilization of either classes and/or objects, the inventive structure, method and computer program and computer program product are still applicable. Examples of computers and/or computing machines that do not utilize either classes and/or objects include for 20 example, the x86 computer architecture manufactured by Intel Corporation and others, the SPARC computer architecture manufactured by Sun Microsystems, Inc and others, the Power PC computer architecture manufactured by International Business Machines Corporation and others, and the personal computer products made by Apple Computer, Inc., and others. 25 For these types of computers, computing machines, information appliances, and the virtual machine or virtual computing environments implemented thereon that do not utilize the idea of classes or objects, may be generalized for example to include primitive data types (such as integer data types, floating point data types, long data 30 types, double data types, string data types, character data types and Boolean data types), structured data types (such as arrays and records), derived types, or other code or data structures of procedural languages or other languages and environments such - 12 - WO 2007/045014 PCT/AU2006/001451 as functions, pointers, components, modules, structures, reference and unions. These structures and procedures when applied in combination when required, maintain a computing environment where memory locations, address ranges, objects, classes, assets, resources, or any other procedural or structural aspect of a computer or 5 computing environment are where required created, maintained, operated, and deactivated or deleted in a coordinated, coherent, and consistent manner across the plurality of individual machines Ml, M2.. .Mn. This analysis or scrutiny of the application code 50 can take place either prior 10 to loading the application program code 50, or during the application program code 50 loading procedure, or even after the application program code 50 loading procedure (or some combination of these). It may be likened to an instrumentation, program transformation, translation, or compilation procedure in that the application code can be instrumented with additional instructions, and/or otherwise modified by meaning 15 preserving program manipulations, and/or optionally translated from an input code language to a different code language (such as for example from source-code language or intermediate-code language to object-code language or machine-code language). In this connection it is understood that the term compilation normally or conventionally involves a change in code or language, for example, from source code 20 to object code or from one language to another language. However, in the present instance the term "compilation" (and its grammatical equivalents) is not so restricted and can also include or embrace modifications within the same code or language. For example, the compilation and its equivalents are understood to encompass both ordinary compilation (such as for example by way of illustration but not limitation, 25 from source-code to object code), and compilation from source-code to source-code, as well as compilation from object-code to object code, and any altered combinations therein. It is also inclusive of so-called "intermediary-code languages" which are a form of "pseudo object-code". 30 By way of illustration and not limitation, in one embodiment, the analysis or scrutiny of the application code 50 takes place during the loading of the application program code such as by the operating system reading the application code 50 from - 13 - WO 2007/045014 PCT/AU2006/001451 the hard disk or other storage device, medium or source and copying it into memory and preparing to begin execution of the application program code. In another embodiment, in a JAVA virtual machine, the analysis or scrutiny may take place during the class loading procedure of the java.lang.ClassLoader.loadClass method 5 (e.g. "java.lang.ClassLoader.loadClasso"). Alternatively, or additionally, the analysis or scrutiny of the application code 50 (or of a portion of the application code) may take place even after the application program code loading procedure, such as after the operating system has loaded the 10 application code into memory, or optionally even after execution of the relevant corresponding portion of the application program code has started, such as for example after the JAVA virtual machine has loaded the application code into the virtual machine via the "java.lang.ClassLoader.loadClasso" method and optionally commenced execution. 15 Persons skilled in the computing arts will be aware of various possible techniques that may be used in the modification of computer code, including but not limited to instrumentation, program transformation, translation, or compilation means and/or methods. 20 One such technique is to make the modification(s) to the application code, without a preceding or consequential change of the language of the application code. Another such technique is to convert the original code (for example, JAVA language source-code) into an intermediate representation (or intermediate-code language, or 25 pseudo code), such as JAVA byte code. Once this conversion takes place the modification is made to the byte code and then the conversion may be reversed. This gives the desired result of modified JAVA code. A further possible technique is to convert the application program to machine 30 code, either directly from source-code or via the abovementioned intennediate language or through some other intermediate means. Then the machine code is modified before being loaded and executed. A still further such technique is to -14- WO 2007/045014 PCT/AU2006/001451 convert the original code to an intermediate representation, which is thus modified and subsequently converted into machine code. The present invention encompasses all such modification routes and also a 5 combination of two, three or even more, of such routes. The DRT 71 or other code modifying means is responsible for creating or replicating a memory structure and contents on each of the individual machines Ml, M2... Mn that permits the plurality of machines to interoperate. In some embodiments 10 this replicated memory structure will be identical. Whilst in other embodiments this memory structure will have portions that are identical and other portions that are not. In still other embodiments the memory structures are different only in format or storage conventions such as Big Endian or Little Endian formats or conventions. 15 These structures and procedures when applied in combination when required, maintain a computing environment where the memory locations, address ranges, objects, classes, assets, resources, or any other procedural or structural aspect of a computer or computing enviromnent are where required created, maintained, operated, and deactivated or deleted in a coordinated, coherent, and consistent manner 20 across the plurality of individual machines Ml, M2... Mn. Therefore the terminology "one", "single", and "common" application code or program includes the situation where all machines Ml, M2... Mn are operating or executing the same program or code and not different (and unrelated) programs, in 25 other words copies or replicas of same or substantially the same application code are loaded onto each of the interoperating and connected machines or computers. In conventional arrangements utilising distributed software, memory access from one machine's software to memory physically located on another machine 30 typically takes place via the network interconnecting the machines. Thus, the local memory of each machine is able to be accessed by any other machine and can therefore cannot be said to be independent. However, because the read and/or write - 15 - WO 2007/045014 PCT/AU2006/001451 memory access to memory physically located on another computer require the use of the slow network interconnecting the computers, in these configurations such memory accesses can result in substantial delays in memory read/write processing operations, potentially of the order of 106 - 107 cycles of the central processing unit of the 5 machine (given contemporary processor speeds). Ultimately this delay is dependent upon numerous factors, such as for example, the speed, bandwidth, and/or latency of the communication network. This in large part accounts for the diminished performance of the multiple interconnected machines in the prior art arrangement. 10 However, in the present arrangement all reading of memory locations or data is satisfied locally because a current value of all (or some subset of all) memory locations is stored on the machine carrying out the processing which generates the demand to read memory. 15 Similarly, all writing of memory locations or data is satisfied locally because a current value of all (or some subset of all) memory locations is stored on the machine carrying out the processing which generates the demand to write to memory. Such local memory read and write processing operation can typically be 20 satisfied within 102 _ 10 3 cycles of the central processing unit. Thus, in practice there is substantially less waiting for memory accesses which involves and/or writes. Also, the local memory of each machine is not able to be accessed by any other machine and can therefore be said to be independent. 25 The invention is transport, network, and communications path independent, and does not depend on how the communication between machines or DRTs takes place. In one embodiment, even electronic mail (email) exchanges between machines or DRTs may suffice for the communications. 30 In connection with the above, it will be seen from Fig. 2 that there are a number of machines M1, M2, .... Mn, "n" being an integer greater than or equal to two, on which the application program 50 of Fig. 1 is being run substantially -16 - WO 2007/045014 PCT/AU2006/001451 simultaneously. These machines are allocated a number 1, 2, 3, ... etc. in a hierarchical order. This order is normally looped or closed so that whilst machines 2 and 3 are hierarchically adjacent, so too are machines "n" and 1. There is preferably a further machine X which is provided to enable various housekeeping functions to be 5 carried out, such as acting as a lock server. In particular, the further machine X can be a low value machine, and much less expensive than the other machines which can have desirable attributes such as processor speed. Furthermore, an additional low value machine (X+1) is preferably available to provide redundancy in case machine X should fail. Where two such server machines X and X+1 are provided, they are 10 preferably, for reasons of simplicity, operated as dual machines in a cluster configuration. Machines X and X+1 could be operated as a multiple computer system in accordance with the present invention, if desired. However this would result in generally undesirable complexity. If the machine X is not provided then its functions, such as housekeeping functions, are provided by one, or some, or all of the other 15 machines. Turning now to Fig. 3, a schematic map of the memory locations of four machines Ml-M4 forming a multiple computer system is illustrated. In this particular example, machine Ml has the memory locations A, B and C whilst machine M2 has 20 the same memory locations and an additional memory location D. However, machine M3 only has memory locations C and E whilst machine M4 has memory locations B and D. It follows therefore that if memory location B has to be updated, then it is only necessary to advise machines Ml, M2 and M4 and it is not necessary to advise machine M3. Thus the traffic on communications network 3 can be reduced since in 25 this circumstance it is not necessary to communicate with machine M3. Figs. 4, 5 and 6 illustrate three different ways of tabulating or storing data which is sufficient to enable this reduction in communication overhead to be achieved. 30 In Fig. 4, for each object, or memory location, is maintained a list of machines which have a local copy of the object or location and thus should be communicated -17- WO 2007/045014 PCT/AU2006/001451 with in the event that the object or the contents of the location is to be changed, or manipulated in some way, such as for example by finalization or synchronization. Conversely, in Fig. 5, for each machine is maintained a list of objects, or memory locations, present in the machine. Thus if a particular machine makes an 5 amendment, for example, to a particular memory location then the server machine X can check through the list of machines in order to see, in turn, whether each machine refers to (such as a local copy of) the amended memory location and therefore requires to be updated. 10 In Fig. 6, a still further form of tabulation is provided which again enables the server machine X to determine what communications are required. Thus tabulation takes the form of an array listing the objects on one side and machines on the other and providing a relevant YES or NO in each cell corresponding to a possible object in each possible computer. 15 Once the above concept has been grasped, the arrangements described in detail in the abovementioned incorporated patent specifications are modified in a straightforward manner to ensure that each of the machines Ml, M2, etc. of the multiple computer system only sends messages updating a specific memory location 20 to that sub-set of machines having a corresponding memory location. One way of doing this is to consult the tabulation of any of Figs. 4-6 in the process of assembling the addresses to which the updating message is broadcast or the updating messages are sent. 25 The foregoing describes only some embodiments of the present invention and modifications, obvious to those skilled in the art, can be made thereto without departing from the scope of the present invention. For example, reference to JAVA includes both the JAVA language and also JAVA platform and architecture. 30 In all described instances of modification, where the application code 50 is modified before, or during loading, or even after loading but before execution of the unmodified application code has commenced, it is to be understood that the modified - 18 - WO 2007/045014 PCT/AU2006/001451 application code is loaded in place of, and executed in place of, the unmodified application code subsequently to the modifications being performed. Alternatively, in the instances where modification takes place after loading 5 and after execution of the unmodified application code has commenced, it is to be understood that the unmodified application code may either be replaced with the modified application code in whole, corresponding to the modifications being performed, or alternatively, the unmodified application code may be replaced in part or incrementally as the modifications are performed incrementally on the executing 10 unmodified application code. Regardless of which such modification routes are used, the modifications subsequent to being performed execute in place of the unmodified application code. It is advantageous to use a global identifier is as a form of 'meta-name' or 15 'meta-identity' for all the similar equivalent local objects (or classes, or assets or resources or the like) on each one of the plurality of machines Ml, M2... Mn. For example, rather than having to keep track of each unique local name or identity of each similar equivalent local object on each machine of the plurality of similar equivalent objects, one may instead define or use a global name corresponding to the 20 plurality of similar equivalent objects on each machine (e.g. "globalname7787"), and with the understanding that each machine relates the global name to a specific local name or object (e.g. "globalname7787" corresponds to object "localobject456" on machine Ml, and "globalname7787" corresponds to object "localobject885" on machine M2, and "globalname7787"corresponds to object "localobject1 11" on 25 machine M3, and so forth). It will also be apparent to those skilled in the art in light of the detailed description provided herein that in a table or list or other data structure created by each DRT 71 when initially recording or creating the list of all, or some subset of all 30 objects (e.g. memory locations or fields), for each such recorded object on each machine Ml, M2.. .Mn there is a name or identity which is common or similar on each of the machines Ml, M2... Mn. However, in the individual machines the local - 19 - WO 2007/045014 PCT/AU2006/001451 object corresponding to a given name or identity will or may vary over time since each machine may, and generally will, store memory values or contents at different memory locations according to its own internal processes. Thus the table, or list, or other data structure in each of the DRTs will have, in general, different local memory 5 locations corresponding to a single memory name or identity, but each global "memory name" or identity will have the same "memory value or content" stored in the different local memory locations. So for each global name there will be a family of corresponding independent local memory locations with one family member in each of the computers. Although the local memory name may differ, the asset, object, 10 location etc has essentially the same content or value. So the family is coherent. The term "table" or "tabulation" as used herein is intended to embrace any list or organised data structure of whatever format and within which data can be stored and read out in an ordered fashion. 15 It will also be apparent to those skilled in the art in light of the description provided herein that the abovementioned modification of the application program code 50 during loading can be accomplished in many ways or by a variety of means. These ways or means include, but are not limited to at least the following five ways 20 and variations or combinations of these five, including by: (i) re-compilation at loading, (ii) a pre-compilation procedure prior to loading, (iii) compilation prior to loading, (iv) "just-in-time" compilation(s), or 25 (v) re-compilation after loading (but, for example, before execution of the relevant or corresponding application code in a distributed environment). Traditionally the term "compilation" implies a change in code or language, for example, from source to object code or one language to another. Clearly the use of 30 the term "compilation" (and its grammatical equivalents) in the present specification is not so restricted and can also include or embrace modifications within the same code or language. -20 - WO 2007/045014 PCT/AU2006/001451 Those skilled in the computer and/or programming arts will be aware that when additional code or instructions is/are inserted into an existing code or instruction set to modify same, the existing code or instruction set may well require further 5 modification (such as for example, by re-numbering of sequential instructions) so that offsets, branching, attributes, mark up and the like are properly handled or catered for. Similarly, in the JAVA language memory locations include, for example, both fields and array types. The above description deals with fields and the changes 10 required for array types are essentially the same mutatis mutandis. Also the present invention is equally applicable to similar programming languages (including procedural, declarative and object orientated languages) to JAVA including Microsoft.NET platform and architecture (Visual Basic, Visual C/C**, and C#) FORTRAN, C/C**, COBOL, BASIC etc. 15 The terms object and class used herein are derived from the JAVA environment and are intended to embrace similar terms derived from different environments such as dynamically linked libraries (DLL), or object code packages, or function unit or memory locations. 20 Various means are described relative to embodiments of the invention, including for example but not limited to lock means, distributed run time means, modifier or modifying means, and the like. In at least one embodiment of the invention, any one or each of these various means may be implemented by computer 25 program code statements or instructions (possibly including by a plurality of computer program code statements or instructions) that execute within computer logic circuits, processors, ASICs, logic or electronic circuit hardware, microprocessors, microcontrollers or other logic to modify the operation of such logic or circuits to accomplish the recited operation or function. In another embodiment, any one or each 30 of these various means may be implemented in firmware and in other embodiments such may be implemented in hardware. Furthermore, in at least one embodiment of -21- WO 2007/045014 PCT/AU2006/001451 the invention, any one or each of these various means may be implemented by a combination of computer program software, firmware, and/or hardware. Any and each of the abovedescribed methods, procedures, and/or routines may 5 advantageously be implemented as a computer program and/or computer program product stored on any tangible media or existing in electronic, signal, or digital form. Such computer program or computer program products comprising instructions separately and/or organized as modules, programs, subroutines, or in any other way for execution in processing logic such as in a processor or microprocessor of a 10 computer, computing machine, or information appliance; the computer program or computer program products modifying the operation of the computer in which it executes or on a computer coupled with, connected to, or otherwise in signal communications with the computer on which the computer program or computer program product is present or executing. Such a computer program or computer 15 program product modifies the operation and architectural structure of the computer, computing machine, and/or information appliance to alter the technical operation of the computer and realize the technical effects described herein. The invention may therefore include a computer program product comprising 20 a set of program instructions stored in a storage medium or existing electronically in any form and operable to permit a plurality of computers to carry out any of the methods, procedures, routines, or the like as described herein including in any of the claims. 25 Furthermore, the invention includes (but is not limited to) a plurality of computers, or a single computer adapted to interact with a plurality of computers, interconnected via a communication network or other communications link or path and each operable to substantially simultaneously or concurrently execute the same or a different portion of an application code written to operate on only a single computer 30 on a corresponding different one of computers. The computers are programmed to carry out any of the methods, procedures, or routines described in the specification or set forth in any of the claims, on being loaded with a computer program product or - 22 - WO 2007/045014 PCT/AU2006/001451 upon subsequent instruction. Similarly, the invention also includes within its scope a single computer arranged to co-operate with like, or substantially similar, computers to form a multiple computer system 5 The term "compromising" (and its grammatical variations) as used herein is used in the inclusive sense of "having" or "including" and not in the exclusive sense of "consisting only of'. To summarise, there is disclosed in a multiple computer environment in which 10 a different portion of an application program written to execute on only a single computer executes substantially simultaneously on a corresponding one of a plurality of computers, each having an independent local memory and each being interconnected via a communications network, and in which some memory locations are able to be referred to by a first plurality of the computers and in which other 15 memory locations are able to be referred to by a second, and different, plurality of the computers, and after each occasion at which any one of the memory locations has its contents written to, or re-written, with a new content, or otherwise manipulated, any corresponding memory locations in the computers are in due course updated or manipulated via the communications network, the further improvement comprising 20 the steps of: (i) maintaining a record of which memory locations are present on which computers, and (ii) only in due course updating or manipulating those memory locations which correspond in the maintained record to an initially updated or manipulated 25 memory location, thereby reducing the volume of updating or manipulating instructions passing over the communications network. Preferably the method comprises the step of: 30 (iii) maintaining the record as a listing of computers corresponding to each the memory location. - 23 - WO 2007/045014 PCT/AU2006/001451 Alternatively the method comprises the step of: (iv) maintaining the record as a listing of memory locations present in each the computer. 5 Alternatively the method comprises the step of: (v) maintaining the record as a tabulation of all computers and all memory locations. Preferably the some the memory locations and the other memory locations include common memory locations. 10 Preferably the first plurality of computers and the second plurality of computers include common computers. Furthermore, there is also disclosed a computer system comprising a plurality 15 of computers each having an independent local memory and each being interconnected via a communications network wherein a different portion of an application program written to execute on only a single computer executes substantially simultaneously on a corresponding one of the plurality of computers, some memory locations being referable to by a first plurality of the computers and 20 other memory locations being referable to by a second, and different plurality of the computers, the system further comprising updating means associated with each the computer to in due course update each the memory location via the communications network after each occasion at which each the memory location has its content written to, or re-written, with a new content, or otherwise manipulated, wherein the 25 updating means includes a record means of which memory locations are present on which computers, and the updating means only in due course updating, or manipulating, those memory locations which correspond in the record means to an initially updated or manipulated memory location, thereby reducing the volume of updating or manipulating instructions passing over the 30 communications network. - 24 - WO 2007/045014 PCT/AU2006/001451 Preferably the record means is a listing of computers corresponding to each the memory location. Alternatively the record means is a listing of memory locations present in each 5 the computer. Alternatively the record means is a tabulation of all computers and all memory locations. 10 Preferably the some the memory locations and the other memory locations include common memory locations. Preferably the first plurality of computers and the second plurality of computers include common computers. 15 There is also disclosed a plurality of computers interconnected via a communications network and operable to ensure carrying out of the abovementioned method(s). 20 In addition, there is also disclosed a computer program product comprising a set of program instructions stored in a storage medium and operable to permit a plurality of computers to carry out the abovementioned method(s). Furthermore, there is also disclosed a single computer adapted to co-operate 25 with at least one other computer in order to carry out the abovementioned method(s) or form the abovementioned computer system(s). -25 -

Claims (19)

1. In a multiple computer environment in which a different portion of an application program written to execute on only a single computer executes substantially simultaneously on a corresponding one of a plurality of computers, each having an independent local memory and each being interconnected via a communications network, and in which some memory locations are able to be referred to by a first plurality of said computers and in which other memory locations are able to be referred to by a second, and different, plurality of said computers, and after each occasion at which any one of said memory locations has its contents written to, or re-written, with a new content, or otherwise manipulated, any corresponding memory locations in said computers are in due course updated or manipulated via said communications network, the further improvement comprising the steps of: (i) maintaining a record of which memory locations are present on which computers, and (ii) only in due course updating or manipulating those memory locations which correspond in said maintained record to an initially updated or manipulated memory location, thereby reducing the volume of updating or manipulating instructions passing over said communications network.
2. The improved method as claimed in claim 1 comprising the step of: (iii) maintaining said record as a listing of computers corresponding to each said memory location.
3. The improved method as claimed in claim 1 comprising the step of: (iv) maintaining said record as a listing of memory locations present in each said computer.
4. The improved method as claimed in claim 1 comprising the step of: (v) maintaining said record as a tabulation of all computers and all memory locations.
5. The improved method as claimed in any one of claims 1-4 wherein said some said memory locations and said other memory locations include common memory locations. - 26 - WO 2007/045014 PCT/AU2006/001451
6. The improved method as claimed in any one of claims 1-5 wherein said first plurality of computers and said second plurality of computers include common computers.
7. A computer system comprising a plurality of computers each having an independent local memory and each being interconnected via a communications network wherein a different portion of an application program written to execute on only a single computer executes substantially simultaneously on a corresponding one of said plurality of computers, some memory locations being referable to by a first plurality of said computers and other memory locations being referable to by a second, and different plurality of said computers, said system further comprising updating means associated with each said computer to in due course update each said memory location via said communications network after each occasion at which each said memory location has its content written to, or re-written, with a new content, or otherwise manipulated, wherein said updating means includes a record means of which memory locations are present on which computers, and said updating means only in due course updating, or manipulating, those memory locations which correspond in said record means to an initially updated or manipulated memory location, thereby reducing the volume of updating or manipulating instructions passing over said communications network.
8. The system as claimed in claim 7 wherein said record means is a listing of computers corresponding to each said memory location.
9. The computer system as claimed in claim 7 wherein said record means is a listing of memory locations present in each said computer.
10. The computer system as claimed in claim 7 wherein said record means is a tabulation of all computers and all memory locations.
11. The computer system as claimed in any one of claims 7-10 wherein said some said memory locations and said other memory locations include common memory locations.
12. The computer system as claimed in any one of claims 7-11 wherein said first plurality of computers and said second plurality of computers include common computers. -27 - WO 2007/045014 PCT/AU2006/001451
13. A plurality of computers interconnected via a communications network and operable to ensure carrying out of the method as claimed in any one of claims 1-6.
14. A computer program product comprising a set of program instructions stored in a storage medium and operable to permit a plurality of computers to carry out the method as claimed in any one of claims 1-6.
15. A single computer adapted to co-operate with at least one other computer in order to carry out the method as claimed in any one of claims 1-6 or form the computer system as claimed in any one of claims 7-13. - 28 - -28A
16. A method of reducing the volume of updating or manipulating instructions passing over a communications network interconnecting the computers of a multiple computer systems, said method being substantially as herein described with reference to Fig. 3 and any one of Figs. 4-6 of the drawings.
17. A computer system substantially as herein described with reference to Fig. 3 and any one of Figs. 4-6 of the drawings.
18. A single computer adapted to co-operate with another computer in order to carry out the method as claimed in claim 16 or form the computer systems as claimed in claim 17.
19. A computer program product comprising a set of program instructions stored in a storage medium and operable to permit a plurality of computers to carry out the method as claimed in claim 16. Dated this 21s" day of April 2008 WARATEK PTY LTD By: FRASER OLD & SOHN Patent Attorneys for the Applicant 5027M-AU
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995008809A2 (en) * 1993-09-24 1995-03-30 Oracle Corporation Method and apparatus for data replication
US6148377A (en) * 1996-11-22 2000-11-14 Mangosoft Corporation Shared memory computer networks

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995008809A2 (en) * 1993-09-24 1995-03-30 Oracle Corporation Method and apparatus for data replication
US6148377A (en) * 1996-11-22 2000-11-14 Mangosoft Corporation Shared memory computer networks

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