AU2005201931A1 - Rendering graphic object images - Google Patents

Description

S&F Ref: 712060

AUSTRALIA

PATENTS ACT 1990 COMPLETE SPECIFICATION FOR A STANDARD PATENT Name and Address of Applicant: Actual Inventor(s): Address for Service: Invention Title: Canon Kabushiki Kaisha, of 30-2, Shimomaruko 3-chome, Ohta-ku, Tokyo, 146, Japan Paul Frederick Birchall Kevin John Moore Tjoan Kok Lie Spruson Ferguson St Martins Tower Level 31 Market Street Sydney NSW 2000 (CCN 3710000177) Rendering graphic object images The following statement is a full description of this invention, including the best method of performing it known to me/us:- 5845c -1- RENDERING GRAPHIC OBJECT IMAGES FIELD OF THE INVENTION The present invention relates generally to rendering graphic object based images.

In particular, the present invention relates to rendering graphic objects using a rendering core of different endianness to an external memory.

BACKGROUND

When a computer application provides data to a device for printing and/or display, an intermediate description of the page is often given to device driver software in a page description language, which provide descriptions of graphic objects to be rendered onto the page or display. This contrasts some arrangements where raster image data is generated directly and transmitted for printing or display. Examples of page description languages include PostScript and PCL. Equivalently, a set of descriptions of graphic objects may be provided in function calls to a graphics interface, such as the Microsoft Windows GDI, or Unix's X- 11. The page image is typically rendered for printing and/or display by an object-based graphics system, or a raster image processor (RIP).

Most object-based graphics systems utilize a large volume of memory, known to the art as a frame store or a page buffer, to hold a pixel-based image data representation of the page or screen for subsequent printing and/or display. Typically, the outlines of the graphic objects are calculated, filled with color values and written into the frame store.

For two-dimensional graphics, objects that appear in front of other objects are simply written into the frame store after the background objects, thereby replacing the background on a pixel by pixel basis. This is commonly known to the art as "Painter's algorithm". Objects are considered in priority order, from the rearmost object to the foremost object, and typically, each object is rasterized in scanline order and pixels are written to the frame store in sequential runs along each scanline. Some graphics 712060.doc -2interfaces allow a logical or arithmetic operation to be specified and performed between one or more graphics objects and the already rendered pixels in the frame buffer. In these cases the rendering principle remains the same: objects (or groups of objects) are rasterized in scanline order, and the result of the specified operation is calculated and written to the frame store in sequential runs along each scanline.

There are essentially two problems with this technique. The first is that it requires fast random access to all of the pixels in the frame store. This is because each new object could affect any pixel in the frame store. For this reason, the frame store is normally kept in semiconductor random access memory (RAM). For high-resolution color printers the amount of RAM required is very large, typically in excess of 100 Mbytes, which is costly and difficult to run at high speed. The second problem is that many pixels, which are painted (rendered), are over-painted (re-rendered) by later objects.

Painting these pixels with the earlier objects is a waste of time.

One method for overcoming the large frame-store problem is the use of "banding". When banding is used, only part of the frame store exists in memory at any one time. All of the objects to be drawn are retained in a "display list", which is an internal representation of the information required to draw the objects on the page. The display list is considered in object order as above, and only those pixel operations which fall within the fraction of the page which is held in the band are actually performed. After all objects in the display list have been drawn, the band is sent to the printer (or to intermediate storage) and the process is repeated for the next band of the page. There are some penalties with this technique, however. For example, the objects being drawn must be reconsidered many times, once for each band. As the number of bands increases, so does the repetitious examination of the objects requiring rendering. Also, the technique of banding does not solve the problem of the cost of over-painting.

712060.doc -3- Some other graphic systems consider the image in scan line order. Again, all of the objects on the page are retained in a display list. On each scanline the objects which intersect that scanline are then considered in priority order and for each object, spans of pixels between the intersection points of the object edges with the scanline are filled in a line store. This technique overcomes the large frame store problem, however it still suffers from the over-painting problem.

Other graphic systems utilise pixel-sequential rendering to overcome both the large frame store problem and the over-painting problem. In these systems, each pixel is generated in raster order. Again, all objects to be drawn are retained in a display list. On each scan line, the edges of objects, which intersect that scanline, are held in increasing order of their intersection with the scan line. These points of intersection, or edge crossings, are considered in turn, and used to toggle an array of fields that indicate the activity of the objects in the display list. There is one activity field for each object painting operation that is of interest on the scan line. There is also a field to indicate operations that do not require previously generated data. Between each pair of edges considered, the color data for each pixel, which lies between the first edge and the second edge, is generated by using a priority encoder on the activity flags to determine which operations are required to generate the color, and performing only those operations for the span of pixels between the two edges. In preparation for the next scanline, the coordinate of intersection of each edge is updated in accordance with the nature of each edge, and the edges are sorted into increasing order of intersection with that scanline. Any new edges are also merged into the list of edges.

Graphic systems which use pixel-sequential rendering have significant advantages in that there is no frame store or line store, no unnecessary over-painting, and the object priorities are dealt with in constant order time by the priority encoder, rather 712060.doc -4than in order N time, where N is the number of priorities. There is an ongoing need to improve the efficiency of the rendering procedure.

SUMMARY

It is an object of the present invention to substantially overcome, or at least ameliorate, one or more disadvantages of existing arrangements.

According to one aspect of the invention, there is provided a method of fetching a data unit comprising a plurality of subunits from a data storage system to a requesting system, said method comprising the steps of: providing an address indicating a location in the data storage system of the data unit; fetching the data unit from the location in the data storage system; transposing the order of the subunits of the data unit depending on an indicator contained in the address; and passing the transposed data unit to the requesting system.

According to another aspect of the invention there is provided an apparatus for fetching a data unit comprising a plurality of subunits from a data storage system to a requesting system, said apparatus comprising: means for providing an address indicating a location in the data storage system of the data unit; means for fetching the data unit from the location in the data storage system; means for transposing the order of the subunits of the data unit depending on an indicator contained in the address; and means for passing the transposed data unit to the requesting system.

According to another aspect of the invention there is provided a computer program product comprising machine-readable program code recorded on a machinereadable recording medium, for controlling the operation of a data processing machine on 712060.doc which the program code executes to perform a method of fetching a data unit comprising a plurality of subunits from a data storage system to a requesting system, said method comprising the steps of: providing an address indicating a location in the data storage system of the data unit being requested; fetching the data unit from the location in the data storage system; transposing the order of the subunits of the data unit depending on an indicator contained in the address; and passing the transposed data unit to the requesting system.

According to a further aspect of the invention there is provided a computer program comprising machine-readable program code for controlling the operation of a data processing apparatus on which the program code executes to perform a method of fetching a data unit comprising a plurality of subunits from a data storage system to a requesting system, said method comprising the steps of: providing an address indicating a location in the data storage system of the data unit being requested; fetching the data unit from the location in the data storage system; transposing the order of the subunits of the data unit depending on an indicator contained in the address; and passing the transposed data unit to the requesting system.

BRIEF DESCRIPTION OF THE DRAWINGS One or more embodiments of the present invention will now be described with reference to the drawings, in which: Fig. 1 is a schematic block diagram representation of a computer system incorporating a rendering arrangement; 712060.doc -6- Fig. 2 is a block diagram showing the functional data flow of the rendering arrangement; Fig. 3 is a schematic block diagram representation of the pixel sequential rendering apparatus of Fig. 2 and associated display list and temporary stores; Fig. 4 is a schematic functional representation of the edge processing module of Fig. 3; Fig. 5 is a schematic functional representation of the priority determination module of Fig. 3; Fig. 6 is a schematic functional representation of the fill color determination module of Fig. 3; Figs. 7A to 7C illustrate pixel combinations between source and destination; Fig. 8A illustrates a two-object image used as an example for explaining the operation of the rendering arrangement; Fig. 8B shows a table of a number of edge records of the two-object image shown in Fig. 8A; Figs. 9A and 9B illustrate the vector edges of the objects of Fig. 8A; Fig. 10 illustrates the rendering of a number of scan lines of the image of Fig.

8A; Fig. 11 depicts the arrangement of an edge record for the image of Fig. 8A; Fig. 12A depicts the format of an active edge record created by the edge processing module 400 of Fig. 4; Fig. 12B depicts the arrangement of the edge records used in the edge processing module 400 of Fig.4; Figs. 12B to 12J illustrate the edge update routine implemented by the arrangement of Fig. 4 for the example of Fig. 8A; Figs. 13A and 13B illustrate the odd-even and non-zero winding fill rules; 712060.doc -7- Figs. 14A to 14E illustrate how large changes in X coordinates contribute to spill conditions and how they are handled; Figs. 15A to 15E illustrates the priority filling routine implemented by the arrangement of Fig. Figs. 16A to 16D provide a comparison between two prior art edge description formats and that used in the described apparatus; Figs. 17A and 17B show a simple compositing expression illustrated as an expression tree and a corresponding depiction; Fig. 17C shows an example of an expression tree; Fig. 18 depicts the priority properties and status table of the priority determination module of Fig. 3; Fig. 19 shows a table of a number of raster operations; Figs. 20A and 20B shows a table of the principal compositing operations and their corresponding raster operations and opacity flags; Fig. 21 depicts the result of a number of compositing operations; Fig. 22A shows a series of fill priority messages generated by the priority determination module 500; Fig. 22B shows a series of color composite messages generated by the fill color determination module 600; Fig. 23 is a schematic functional representation of one arrangement of the pixel compositing module of Fig. 3; Figs. 24A 24D show the operation performed on the stack for each of the various stack operation commands in the Pixel Compositing Module 700 of Fig. 3; Fig. 25 shows data transformation from a little-endian source to a big-endian environment, then to a little-endian application; 712060.doc -8- Fig. 26 shows data transformation from a big-endian source to a little-endian application; Fig. 27 shows relative address generation; Fig. 28 shows relative address generation and data transformation selection; Fig. 29 shows an example bitmap edge record; Fig. 30 shows an example bitmap active edge record; Fig. 31 shows a module for edge loading and updating; Fig. 32 shows a terminating edge record; Fig. 33 shows a module for bitmap edge tracking; Fig. 34 shows a stack controller and an ALU in the compositing engine; Fig. 35 shows stack operations performed on the first cycle of a ternary operation; Fig. 36 shows stack operations performed on the second cycle of a ternary operation; Fig. 37 shows an edge input sub-module for multiple scanline edge tracking; Fig. 38 is a flow chart showing edge crossing generation; Fig. 39 shows an edge update sub-module for multiple scanline edge tracking; and Fig. 40 shows an edge output sub-module sorting mechanism for multiple scanline edge tracking.

DETAILED DESCRIPTION INCLUDING BEST MODE Where reference is made in any one or more of the accompanying drawings to steps and/or features, which have the same reference numerals, those steps and/or features have for the purposes of this description the same function(s) or operation(s), unless the contrary intention appears.

712060.doc -9- For a better understanding of the pixel sequential rendering system 1, a brief overview of the system is first undertaken in Section 1.0. Then follows a brief discussion in Section 2.0 of the driver software for interfacing between a third party software \application and the pixel sequential rendering apparatus 20 of the system. A brief overview of the pixel sequential rendering apparatus 20 is then discussed in Section As will become apparent, the pixel sequential rendering apparatus 20 includes an Sinstruction execution module 300; an edge tracking module 400; a priority determination Smodule 500; a fill color determination module 600; a pixel compositing module 700; and a pixel output module 800. A brief overview of these modules is described in Sections 3.1 to 3.6.

The general principles of the invention have application in data retrieval from an external memory. This is described in more detail in Section 3.01.

PIXEL SEQUENTIAL RENDERING

SYSTEM

Fig. 1 illustrates schematically a computer system 1 configured for rendering and presentation of computer graphic object images. The system includes a host processor 2 associated with system random access memory (RAM) 3, which may include a nonvolatile hard disk drive or similar device 5 and volatile, semiconductor RAM 4. The system 1 also includes a system read-only memory (ROM) 6 typically founded upon semiconductor ROM 7 and which in many cases may be supplemented by compact disk devices (CD ROM) 8. The system 1 may also incorporate some means 10 for displaying images, such as a video display unit (VDU) or a printer, both, which operate in raster fashion.

The above-described components of the system 1 are interconnected via a bus system 9 and are operable in a normal operating mode of computer systems well known in the art, such as IBM PC/AT type personal computers and arrangements evolved therefrom, Sun Sparcstations and the like.

712060.doc Also seen in Fig. 1, a pixel sequential rendering apparatus 20 (or renderer) connects to the bus 9, and is configured for the sequential rendering ofpixel-based images derived from graphic object-based descriptions supplied with instructions and data from the system 1 via the bus 9. The apparatus 20 may utilise the system RAM 3 for the rendering of object descriptions although preferably the rendering apparatus 20 may have associated therewith a dedicated rendering store arrangement 30, typically formed of semiconductor

RAM.

Image rendering operates generally speaking in the following manner. A render job to be rendered is given to the driver software by third party software for supply to the lO pixel sequential renderer 20. The render job is typically in a page description language or in a sequence of function calls to a standard graphics application program interface (API), which defines an image comprising objects placed on a page from a rearmost 6bject to a foremost object to be composited in a manner defined by the render job. The driver software converts the render job to an intermediate render job, which is then fed to the pixel sequential renderer 20. The pixel sequential renderer 20 generates the color and opacity for the pixels one at a time in raster scan order. At any pixel currently being scanned and processed, the pixel sequential renderer 20 composites only those exposed objects that are active at the currently scanned pixel. The pixel sequential renderer determines that an object is active at a currently scanned pixel if that pixel lies within the boundary of the object. The pixel sequential renderer 20 achieves this by reference to a fill counter associated with that object. The fill counter keeps a running fill count that indicates whether the pixel lies within the boundary of the object. When the pixel sequential renderer 20 encounters an edge associated with the object it increments or decrements the fill count depending upon the direction of the edge. The renderer 20 is then able to determine whether the current pixel is within the boundary of the object depending upon the fill count and a predetermined winding count rule. The renderer 712060.doc -11determines whether an active object is exposed with reference to a flag associated with that object. This flag associated with an object indicates whether or not the object obscures lower order objects. That is, this flag indicates whether the object is partially transparent, and in which case the lower order active objects will thus make a contribution to the color and opacity of the current pixel. Otherwise, this flag indicates that the object is opaque in which case active lower order objects will not make any contribution to the color and opacity of the currently scanned pixel. The pixel sequential renderer determines that an object is exposed if it is the uppermost active object, or if all the active objects above the object have their corresponding flags set to transparent. The renderer 20 then composites these exposed active objects to determine and output the color and opacity for the currently scanned pixel.

The driver software, in response to the page, also extracts edge information defining the edges of the objects for feeding to the edge tracking module. The driver software also generates a linearised table of priority properties and status information (herein called the level activation table) of the expression tree of the objects and their compositing operations which is fed to the priority determination module. The level activation table contains one record for each object on the page. In addition, each record contains a field for storing a pointer to an address for the fill of the corresponding object in a fill table. This fill table is also generated by the driver software and contains the fill for the corresponding objects, and is fed to the fill determination module. The level activation table together with the fill table are devoid of any edge information and effectively represent the objects, where the objects are infinitely extending. The edge information is fed to the edge tracking module, which determines, for each pixel in raster scan order, the edges of any objects that intersect a currently scanned pixel. The edge tracking module passes this information onto the priority determination module. Each record of the level activation table contains a counter, which maintains a fill count 712060.doc -12associated with the corresponding object of the record. The priority determination module processes each pixel in a raster scan order. Initially, the fill counts associated with all the objects are zero, and so all objects are inactive. The priority determination module continues processing each pixel until it encounters an edge intersecting that pixel.

The priority determination module updates the fill count associated with the object of that edge, and so that object becomes active. The priority determination continues in this fashion updating the fill count of the objects and so activating and de-activating the objects. The priority determination module also determines whether these active objects are exposed or not, and consequently whether they make a contribution to the currently scanned pixel. In the event that they do, the pixel determination module generates a series of messages which ultimately instructs the pixel compositing module to composite the color and opacity for these exposed active objects in accordance with the compositing operations specified for these objects in the level activation table so as to generate the resultant color and opacity for the currently scanned pixel. These series of messages do not at that time actually contain the color and opacity for that object but rather an address to the fill table, which the fill determination module uses to determine the color and opacity of the object.

For ease of explanation the location (ie: priority level, z-order, priority, or level) of the object in the order of the objects from the rearmost object to the foremost is herein referred to as the object's priority. Preferably, a number of non-overlapping objects that have the same fill and compositing operation, and that form a contiguous sequence in the order of the objects, may be designated as having the same priority. Most often, only one priority level is required per object. However, some objects may require several instructions, and thus the object may require several priority levels. For example, a character with a color fill may be represented by, a bounding box on a first level having the color fill, a one-bit bitmap which provides the shape of the character on a 712060.doc -13second level, and the same bounding box on a third level having the color fill, where the levels are composited together xor Page) and S) xor B to produce the color character. For fundamental objects, there is a one-to-one relationship with priority levels.

The pixel sequential renderer 20 also utilises clip objects to modify the shape of other objects. The renderer 20 maintains an associated clip count for the clip in a somewhat similar fashion to the fill count to determine whether the current pixel is within the clip region.

SOFTWARE DRIVER A software program, hereafter referred to as the driver, is loaded and executed on the host processor 2 for generating instructions and data for the pixel-sequential graphics rendering apparatus 20, from data provided to the driver by a third-party application. The third-party application may provide data in the form of a standard language description of the objects to be drawn on the page, such as PostScript and PCL, or in the form of function calls to the driver through a standard software interface, such as the Windows GDIor X-11.

The driver software separates the data associated with an object, supplied by the third-party application, into data about the edges of the object, any operation or operations associated with painting the object onto the page, and the color and opacity with which to fill pixels which fall inside the edges of the object.

The driver software partitions the edges of each object into edges which are monotonic increasing in the Y-direction, and then divides each partitioned edge of the object into segments of a form suitable for the edge module described below. Partitioned edges are sorted by the X-value of their starting positions and then by Y. Groups of edges starting at the same Y-value remain sorted by X-value, and may be concatenated together to form a new edge list, suitable for reading in by the edge module when rendering reaches that Y-value.

712060.doc -14- The driver software sorts the operations, associated with painting objects, into priority order, and generates instructions to load the data structure associated with the priority determination module (described below). This structure includes a field for the fill rule, which describes the topology of how each object is activated by edges, a field for the type of fill which is associated with the object being painted, and a field to identify whether data on levels below the current object is required by the operation. There is also a field, herein called clip count, that identifies an object as a clipping object, that is, as an object which is not, itself, filled, but which enables or disables filling of other objects on the page.

The driver software also prepares a data structure (the fill table) describing how to fill each object. The fill table is indexed by the data structure in the priority determination module. This allows several levels in the priority determination module data structure to refer to the same fill data structure.

The driver software assembles the aforementioned data into a job containing instructions for loading the data and rendering pixels, in a form that can be read by the rendering system, and transfers the assembled job to the rendering system. This may be performed using one of several methods known to the art, depending on the configuration of the rendering system and its memory.

PIXEL SEQUENTIAL RENDERING APPARATUS Referring now to Fig. 2, a functional data flow diagram of the rendering process is shown. The functional flow diagram of Fig. 2 commences with an object graphic description 11 which is used to describe those parameters of graphic objects in a fashion appropriate to be generated by the host processor 2 and/or, where appropriate, stored within the system RAM 3 or derived from the system ROM 6, and which may be interpreted by the pixel sequential rendering apparatus 20 to render therefrom pixel-based images. For example, the object graphic description 11 may incorporate objects with 712060.doc edges in a number of formats including straight edges (simple vectors) that traverse from one point on the display to another, or an orthogonal edge format where a twodimensional object is defined by a plurality of edges including orthogonal lines. Further formats, where objects are defined by continuous curves are also appropriate and these can include quadratic polynomial fragments where a single curve may be described by a number of parameters which enable a quadratic based curve to be rendered in a single output space without the need to perform multiplications. Further data formats such as cubic splines and the like may also be used. An object may contain a mixture of many different edge types. Typically, common to all formats are identifiers for the start and end of each line (whether straight or curved) and typically, these are identified by a scan line number thus defining a specific output space in which the curve may be rendered.

For example, Fig. 16A shows a prior art edge description of an edge 600 that is required to be divided into two segments 601 and 602 in order for the segments to be adequately described and rendered. This arises because the prior art edge description, whilst being simply calculated through a quadratic expression, could not accommodate an inflexion point 604. Thus the edge 600 was dealt with as two separate edges having end points 603 and 604, and 604 and 605 respectively. Fig. 16B shows a cubic spline 610 that is described by endpoints 611 and 612, and control points 613 and 614. This format requires calculation of a cubic polynomial for render purposes and thus is expensive of computational time.

Figs. 16C and 16D show examples of edges applicable to the described arrangement. An edge is considered as a single entity and if necessary, is partitioned to delineate sections of the edge that may be described in different formats, a specific goal of which is to ensure a minimum level of complexity for the description of each section.

In Fig. 16C, a single edge 620 is illustrated spanning between scanlines A and M. An edge is described by a number of parameters including start_x, start_y, one or 712060.doc -16more segment descriptions that include an address that points to the next segment in the edge, and a finish segment used to terminate the edge. Preferably, the edge 620 may be described as having three step segments, a vector segment, and a quadratic segment. A step segment is simply defined as having a x-step value and a y-step value. For the three step segments illustrated, the segment descriptions are and Note that the x-step value is signed thereby indicating the direction of the step, whilst the y-step value is unsigned as such is always in a raster scan direction of increasing scanline value.

The next segment is a vector segment which typically requires parameters startx start_y num ofscanlines (NY) and slope In this example, because the vector segment is an intermediate segment of the edge 620, the startx and start y may be omitted because such arise from the preceding segment(s). The parameter num of scanlines (NY) indicates the number of scanlines the vector segment lasts. The slope value (DX) is signed and is added to the x-value of a preceding scanline to give the x-value of the current scanline, and in the illustrated case, DX The next segment is a quadratic segment which has a structure corresponding to that of the vector segment, but also a second order value (DDX) which is also signed and is added to DX to alter the slope of the segment.

Fig. 16D shows an example of a cubic curve which includes a description corresponding to the quadratic segment save for the addition of a signed third-order value (DDDX), which is added to DDX to vary the rate of change of slope of the segment.

Many other orders may also be implemented.

It will be apparent from the above that the ability to handle plural data formats describing edge segments allows for simplification of edge descriptions and evaluation, without reliance on complex and computationally expensive mathematical operations. In contrast, in the prior art system of Fig. 16A, all edges, whether orthogonal, vector or quadratic were required to be described by the quadratic form.

712060.doc -17- The operation of the rendering arrangement will be described with reference to the simple example of rendering an image 78 shown in Fig. 8A which is seen to include two graphical objects, in particular, a partly transparent blue-colored triangle 80 rendered on top of and thereby partly obscuring an opaque red colored rectangle 90. As seen, the rectangle 90 includes side edges 92, 94, 96 and 98 defined between various pixel positions and scan line positions Because the edges 96 and 98 are formed upon the scan lines (and thus parallel therewith), the actual object description of the rectangle can be based solely upon the side edges 92 and 94, such as seen in Fig. 9A. In this connection, edge 92 commences at pixel location (40,35) and extends in a raster direction down the screen to terminate at pixel position (40,105). Similarly, the edge 94 extends from pixel position (160,35) to position (160,105). The horizontal portions of the rectangular graphic object 90 may be obtained merely by scanning from the edge 92 to the edge 94 in a rasterised fashion.

The blue triangular object 80 however is defined by three object edges 82, 84 and 86, each seen as vectors that define the vertices of the triangle. Edges 82 and 84 are seen to commence at pixel location (100,20) and extend respectively to pixel locations (170,90) and (30,90). Edge 86 extends between those two pixel locations in a traditional rasterised direction of left to right. In this specific example because the edge 86 is horizontal like the edges 96 and 98 mentioned above, it is not essential that the edge 86 be defined. In addition to the starting and ending pixel locations used to describe the edges 82 and 84, each of these edges will have associated therewith the slope value in this case +1 and -1 respectively.

Returning to Fig. 2, having identified the data necessary to describe the graphic objects to the rendered, the graphic system 1 then performs a display list generation step 12.

712060.doc -18- The display list generation 12 is preferably implemented as a software driver executing on the host processor 2 with attached ROM 6 and RAM 3. The display list generation 12 converts an object graphics description, expressed in any one or more of the well known graphic description languages, graphic library calls, or any other application specific fonrat, into a display list. The display list is typically written into a display list store 13, generally formed within the RAM 4 but which may alternatively be formed within the temporary rendering stores 30. As seen in Fig. 3, the display list store 13 can include a number of components, one being an instruction stream 14, another being edge information 15 and where appropriate, raster image pixel data 16.

The instruction stream 14 includes code interpretable as instructions to be read by the pixel sequential rendering apparatus 20 to render the specific graphic objects desired in any specific image. For the example of the image shown in Fig. 8A, the instruction stream 14 could be of the form of: render (nothing) to scan line at scan line 20 add two blue edges 82 and 84; render to scan line at scan line 35 add two red edges 92 and 94; and render to completion.

Similarly, the edge information 15 for the example of Fig. 8A may include the following: edge 84 commences at pixel position 100, edge 82 commences at pixel position 100; (ii) edge 92 commences at pixel position 40, edge 94 commences at pixel position 160; (iii) edge 84 runs for 70 scan lines, edge 82 runs for 70 scanlines; (iv) edge 84 has slope edge 84 has slope +1; 712060.doc -19edge 92 has slope 0 edge 94 has slope 0.

(vi) edges 92 and 94 each run for 70 scanlines.

It will be appreciated from the above example of the instruction stream 14 and edge information 15 and the manner in which each are expressed, that in the image 78 of Fig. 8A, the pixel position and the scanline value define a single 2-dimensional output space in which the image 78 is rendered. Other output space configurations however can be realised using the principles of the present disclosure.

Fig. 8A includes no raster image pixel data and hence none need be stored in the store portion 16 of the display list 13, although this feature will be described later.

The display list store 13 is read by a pixel sequential rendering apparatus The pixel sequential rendering apparatus 20 is typically implemented as an integrated circuit and converts the display list into a stream of raster pixels which can be forwarded to another device, for example, a printer, a display, or a memory store.

Although the pixel sequential rendering apparatus 20 is described as an integrated circuit, it may be implemented as an equivalent software module executing on a general purpose processing unit, such as the host processor 2.

Fig. 3 shows the configuration of the pixel sequential rendering apparatus 20, the display list store 13 and the temporary rendering stores 30. The processing stages 22 of the pixel-sequential rendering apparatus 20 include an instruction executor 300, an edge processing module 400, a priority determination module 500, a fill color determination module 600, a pixel compositing module 700, and a pixel output module 800. The processing operations use the temporary stores 30 which, as noted above, may share the same device (eg. magnetic disk or semiconductor RAM) as the display list store 13, or may be implemented as individual stores for reasons of speed optimisation. The edge processing module 400 uses an edge record store 32 to hold edge information which is carried forward from scan-line to scan-line. The priority determination module 500 uses 712060.doc a priority properties and status table 34 to hold information about each priority, and the current state of each priority with respect to edge crossings while a scan-line is being rendered. The fill color determination module 600 uses a fill data table 36 to hold information required to determine the fill color of a particular priority at a particular position. The pixel compositing module 700 uses a pixel compositing stack 38 to hold intermediate results during the determination of an output pixel that requires the colors from multiple priorities to determine its value.

The display list store 13 and the other stores 32-38 detailed above may be implemented in RAM or any other data storage technology.

The processing steps' shown in the arrangement of Fig. 3 take the form of a processing pipeline 22. In this case, the modules of the pipeline may execute simultaneously on different portions of image data in parallel, with messages passed between them as described below. In another arrangement, each message described below may take the form of a synchronous transfer of control to a downstream module, with upstream processing suspended until the downstream module completes the processing of the message.

3.0.1 Memory interface address and data transformations The pixel sequential rendering apparatus 20 may be implemented as a core in an Application Specific Integrated Circuit (ASIC), which raises the issue of the endianness of the other cores in the ASIC: in particular the pixel sequential rendering apparatus may have a different endianness from the source of image data, and so a flexible system for fetching data of different endianness is required. Access to external memory sources by the pixel sequential rendering apparatus 20 is inediated by a memory controller (not shown) that preferably implements such a flexible system in the manner described below.

In the preferred embodiment of the pixel sequential rendering apparatus memory addressing is little-endian, i.e. an address AG (2640 in Fig. 26) points to the least 712060.doc -21significant byte DO (2600 in Fig. 26) of data in a 4-byte data word (eg. 2610 in Fig. 26).

NConversely, in a big-endian addressing scheme, an address points to the most significant byte D3 of data in a data word. In a memory fetch operation according to the preferred embodiment, a group of four words known as a dualoct (eg. 2620 in Fig, 26) is fetched from the byte location specified by the address AO and the fifteen succeeding byte locations Al to A15. Therefore, the four lowest order bits of the address information are N, not needed for memory fetching.

SThe two least significant bits of address information are treated as flags, rather than as part of the address: a (least significant address bit), known as ABSOLUTE, when cleared indicates that the address is an absolute physical address in main (shared) memory; when set indicates a relative address to which a base address is to be added, as described below; and w (second least significant address bit), known as WORD_SWAP, when cleared indicates that the word-order within a dualoct 2630 being fetched from a memory is to be reversed before being passed to the little-endian core, as illustrated in Fig. 26; when set indicates that both the byte order within words and the word order within a dualoct 2500 being fetched from a big-endian memory are to be reversed before being passed to the core, as illustrated in Fig. 25. Note that in the latter case the effect is the same as a complete reversal of byte order within the dualoct 2500.

Referring now to Fig. 27, each module in the rendering pipeline has one or more registers that can optionally contain a base address for data fetches by that module. If an address in the received job has the ABSOLUTE flag set, then the module that services the job instruction adds the appropriate base address, and includes the ABSOLUTE and 712060.doc -22- WORD SWAP flags from the base address in the fetch instruction to the memory controller. Otherwise, the memory request is passed on to the memory controller, unaltered.

The memory controller also contains a register containing a base address for the job as a whole: if the received memory request has its ABSOLUTE flag set, then the job base address is added to the value in the memory request to form the physical address that will be fetched, and the WORD_SWAP flag for the request is obtained from the job base address in this case (Fig. 28). Otherwise, when the received memory request does not have its ABSOLUTE flag set, then the fetch is made from the physical address specified in the most significant bits of the request, padded out with zeroes to form a 32-bit address, and the WORDSWAP flag is also taken from the request.

The WORDSWAP flag is latched by the memory controller, and is used to key a multiplexer that performs the byte- and word-swapping (or lane swapping) required for the received data, as illustrated in Fig. 25 and Fig. 26.

The scheme above is provided to allow the pixel sequential rendering apparatus to operate in an environment where some of its data is big-endian. This frees the software driver from the task of lane swapping large amounts of image data that may be being obtained from a big-endian system.

3.1 INSTRUCTION EXECUTOR The instruction executor 300 reads and processes instructions from the instruction stream 14 and formats the instructions into messages that are transferred via an output 398 to the other modules 400, 500, 550, 600 and 700 within the pipeline 22.

Preferably, the instruction stream 13 may include the following instructions: CONFIGURE: This instruction includes various configuration parameters, and is used to set registers that configure the render mode, the default colour and other job-wide parameters. When this instruction is encountered by the instruction executor 300, the 712060.doc -23instruction executor 300 issues a message containing the configuration parameters, which is passed down the processing pipeline 22 to the other modules. Each module reads the configuration message, latches the parameters that apply to that module, and passes the message onto the next module.

LOAD PRIORITY PROPERTIES: This instruction is associated with data to be loaded into the priority properties and status table 34, and an address in that table to which the data is to be loaded. When this instruction is encountered by the instruction executor 300, the instruction executor 300 issues a message for the storage of the data in the specified location of the priority properties and status table 34. This may be accomplished by formatting a message containing this data and passing it down the processing pipeline 22 to the priority determination module 500 which performs the store operation.

LOAD FILL DATA: This instruction is associated with fill data associated with an object to be loaded into the fill data table 36, and an address in that table to which the data is to be loaded. When this instruction is encountered by the instruction executor 300, the instruction executor 300 issues a message for the storage of the data at the specified address of the fill data table 36. This may be accomplished by formatting a message containing this data and passing it down the processing pipeline 22 to the fill color determination module which performs the store operation.

LOAD NEW EDGES AND RENDER: This instruction is associated with an address in the display list store 13 of new edges 15 which are to be introduced into the rendering process when a next scanline is rendered. When this instruction is encountered by the instruction executor 300, the instruction executor 300 formats a message containing this data and passes it to the edge processing module 400. The edge processing module 400 stores the address of the new edges in the edge record store 32.

The edges at the specified address are sorted on their initial scanline intersection 712060.doc -24coordinate before the next scanline is rendered. In one arrangement, they are sorted by the display list generation process 12. In another arrangement, they are sorted by the pixel-sequential rendering apparatus SET SCANLINE LENGTH: This instruction is associated with a number of pixels which are to be produced in each rendered scanline. When this instruction is encountered by the instruction executor 300, the instruction executor 300 passes the value to the edge processing module 400 and the pixel compositing module 700.

SET OPACITY MODE: This instruction is associated with a flag, which indicates whether pixel compositing operations will use an opacity channel, also known in the art as an alpha or transparency channel. When this instruction is encountered by the instruction executor 300, the instruction executor 300 passes the flag value to the pixel compositing module 700.

SET BUF: This instruction sets the address of external memory buffers used by the pixel sequential rendering apparatus 20. Preferably, at least the input, output and spill buffers of the edge processing module 400 are stored in external memory.

The instruction executor 300 is typically formed by a microcode state machine that maps instructions and decodes them into pipeline operations for passing to the various modules. A corresponding software process may alternatively be used.

3.2 EDGE TRACKING MODULE The operation of the edge processing module 400 during a scanline render operation will now be described with reference to Fig. 4. The initial conditions for the rendering of a scanline is the availability of three lists of edge records. Any or all of these lists may be empty. These lists are a new edge list 402, obtained from the edge information 15 and which contains new edges as set by the LOAD NEW EDGES AND RENDER instruction, a main edge list 404 which contains 712060.doc O edge records carried forward from the previous scanline, and a spill edge list 406 which also contains edge records carried forward from the previous scanline.

Turning now to Fig. 12A, there is shown the data format of such an edge record, 0which may include: a current scanline intersection coordinate (referred to here as the X 0coordinate), N (ii) a count (referred to herein as NY) of how many scanlines a current segment of this edge will last for (in some arrangements this may be represented as a Y limit), (iii) a value to be added to the X coordinate of this edge record after each scanline (referred to here as the DX), 0 (iv) a priority level number or an index to a list of priority numbers, an address (addr) of a next edge segment in the list; and (vi) a number of flags, marked p, o, u, c, and d. The flag d determines whether the edge affects the clipping counter or the fill counter. The flag u determines whether the fill counter is incremented or decremented by the edge. The remaining flags p, o, and c are described later.

Such a data format may accommodate vectors, and orthogonally arranged edges.

The format may also include a further parameter herein called DDX, which is a value to be added to the DX value of this edge record after each scanline. The latter enables the rendering of edges describing quadratic curves. The addition of further parameters, DDDX for example, may allow such an arrangement to accommodate cubic curves. In some applications, such as cubic Bezier spline, a 6-order polynomial (ie: up to DDDDDDX) may be required. The flag u indicates whether a winding count is to be incremented or decremented by an edge. The winding count is stored in a fill counter and 712060.doc -26is used to determine whether a currently scanned pixel is inside or outside the object in question.

In the example of the edges 84 and 94 of Fig. 8A, the corresponding edge records at scanline 20 could read as shown in the Table of Fig. 8B.

In this description, coordinates which step from pixel to pixel along a scanline being generated by the rendering process will be referred to as X coordinates, and, coordinates which step from scanline to scanline will be referred to as Y coordinates.

Preferably, each edge list contains zero or more records placed contiguously in memory.

Other storage arrangements, including the use of pointer chains, are also possible. The records in each of the three lists 402, 404 and 406 are arranged in order of scanline intersection, this being the X coordinate. This is typically obtained by a sorting process, initially managed by an edge input module 408 which receives messages, including edge information, from the instruction executor 300. It is possible to relax the sort to only regard the integral portion of each scanline intersection coordinate as significant. It is also possible to relax the sort further by only regarding each scanline intersection coordinate, clamped to the minimum and maximum X coordinates which are being produced by the current rendering process. Where appropriate, the edge input module 408 relays messages to modules 500, 600 and 700 downstream in the pipeline 22 via an output 498.

The edge input module 408 maintains references into, and receives edge data from, each of the three lists 402, 404, and 406. Each of these references is initialised to refer to the first edge in each list at the start of processing of a scanline. Thereafter, the edge input module 408 selects an edge record from one of the three referenced edge records such that the record selected is the one with the least X coordinate out of the three referenced records. If two or more of the X-records are equal, each is processed in any order and the corresponding edge crossings output in the following fashion. The 712060.doc -27reference, which was used to select that record, is then advanced to the next record in that list. The edge just selected is formatted into a message and sent to an edge update module 410. Also, certain fields of the edge, in particular the current X, the priority numbers, and the direction flag, are formatted into a message which is forwarded to the priority determination module 500 via an output 498 of the edge processing module 400.

Arrangements that use more or fewer lists than those described here are also possible.

Upon receipt of an edge, the edge update module 410 decrements the count of how many scanlines for which a current segment will last. If that count has reached zero, a new segment is read from the address indicated by the next segment address. A segment preferably specifies: a value to add to the current X coordinate immediately the segment is read, (ii) a new DX value for the edge, (iii) a new DDX value for the edge, and (iv) a new count of how many scanlines for which the new segment will last.

If there is no next segment available at the indicated address, no further processing is performed on that edge. Otherwise, the edge update module 410 calculates the X coordinate for the next scanline for the edge. This typically would involve taking the current X coordinate and adding to it the DX value. The DX may have the DDX value added to it, as appropriate for the type of edge being handled. The edge is then written into any available free slot in an edge pool 412, which is an array of two or more edge records. If there is no free slot, the edge update module 410 waits for a slot to become available. Once the edge record is written into the edge pool 412, the edge update module 410 signals via a line 416 to an edge output module 414 that a new edge has been added to the edge pool 412.

3.2.1 Bitmap edges 712060.doc -28- Alternatively, edges may be specified using an edge record that contains a 1 bit per pixel bitmap, or an address pointer to such a bitmap. In this case transitions from 1 to 0 or 0 to 1 in the bitmap are used to indicate the X-positions of edges. However, because a bitmap record may provide several edges for the one record, with a corresponding number of different positions on the one scanline, these positions need to be sorted into pixel sequence with whatever other edges that may be present on the scanline. For this reason, a bitmap edge type does not create edge crossing messages: it calculates edge positions prior to the scanline for which it is required, and temporary edge records containing the edge positions and the level index or level list pointer are created from them. These temporary edge records are sorted into the main edge list for the next scanline, and it is these that create the edge crossing messages.

Referring now to Fig. 29, the preferred format for bitmap edge records is shown.

The fields c, d, u, and X-coordinate correspond to the equivalent fields in the other edge record fornats. The Levelindexorlevelrange field is copied from the P field of the edge record. The Track field replaces the o andp flags, which determine which tracking rules the edge was to follow. Track encodes the edge tracking modes as follows: 000 curve tracing with truncation to nearest integer 001 curve tracing with truncation and anti-gap 010 curve tracing with rounding to nearest integer 011 curve tracing with rounding and anti-gap 100 PostScript tracking 101 Bitmap tracking active high 110 Bitmap tracking active low 111 terminating The I flag determines how the Level_indexor levelrange field is to be interpreted. The s field (which determines where the segment data is to be found for curve 712060.doc -29tracing: either in-line after the record or at an address, according to the value of s) is ignored for bitmap edge tracking.

The remaining fields are used for bitmap edge tracking: the Scale field contains a power of two to which the bitmaps are scaled when temninating records are created from them; the a and w flags are ABSOLUTE and WORD_SWAP flags that are included in generated addresses when fetching the bitmaps; the v and h flags specify whether the bitmap is to be flipped through a vertical axis or a horizontal axis, respectively; the Bitmap address field is the byte address at which the bitmap is to be found; and the Pixels X and Pixels Y fields specify the number of pixels in the X- and Y- directions in the bitmap.

Referring now to Fig. 31, when a LOAD_NEW_EDGES_AND_RENDER message is received by the edge module, the input pipeline is stalled, and the New edge loader fetches edge data from the address passed to it in the LOAD NEW EDGES ANDRENDER command. It passes the fetched data to the active edge creator sub-module, which creates active edge records from the new edge data. In the case of a bitmap edge, the active edge record is shown in Fig. 30. In the case of a bitmap edge, the active edge record is created by simply copying the corresponding fields from the new edge record, and appending a new field, Y remaining. Y remaining is calculated as Pixels Y Scale. The resulting active edge record is held in the output of the active edge creator, until fetched by the comparator/selector.

The comparator/selector compares the X coordinate fields of the edges held in the active edge creator, active edge loader and spill edge loader modules. The edge with the 712060.doc lowest X coordinate is selected and passed to the Edge Crossing Message Creator submodule of the edge update module. The Track field is used to determine whether an edge crossing message is generated, and also which object update sub-module the message should be passed to. In the case of a bitmap edge, no edge crossing message is generated, and the edge is passed to the bitmap update sub-module: edge crossings for bitmaps are generated from the terminating edges that are created in the bitmap update module.

The bitmap update sub-module latches the values in the active bitmap edge record, storing them in the Active bitmap edge register and stalls its input by de-asserting the trdy bit, then decrements the value in the Y-remaining field by one. If Y-remaining is non-zero, the active edge is passed onto the edge output module for sorting, otherwise the edge becomes inactive and is not passed on.

The module resets the up-down bistable, and performs one or more memory fetches of the bitmap data starting at an address calculated from the values specified in the latched edge record. According to the latched value of h, the calculated byte address is: h set indicating a flip through a horizontal axis: Byte Address Bitmap address [(Pixels 3) 1]*[Pixels Y- Y remaining Scale] h clear indicating no flip: Byte Address Bitmap address [(Pixels 3) remaining Scale) The memory fetch being subject to a particular fetch size and alignment, the bottom bits of the byte address are used to form an offset, and the fetch is performed at the address formed by truncating the byte address, using the WORD_SWAP and ABSOLUTE flags obtained from the edge record to determine the address to be fetched, and the lane swapping to be performed on the returned data. If the ABSOLUTE flag is deasserted, the BITMAP_BASE_ADDRESS value stored in a register in the memory 712060.doc -31request sub-module is added to the bitmap address before it is passed to the memory controller of the ASIC. The returned data is masked: the length of the unmasked sequence of bits being Pixels X, obtained from the edge record, or from the byte offset to the end of the fetch, whichever is smaller. The data is lane-swapped so that the first valid bit appears at offset 0. Multiple fetch sequences are handled in the obvious way: the number of unmasked bits is subtracted from Pixels X to form the number of bits remaining to be fetched, and this is used for the next fetch.

Adjacent bits in the sequence are XORed together to create a sequence with Is wherever an edge appears, and the end cases are handled by XORing the end bits with inactive state, as determined from the Track field. The resulting bit sequence is fed into a priority encoder, which determines the X-offset from the bitmap start position for the first edge. The bit sequence may be fed into the priority encoder in reverse order, according to the value of the v bit in the latched edge record: doing so performs a flip about a vertical axis of the bitmap. The edge constructer generates a terminating edge record (Fig. 32) at this X-offset as follows: the s, c, 1, and d, fields are copied directly from the latched edge record; the Iu field is obtained from the up-down bistable; Track is set to ll a terminating edge); the actual X coordinate of the edge is obtained by adding the X-offset to the Xcoordinate field in the latched active edge record: the result is loaded into the Xcoordinate field of the terminating record; Sthe Level index or levelrange field is copied directly from the latched edge record; and 712060.doc -32the T value is set to a value indicating that normal processing of edge crossing messages should be performed (in the preferred embodiment this value is 00; other values are used by the PostScript edge processing system).

The terminating edge record so formed is emitted to the edge output module. The bit at the X-offset priority is cleared, and the up-down bistable is pulsed, changing its state. The process is repeated until a terminating edge record has been created for all of the state changes on the fetched bitmap scanline. The stall on the bitmap update module input is removed, allowing the subsequent bitmap edge record to be processed.

Note that this process provides edge positions for the scanline after the scanline on which the bitmap edge record is read: this is necessary so that the generated edges can be sorted in with the edges that are generated by the curve tracing and PostScript edge tracking systems. If this were not done, there would be a possibility that edges traced in different manners could get out of pixel sequence.

On subsequent scanlines, the active edge record for the bitmap edge will be found in either the input edge buffer or the spill edge buffer. Processing the active edge proceeds along the same lines as for the new edge.

3.2.2 Single scanline edge sorting As an initial condition for the rendering of a scanline, the edge output module 414 has references to each of a next main edge list 404' and a next spill edge list 406'.

Each of these references is initialised to the location where the, initially empty, lists 404' and 406' may be built up. Upon receipt of the signal 416 indicating that an edge has been added to the edge pool 412, the edge output module 414 determines whether or not the edge just added has a lesser X coordinate than the edge last written to the next main edge list 404' (if any). If this is true, a "spill" is said to have occurred because the edge cannot be appended to the main edge list 404 without violating its ordering criteria. When a spill occurs, the edge is inserted into the next spill edge list 406', preferably in a manner that 712060.doc -33maintains a sorted next spill edge list 406'. For example this may be achieved using a insertion sorting routine. In some arrangements the spills may be triggered by other conditions, such as excessively large X coordinates.

If the edge added to the edge pool 412 has an X coordinate greater than or equal to the edge last written to the next main edge list 404' (if any), and there are no free slots available in the edge pool 412, the edge output module 414 selects the edge from the edge pool 412 which has the least X coordinate, and appends that edge to the next main edge list 404', extending it in the process. The slot in the edge pool 412 that was occupied by that edge is then marked as free.

Once the edge input module 408 has read and forwarded all edges from all three of its input lists 402, 404 and 406, it formats a message which indicates that the end of scanline has been reached and sends the message to both the priority determination module 500 and the edge update module 410. Upon receipt of that message, the edge update module 410 waits for any processing it is currently performing to complete, then forwards the message to the edge output module 414. Upon receipt of the message, the edge output module 414 writes all remaining edge records from the edge pool 412 to the next main edge list 404' in X order. Then, the reference to the next main edge list 404' and the main edge list 404 are exchanged between the edge input module 408 and the edge output module 414, and a similar exchange is performed for the next spill edge list 406' and the spill edge list 406. In this way the initial conditions for the following scanline are established.

Rather than sorting the next spill edge list 406' upon insertion of edge records thereto, such edge records may be merely appended to the list 406', and the list 406' sorted at the end of the scanline and before the exchange to the current spill list 406 becomes active in edge rasterisation of the next scanline.

712060.doc -34- It can be deduced from the above that edge crossing messages are sent to the priority detennination module 500 in scanline and pixel order (that is, they are ordered firstly on Y and then on X) and that each edge crossing message is labelled with the priority level to which it applies.

Fig. 12A depicts a specific structure of an active edge record 418 that may be created by the edge processing module 400 when a segment of an edge is received. If the first segment of the edge is a step (orthogonal) segment, the X-value of the edge is added to a variable called "X-step" for the first segment to obtain the X position of the activated edge. Otherwise, the X-value of the edge is used. The Xstep value is obtained from the segment data of the edge and is added once to the Xedge value of the next segment to obtain the X position of the edge record for that next segment. This means that the edges in the new edge record will be sorted by Xedge Xstep. The Xstep of the first segment should, therefore, be zero, in order to simplify sorting the edges. The Y-value of the first segment is loaded into the NY field of the active edge record 418. The DX field of the active edge is copied from the DX field identifier of vector or quadratic segments, and is set to zero for a step segment. A u-flag as seen in Fig. 12A is set if the segment is upwards heading (see the description relating to Fig. 13A). A d-flag is set when the edge is used as a direct clipping object, without an associated clipping level, and is applicable to closed curves. The actual priority level of the segment, or a level address is copied from the corresponding field of the new edge record into a level field in the active edge record 418. The address of the next segment in the segment list is copied from the corresponding field of the new edge record into a segment address field (segment addr) of the active edge record 418. The segment address may also be used to indicate the termination of an edge record.

It will be appreciated from Fig. 12A that other data structures are also possible, and necessary for example where polynomial implementations are used. In one 712060.doc alternative data structure, the 'segment addr' field is either the address of the next segment in the segment list or copied from the segments DDX value, if the segment is quadratic. In the latter case, the data structure has a q-flag which is set if the segment is a quadratic segment, and cleared otherwise. In a further variation, the segment address and the DDX field may be separated into different fields, and additional flags provided to meet alternate implementations.

Fig. 12B depicts the arrangement of the edge records described above and used in the edge processing module 400. A new active edge record 428, a current active edge record 430 and a spill active edge record 432, supplements the edge pool 412. As seen in Fig. 12B, the lists 402, 404, 406, 404' and 406' are dynamically variable in size depending upon the number of edges being rendered at any one time. Each record includes a limit value which, for the case of the new edge list 402, is determined by a SIZE value incorporated with the LOAD_NEW_EDGES_AND_RENDER instruction.

When such an instruction is encountered, SIZE is checked and if non-zero, the address of the new edge record is loaded and a limit value is calculated which determines a limiting size for each of the lists 402, 404, 406, 404' and 406'.

Although the described arrangement utilizes arrays and associated pointers for the handling of edge records, other implementations, such as linked lists for example may be used. These other implementations may be hardware or software-based, or combinations thereof The specific rendering of the image 78 shown in Fig. 8A will now be described with reference to scanlines 34, 35 and 36 shown in Fig. 10. In this example, the calculation of the new X coordinate for the next scanline is omitted for the purposes of clarity, with Figs. 12C to 121 illustrating the output edge crossing being derived from one of the registers 428, 430 and 432 or the edge pool 412.

712060.doc -36- Fig. 12C illustrates the state of the lists noted above at the end of rendering scanline 34 (the top portion of the semi-transparent blue triangle 80). Note that in scanline 34 there are no new edges and hence the list 402 is empty. Each of the main edge lists 404 and next main edge list 404' include only the edges 82 and 84. Each of the lists includes a corresponding pointer 434, 436, and 440 which, on completion of scanline 34, points to the next vacant record in the corresponding list. Each list also includes a limit pointer 450, denoted by an asterisk which is required to point to the end of the corresponding list. If linked lists were used, such would not be required as linked lists include null pointer terminators that perform a corresponding function.

As noted above, at the commencement of each scanline, the next main edge list 404' and the main edge list 404 are swapped and new edges are received into the new edge list 402. The remaining lists are cleared and each of the pointers set to the first member of each list. For the commencement of scanline 35, the arrangement then appears as seen in Fig. 12D. As is apparent from Fig. 12D, the records include four active edges which, from Fig. 10, are seen to correspond to the edges 92, 94, 84 and 82.

Referring now to Fig. 12E, when rendering starts, the first segment of the new edge list 402 is loaded into an active edge record 428 and the first active edge records of the main edge list 404 and spill edge list 406 are copied to records 430 and 432 respectively. In this example, the spill edge list 406 is empty and hence no loading takes place. The X-positions of the edges within the records 428, 430 and 432 are then compared and an edge crossing is emitted for the edge with the smallest X-position. In this case, the emitted edge is that corresponding to the edge 92 which is output together with its priority value (X=40, The pointers 434, 436 and 438 are then updated to point to the next record in the list.

The edge for which the edge crossing was emitted is then updated (in this case by adding DX 0 to its position), and buffered to the edge pool 412 which, in this 712060.doc -37example, is sized to retain three edge records. The next entry in the list from which the emitted edge arose (in this case list 402) is loaded into the corresponding record (in this case record 428). This is seen in Fig. 12F.

Further, as is apparent from Fig. 12F, a comparison between the registers 428, 430 and 432 again selects the edge with the least X-value which is output as the appropriate next edge crossing (X=85, Again, the selected output edge is updated and added to the edge pool 412 and all the appropriate pointers incremented. In this case, the updated value is given by X X DX, which is evaluated as 84 85 1. Also, as seen, the new edge pointer 434 is moved, in this case, to the end of the new edge list 402.

In Fig. 12G, the next edge identified with the lowest current X-value is again that obtained from the register 430 which is output as an edge crossing (X=1 15, P=2).

Updating of the edge again occurs with the value be added to the edge pool 412 as shown.

At this time, it is seen that the edge pool 412 is now full and from which the edge with the smallest X-value is selected and emitted to the output list 404', and the corresponding limited pointer moved accordingly.

As seen in Fig. 12H, the next lowest edge crossing is that from the register 428 which is output (X=160 The edge pool 412 is again updated and the next smallest X-value emitted to the output list 404'.

At the end of scanline 35, and as seen in Fig. 121, the contents of the edge pool 412 are flushed to the output list 404' in order of smallest X-value. As seen in Fig. 12J, the next mnain edge list 404' and the main edge list 404 are swapped by exchanging their pointers in anticipation of rendering the next scanline 36. After the swapping, it is seen from Fig. 12J that the contents of the main edge list 404 include all edges current on scanline 36 arranged in order of X-position thereby permitting their convenient access which facilitates fast rendering.

712060.doc -38- Ordinarily, new edges are received by the edge processing module 400 in order of increasing X-position. When a new edge arrives, its position is updated (calculated for the next scanline to be rendered) and this determines further action as follows: if the updated position is less than the last X-position output on the line 498, the new edge is insertion sorted into the main spill list 406 and the corresponding limit register updated; otherwise, if there is space, it is retained in the edge pool 412.

As is apparent from the foregoing, the edge pool 412 aids in the updating of the lists in an ordered manner in anticipation of rendering the next scanline in the rasterised image. Further, the size of the edge pool 412 may be varied to accommodate larger numbers of non-ordered edges. However, it will be appreciated that in practice the edge pool 412 will have a practical limit, generally dependent upon processing speed and available memory with the graphic processing system. In a limiting sense, the edge pool 412 may be omitted which would ordinarily require the updated edges to be insertion sorted into the next output edge list 404'. However, this situation can be avoided as a normal occurrence through the use of the spill lists mentioned above. The provision of the spill lists allows the described arrangement to be implemented with an edge pool of practical size and yet handle relatively complex edge intersections without having to resort to software intensive sorting procedures. In those small number of cases where the edge pool and spill list are together insufficient to accommodate the edge intersection complexity, sorting methods may be used.

An example of where the spill list procedure is utilised is seen in Fig. 14A where three edges 60, 61 and 63 intersect an edge 62 at a relative position between scanlines A and B. Further, the actual displayed pixel locations 64 for each of scanlines A, B, are shown which span pixel locations C to J. In the above described example where the edge pool 412 is sized to retain three edge records, it will be apparent that such an arrangement 712060.doc -39alone will not be sufficient to accommodate three edge intersections occurring between adjacent scanlines as illustrated in Fig. 14A.

Fig. 14B shows the state of the edge records after rendering the edges 60, 61 and 63 on scanline A. The edge crossing H is that most recently emitted and the edge pool 412 is full with the updated X-values E, G and I for the edges 60, 61 and 63 respectively for the next scanline, scanline B. The edge 62 is loaded into the current active edge record 430 and because the edge pool 412 is full, the lowest X-value, corresponding to the edge 60 is output to the output edge list 404'.

In Fig. 14C, the next edge crossing is emitted (X J for edge 62) and the corresponding updated value determined, in this case X C for scanline B. Because the new updated value X C is less than the most recent value X E copied to the output list 404', the current edge record and its corresponding new updated value is transferred directly to the output spill list 406'.

Fig. 14D shows the state of the edge records at the start of scanline B where it is seen that the main and output lists, and their corresponding spill components have been swapped. To determine the first emitted edge, the edge 60 is loaded into the current active edge register 430 and the edge 62 is loaded into the spill active edge register 432.

The X-values are compared and the edge 62 with the least X-value (X C) is emitted, updated and loaded to the edge pool 412.

Edge emission and updating continues for the remaining edges in the main edge list 404 and at the end of the scanline, the edge pool 412 is flushed to reveal the situation shown in Fig. 14E, where it is seen that each of the edges 60 to 63 are appropriately ordered for rendering on the next scanline, having been correctly emitted and rendered on scanline B.

As will be apparent from the foregoing, the spill lists provide for maintaining edge rasterisation order in the presence of complex edge crossing situations. Further, by 712060.doc virtue of the lists being dynamically variable in size, large changes in edge intersection numbers and complexity may be handled without the need to resort to sorting procedures in all but exceptionally complex edge intersections.

Preferably, the edge pool 412 is sized to retain eight edge records and the lists 404, 404' together with their associated spill lists 406, 406' have a base (minimum) size of 512 bytes which is dynamically variable thereby providing sufficient scope for handling large images with complex edge crossing requirements.

3.2.3 Multiple scanline edge tracking The edge sorting mechanism described in the previous section has the advantage of simplicity, however the continual reading and writing of edge records can be a significant user of the available memory bandwidth in a rendering ASIC. The terminating edge records, used by the PostScript and Bitmap edge tracking modules, contain all of the information required to generate an edge crossing message, without the overhead of including the information required to determine an edge position on the next scanline. It is therefore possible to reduce the bandwidth requirement by tracking edges for several scanlines at a time and emitting terminating edges for the intermediate scanlines. The full tracking information is then only emitted for the final scanline of the sequence.

For the purposes of explanation, the scheme will be described where tracking is performed for two scanlines at a time. The generalisation to three or more scanlines will be obvious. The diminishing returns associated with requiring separate sorters for each scanline and more input streams will also be obvious.

Fig. 37 shows the edge input module. The edge input module reads from five addresses, maintained in the loader modules. There is a new edge list whose address, new_edoe_add is passed to the loader using the address contained in a LOAD NEW EDGES ANDRENDER command. The edge module command processor accepts SET_BUF commands that address registers within the edge module, 712060.doc -41and LOAD NEW EDGES AND RENDER command, and passes other commands down the pipeline. On receiving a LOAD_NEW_EDGES_AND_RENDER command, the edge module command processor passes the new edge list address from the command to the input module, latches NY, stalls the pipeline and triggers processing edges for the number of lines specified in the NY field of the LOAD_NEWEDGES_ANDRENDER command. The main and spill active edge buffer addresses for the current scanline are held in registers for the scanline-one and scanline-two input streams: the scanline-one input stream contains terminating edge records for the current scanline that were calculated on the previous scanline; and the scanline-two input stream contains active edges and terminating edges for the current scanline that were calculated two scanlines previously.

Each input stream has a main and spill edge list associated with it: the address of the start and finish of each list is transmitted to the input sub-module at the start of each scanline by the output sub-module, when the output sub-module has completed sorting the output edge records for the previous scanline.

Each of the edge loaders fetches data from its input address, and updates the input address after fetching. The data comparator/selector compares the current X field of the active edge records in the loaders, and selects the record with the lowest value. When a data record is selected from an edge loader, the active edge record is passed to the data selector, and the next edge is read in. When the finish address for the particular list is reached, no further reading is performed, and when the final edge record for a list has been emitted to the data selector, the edge loader signals this by de-asserting a data_valid flag. When the data_valid flags for all lists are de-asserted, an end_of_scanline record is created, NY is decremented, and the input sub-module waits to be triggered by the output module.

Data pre-fetching is performed to speed the reading of edge records.

712060.doc -42- O The active edge record selected by the comparator/selector is passed to the edge crossing generator. Fig. 38 shows the steps performed by the edge crossing generator.

Terminating edges, which are generated in the edge update sub-module for intermediate 0scanlines, and for all scanlines by the bitmap and postscript edge update systems, will cause an edge crossing message to be generated: the edge crossing message contains Cc€ O copies of the X-position, level/level list address and the bits that control the actions of the (CN various counters in the level activation module. Normal curve-tracing active edge records Swill also generate edge crossing messages in the same manner. PostScript and bitmap active edge records do not generate edge crossing messages. After the edge crossing message is generated and passed down the main pipeline to the level activation module, a terminating record is deleted, whereas an active record is passed to the edge update submodule, for tracking.

The edge update sub-module shown in Fig. 39 includes several sub-modules, for the different types of tracking available. In the multiple scanline version, an output signal (NEXT_SCANLINE) is required to determine which scanline an edge is for: the next scanline, or the following one. Each update sub-module tracks edges for two scanlines, using the mechanisms described previously for one scanline. For the first scanline, the sub-module creates a terminating edge record for each edge position determined from the active record, and emits these to the edge output sub-module with the NEXT_SCANLINE signal asserted. The terminating edge records are constructed by copying the level control bits, and the level list/address fields from the active record, and including the calculated X-position for the first scanline. For the following scanline, the sub-module creates terminating edge records for each extra edge position (if required, as it is for bitmap and PostScript tracking), and also updates the active edge record, in particular modifying the X-position field and decrementing the Y-remaining. These are transmitted to the edge output sub-module with the NEXTSCANLINE signal de-asserted. If Y-remaining falls 712060.doc -43to zero, the active edge record is deleted, with or without emitting edges for the scanline concerned, according to the properties of the particular edge type.

Fig. 40 shows the multiple edge pool sorting mechanism. Active edge records are received from the edge update module, and passed into a splitter, which passes each edge to an edge pool according to a signal (NEXT_SCANLINE) associated with the active record, which is asserted to indicate that the edge record is for the next scanline, and deasserted to indicate that the edge is for the following scanline. If NEXT_SCANLINE is asserted, the edge record is passed to the scanline-one edge pool, otherwise, it is passed to the scanline-two edge pool. Obviously, a numerical signal could perform the same function for larger numbers of sorting mechanisms. The edge pool controller of the receiving edge pool puts the edge record into a free slot in its edge pool. If all of the slots are now full, the edge selector chooses the minimum X-value edge among the edges in the edge pool. This is compared against the current X value, and if greater than or equal to the current X value, the current X value is updated to the value in the edge, and the edge record is passed to the main edge controller, which appends the active edge to the main edge list for the pool. Otherwise, if the edge X-value is less than the current X value, the edge record is passed to the insertion sorter, and the edge record is insertion-sorted into the spill edge list, according to its edge X-value.

When an end_ofscanline signal is encountered, both edge pools are flushed to their respective main edge lists in increasing X order. At this point, the edge input and output buffers are swapped for the next-scanline buffers, and the following-scanline buffers are cycled. That is: the current scanline-one output buffer becomes the scanline-one input buffer for the next scanline, the main start address and main current address are transmitted to the input sub-module to form the start and finish addresses for the next scanline-one main buffer, and the spill start 712060.doc -44and spill current addresses are transmitted to the input submodule to form the start and finish addresses for the next scanline-one spill buffer; the current scanline-one edge input buffer becomes the scanline-one output buffer for the next scanline, and the main and spill current addresses are reset to the values of the main and spill buffer start addresses; the currently dormant scanline-two buffer becomes the input buffer for the next scanline, and the dormant main and spill, start and finish addresses are transmitted to the input module; the current scanline-two edge output buffer becomes dormant, and the main and spill current addresses are transferred to the dormant main and spill finish addresses respectively; and the current scanline-two edge input buffer becomes the scanline-two output buffer for the next scanline, and the main and spill current addresses are reset to the values of the main and spill buffer start addresses.

The edge output sub-module then signals the edge input module that it is ready for the next scanline, and passes the main and spill addresses for the input buffers to that sub-module.

3.3 PRIORITY DETERMINATION

MODULE

The operation of the priority determination module 500 will now be described with reference to Fig. 5. The primary function of the priority determination module 500 is to determine those objects that make a contribution to a pixel currently being scanned, order those contributing objects in accordance with their priority levels, and generate 712060.doc color composite messages for instructing the pixel compositing module 700 to composite the ordered objects to generate the required color and opacity for the current pixel.

The priority determination module 500 receives incoming messages 498 from the edge processing module 400. These incoming messages may include load priority data messages, load fill data messages, edge. crossing messages, and end of scanline messages. These messages first pass through a first-in first-out (FIFO) buffer 518 before being read by a priority update module 506. The FIFO 518 acts to de-couple the operation of the edge processing module 400 and the priority determination module 500.

Preferably the FIFO 518 is sized to enable the receipt from the edge processing module 400 and transfer of a full scanline of edge-crossings in a single action. Such permits the priority determination module 500 to correctly handle multiple edge-crossings at the same pixel location.

The priority determination module 500 is also adapted to access a priority state table 502, and a priority data table 504. These tables are used to hold information about each priority. Preferably, the priority state and priority data tables 502, 504 are combined in memory as a single level activation table 530, also referred to as the priority properties and status table 34, as shown in Fig. 18. Alternatively these tables 502, 504 can be kept separate. In a further alternative, the priority properties and status table 34 can be separated into several sequential blocks, with the base address for each block of the table stored in a register within the module. This allows the table to be more easily implemented in a fragmented memory environment.

Preferably, the priority properties and status table 34 includes at least the following fields as shown in Fig. 18 for each priority level: a fill-rule flag (FILL_RULEISODD_EVEN) which indicates whether this priority is to have its inside versus outside state determined by the application of the odd-even fill rule or the non-zero winding fill rule; 712060.doc -46- (ii) a fill counter (FILL COUNT) for storing a current fill count which is modified in a manner indicated by the fill rule each time an edge affecting this priority is crossed; (iii) a clipper flag CLIPPER) which indicates whether this priority is to be used for clipping or filling; (iv) a clip type flag (CLIP_OUT) which, for edges which have the clipper flag set, records whether the clipping type is a "clip-in" or a "clip-out"; a clip counter (CLIP COUNT) for storing a current clip count which is decremented and incremented when a clip-in type clip region affecting this priority is entered and exited respectively, and incremented and decremented when a clip-out type clip region affecting this priority is entered and exited respectively; (vi) a flag (NEED_BELOW) which records whether this priority requires levels beneath it to be calculated first, referred to as the "need-below" flag; (vii) a fill table address (FILL INDEX), which points to an address where the fill of the priority is stored; (viii) a fill type (FILL TYPE); (ix) a raster operation code (COLOR_OP); an alpha channel operation code (ALPHA_OP) consisting of three flags (LAO_USE_D_OUT_S, LAO_USE_S_OUT_D and LAO_USE_S ROP_D); (xi) a flag (TERNARY) to indicate to the pixel compositing system that the operation specified in COLOROP is part of a ternary raster operation; (xii) a stack operation code (STACK_OP); (xiii) a flag (X_INDEPENDENT) which records whether the color of this priority is constant for a given Y, referred to here as the "x-independent" flag; and (xiv) other information (ATTRIBUTES) of the priority.

712060.doc -47- Clipping objects are known in the art and act not to display a particular new object, but rather to modify the shape of an another object in the image. Clipping objects can also be turned-on and turned-off to achieve a variety of visual effects. For example, the object 80 of Fig. 8A could be configured as a clipping object acting upon the object 90 to remove that portion of the object 90 that lies beneath the clipping object 80. This may have the effect of revealing any object or image beneath the object 90 and within the clipping boundaries that would otherwise be obscured by the opacity of the object The CLIPPER flag is used to identify whether the priority is a clipping object. Also, the CLIP OUT flag is used to determine whether the priority is a clip-in or a clip-out, and the CLIP COUNT is used in a similar fashion to FILL COUNT to determine whether the current pixel is within the clip region.

Figs. 13A and 13B demonstrate the application of the odd-even and non-zero winding rules, for activating objects. The relevant rule to be used is determined by means of the fill-rule flag FILLRULEISODD_EVEN.

For the purposes of the non-zero winding rule, Fig. 13A illustrates how the edges 71 and 72 of an object 70 are allocated a notional direction, according to whether the edges are downwards-heading or upwards-heading respectively. In order to form a closed boundary, edges link nose-to-tail around the boundary. The direction given to an edge for the purposes of the fill-rule (applied and described later) is independent of the order in which the segments are defined. Edge segments are defined in the order in which they are tracked, corresponding to the rendering direction.

Fig. 13B shows a single object (a pentagram) having two downwards-heading edges 73 and 76, and three upwards-heading edges 74, 75 and 77. The odd-even rule operates by simply toggling a Boolean value in the FILL COUNT as each edge is crossed by the scanline in question, thus effectively turning-on (activating) or turning-off (deactivating) an object's color. The non-zero winding rule increments and decrements a 712060.doc -48value stored in the fill counter FILL COUNT dependent upon the direction of an edge being crossed. In Fig. 13B, the first two edges 73 and 76 encountered at the scanline are downwards-heading and thus traversal of those edges increments the fill counter, to +1 and +2 respectively. The next two edges 74 and 77 encountered by the scanline are upwards-heading and accordingly decrement the fill counter FILL COUNT, to +1 and 0 respectively. The non-zero winding rule operates by turning-on (activating) an object's color when the fill counter FILL COUNT is non-zero, and turning-off (de-activating) the object's color when the fill counter FILL COUNT is zero.

The NEED BELOW flag for a priority is established by the driver software and is used to inform the pixel generating system that any active priorities beneath the priority in question do not contribute to the pixel value being rendered, unless the flag is set. The flag is cleared where appropriate to prevent extra compositing operations that would otherwise contribute nothing to the final pixel value.

The raster operation code (COLOROP), alpha channel operation (ALPHAOP) ternary flag (TERNARY), and stack operation (STACKOP) together form the pixel operation (PIXEL_OP) that is to be performed by the pixel compositing module 700 on each pixel where the priority is active and exposed.

Preferably, most of the information contained in the combined table 34 is directly loaded by instructions from the driver software. In particular, the fill-rule flag, the clipper lag, the clip type flag, and the need-below flag, fill table address, fill type, raster operation, code, alpha channel operation code, stack operation code, xindependent flag, and other attributes may be handled in this manner. On the other hand, the fill counter, and clip counter are initially zero and are changed by the priority determination module 500 in response to edge crossing messages.

The priority determination module 500 determines that a priority is active at a pixel if the pixel is inside the boundary edges which apply to the priority, according to the 712060.doc -49fill-rule for that priority, and the clip count for the priority. A priority is exposed if it is the uppermost active priority, or if all the active priorities above it have their corresponding need-below flags set. In this fashion, pixel values may be generated using only the fill data of the exposed priorities. It is important to note that an object's priority designates the level location of the object in the z-order of the objects from the rearmost object to the foremost object. Preferably, a number of non-overlapping objects that have the same fill and compositing operation, and that form a contiguous sequence, may be designated as having the same priority. This effectively saves memory space in the fill table. Furthermore, the corresponding edge records of objects need only reference the corresponding priority in order to reference the corresponding fill and compositing operation.

Returning now to Fig. 5, the priority update module 506 maintains a counter 524 which records the scanline intersection coordinate up to which it has completed processing. This will be referred to as the current X of the priority update module 506.

The initial value at the start ofa scanline is zero.

Upon examining an edge crossing message received at the head of the FIFO 518, the priority update module 506 compares the X intersection value in the edge crossing message with its current X. If the X intersection value in the edge crossing message is less than or equal to the current X, the priority update module 506 processes the edge crossing message. Edge crossing message processing comes in two forms. Normal edge processing" (described below) is used when the record in the priority state table 502 indicated by the priority in the edge crossing message has a clipper flag which indicates that this is not a clip priority. Otherwise, "clip edge processing" (described below) is performed.

712060.doc "Normal edge processing" includes, for each priority in the edge crossing message and with reference to fields of the record of combined table 34 indicated by that priority, the steps of: noting the current fill count of the current priority; (ii) either: if the fill rule of the current priority is odd-even, setting the fill count to zero if it is currently non-zero, else setting it to any non-zero value, or if the fill rule of the current priority is non-zero winding, incrementing or decrementing (depending on the edge direction flag) the fill count; and (iii) comparing the new fill count with the noted fill count and if one is zero and the other is non-zero performing an "active flag update" (described below) operation on the current priority.

Some arrangements may use a separate edge crossing message for each priority rather than placing a plurality of priorities in each edge crossing message.

An active flag update operation includes first establishing a new active flag for the current priority. The active flag is non-zero if the fill count for the priority in the priority state table 502 is non-zero and the clip count for the priority is zero, else the active flag is zero. The second step in the active flag update operation is to store the determined active flag in an active flags array 508 at the position indicated by the current priority, then if the need-below flag in the priority state table for the current priority is zero, also storing the active flag in an opaque active flags array 510 at the position indicated by the current priority.

"Clip edge processing" includes, with reference to fields of the priority state table record indicated by the first priority in the edge crossing message, the steps of: noting the current fill count of the current priority; (ii) either: 712060.doc -51if the fill rule of the current priority is odd-even, setting the fill count to zero if it is currently non-zero else setting it to any non-zero value, or if the fill rule of the current priority is non-zero winding, incrementing or decrementing (depending on the edge direction flag) the fill count; and (iii) comparing the new fill count with the noted fill count and determining a clip delta value of: zero, if both the new fill count is zero and the noted fill count is zero, or both the new fill count is non-zero and the noted fill count is non-zero, plus one, if the clip type flag of the current priority is clip-out and the noted fill count is zero and the new fill count is non-zero, or the clip type flag of the current priority is clip-in and the noted fill count is non-zero and the new fill count is zero, or otherwise, minus one; and (iv) for every subsequent priority after the first in the edge crossing message, add the determined clip delta value to the clip count in the record in the priority state table indicated by that subsequent priority, and if the clip count either moved from non-zero to zero, or from zero to non-zero in that process, performing an active flag update operation as described above on that subsequent priority. It should be noted that the initial value of each clip count is set by the LOAD_PRIORITY_PROPERTIES instruction described previously. The clip count is typically initialised to the number of clip-in priorities, which affect each priority.

Some arrangements do not associate a priority with a clip, but instead directly increment and decrement the clip count of all priorities given in the edge crossing message. This technique can be used, for example, when clip shapes are simple and do not require the application of a complex fill rule. In this specific application, the clip count of the level controlled by an edge is incremented for an upwards heading edge or 712060.doc -52decremented for a downwards heading edge. A simple closed curve, described anticlockwise, acts a clip-in, whereas a simple closed curve, described clockwise, acts as a clip-out.

When the X intersection value in the edge crossing message is greater than the current X of the priority update module 506, the priority update module 506 forms a count of how many pixels to generate, being the difference between the X intersection value in the edge crossing message and the current X, this count is formatted into a priority generation message, which is sent via a connection 520 to a priority generation module 516. The priority update module 506 then waits for a signal 522 from the priority generation module 516 indicating that processing for the given number of pixels has completed. Upon receipt of the signal 522, the priority update module 506 sets its current X to the X intersection value in the edge crossing message and continues processing as described above.

Upon receipt of a priority generation message 520, the priority generation module 516 performs a "pixel priority generation operation" (described below) a number of times indicated by the count it has been supplied, thereupon it signals 522 the priority update module 506 that it has completed the operation.

Each pixel priority generation operation includes firstly using a priority encoder 514 (eg. a 4096 to 12 bit priority encoder) on the opaque active flags array 510 to detenrmine the priority number of the highest opaque active flag. This priority (if any) is used to index the level activation table 530 and the contents of the record so referenced is formed into a fill priority message output 598 from the priority generation module 516 and sent to the fill color determination module 600. Further, if a priority was determined by the previous step (ie. there was at least one opaque active flag set), the determined priority is held, and is referred to as the "current priority". If no priority was determined the current priority is set to zero. The priority generation module 516 then repeatedly 712060.doc -53uses a modified priority encoder 512 on the active flag array 508 to determine the lowest active flag which is greater than the current priority. The priority so determined (if any) is used to index the level activation table 530 and the contents of the record so referenced is formed into a fill priority message. This fill priority message is then sent via the output 598 to the fill color determination module 600, then the determined priority is used to update the current priority. This step is used repeatedly until there is no priority determined (that is, there is no priority flagged in the active flags, which is greater than the current priority). Then the priority generation module 516 forms an end of pixel message and sends it to the fill color determination module 600. The priority determination module 500 then proceeds to the next pixel to generate another series of fill priority messages in similar fashion.

Turning now to Fig. 22A, there is shown an example of such a series of fill priority messages 2200 generated by the priority determination module 500 for a single current pixel. As described above, these fill priority messages 2202 are first preceded by a START OF PIXEL command 2201. The fill priority messages 2202 are then sent in priority order commencing with the lowest exposed active priority level. When there are no more fill priority messages 2202 for the current pixel, the priority determination module 500 then sends an END OF PIXEL message 2206.

Each of one these fill priority messages 2202 preferably includes at least the following fields: An identifier code FILL_PRTY 2204 for identifying the message as a fill priority message. This code also includes an index LEVEL_INDX to the corresponding record in the level activation table 530, and also a code FIRSTPIXEL indicating whether or not this fill priority message belongs to a first pixel in a run of pixels having the same fill priority messages. The priority determination module 500 asserts the FIRSTPIXEL code for all those fill priority messages of a currently scanned pixel that is intersected by 712060.doc -54an edge as indicated by the edge crossing messages. The FIRSTPIXEL code is deasserted for all fill priority messages of a currently scanned pixel if there is no edges intersecting that pixel as indicated by the edge crossing messages.

(ii) A fill table address FILL_INDEX, (iii) A fill type FILL_TYPE, (iv) A raster operation code COLOR_OP, An alpha channel operation code ALPHA_OP, (vi) A ternary operator flag TERNARY, (vii) A stack operation code STACK_OP, and (viii) A flag XIND which records whether the color of this priority is constant for a given Y, referred to here as the "x-independent" flag. This flag is asserted when the color for this priority is constant.

The values of fields (ii) to (viii) for the fill priority message are retrieved from the corresponding record in the combined table 34.

Preferably, the priority generation module 516 notes the value of the xindependent flag of each fill priority message that it forwards to the fill color determination module 600 while it processes the first pixel of a sequence. If all the forwarded messages have the x-independent flag specified, all subsequent messages in the span of pixels between adjacent edge intersections can be replaced by a single repeat message. This is done by producing a repeat message and sending it to the fill color determination module 600 in place of all further processing in this sequence. It will be appreciated that if all the fill priority messages of a first pixel in a span of pixels between adjacent edges have their x-independent flag asserted, then the color and opacity of the pixels in the span of pixels will be constant. Thus in these cases, the pixel compositing module 700 need only composite the first pixel in the span of pixels to generate the required constant color and opacity and pass this onto the pixel output module 800. The 712060.doc generated repeat command is then passed to the pixel output module 800 which reproduces the constant color and opacity for the subsequent pixels in the span of pixels from the color and opacity of the first pixel. In this fashion, the number of compositing operations performed by the pixel compositing module 700 is reduced.

As another preferred feature to the basic operation described above, the priority generation module 516 sends the highest opaque priority via the connection 522 to the priority update module 506 after each edge crossing message. The priority update module 506 holds this in a store 526. The priority determination module 506 then, instead of a simple test that the X intersection in the message is greater than the current X, performs a test that the X intersection in the message is greater than the current X and that at least one of the levels in the message is greater than or equal to the highest opaque priority, before producing a fill priority message. By doing this, fewer pixel priority determination operations may be done and longer repeat sequences may be generated.

Using the example of the graphic objects shown in Figs. 8A, 9A and 9B, the priority update process described above can be illustrated, for scanline 35 using the edge crossings seen from Figs. 12C to 12J, as seen in Figs. 15A to Figs. 15A to 15E illustrate operation of the priority tables 502 and 504 which, in a preferred implementation are merged into a single level activation table (LAT) 530 (see Fig. 18) and which is depicted together with arrays 508, 510 and encoders 512 and 514.

As seen in Fig. 15A, edge crossing messages are received in order for a scanline from the edge processing module 400 and are loaded into the table 530, which is arranged in priority order. The edge crossing messages include, in this example, an incrementing direction according to the non-zero winding rule of the edge traversal. It is possible for no entries in the level activation table 530 to be set.

The level activation table 530 includes column entries for fill count, which are determined fiom the edge according to the non-zero winding rule or, where appropriate, 712060.doc -56the odd-even rule. The need-below flag is a property of a priority and is set as part of the LOAD PRIORITIES PROPERTIES instruction. The need-below is set for all priority levels when the table 530 is loaded. Other columns such as "clip count" and "fill index table" may be used, but for this example are omitted for simplicity of explanation. Where no level is active the corresponding entries are set to zero. Further, the values of the arrays 510 and 508 are updated from the table 530 after receiving a subsequent edge crossing.

From Fig. 15A, it will be apparent that, for convenience, a number of records have been omitted for clarity. As described previously, the contents of the table 530, where not used in the priority determination module 500, are passed as messages to each of the fill color determination module 600 for pixel generation, and to the pixel compositing module 700 for compositing operations.

The first edge crossing for scanline 35 (Fig. 12E) is seen in Fig. 15A where for P=I, the fill count is updated to the value of the edge according to the non-zero winding rule. The "need-below" flag for this level has been set to zero by the driver software as the object in question is opaque.

Because a previous state of the table 530 was not set, the arrays 510 and 508 remain not set and the priority encoder 514 is disabled from outputting a priority. This is interpreted by priority generation module 516 which outputs a count n=40 (pixels) for a "no object" priority (eg: P being the first, blank, portion of the scanline Fig. 15B shows the arrangement when the edge crossing of Fig. 12F is received.

The fill count is updated. The arrays 510 and 508 are then set with the previous highest level from the table 530. At this time, the module 516 outputs a count n=45, P=l representing the edge 92 of the opaque red object 90 before intersection with the semitransparent triangle 712060.doc -57- Fig. 15C shows the arrangement when the edge crossing of Fig. 12G is received.

Note that the fill count has to be adjusted downwardly because of the non-zero winding rule. The priority encoder 514 is used to identify the highest opaque level Because the object (80) that is valid prior to receiving the current edge crossing is not opaque, the modified priority encoder 512 is used to select the priority P=2 as the highest active level. Priorities P1 and P2 are output as current for n=(1 15-85)=30 pixels.

Fig. 15D shows the arrangement when the edge crossing of Fig. 12H is received. Note that previously changed "need-below" for P=2 has been transferred to the active array 508, thus permitting the priority encoder to output a value P=1 current for n=(160-115)=45 pixels.

Fig. 15E shows the result when the edge crossing of Fig. 121 is received, providing for an output of P=0 for n=(180-1 6 0)= 2 0 pixels.

As such, the priority module 500 outputs counts of pixels and corresponding priority display values for all pixels of a scanline.

3.4 FILL COLOR DETERMINATION

MODULE

The next module in the pipeline is the fill color determination module 600, the operation of which will now be described with reference to Fig. 6. Incoming messages 598 from the priority determination module 500, which include set fill data messages, repeat messages, fill priority messages, end of pixel messages, and end of scanline messages, first pass to a fill lookup and control module 604. The fill lookup and control module 604 maintains a current X position counter 614 and a current Y position counter 616 for use by various components of the fill color determination module 600.

Upon receipt of an end of scanline message, the fill lookup and control module 604 resets the current X counter 614 to zero and increments the current Y counter 616.

The end of scanline message is then passed to the pixel compositing module 700.

712060.doc -58- Upon receipt of a set fill data message, the fill lookup and control module 604 stores the data in the specified location 602 of the fill data table 36.

Upon receipt of a repeat message, the fill lookup and control module 604 increments the current X counter 614 by the count from the repeat message. The repeat message is then passed to the pixel compositing module 700.

Upon receipt of an end of pixel message 2206, the fill lookup and control module 604 again increments the current X counter 614, and the end of pixel message is then passed to the pixel compositing module 700.

Upon receipt of a fill priority message 2202, the fill lookup and control module 604 performs operations which include: the fill type from the fill priority message is used to select a record size in the fill data table 36; (ii) the fill table address from the fill priority message, and the record size as determined above, is used to select a record from the fill data table 36; (iii) the fill type from the fill priority message is used to determine and select a sub-module to perform generation of the fill color. The sub-modules may include a raster image module 606, a flat color module 608, a linearly ramped color module 610, and an opacity tile module 612; (iv) the determined record is supplied to the selected sub-module 606-612; the selected sub-module 606-612 uses the supplied data to determine a color and opacity value; (vi) the determined color and opacity is combined with remaining information fi-om the fill color message, namely the raster operation code, the alpha channel operation code, the stack operation code, to form a color composite message 2208, which is sent to the pixel compositing module 700 via the connection 698.

712060.doc -59- Thus, a message sequence 2200 of Fig. 22A starting with a start of pixel message 2201 message, then fill priority messages 2202 followed by an end of pixel message 2206 is transformed into a message sequence 2212 of Fig. 22B comprising a start of pixel message 2201, color composite messages 2208 followed by an end of pixel message 2206. These color composite messages 2208 preferably include the same fields as the fill priority messages 2202, with the following exceptions: code CLR_CMP 2210 for identifying the message as a color composite message. This CLRCMP code also includes the index to the corresponding record in the level activation table 530; and (ii) a color and opacity field for containing the color and opacity value of the priority. The latter replaces the fill index and fill type fields of the fill priority messages.

In the preferred arrangement, the determined color and opacity is a red, green, blue and opacity quadruple with 8-bit precision in the usual manner giving 32 bits per pixel. However, a cyan, magenta, yellow and black quadruple with an implied opacity, or one of many other known color representations may alternatively be used. The red, green, blue and opacity case is used in the description below, but the description may also be applied to other cases.

The operation of the raster image module 606, the flat color module 608, the linearly ramped color module 610, and the opacity tile module 612 will now be described.

The flat color module 608 interprets the supplied record as a fixed format record containing three 8-bit color components (typically interpreted as red, green and blue components) and an 8-bit opacity value (typically interpreted as a measure of the fraction of a pixel which is covered by the specified color, where 0 means no coverage, that is complete transparency, and 255 means complete coverage, that is, completely opaque).

712060.doc This color and opacity value is output directly via the connection 698 and forms the determined color and opacity without further processing.

The linearly ramped color module 610 interprets the supplied record as a fixed format record containing four sets of three constants, cx, cy, and d, being associated with the three color and one opacity components. For each of these four sets, a result value r is computed by combining the three constants with the current X count, x, and the current Y count, y, using the formula: r clamp cx x cy y d) Where the function "clamp" is defined as: O1 255 255 x clamp(x) Lx 0 x 25 0 x<0 The four results so produced are formed into a color and opacity value. This color and opacity value is output directly via the connection 698 and forms the determined color and opacity without further processing.

The opacity tile module 612 interprets the supplied record as a fixed format record containing three 8-bit color components, an 8-bit opacity value, an integer X phase, a Y phase, an X scale, a Y scale, and a 64 bit mask. These values originate in the display list generation and contained typically in the original page description. A bit address, a, in the bit mask, is determined by the formula: a x/2sx px mod 8 y/2sy py) mod 8 x 8 The bit at the address in the bit mask is examined. If the examined bit is one, the color and opacity from the record is copied directly to the output of the module 612 712060.doc -61and forms the determined color and opacity. If the examined bit is zero, a color having three zero component values and a zero opacity value is formed and output as the determined color and opacity.

The raster image module 606 interprets the supplied record as a fixed format record containing six constants, a, b, c, d, tx, and ty; an integer count of the number of bits (bpl) in each raster line of the raster image pixel data 16 to be sampled; and a pixel type. The pixel type indicates whether the pixel data 16 in the raster image pixel data is to be interpreted as one of: one bit per pixel black and white opaque pixels; (ii) one bit per pixel opaque black or transparent pixels; (iii) 8 bits per pixel grey scale opaque pixels; (iv) 8 bits per pixel black opacity scale pixels; 24 bits per pixel opaque three color component pixels;, or (vi) 32 bits per pixel three color component plus opacity pixels.

Many other formats are possible.

The raster image module 606 uses the pixel type indicator to determine a pixel size (bpp) in bits. Then a bit address, a, in the raster image pixel data 16 is calculated having the formula: a bpp* a* x c y txJ+bpl Lb x d y tyJ A pixel interpreted according to the pixel type from the record 602 is fetched from the calculated address in the raster image pixel data 16. The pixel is expanded as necessary to have three eight bit color components and an eight bit opacity component.

By "expanded", it is meant for example, that a pixel from an eight bit per pixel grey scale 712060.doc -62opaque raster image would have the sampled eight bit value applied to each of the red, green and blue component, and the opacity component set to fully opaque. This then forms the determined color and opacity output 698 to the pixel compositing module 700.

As a consequence, the raster pixel data valid within a displayable object is obtained through the determination of a mapping to the pixel image data within the memory 16. This effectively implements an affine transform of the raster pixel data into the object-based image and is more efficient than prior art methods which transfer pixel data from an image source to a frame store where compositing with graphic objects may occur.

As a preferred feature to the above, interpolation between pixels in the raster image pixel data 16 may optionally be performed by first calculating intermediate results p, and q according to the formulae: p=a*x c*y tx q=b*x d*y ty Next the bit addresses, aOO, a01, al0, and all, of four pixels in the raster image pixel data 16 are determined according to the formulae: aOO bpp LpJ bpl LqJ a01 a00 bpp al0 a00 bpl all aOO bpl bpp 712060.doc -63- Next, a result pixel component value, r, is determined for each color and opacity component according to the formula: r interp(interp(get(a00), get(aOl), interp(get(al0),get(al q) where the function "interp" is defined as: interp(a, b, c) a (c-LcJ) In the above equations, the representation Lvalue floor (value), where a floor operation involves discarding the fractional part of the value.

The get function returns the value of the current pixel component sampled from the raster image pixel data 16 at the given bit address. Note that for some components of some image types this can be an implied value.

As a preferred feature to the above, image tiling may optionally be performed by using x and y values in the above equations which are derived from the current X and Y counters 614, 616 by a modulus operation with a tile size read from the supplied record.

Many more such fill color generation sub-modules are possible.

PIXEL COMPOSITING

MODULE

The operation of the pixel compositing module 700 will now be described. The primary function of the pixel compositing module is to composite the color and opacity of all those exposed object priorities that make an active contribution to the pixel currently being scanned.

Preferably, the pixel compositing module 700 implements a modified form of the compositing approach as described in "Compositing Digital Images", Porter, T: Duff, T; 712060.doc -64- Computer Graphics, Vol 18 No 3 (1984) pp 2 5 3 2 5 9 ("Porter And Duff'). Examples of Porter and Duff compositing operations are shown in Fig. 21. However, such an approach is deficient in that it only permits handling a source and destination color in the intersection region formed by the composite, and as a consequence is unable to accommodate the influence of transparency outside the intersecting region. The described arrangement overcomes this by effectively padding the objects with completely transparent pixels. Thus the entire area becomes in effect the intersecting region, and reliable Porter and Duff compositing operations can be performed. This padding is achieved at the driver software level where additional transparent object priorities are added to the combined table. These Porter and Duff compositing operations are implemented utilising appropriate color operations as will be described below in more detail with reference to Figs. 20A, 20B, and 19.

Preferably, the images to be composited are based on expression trees.

Expression trees are often used to describe the compositing operations required to form an image, and typically comprise a plurality of nodes including leaf nodes, unary nodes and binary nodes. A leaf node is the outermost node of an expression tree, has no descendent nodes and represents a primitive constituent of an image. Unary nodes represent an operation which modifies the pixel data coming out of the part of the tree below the unary operator. A binary node typically branches to left and right subtrees; wherein each subtree is itself is an expression tree comprising at least one leaf node. An example of an expression tree is shown in Fig. 17C. The expression tree shown in Fig. 17C comprises four leaf nodes representing three objects A, B, and C, and the page. The expression tree of Fig. 17C also comprises binary nodes representing the Porter and Duff OVER operation. Thus the expression tree represents an image where the object A is composited OVER the object B, the result of which is then composited OVER object C, and the result of which is then composited OVER the page.

712060.doc Turning now to Figs. 17A and 17B, there is shown a typical binary compositing operation in an expression tree. This binary operator operates on a source object (src) and a destination object (dest), where the source object src resides on the left branch and the destination object (dest) resides on the right branch of the expression tree. The binary operation is typically a Porter and Duff compositing operation. The area src n dest represents the area on the page where the objects src and dest objects intersect (ie both active), the area srcc dest where only the src object is active, and the area src r dest where only the dest object is active.

The compositing operations of the expression tree are implemented by means of the pixel compositing stack 38, wherein the structure of the expression tree is implemented by means of appropriate stack operations on the pixel compositing stack 38.

Turning now to Fig. 23, there is shown the pixel compositing module 700 in more detail. The pixel compositing module 700 receives incoming messages from the fill color determination module 600. These incoming messages include repeat messages, series of color composite messages (see Fig. 22B), end of pixel messages, and end of scanline messages, and are processed in sequence.

The pixel compositing module 700 includes a decoder 2302 for decoding these incoming messages, and a compositor 2304 for compositing the colors and opacities contained in the incoming color composite messages. Also included is a stack controller 2306 for placing the resultant colors and opacities on a stack 38, and an output FIFO 702 for storing the resultant color and opacity.

During the operation of the pixel compositing module 700, the decoder 2302, upon the receipt of a color composite message, extracts the raster operation COLOR_OP and alpha channel operation codes ALPHA_OP and passes them to the compositor 2304.

The decoder 2302 also extracts the stack operation STACK_OP and color and opacity 712060.doc -66values COLOR, ALPHA of the color composite message and passes them to the stack controller 2306. Typically, the pixel composing module 700 combines the color and opacity from the color composite message with a color and opacity popped from the pixel compositing stack 38 according to the raster operation and alpha channel operation from the color composite message. It then pushes the result back onto the pixel compositing stack 38. More generally, the stack controller 2306 forms a source (src) and destination (dest) color and opacity, according to the stack operation specified. If at this time, or during any pop operation from the pixel compositing stack, the pixel compositing stack 38 is found to be empty, an opaque white color value is used without any error indication.

These source and destination colors and opacity are then made available to the compositor 2304 which then performs the compositing operation in accordance with the COLOR_OP and ALPHA OP codes. The resultant (result) color and opacity is then made available to the stack controller 2306, which stores the result on the stack 38 in accordance with the STACK OP code. These stack operations are described below in more detail below.

During the operation of the pixel compositing module 700, if the decoder 2302 receives an end of pixel message, it then instructs the stack controller 2306 to pop a color and opacity fiom the pixel compositing stack 38. If the stack 38 is empty an opaque white value is used. The resultant color and opacity is then formed into an pixel output message which is forwarded to the pixel output FIFO 702. If the decoder 2302 receives a repeat message or an end of scanline message, the decoder 2302 by-passes (not shown) the compositor 2304 and stack controller 2306 and forwards the messages to the pixel output F1FO 702 without further processing.

Figs. 24A, B, C, and D show the operation performed on the pixel compositing stack 38 for each of the various stack operation commands STACKOP in the color composite messages.

712060.doc -67- Fig 24A shows the standard operation STD_OP 2350 on the pixel compositing stack 38, where the source color and opacity (src) are obtained from the color composite message, and the destination color and opacity (dest) is popped from the top of the pixel compositing stack 38. The source color and opacity (src) is taken from the value in a current color composite message for the current operation, and destination color and opacity (dest) is popped from the top of the stack 38. The result of the COLOR_OP and ALPHA OP operations performed by the compositor 2304 is pushed back onto the stack 38.

Fig 24B shows the NO_POPDEST stack operation 2370 on the pixel compositing stack 38. The source color and opacity (src) is taken from the value in a current composite message for the current operation, and the destination color and opacity (dest) is read from the top of the stack 38. The result of the COLOROP and ALPHA OP operations performed by the compositor 2304 is pushed onto the top of the stack 38.

Fig 24C shows the POPSRC stack operation, where the source color and opacity are popped from the top of the stack, and the destination color and opacity is popped from the next level down the stack. The result of the COLOR_OP and ALPHAOP operations performed by the compositor 2304 is pushed onto the top of the stack.

Fig. 24D shows the KEEPSRC stack operation, where the source color and opacity are popped from the top of the stack, and the destination color and opacity is popped from the next level down the stack. The source colour and opacity are pushed onto the top of the stack, and then the result of the COLOR_OP and ALPHA_OP operations performed by the compositor 2304 is pushed onto the top of the stack.

Other stack operations can be used.

712060.doc -68- The manner in which the compositor 2304 combines the source (src) color and opacity with the destination (dest) color and opacity will now be described with reference to Figs. 7A to 7C. For the purposes of this description, color and opacity values are considered to range from 0 to 1, (ie: normalised) although they are typically stored as 8bit values in the range 0 to 255. For the purposes of compositing together two pixels, each pixel is regarded as being divided into two regions, one region being fully opaque and the other fully transparent, with the opacity value being an indication of the proportion of these two regions. Fig. 7A shows a source pixel 702 which has some three component color value (not shown) and an opacity value The shaded region of the source pixel 702 represents the fully opaque portion 704 of the pixel 702. Similarly, the non-shaded region in Fig. 7A represents that proportion 706 of the source pixel 702 considered to be fully transparent. Fig. 7B shows a destination pixel 710 with some opacity value, The shaded region of the destination pixel 710 represents the fully opaque portion 712 of the pixel 710. Similarly, the pixel 710 has a fully transparent portion 714. The opaque regions of the source pixel 702 and destination pixel 710 are, for the purposes of the combination, considered to be orthogonal to each other. The overlay 716 of these two pixels is shown in Fig. 7C. Three regions of interest exist, which include a source outside destination 718 which has an area of so (1 do), a source intersect destination 720 which has an area of so do, and a destination outside source 722 which has an area of (1 so do. The color value of each of these three regions is calculated conceptually independently. The source outside destination region 718 takes its color directly from the source color. The destination outside source region 722 takes its color directly from the destination color. The source intersect destination region 720 takes its color from a combination of the source and destination color.

The process of combining the source and destination color, as distinct from the other operations discussed above is termed a raster operation and is one of a set of 712060.doc -69functions as specified by the raster operation code from the pixel composite message.

Some of the raster operations included in the described arrangement are shown in Fig. 19.

Each function is applied to each pair of color components of the source and destination colors to obtain a like component in the resultant color. Many other functions are possible.

The alpha channel operation from the composite pixel message is also considered during the combination of the source and destination color. The alpha channel operation is performed using three flags LAOUSEDOUT_S,

LAOUSES_OUT_D,

LAO USE S ROPD, which respectively identify the regions of interest (1 so do, so (1 do), and so do in the overlay 716 of the source pixel 702 and the destination pixel 710. For each of the regions, a region opacity value is formed which is zero if the corresponding flag in the alpha channel operation is not set, else it is the area of the region.

The resultant opacity is formed from the sum of the region opacities. Each component of the result color is then formed by the sum of the products of each pair of region color and region opacity, divided by the resultant opacity.

As shown in Fig. 20, the Porter and Duff operations may be formed by suitable ALPHA OP flag combinations and raster operators COLOROP, provided that both operands can be guaranteed to be active together. Because of the way the table is read, if only one of the operands is not active, then the operator will either not be performed, or will be performed with the wrong operand. Thus objects that are to be combined using Porter and Duff operations must be padded out with transparent pixels to an area that covers both objects in the operation. Other transparency operations may be formed in the same way as the Porter and Duff operations, using different binary operators as the COLOROP operation.

712060.doc The resultant color and opacity is passed to the stack controller circuit and pushed onto the pixel compositing stack 38. However, if the stack operation is STACK KEEP SRC, the source value is pushed onto the stack before the result of the color composite message is pushed.

3.5.1 Ternary Raster Operations Some applications, particularly those that use the Microsoft GDI to communicate with a rendering system, rely instead on logical operations between corresponding bits in the source and destination colours. These are provided for binary operations, as described above, however three-parameter operations are also possible. In these ternary raster operations a three-parameter logical operation is performed bitwise between the destination and the two other operands, traditionally referred to as the source and pattern.

It is possible to decompose the three-parameter operations into a sequence of two-parameter logical operations and stack operations, acting on the same parameters.

The sequence can be quite long for some combinations, however. In a pixel sequential system, increasing the width of a hardware pipeline to accommodate an extra pixel colour and extra opcode bits to allow ternary operations to be included as part of the basic compositing instruction set is a costly exercise. The compromise is to divide the ternary operation into two cycles, according to a logical partition of the opcode. It is well known that any ternary logical operation can be written in truth table form, i.e.

Pattern: 0 0 0 0 1 1 1 1 Source: 0 0 1 1 0 0 1 1 Destination: 0 1 0 1 0 1 0 1 Result: r s t u vwxy The logical values rstuvwxy uniquely determine the operation to be performed, and may be used as an opcode for the corresponding logical operation.

712060.doc -71- The pattern can be used as a selector between two binary operations acting on source and destination, rs tu and vwxy. With the addition of intermediate result storage, and a multiplexer to select between the two operation results, the ternary raster operations are included in the stack-based compositing engine. Fig. 34 shows a compositing engine 3400 based on this principle. A stack controller 3410 is used to fetch data from the correct source: the stack 3415, or the colour compositing message 3425. An ALU 3420 performs the binary colour operation specified in the COLOROP field of the colour compositing message 3425. A first cycle register 3430 is used to maintain the state of the ternary operation engine 3400. An intermediate storage register 3440 is supplied, to save the result of the first cycle colour operation. A multiplexer 3450 is provided, keyed by the pattern value 3460 on the second cycle, to choose between the first cycle value from the intermediate storage register 3440 and the result 3470 of the second cycle colour operation, which provides the final result of the ternary raster operation to the stack controller 3410. Note that the multiplexer 3450 is gated 3480 by the first cycle register, so that it is only keyed on the second cycle of a ternary raster operation. At any other time, the output of the ALU 3420 is directly passed to the stack controller 3410.

As shown in Fig. 35, when a colour composite message 3500 is received from the previous module with its TERNARY bit 3510 set, if the first cycle bit is clear it indicates that it is the first message in a ternary operation, so the following operations are performed: 0 the source value 3520 is taken from the colour composite message 3500 or, if the value of the STACK_OP field 3525 in the colour composite message 3500 is KEEPSRC or POPSRC, popped from the top of the stack 3530; 0 the destination value 3535 is read from the top of the stack; 712060.doc -72the 4 least significant bits of the COLOROP field determine a first cycle logical operation to be performed on the source and destination operands, the operation so specified is performed 3540 and the result is stored in the intermediate storage 3545; 0 the source value 3520 is pushed onto the stack 3530 (so that the top two levels are source and destination); and the first cycle bit is set in a register.

Referring now to Fig. 36, if the subsequent colour composite message also has the TERNARY bit 3610 set, then the message contains pattern data 3615, and the second binary operation 3620 in the ternary operation pair. If a colour composite message is received while first cycle is set, wherein the TERNARY bit 3610 is clear, an interrupt is asserted. Otherwise, the following operations are performed on the data: the source value 3625 is popped from the stack 3600; the destination value 3630 is read from the top of the stack, if the STACK OP field 3635 in the colour composite message is NOPOPDEST, or otherwise popped from the top of the stack; the 4 least significant bits of the COLOR_OP field 3620 of the message determine a second cycle logical operation to be performed on the source and destination operands, the operation so specified is performed (3645) and forms an input 3650 to a multiplexer 3655, the second input being taken from the intermediate result 3660 stored on the previous cycle; Sthe pattern value 3615 in the colour part of the colour composite message is used to key the multiplexer 3655, and the result 3670 of the ternary operation is therefore formed at the output of the multiplexer; 712060.doc -73the result 3670 (and the source value 3625 if the value of the STACK_OP field in the colour composite message is KEEP_SRC) is pushed onto the stack 3600; and the first cycle bit is cleared.

Note that if the STACKOP is identical for the first and second cycle, the overall effect of the 2 cycle operation on the stack is the same as it would be for an ordinary binary operation.

When an end of pixel message is encountered, the color and opacity value on top of the stack is formed into a pixel output message, and sent to the pixel output module 800. Repeat pixel messages are passed through the pixel compositing module 700 to the pixel output module 800.

3.5.2 Default color and pass alpha mode The ultimate object at the bottom of any list of composited objects is the page on which they are to be printed. For this reason, the default color is normally set to the opaque white of the printed page: the initial state of the stack is set to have an opaque white value Oxffffffff in RGBA mode, and 0x00000000 in CMYK mode) at the top of the stack. In cases of stack underflow, the default color is used to replace the missing value.

In normal operation, it is expected that the default color is opaque white, however in the case where an application separates rendering into layers, rendering onto a transparent background is required. In CMYK mode, this facility is not available; however, in RGBA mode, a pass alpha mode is provided, in which the default colour is set to unpremultiplied transparent white Oxffffff00 in 8-bit per channel RGBA). The pass alpha mode is engaged by setting a bit in a CONFIGURE instruction: when the Pixel Compositing Module receives a CONFIGURE message, the PASS_ALPHA bit is 712060.doc -74latched, if the latched value is 1, then the default colour is transparent white, otherwise when the latched value is zero, the default colour is opaque white.

The opaque white default value is chosen so that raster operations that ignore transparency will function correctly.

3.6 PIXEL OUTPUT MODULE The operation of the pixel output module 800 will now be described. Incoming messages are read from the pixel output FIFO, which include pixel output messages, repeat messages, and end of scanline messages are processed in sequence.

Upon receipt of a pixel output message the pixel output module 800 stores the pixel and also forwards the pixel to its output. Upon receipt of a repeat message the last stored pixel is forwarded to the output 898 as many times as specified by the count from the repeat message. Upon receipt of an end of scanline message the pixel output module 800 passes the message to its output.

The output 898 may connect as required to any device that utilizes pixel image data. Such devices include output devices such as video display units or printers, or memory storage devices such as hard disk, semiconductor RAM including line, band or frame stores, or a computer network. However, as will be apparent from the foregoing, a method and apparatus are described that provide for the rendering of graphic objects with full functionality demanded by sophisticated graphic description languages without a need for intermediate storage of pixel image data during the rendering process.

It should be apparent to the person skilled in the art that any of these modules may be used in a software implementation of a pixel-sequential renderer, without departing from the principles of this invention.

The aforementioned processes implemented by the computer system 1 comprise a particular control flow. There are many other variants of the described processes, which use different control flows without departing from the spirit or scope of the invention.

712060.doc Furthermore one or more of the steps of the described method(s) may be performed in parallel rather than sequentially.

INDUSTRIAL APPLICABILITY It will be apparent from the above that the arrangements described are applicable to computerl graphics and printing industries.

The foregoing describes only some arrangements of the present invention, and modifications and/or changes can be made thereto without departing from the scope and spirit of the invention, the arrangements being illustrative and not restrictive.

In the context of this specification, the word "comprising" means "including principally but not necessarily solely" or "having" or "including" and not "consisting only of'. Variations of the word comprising, such as "comprise" and "comprises" have corresponding meanings.

712060.doc

Claims (11)

1. A method of fetching a data unit comprising a plurality of subunits from a data storage system to a requesting system, said method comprising the steps of: providing an address indicating a location in the data storage system of the data unit; fetching the data unit from the location in the data storage system; transposing the order of the subunits of the data unit depending on an indicator contained in the address; and passing the transposed data unit to the requesting system.

2. A method according to claim 1, wherein the indicator is a single bit in the address.

3. A method according to claim 1 or claim 2 wherein the subunits are bytes and wherein said transposing step reverses an order of the bytes if the indicator is set.

4. A method according to any one of the preceding claims wherein the subunits are words and wherein said transposing step reverses an order of the words if the indicator is not set.

5. A method according to claim 1 or claim 2 wherein the subunits are words comprising a plurality of bytes and wherein said transposing step reverses an order of bytes within the words.

6. A method according to any one of the preceding claims wherein the data unit comprises a set of bytes having a first end and a second end and wherein, in the

712060.doc -77- requesting system, an address points to the first end and, in the data storage system, an address points to the second end.

7. An apparatus for fetching a data unit comprising a plurality of subunits from a data storage system to a requesting system, said apparatus comprising: means for providing an address indicating a location in the data storage system of the data unit; means for fetching the data unit from the location in the data storage system; means for transposing the order of the subunits of the data unit depending on an indicator contained in the address; and means for passing the transposed data unit to the requesting system.

8. A computer program product comprising machine-readable program code recorded on a machine-readable recording medium, for controlling the operation of a data processing machine on which the program code executes to perform a method of fetching a data unit comprising a plurality of subunits from a data storage system to a requesting system, said method comprising the steps of: providing an address indicating a location in the data storage system of the data unit being requested; fetching the data unit from the location in the data storage system; transposing the order of the subunits of the data unit depending on an indicator contained in the address; and passing the transposed data unit to the requesting system.

9. A computer program comprising machine-readable program code for controlling the operation of a data processing apparatus on which the program code executes to 712060.doc -78- perform a method of fetching a data unit comprising a plurality of subunits from a data storage system to a requesting system, said method comprising the steps of: providing an address indicating a location in the data storage system of the data unit being requested; fetching the data unit from the location in the data storage system; transposing the order of the subunits of the data unit depending on an indicator contained in the address; and passing the transposed data unit to the requesting system.

10. A method of fetching a data unit substantially as described herein with reference to Figs. 24 to 28.

11. An apparatus for fetching a data unit substantially as described herein with reference to Figs. 24 to 28. DATED this Sixth Day of May 2005 CANON KABUSHIKI KAISHA Patent Attorneys for the Applicant SPRUSON&FERGUSON 712060.doc