AU2002245320A1 - Method and apparatus for data alignment - Google Patents

Method and apparatus for data alignment

Info

Publication number
AU2002245320A1
AU2002245320A1 AU2002245320A AU2002245320A AU2002245320A1 AU 2002245320 A1 AU2002245320 A1 AU 2002245320A1 AU 2002245320 A AU2002245320 A AU 2002245320A AU 2002245320 A AU2002245320 A AU 2002245320A AU 2002245320 A1 AU2002245320 A1 AU 2002245320A1
Authority
AU
Australia
Prior art keywords
data alignment
alignment
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002245320A
Inventor
Sanjay Bhardwaj
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies Catamaran Inc
Original Assignee
Infineon Technologies Catamaran Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/771,173 external-priority patent/US6813734B1/en
Priority claimed from US09/771,172 external-priority patent/US6965606B2/en
Application filed by Infineon Technologies Catamaran Inc filed Critical Infineon Technologies Catamaran Inc
Publication of AU2002245320A1 publication Critical patent/AU2002245320A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9084—Reactions to storage capacity overflow
    • H04L49/9089—Reactions to storage capacity overflow replacing packets in a storage arrangement, e.g. pushout
    • H04L49/9094—Arrangements for simultaneous transmit and receive, e.g. simultaneous reading/writing from/to the storage element
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/04—Distributors combined with modulators or demodulators
    • H04J3/047—Distributors with transistors or integrated circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H04J3/0605—Special codes used as synchronising signal
    • H04J3/0608—Detectors therefor, e.g. correlators, state machines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1605—Fixed allocated frame structures
    • H04J3/1611—Synchronous digital hierarchy [SDH] or SONET
    • H04J3/1617—Synchronous digital hierarchy [SDH] or SONET carrying packets or ATM cells
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Detection And Correction Of Errors (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
AU2002245320A 2001-01-26 2002-01-25 Method and apparatus for data alignment Abandoned AU2002245320A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US09/771,173 US6813734B1 (en) 2001-01-26 2001-01-26 Method and apparatus for data alignment
US09/771,172 2001-01-26
US09/771,172 US6965606B2 (en) 2001-01-26 2001-01-26 Method and apparatus for byte rotation
US09/771,173 2001-01-26
PCT/US2002/002255 WO2002060101A2 (en) 2001-01-26 2002-01-25 Method and apparatus for data alignment

Publications (1)

Publication Number Publication Date
AU2002245320A1 true AU2002245320A1 (en) 2002-08-06

Family

ID=27118415

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002245320A Abandoned AU2002245320A1 (en) 2001-01-26 2002-01-25 Method and apparatus for data alignment

Country Status (5)

Country Link
EP (1) EP1360786A2 (en)
JP (1) JP3775597B2 (en)
CN (1) CN1498470B (en)
AU (1) AU2002245320A1 (en)
WO (1) WO2002060101A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104834476B (en) * 2014-02-10 2016-10-19 安华高科技通用Ip(新加坡)公司 The system and method for data alignment based on section end mark
US9707727B2 (en) 2014-04-09 2017-07-18 Nike, Inc. Selectively applied adhesive particulate on nonmetallic substrates

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05134848A (en) * 1991-03-06 1993-06-01 Fujitsu Ltd Data shift circuit for central processing unit
US5410677A (en) * 1991-12-30 1995-04-25 Apple Computer, Inc. Apparatus for translating data formats starting at an arbitrary byte position
DE4238090C1 (en) * 1992-11-11 1994-03-03 Siemens Ag Method and arrangement for recovering plesiochronous signals transmitted in function data blocks
US5638367A (en) * 1995-07-07 1997-06-10 Sun Microsystems, Inc. Apparatus and method for data packing through addition
DE19903366A1 (en) * 1999-01-28 2000-08-17 Siemens Ag Process for converting Nx-STM-1 signals into STM-N signals

Also Published As

Publication number Publication date
CN1498470B (en) 2011-06-15
EP1360786A2 (en) 2003-11-12
WO2002060101A2 (en) 2002-08-01
CN1498470A (en) 2004-05-19
JP2005504449A (en) 2005-02-10
WO2002060101A3 (en) 2003-09-18
JP3775597B2 (en) 2006-05-17

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase