AU2002241767A1 - Concurrent-multitasking processor - Google Patents
Concurrent-multitasking processorInfo
- Publication number
- AU2002241767A1 AU2002241767A1 AU2002241767A AU4176702A AU2002241767A1 AU 2002241767 A1 AU2002241767 A1 AU 2002241767A1 AU 2002241767 A AU2002241767 A AU 2002241767A AU 4176702 A AU4176702 A AU 4176702A AU 2002241767 A1 AU2002241767 A1 AU 2002241767A1
- Authority
- AU
- Australia
- Prior art keywords
- concurrent
- multitasking processor
- multitasking
- processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
- G06F9/4887—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues involving deadlines, e.g. rate based, periodic
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multimedia (AREA)
- Advance Control (AREA)
- Multi Processors (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US24258100P | 2000-10-23 | 2000-10-23 | |
US60/242,581 | 2000-10-23 | ||
PCT/US2001/051065 WO2002046887A2 (en) | 2000-10-23 | 2001-10-19 | Concurrent-multitasking processor |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2002241767A1 true AU2002241767A1 (en) | 2002-06-18 |
Family
ID=22915365
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2002241767A Abandoned AU2002241767A1 (en) | 2000-10-23 | 2001-10-19 | Concurrent-multitasking processor |
Country Status (2)
Country | Link |
---|---|
AU (1) | AU2002241767A1 (en) |
WO (1) | WO2002046887A2 (en) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8533716B2 (en) | 2004-03-31 | 2013-09-10 | Synopsys, Inc. | Resource management in a multicore architecture |
US9038070B2 (en) | 2004-09-14 | 2015-05-19 | Synopsys, Inc. | Debug in a multicore architecture |
CN101165655A (en) * | 2006-10-20 | 2008-04-23 | 国际商业机器公司 | Multiple processor computation system and its task distribution method |
US20080276073A1 (en) * | 2007-05-02 | 2008-11-06 | Analog Devices, Inc. | Apparatus for and method of distributing instructions |
WO2016186602A1 (en) * | 2015-05-15 | 2016-11-24 | Hewlett Packard Enterprise Development Lp | Deletion prioritization |
CN106095554B (en) * | 2016-06-17 | 2019-08-23 | 中国银行股份有限公司 | The method and device of batch data processing is carried out in the online stage in the daytime |
US10613987B2 (en) | 2016-09-23 | 2020-04-07 | Apple Inc. | Operand cache coherence for SIMD processor supporting predication |
CN110858127B (en) * | 2018-08-22 | 2023-09-12 | 慧荣科技股份有限公司 | data storage device |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5546593A (en) * | 1992-05-18 | 1996-08-13 | Matsushita Electric Industrial Co., Ltd. | Multistream instruction processor able to reduce interlocks by having a wait state for an instruction stream |
CN1280714C (en) * | 1996-08-27 | 2006-10-18 | 松下电器产业株式会社 | Independent processing multiple instruction flow, soft controlled every instruction flow processing function multiporogram flav simultaneous processor |
US6073159A (en) * | 1996-12-31 | 2000-06-06 | Compaq Computer Corporation | Thread properties attribute vector based thread selection in multithreading processor |
US6658447B2 (en) * | 1997-07-08 | 2003-12-02 | Intel Corporation | Priority based simultaneous multi-threading |
US6212544B1 (en) * | 1997-10-23 | 2001-04-03 | International Business Machines Corporation | Altering thread priorities in a multithreaded processor |
US7007153B1 (en) * | 2000-03-30 | 2006-02-28 | Agere Systems Inc. | Method and apparatus for allocating functional units in a multithreaded VLIW processor |
-
2001
- 2001-10-19 AU AU2002241767A patent/AU2002241767A1/en not_active Abandoned
- 2001-10-19 WO PCT/US2001/051065 patent/WO2002046887A2/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
WO2002046887A2 (en) | 2002-06-13 |
WO2002046887A3 (en) | 2002-08-01 |
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