AU2001277213A1 - High-availability shared-memory system - Google Patents

High-availability shared-memory system

Info

Publication number
AU2001277213A1
AU2001277213A1 AU2001277213A AU7721301A AU2001277213A1 AU 2001277213 A1 AU2001277213 A1 AU 2001277213A1 AU 2001277213 A AU2001277213 A AU 2001277213A AU 7721301 A AU7721301 A AU 7721301A AU 2001277213 A1 AU2001277213 A1 AU 2001277213A1
Authority
AU
Australia
Prior art keywords
memory system
availability
shared
availability shared
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001277213A
Inventor
Karlon West
Lynn West
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Times N Systems Inc
Original Assignee
Times N Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Times N Systems Inc filed Critical Times N Systems Inc
Publication of AU2001277213A1 publication Critical patent/AU2001277213A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/544—Buffers; Shared memory; Pipes

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
AU2001277213A 2000-07-26 2001-07-26 High-availability shared-memory system Abandoned AU2001277213A1 (en)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US22074800P 2000-07-26 2000-07-26
US22097400P 2000-07-26 2000-07-26
US60/220,974 2000-07-26
US60/220,748 2000-07-26
US09/912,856 2001-07-25
US09/912,856 US20020029334A1 (en) 2000-07-26 2001-07-25 High availability shared memory system
PCT/US2001/023754 WO2002008929A2 (en) 2000-07-26 2001-07-26 High-availability shared-memory system

Publications (1)

Publication Number Publication Date
AU2001277213A1 true AU2001277213A1 (en) 2002-02-05

Family

ID=27396829

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001277213A Abandoned AU2001277213A1 (en) 2000-07-26 2001-07-26 High-availability shared-memory system

Country Status (3)

Country Link
US (1) US20020029334A1 (en)
AU (1) AU2001277213A1 (en)
WO (1) WO2002008929A2 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030069949A1 (en) * 2001-10-04 2003-04-10 Chan Michele W. Managing distributed network infrastructure services
US20050071391A1 (en) * 2003-09-29 2005-03-31 International Business Machines Corporation High availability data replication set up using external backup and restore
US8190780B2 (en) * 2003-12-30 2012-05-29 Sap Ag Cluster architecture having a star topology with centralized services
US20050188068A1 (en) * 2003-12-30 2005-08-25 Frank Kilian System and method for monitoring and controlling server nodes contained within a clustered environment
JP4386932B2 (en) * 2007-08-17 2009-12-16 富士通株式会社 Storage management program, storage management device, and storage management method
US9152603B1 (en) * 2011-12-31 2015-10-06 Albert J Kelly, III System and method for increasing application compute client data I/O bandwidth performance from data file systems and/or data object storage systems by hosting/bundling all of the data file system storage servers and/or data object storage system servers in the same common global shared memory compute system as the application compute clients
KR102438319B1 (en) * 2018-02-07 2022-09-01 한국전자통신연구원 Apparatus and method for interfacing common memory

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52123137A (en) * 1976-04-09 1977-10-17 Hitachi Ltd Duplication memory control unit
EP0457308B1 (en) * 1990-05-18 1997-01-22 Fujitsu Limited Data processing system having an input/output path disconnecting mechanism and method for controlling the data processing system
US5448716A (en) * 1992-10-30 1995-09-05 International Business Machines Corporation Apparatus and method for booting a multiple processor system having a global/local memory architecture

Also Published As

Publication number Publication date
WO2002008929A3 (en) 2003-06-12
WO2002008929A2 (en) 2002-01-31
US20020029334A1 (en) 2002-03-07
WO2002008929A9 (en) 2003-03-06

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