WO2025242000A1 - 显示基板及其制备方法和显示装置 - Google Patents

显示基板及其制备方法和显示装置

Info

Publication number
WO2025242000A1
WO2025242000A1 PCT/CN2025/095429 CN2025095429W WO2025242000A1 WO 2025242000 A1 WO2025242000 A1 WO 2025242000A1 CN 2025095429 W CN2025095429 W CN 2025095429W WO 2025242000 A1 WO2025242000 A1 WO 2025242000A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
substrate
away
barrier
touch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/CN2025/095429
Other languages
English (en)
French (fr)
Inventor
张元其
刘庭良
李伟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Chengdu BOE Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Publication of WO2025242000A1 publication Critical patent/WO2025242000A1/zh
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements

Definitions

  • This disclosure relates to the field of display technology, and in particular to a display substrate, a method for preparing the substrate, and a display device.
  • a display substrate including an opening region, a buffer region surrounding the opening region, and a display region surrounding the buffer region, the display substrate comprising:
  • the driving circuit layer is located on the substrate.
  • the light-emitting device layer is located on the side of the driving circuit layer away from the substrate.
  • the light-emitting device layer includes a first electrode layer located on the side of the driving circuit layer away from the substrate.
  • the first electrode layer includes a plurality of first electrode portions.
  • a pixel defining layer located on the side of the first electrode layer away from the substrate, the pixel defining layer including a plurality of openings, each of the plurality of openings exposing at least a portion of the plurality of first electrode portions;
  • the encapsulation layer is located on the side of the light-emitting device layer away from the substrate.
  • the display substrate further includes a plurality of isolation pillars located on the side of the light-emitting device layer near the substrate and at least one barrier layer located on the side of the encapsulation layer away from the substrate.
  • the plurality of isolation pillars are located in the buffer region.
  • the material of the barrier layer includes an inorganic insulating material.
  • the orthographic projection of the barrier layer on the substrate covers at least a portion of the orthographic projection of the plurality of isolation pillars on the substrate.
  • the orthographic projection of the barrier layer on the substrate is spaced apart from the orthographic projection of at least a portion of the openings on the substrate.
  • the edge of the barrier layer away from the opening area is located on the side of the opening closest to the buffer area.
  • the distance between the orthographic projection of the barrier layer on the substrate and the orthographic projection of the opening closest to the buffer region on the substrate is greater than or equal to 5 micrometers.
  • the display substrate includes a barrier wall located on the substrate, the barrier wall being located in the buffer region and at least partially surrounding the opening region, the plurality of isolation pillars including at least one first isolation pillar located on the side of the barrier wall closer to the opening region and at least one second isolation pillar located on the side of the barrier wall away from the opening region, the orthographic projection of the barrier layer on the substrate covering at least a portion of the orthographic projection of the plurality of first isolation pillars on the substrate.
  • the edge of the barrier layer away from the opening area is located on the side of the first isolation post closest to the retaining wall away from the opening area.
  • the edge of the barrier layer away from the opening area is located on the side of the second isolation pillar closest to the display area away from the opening area.
  • the display substrate includes an opening located in the opening region, and the edge of the barrier layer near the opening region is substantially flush with the edge of the opening.
  • the display substrate further includes a touch layer located on the side of the encapsulation layer away from the substrate, the touch layer including a first touch insulating layer on the encapsulation layer and a second touch insulating layer located on the side of the first touch insulating layer away from the substrate.
  • At least one of the barrier layers is located between the encapsulation layer and the first touch insulating layer.
  • At least one of the barrier layers is located between the first touch insulating layer and the second touch insulating layer.
  • At least one of the barrier layers is located on the side of the second touch insulating layer away from the substrate.
  • the display substrate further includes an organic protective layer located on the side of the touch layer away from the substrate, at least one of the barrier layers is located between the second touch insulating layer and the organic protective layer, and/or at least one of the barrier layers is located on the side of the organic protective layer away from the substrate.
  • At least one of the first touch insulating layer and the second touch insulating layer comprises an organic insulating material.
  • the thickness of the barrier layer is 2000-6000 angstroms.
  • a method for fabricating a display substrate includes an opening region, a buffer region surrounding the opening region, and a display region surrounding the buffer region.
  • the fabrication method includes the following steps:
  • a driving circuit layer is formed on the substrate.
  • a plurality of isolation pillars are formed on the substrate, and the plurality of isolation pillars are located in the buffer region;
  • a light-emitting device layer and a pixel defining layer are formed on the side of the driving circuit layer and the plurality of isolation pillars away from the substrate.
  • the light-emitting device layer includes a first electrode layer located on the side of the driving circuit layer away from the substrate.
  • the pixel defining layer is located on the side of the first electrode layer away from the substrate.
  • the first electrode layer includes a plurality of first electrode portions.
  • the pixel defining layer includes a plurality of openings. The plurality of openings expose at least a portion of the plurality of first electrode portions.
  • An encapsulation layer is formed on the side of the light-emitting device layer away from the substrate.
  • a barrier material film layer is formed on the side of the encapsulation layer away from the substrate, the material of the barrier material film layer including an inorganic insulating material;
  • An opening is formed in the opening area, and a portion of the barrier material film layer is retained to form a barrier layer, wherein the orthographic projection of the barrier layer on the substrate covers at least a portion of the orthographic projection of the plurality of isolation pillars on the substrate, and the orthographic projection of the barrier layer on the substrate is spaced apart from the orthographic projection of at least a portion of the opening on the substrate.
  • the barrier material film layer includes a first portion located in the opening region and a second portion located in the buffer region, the first portion and the second portion being directly connected, and the first portion substantially covering the opening region.
  • the barrier material film layer includes a first portion located in the opening region and a second portion located in the buffer region, the first portion and the second portion being directly connected, the first portion covering a portion of the opening region near the buffer region, and the first portion having a hollow structure.
  • a display device comprising the display substrate described above.
  • Figure 1 schematically shows a plan view of a display substrate according to an embodiment of the present disclosure.
  • Figure 2 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA' in Figure 1.
  • Figure 3 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA' in Figure 1.
  • Figure 4 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA' in Figure 1.
  • Figure 5 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA' in Figure 1.
  • Figure 6 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA' in Figure 1.
  • Figure 7 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA' in Figure 1.
  • Figure 8 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA' in Figure 1.
  • Figure 9 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA' in Figure 1.
  • Figure 10 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA' in Figure 1.
  • Figure 11 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA' in Figure 1.
  • Figure 12 schematically illustrates a flowchart of a method for fabricating a display substrate according to an embodiment of the present disclosure.
  • Figures 13A-13H schematically illustrate the formation process of a display substrate according to some embodiments of the present disclosure.
  • Figures 14A-14F schematically illustrate the formation process of a display substrate according to some embodiments of the present disclosure.
  • FIGS 15A-15F schematically illustrate the formation process of a display substrate according to some embodiments of the present disclosure.
  • Figures 16A-16F schematically illustrate the formation process of a display substrate according to some embodiments of the present disclosure.
  • FIGS 17A-17F schematically illustrate the formation process of a display substrate according to some embodiments of the present disclosure.
  • Figures 18A-18F schematically illustrate the formation process of a display substrate according to some embodiments of the present disclosure.
  • Figures 19A-19F schematically illustrate the formation process of a display substrate according to some embodiments of the present disclosure.
  • Figures 20A-20F schematically illustrate the formation process of a display substrate according to some embodiments of the present disclosure.
  • connection can refer to a physical connection, an electrical connection, a communication connection, and/or a fluid connection.
  • the X-axis, Y-axis, and Z-axis are not limited to the three axes of a Cartesian coordinate system and can be interpreted in a broader sense.
  • the X-axis, Y-axis, and Z-axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other.
  • “at least one of X, Y, and Z” and “at least one selected from the group consisting of X, Y, and Z” can be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z such as XYZ, XY, YZ, and XZ.
  • the term “and/or” includes any and all combinations of one or more of the listed related items.
  • first, second, etc. may be used herein to describe different elements, these elements should not be limited by these terms. These terms are merely used to distinguish one element from another. For example, without departing from the scope of the exemplary embodiments, a first element may be named a second element, and similarly, a second element may be named a first element.
  • Figure 1 schematically shows a plan view of a display substrate according to an embodiment of the present disclosure.
  • Figure 2 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure taken along AA’ in Figure 1.
  • the display substrate includes an opening region HA, a buffer region BA surrounding the opening region HA, a display region AA surrounding the buffer region BA, and a peripheral region NA surrounding the display region AA.
  • the display substrate has an opening 100a, the edge of which is the edge of the opening region HA.
  • the buffer region BA may be annular, located between the display region AA and the opening region HA.
  • the buffer region BA By providing the buffer region BA, it can act as a buffer during the cutting process of forming the opening 100a, preventing damage to related structures within the display region AA.
  • the buffer region BA also contains a corresponding encapsulation structure to prevent water and oxygen from eroding the light-emitting device (EM) within the display region AA from the edge of the opening 100a.
  • EM light-emitting device
  • the opening region HA is located close to the surrounding region NA on one side of the second direction Y, and the center of the opening region HA is approximately equidistant from the two sides of the surrounding region NA on the first direction X.
  • the opening region HA can be located even closer to the surrounding region NA on one side of the first direction X.
  • the opening refers to an area on the display substrate used to mount hardware structures.
  • the opening includes, but is not limited to, the following forms: through holes, grooves, openings, etc.
  • the hardware structure may include one or more of the following structures: a front-facing camera, a home button, an earpiece, or a speaker.
  • the specific mounting method of the hardware structure is not particularly limited in the embodiments disclosed herein.
  • the shape of the opening can be determined according to the shape of the hardware structure to be mounted.
  • the cross-section of the opening in the direction parallel to the substrate of the display substrate may have one or more of the following shapes: circular, elliptical, rectangular, rounded rectangle, square, rhombus, trapezoid, etc.
  • the display substrate includes a substrate 100, a driving circuit layer 200, a light-emitting device layer 300, and an encapsulation layer 400.
  • the driving circuit layer 200 is located on the substrate 100 and includes multiple driving circuit units DC and signal traces SL.
  • the multiple driving circuit units DC are located in the display area AA.
  • a portion of the signal traces SL are located in the display area AA and electrically connected to the driving circuit units DC.
  • Another portion of the signal traces SL extends to the peripheral area NA and the buffer area BA.
  • the light-emitting device layer 300 is located on the side of the driving circuit layer 200 away from the substrate 100.
  • the light-emitting device layer 300 includes a plurality of light-emitting devices EM located in the display area AA.
  • the plurality of light-emitting devices EM are electrically connected to a plurality of driving circuit units DC respectively.
  • a light-emitting device EM electrically connected to a driving circuit unit DC constitutes at least a part of a sub-pixel PX.
  • the light-emitting device layer 300 includes a first electrode layer 310 located on the side of the driving circuit layer 200 away from the substrate 100, a pixel defining layer (PDL) located on the side of the first electrode layer 310 away from the substrate 100, a light-emitting functional layer 320 located on the side of the pixel defining layer (PDL) away from the substrate 100, and a second electrode layer 330 located on the side of the light-emitting functional layer 320 away from the substrate 100.
  • PDL pixel defining layer
  • the first electrode layer 310 includes first electrode portions 311 of a plurality of light-emitting devices
  • the light-emitting functional layer 320 includes light-emitting functional portions of a plurality of light-emitting devices
  • the second electrode layer 330 includes second electrode portions of a plurality of light-emitting devices
  • the pixel defining layer (PDL) has a plurality of openings (KK), the plurality of openings (KK) respectively expose at least a portion of the plurality of first electrode portions 311, and the plurality of light-emitting functional portions are respectively connected to the plurality of first electrode portions 311 through the plurality of openings (KK).
  • the encapsulation layer 400 is located on the side of the light-emitting device layer 300 away from the substrate 100.
  • the orthographic projection of the encapsulation layer on the substrate 100 covers at least the orthographic projections of multiple light-emitting devices on the substrate 100, thereby achieving encapsulation of multiple light-emitting devices.
  • the encapsulation layer may cover at least a portion of the display area AA, the peripheral area, and at least a portion of the buffer area BA.
  • a plurality of isolation pillars 510 are also provided on the side of the light-emitting device layer 300 near the substrate 100.
  • the plurality of isolation pillars 510 are located in the buffer area BA.
  • At least a portion of the light-emitting functional layer 320 is located on the side of the plurality of isolation pillars 510 away from the substrate 100.
  • the isolation pillars 510 since the isolation pillars 510 have a certain blocking effect, the light-emitting functional layer 320 will be broken at the side wall of the isolation pillars 510, thereby cutting off the path of water and oxygen invading the light-emitting device in the display area AA from the opening edge of the display substrate along the light-emitting functional layer 320.
  • the display substrate of this embodiment further includes at least one barrier layer 600.
  • the barrier layer 600 is made of an inorganic insulating material.
  • the orthographic projection of the barrier layer 600 on the substrate 100 covers at least a portion of the orthographic projection of the plurality of isolation pillars 510 on the substrate 100.
  • the orthographic projection of the barrier layer 600 on the substrate 100 is spaced apart from the orthographic projection of at least a portion of the openings KK on the substrate 100.
  • the barrier layer 600 which includes inorganic insulating material, can effectively block water, oxygen, and other impurities from invading the isolation pillar 510. This can prevent water, oxygen, and other impurities from invading the light-emitting device in the display area AA through the isolation pillar 510, thus avoiding display defects.
  • the packaging reliability of the display substrate located in the opening area HA can be greatly improved.
  • the material of the barrier layer 600 may include at least one of silicon nitride and silicon oxide.
  • the barrier layer 600 is a single layer of silicon nitride film.
  • the display area AA includes a foldable display area
  • the blocking layer 600 is disposed away from the foldable display area. That is, the orthographic projection of the blocking layer 600 on the substrate 100 is spaced apart from the orthographic projection of each opening KK located in the foldable display area on the substrate 100, thereby ensuring that the part of the display substrate located in the foldable display area has better folding and anti-arching capabilities.
  • the display area AA includes a rollable display area
  • the blocking layer 600 is disposed away from the rollable display area. That is, the orthographic projection of the blocking layer 600 on the substrate 100 is spaced apart from the orthographic projection of each opening KK located in the rollable display area on the substrate 100, thereby ensuring that the part of the display substrate located in the rollable display area has better rollability and anti-arching ability.
  • the isolation pillar 510 has an undercut structure, and the isolation pillar includes a first isolation portion 510a, a second isolation portion 510b, and a third isolation portion 510c.
  • the first isolation portion 510a may be located on the side of the interlayer insulating layer (ILD) away from the substrate 100
  • the second isolation portion 510b is located on the side of the first isolation portion 510a away from the substrate 100
  • the third isolation portion 510c is located on the side of the second isolation portion 510b away from the substrate 100.
  • the orthographic projection of the second isolation portion 510b on the substrate 100 is within the orthographic projection of the third isolation portion 510c on the substrate 100. That is, the edge of the second isolation portion 510b is recessed compared to the edge of the third isolation portion 510c, and the second isolation portion 510b and the third isolation portion 510c form an undercut structure to achieve a better isolation effect.
  • the first isolation portion 510a and the third isolation portion 510c are made of titanium, and the second isolation portion 510b is made of aluminum.
  • the etching process for forming the isolation pillar 510 can be a wet etching process. In this wet etching process, the reaction rate of the etching solution with aluminum is significantly greater than the etching rate with titanium. Therefore, the portion of the layer containing the second isolation portion 510b that is etched away is more than the portion of the layer containing the third isolation portion 510c that is etched away. As a result, in the etched isolation pillar, the edge of the second isolation portion 510b is more recessed than the edge of the third isolation portion 510c.
  • the light-emitting device can be an organic light-emitting diode (OLED).
  • OLED organic light-emitting diode
  • the light-emitting device can be a top-emitting OLED, which can emit red, green, blue, or white light, etc.
  • the light-emitting device is a micro OLED.
  • the embodiments of this disclosure do not limit the specific structure of the light-emitting device.
  • the first electrode portion of the light-emitting device is the anode of the OLED, and the second electrode portion is the cathode of the OLED.
  • the substrate can be a rigid substrate, such as a glass substrate or a silicon substrate, or it can be formed of a flexible material with excellent heat resistance and durability, such as polyimide (PI), polycarbonate (PC), polyethylene terephthalate (PET), polyethylene, polyacrylate, polyaryl compounds, polyetherimide, polyethersulfone, polyethylene glycol terephthalate (PET), polyethylene (PE), polypropylene (PP), polysulfone (PSF), polymethyl methacrylate (PMMA), cellulose triacetate (TAC), cyclic olefin polymers (COP), and cyclic olefin copolymers (COC).
  • PI polyimide
  • PC polycarbonate
  • PET polyethylene terephthalate
  • PET polyethylene
  • polyacrylate polyaryl compounds
  • polyetherimide polyethersulfone
  • PET polyethylene glycol terephthalate
  • PE polyethylene
  • PP polypropylene
  • PSF polysulfone
  • the driving circuit layer 200 may include an active layer ACT located on the substrate 100, a first gate insulating layer GI1 located on the side of the active layer ACT away from the substrate 100, a first gate metal layer Gate1 located on the side of the first gate insulating layer GI1 away from the substrate 100, a second gate insulating layer GI2 located on the side of the first gate metal layer Gate1 away from the substrate 100, a second gate metal layer Gate2 located on the side of the second gate insulating layer GI2 away from the substrate 100, an interlayer insulating layer ILD located on the side of the second gate metal layer Gate2 away from the substrate 100, a source/drain metal layer SD located on the side of the interlayer insulating layer ILD away from the substrate 100, and a planarization layer PLN located on the side of the source/drain metal layer SD away from the substrate 100.
  • an active layer ACT located on the substrate 100
  • a first gate insulating layer GI1 located on the side of the active layer ACT away from
  • the isolation pillar 510 may be located in the source/drain metal layer SD.
  • the isolation pillar 510 further includes a first raised portion 530 and a second raised portion 540 on the side near the substrate 100.
  • the first raised portion 530 may be located in the first gate metal layer Gate1
  • the second raised portion 540 may be located in the second gate metal layer Gate2.
  • the edge of the barrier layer 600 away from the opening region HA is located on the side of the opening KK closest to the buffer region BA. That is, the barrier layer 600 is located outside the display region AA, and no barrier layer 600 is provided at any point within the display region AA, so as to ensure the consistency of the film layer in the display region AA, thereby ensuring display uniformity.
  • the distance 'a' between the orthographic projection of the barrier layer 600 on the substrate 100 and the orthographic projection of the opening KK closest to the buffer region BA on the substrate 100 can be set to be greater than or equal to 5 ⁇ m.
  • Figure 3 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA’ in Figure 1.
  • the display substrate may further include a barrier Dam located on the substrate 100.
  • the barrier Dam is located in the buffer region BA and is disposed at least partially surrounding the opening region HA.
  • the barrier Dam may be annular around the opening region HA.
  • a plurality of isolation pillars 510 include a plurality of first isolation pillars 511 located on the side of the barrier Dam near the opening region HA and a plurality of second isolation pillars 512 located on the side of the barrier Dam away from the opening region HA.
  • the encapsulation layer 400 includes a first inorganic encapsulation layer 410, an organic encapsulation layer 420 located on the side of the first inorganic encapsulation layer 410 away from the substrate 100, and a second inorganic encapsulation layer 430 located on the side of the organic encapsulation layer 420 away from the substrate 100.
  • the edge of the first inorganic encapsulation layer 410 near the aperture region HA is located on the side of the barrier wall Dam near the aperture region HA.
  • the edge of the second inorganic encapsulation layer 430 near the aperture region HA is located on the side of the barrier wall Dam near the aperture region HA.
  • the edge of the organic encapsulation layer 420 near the aperture region HA is located on the side of the barrier wall Dam away from the aperture region HA.
  • the orthographic projection of the organic encapsulation layer 420 on the substrate 100 covers the orthographic projection of the plurality of second isolation pillars 512 on the substrate 100.
  • the orthographic projection of the organic encapsulation layer 420 on the substrate 100 is spaced apart from the orthographic projection of the plurality of first isolation pillars 511 on the substrate 100. Therefore, the organic encapsulation layer 420 can fill in the uneven pattern formed by the second isolation pillar 512.
  • a barrier layer 600 can be provided at least above the first isolation pillar 511, that is, the orthogonal projection of the barrier layer 600 on the substrate 100 covers at least a portion of the orthogonal projection of the multiple first isolation pillars 511 on the substrate 100.
  • the edge of the barrier layer 600 away from the hole region HA is located on the side of the first isolation post 511 closest to the retaining wall Dam away from the hole region HA, that is, the barrier layer 600 can cover at least a plurality of first isolation posts 511.
  • the edge of the barrier layer 600 away from the hole region HA is located on the side of the second isolation pillar 512 closest to the barrier wall Dam that is near the hole region HA. That is, the edge of the barrier layer 600 away from the hole region HA ends at the side of the plurality of second isolation pillars 512 near the hole region HA, and the barrier layer 600 may not cover the second isolation pillars 512.
  • the orthographic projection of the edge of the barrier layer 600 away from the hole region HA on the substrate 100 lies within the orthographic projection of the barrier wall Dam on the substrate 100.
  • a barrier layer 600 can also be provided above the plurality of first isolation pillars 511 and the plurality of second isolation pillars 512 according to actual process requirements.
  • the orthographic projection of the barrier layer 600 on the substrate 100 covers the orthographic projection of the plurality of first isolation pillars 511 and the plurality of second isolation pillars 512 on the substrate 100. That is, the edge of the barrier layer 600 away from the hole region HA is located on the side of the second isolation pillar 512 closest to the display region AA away from the hole region HA.
  • the edge of the barrier layer 600 near the opening region HA can be substantially flush with the edge of the opening 100a.
  • Figure 4 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA’ in Figure 1.
  • the display substrate further includes a touch layer 700 located on the side of the encapsulation layer 400 away from the substrate 100.
  • the touch layer 700 includes a first touch insulating layer 710 located on the side of the encapsulation layer 400 away from the substrate 100, a first touch metal layer 730 located on the side of the first touch insulating layer 710 away from the substrate 100, a second touch insulating layer 720 located on the side of the first touch metal layer 730 away from the substrate 100, and a second touch metal layer 740 located on the side of the second touch insulating layer 720 away from the substrate 100.
  • Multiple touch electrodes and multiple touch traces are disposed in the first touch metal layer 730 and the second touch metal layer 740.
  • the touch electrodes are arranged within the display area AA. One end of the touch trace is electrically connected to the touch electrode, and the other end extends to the peripheral area and is electrically connected to the driver chip, thereby realizing the touch function within the display area AA.
  • the first touch insulating layer 710 is used to isolate the first touch metal layer 730 from other underlying film layers, and the second touch insulating layer 720 is used to insulate a portion of the structure in the first touch metal layer 730 from a portion of the structure in the second touch metal layer 740.
  • the first touch insulating layer 710 and the second touch insulating layer 720 can further extend into the buffer area BA.
  • the orthographic projection of the first touch insulating layer 710 onto the substrate 100 covers at least a portion of the orthographic projections of the plurality of isolation pillars onto the substrate 100
  • the orthographic projection of the second touch insulating layer 720 onto the substrate 100 covers at least a portion of the orthographic projections of the plurality of isolation pillars onto the substrate 100.
  • the portions of the first touch insulating layer 710 and the second touch insulating layer 720 located in the buffer area BA can further improve the packaging reliability of the display substrate at the opening area HA.
  • At least one of the first touch insulating layer 710 and the second touch insulating layer 720 includes an organic insulating material.
  • the anti-arching capability of a touch insulating layer including an organic insulating material is stronger than that of a touch insulating layer including an inorganic insulating material. Therefore, by configuring at least one of the first touch insulating layer 710 and the second touch insulating layer 720 to include an organic insulating material, the anti-arching capability of the display substrate can be improved, thereby meeting the folding or rolling requirements of the display substrate.
  • the first touch insulating layer 710 comprises an inorganic insulating material
  • the second touch insulating layer 720 comprises an organic insulating material.
  • the material of the first touch insulating layer 710 comprises at least one of silicon nitride or silicon oxide
  • the material of the second touch insulating layer 720 comprises an organic polymer material.
  • At least one barrier layer 600 is located between the second inorganic encapsulation layer 430 and the first touch insulating layer 710.
  • the barrier layer 600 is connected to both the second inorganic encapsulation layer 430 and the first touch insulating layer 710. That is, the barrier layer 600 is directly connected to at least a portion of the surface of the second inorganic encapsulation layer 430 away from the substrate 100, and the barrier layer 600 is directly connected to at least a portion of the surface of the first touch insulating layer 710 near the substrate 100.
  • an inorganic insulating integrated structure composed of the second inorganic encapsulation layer 430, the barrier layer 600, and the first touch insulating layer 710 is provided on the side of the plurality of isolation pillars away from the substrate 100.
  • This inorganic insulating integrated structure is formed by stacking three film layers containing inorganic insulating materials, and has a relatively thick thickness, which can achieve a good effect of blocking the intrusion of water, oxygen, and other impurities.
  • the second inorganic encapsulation layer 430, the barrier layer 600, and the first touch insulating layer 710 are made of the same material.
  • the materials of the second inorganic encapsulation layer 430, the barrier layer 600, and the first touch insulating layer 710 all include silicon nitride.
  • Figure 5 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA’ in Figure 1.
  • At least one barrier layer 600 is located between the first touch insulating layer 710 and the second touch insulating layer 720, and the first touch insulating layer 710 is directly connected to both the first touch insulating layer 710 and the barrier layer 600.
  • an inorganic insulating integrated structure composed of a second inorganic encapsulation layer 430, a first touch insulating layer 710, and a barrier layer 600 is provided on the side of the plurality of isolation pillars 510 away from the substrate 100.
  • This inorganic insulating integrated structure is formed by stacking three film layers containing inorganic insulating materials, and its thickness is relatively large, which can achieve a better effect of blocking the intrusion of water, oxygen, and other impurities.
  • Figure 6 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA’ in Figure 1.
  • the display substrate further includes an organic protective layer 800 located on the side of the touch layer 700 away from the substrate 100, and at least one barrier layer 600 is located between the second touch insulating layer 720 and the organic protective layer 800. That is, the barrier layer 600 is located on the side of the second touch insulating layer 720 away from the substrate 100, and the second touch insulating layer 720 includes an organic insulating material.
  • the surface flatness of the second touch insulating layer 720 away from the substrate 100 is relatively high, which reduces the risk of microcracks in the barrier layer 600 formed on the second touch insulating layer 720, and its film is more dense, which can play a better role in blocking the intrusion of water, oxygen and other impurities.
  • Figure 7 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA’ in Figure 1.
  • the display substrate further includes an organic protective layer 800 located on the side of the touch layer 700 away from the substrate 100, and at least one barrier layer 600 located on the side of the organic protective layer 800 away from the substrate 100.
  • the organic protective layer 800 includes an organic insulating material, and the surface flatness of the organic protective layer 800 away from the substrate 100 is relatively high, which reduces the risk of microcracks in the barrier layer 600 formed on the organic protective layer 800, and its film is more dense, which can play a better role in blocking the intrusion of water, oxygen and other impurities.
  • Figure 8 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA’ in Figure 1.
  • the first touch insulating layer 710 includes an organic insulating material
  • the second touch insulating layer 720 includes an organic insulating material. That is, by setting both the first touch insulating layer 710 and the second touch insulating layer 720 as film layers including organic insulating materials, the anti-bowing capability of the display substrate can be effectively improved, thereby meeting the folding or rolling requirements of the display substrate.
  • At least one barrier layer 600 is located between the encapsulation layer 400 and the first touch insulating layer 710, that is, the barrier layer 600 is directly connected to at least a portion of the surface of the second inorganic encapsulation layer 430 away from the substrate 100.
  • an inorganic insulating integrated structure composed of the second inorganic encapsulation layer 430 and the barrier layer 600 is provided on the side of the plurality of isolation pillars 510 away from the substrate 100.
  • This inorganic insulating integrated structure is formed by stacking two film layers containing inorganic insulating materials, and has a relatively thick thickness, which can achieve a better effect of blocking the intrusion of water, oxygen and other impurities.
  • Figure 9 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA’ in Figure 1.
  • At least one barrier layer 600 is located between the first touch insulating layer 710 and the second touch insulating layer 720, and the first touch insulating layer 710 comprises an organic insulating material, and the second touch insulating layer 720 comprises an organic insulating material. That is, the barrier layer 600 is located on the side of the first touch insulating layer 710 away from the substrate 100, and the first touch insulating layer 710 comprises an organic insulating material.
  • the surface flatness of the first touch insulating layer 710 away from the substrate 100 is relatively high, which reduces the risk of microcracks in the barrier layer 600 formed on the first touch insulating layer 710, and its film is more dense, which can play a better role in blocking the intrusion of water, oxygen and other impurities.
  • Figure 10 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA’ in Figure 1.
  • the display substrate further includes an organic protective layer 800 located on the side of the touch layer 700 away from the substrate 100, and at least one barrier layer 600 located between the second touch insulating layer 720 and the organic protective layer 800. That is, the barrier layer 600 is located on the side of the second touch insulating layer 720 away from the substrate 100, while the first touch insulating layer 710 and the second touch insulating layer 720 located on the side of the barrier layer 600 close to the substrate 100 both include organic insulating materials.
  • the surface flatness of the second touch insulating layer 720 away from the substrate 100 is relatively high, which reduces the risk of microcracks in the barrier layer 600 formed on the second touch insulating layer 720, and its film is more dense, which can play a better role in blocking the intrusion of water, oxygen and other impurities.
  • Figure 11 schematically shows a cross-sectional view of a display substrate according to some embodiments of the present disclosure, taken along AA’ in Figure 1.
  • the display substrate further includes an organic protective layer 800 located on the side of the touch layer 700 away from the substrate 100, and at least one barrier layer 600 located on the side of the organic protective layer 800 away from the substrate 100.
  • the organic protective layer 800 includes an organic insulating material, that is, the first touch insulating layer 710, the second touch insulating layer 720 and the organic protective layer 800 located on the side of the barrier layer 600 close to the substrate 100 all include organic insulating materials.
  • the surface flatness of the organic protective layer 800 away from the substrate 100 is relatively high, which reduces the risk of microcracks in the barrier layer 600 formed on the organic protective layer 800, and its film is more dense, which can play a better role in blocking the intrusion of water, oxygen and other impurities.
  • the thickness of the barrier layer 600 is 2000-6000 angstroms.
  • the thickness of the barrier layer 600 can be 2000-4000 angstroms.
  • the thickness of the barrier layer 600 can be 4000-6000 angstroms.
  • the display substrate further includes a module stack structure 900 located on the side of the organic protective layer 800 away from the substrate 100.
  • the module stack structure 900 may include a polarizing layer located on the side of the organic protective layer 800 away from the substrate 100 and a protective cover plate located on the side of the polarizing layer away from the substrate 100.
  • Figure 12 schematically illustrates a flowchart of a method for fabricating a display substrate according to an embodiment of the present disclosure.
  • the display substrate includes an opening area HA, a buffer area BA located around the opening area HA, and a display area AA located around the buffer area BA.
  • the method for preparing the display substrate includes the following steps S10 to S60.
  • step S10 a driving circuit layer is formed on the substrate.
  • step S20 a plurality of isolation pillars are formed on the substrate, and the plurality of isolation pillars are located in the buffer region.
  • a light-emitting device layer and a pixel defining layer are formed on the side of the driving circuit layer and the plurality of isolation pillars away from the substrate.
  • the light-emitting device layer includes a first electrode layer located on the side of the driving circuit layer away from the substrate.
  • the pixel defining layer is located on the side of the first electrode layer away from the substrate.
  • the first electrode layer includes a plurality of first electrode portions.
  • the pixel defining layer includes a plurality of openings, and the plurality of openings expose at least a portion of the plurality of first electrode portions respectively.
  • step S40 an encapsulation layer is formed on the side of the light-emitting device layer away from the substrate.
  • a barrier material film is formed on the side of the encapsulation layer away from the substrate.
  • the material of the barrier material film includes an inorganic insulating material.
  • step S60 an opening is formed in the opening area, and a portion of the barrier material film layer is retained to form a barrier layer.
  • the orthographic projection of the barrier layer on the substrate covers at least a portion of the orthographic projection of the plurality of isolation pillars on the substrate, and the orthographic projection of the barrier layer on the substrate is spaced apart from the orthographic projection of at least a portion of the opening on the substrate.
  • Figures 13A-13H schematically illustrate the formation process of a display substrate according to some embodiments of the present disclosure.
  • a driving circuit layer 200, a plurality of isolation pillars 510 and a barrier Dam are formed on a substrate 100.
  • forming the driving circuit layer 200 may include forming an active layer ACT on the substrate 100, forming a first gate insulating layer GI1 on the side of the active layer ACT away from the substrate 100, forming a first gate metal layer Gatel on the side of the first gate insulating layer GI1 away from the substrate 100, forming a second gate insulating layer GI2 on the side of the first gate metal layer Gate1 away from the substrate 100, forming a second gate metal layer Gate2 on the side of the second gate insulating layer GI2 away from the substrate 100, forming an interlayer insulating layer ILD on the side of the second gate metal layer Gate2 away from the substrate 100, forming a source/drain metal layer SD on the side of the interlayer insulating layer ILD away from the substrate 100, and forming a planarization layer PLN on the side of the source/drain metal layer SD away from the substrate 100.
  • a barrier Dam is formed at the same time as at least a portion of the driving circuit layer 200, i.e., the barrier Dam is located in the driving circuit layer 200, and the barrier Dam is formed in the buffer region BA and at least partially surrounds the opening region HA.
  • multiple isolation pillars 510 are formed simultaneously with the source/drain metal layer SD, i.e., multiple isolation pillars 510 are located in the source/drain metal layer SD.
  • the multiple isolation pillars 510 include at least one first isolation pillar 511 located on the side of the retaining wall Dam near the aperture region HA and at least one second isolation pillar 512 located on the side of the retaining wall Dam away from the aperture region HA.
  • a light-emitting device layer 300 and a pixel defining layer PDL are formed on the side of the driving circuit layer 200 and the plurality of isolation pillars 510 away from the substrate 100.
  • the light-emitting device layer 300 includes a first electrode layer 310 located on the side of the driving circuit layer 200 away from the substrate 100, a light-emitting functional layer 320 located on the side of the first electrode layer 310 away from the substrate 100, and a second electrode layer 330 located on the side of the light-emitting functional layer 320 away from the substrate 100.
  • the pixel defining layer PDL is located between the first electrode layer 310 and the light-emitting functional layer 320.
  • the first electrode layer 310 includes a plurality of first electrode portions 311, and the pixel defining layer PDL includes a plurality of openings KK.
  • the plurality of openings KK expose at least a portion of the plurality of first electrode portions 311, and the light-emitting functional layer 320 is connected to the first electrode portions 311 through the openings KK.
  • the light-emitting functional layer 320 may include a first common functional layer, a light-emitting layer, and a second common functional layer.
  • the first and second common functional layers are formed by a vapor deposition process using an open mask.
  • the first and second common functional layers are deposited in the buffer region BA. Since the buffer region BA has isolation pillars 510, the first and second common functional layers formed above the isolation pillars 510 are disconnected at the sidewalls of the isolation pillars, thereby cutting off the intrusion path of water and oxygen in the first and second common functional layers.
  • the light-emitting layer is also formed by a vapor deposition process using a high-precision metal mask (FMM).
  • FMM high-precision metal mask
  • the first common functional layer may include a hole injection layer and a hole transport layer
  • the second common functional layer may include an electron transport layer and an electron injection layer
  • the second electrode layer 330 is formed by a vapor deposition process using an open mask.
  • the second electrode layer 330 is deposited in the buffer region BA. Since the buffer region BA has isolation pillars 510, the second electrode layer 330 formed above the isolation pillars 510 is broken at the sidewall of the isolation pillars 510, thereby cutting off the intrusion path of water and oxygen in the second electrode layer 330.
  • an encapsulation layer 400 is formed on the side of the light-emitting device layer 300 away from the substrate 100.
  • the encapsulation layer 400 includes a first inorganic encapsulation layer 410, an organic encapsulation layer 420 located on the side of the first inorganic encapsulation layer 410 away from the substrate 100, and a second inorganic encapsulation layer 430 located on the side of the organic encapsulation layer 420 away from the substrate 100.
  • the edge of the first inorganic encapsulation layer 410 near the opening region HA is located on the side of the barrier wall Dam near the opening region HA.
  • the edge of the second inorganic encapsulation layer 430 near the opening region HA is located on the side of the barrier wall Dam near the opening region HA.
  • the edge of the organic encapsulation layer 420 near the opening region HA is located on the side of the barrier wall Dam away from the opening region HA.
  • a barrier material film layer 610 is formed on the side of the encapsulation layer 400 away from the substrate 100.
  • the material of the barrier material film layer 610 includes an inorganic insulating material.
  • the barrier material film layer 610 can be a single-layer silicon nitride film layer, and the barrier material film layer 610 is formed by a chemical vapor deposition process and a patterning process.
  • the barrier material film layer 610 includes a first portion 611 located in the opening region HA and a second portion 612 located in the buffer region BA.
  • the first portion 611 and the second portion 612 are directly connected, and the first portion 611 substantially covers the opening region HA.
  • the first portion 611 and the second portion 612 are an integral structure.
  • the barrier material film layer 610 includes a first portion 611 located in the opening region HA and a second portion 612 located in the buffer region BA.
  • the first portion 611 and the second portion 612 are directly connected.
  • the first portion 611 covers a portion of the opening region HA near the buffer region BA and has a hollow structure 611a.
  • the first portion 611 and the second portion 612 are an integral structure, and the first portion 611 is annular.
  • a touch layer 700 is formed on the side of the barrier material film layer 610 away from the substrate 100
  • an organic protective layer 800 is formed on the side of the touch layer 700 away from the substrate 100
  • a module stack structure 900 is formed on the side of the organic protective layer 800 away from the substrate 100.
  • the touch layer 700 includes a first touch insulating layer 710 located on the side of the encapsulation layer 400 away from the substrate 100, a first touch metal layer 730 located on the side of the first touch insulating layer 710 away from the substrate 100, a second touch insulating layer 720 located on the side of the first touch metal layer 730 away from the substrate 100, and a second touch metal layer 740 located on the side of the second touch insulating layer 720 away from the substrate 100.
  • the material of the first touch insulating layer 710 includes an inorganic insulating material.
  • the material of the first touch insulating layer 710 includes at least one of silicon nitride and silicon oxide.
  • the first touch insulating layer 710 is formed by a chemical vapor deposition process.
  • the material of the second touch insulating layer 720 includes an organic insulating material.
  • the material of the second touch insulating layer 720 includes an organic photoresist material, and the second touch insulating layer 720 is formed by a coating process.
  • an opening 100a is formed in the opening region HA.
  • the orthographic projection of the barrier layer 600 on the substrate 100 covers at least a portion of the orthographic projection of the plurality of isolation pillars 510 on the substrate 100, and the orthographic projection of the barrier layer 600 on the substrate 100 is spaced apart from the orthographic projection of at least a portion of the openings KK on the substrate 100.
  • an opening 100a is formed by laser cutting, the edge of which is substantially flush with the edge of a pre-defined opening region HA.
  • the second portion 612 in the barrier material film layer 610 is cut away, leaving only the second portion 612 located in the buffer region BA.
  • Figures 14A-14F schematically illustrate the formation process of a display substrate according to some embodiments of the present disclosure.
  • a driving circuit layer 200, a plurality of isolation pillars 510 and a barrier Dam are formed on a substrate 100.
  • a light-emitting device layer 300 and a pixel defining layer PDL are formed on the side of the driving circuit layer 200 and the plurality of isolation pillars 510 away from the substrate 100.
  • the light-emitting device layer 300 includes a first electrode layer 310 located on the side of the driving circuit layer 200 away from the substrate 100, a light-emitting functional layer 320 located on the side of the first electrode layer 310 away from the substrate 100, and a second electrode layer 330 located on the side of the light-emitting functional layer 320 away from the substrate 100.
  • the pixel defining layer PDL is located between the first electrode layer 310 and the light-emitting functional layer 320.
  • the first electrode layer 310 includes a plurality of first electrode portions 311, and the pixel defining layer PDL includes a plurality of openings KK.
  • the plurality of openings KK expose at least a portion of the plurality of first electrode portions 311, and the light-emitting functional layer 320 is connected to the first electrode portions 311 through the openings KK.
  • an encapsulation layer 400 is formed on the side of the light-emitting device layer 300 away from the substrate 100.
  • the encapsulation layer 400 includes a first inorganic encapsulation layer 410, an organic encapsulation layer 420 located on the side of the first inorganic encapsulation layer 410 away from the substrate 100, and a second inorganic encapsulation layer 430 located on the side of the organic encapsulation layer 420 away from the substrate 100.
  • a first touch insulating layer 710 is formed on the side of the encapsulation layer 400 away from the substrate 100, and a first touch metal layer 730 and a barrier material film layer 610 are formed on the side of the first touch insulating layer 710 away from the substrate 100.
  • the material of the barrier material film layer 610 includes inorganic insulating materials.
  • the barrier material film layer 610 can be a single-layer silicon nitride film layer, and the barrier material film layer 610 is formed by chemical vapor deposition and patterning processes.
  • the material of the first touch insulating layer 710 includes an inorganic insulating material.
  • the material of the first touch insulating layer 710 includes at least one of silicon nitride and silicon oxide.
  • a second touch insulating layer 720 is formed on the side of the first touch metal layer 730 and the barrier material film layer 610 away from the substrate 100.
  • a second touch metal layer 740 is formed on the side of the second touch insulating layer 720 away from the substrate 100.
  • An organic protective layer 800 is formed on the side of the second touch metal layer 740 away from the substrate 100.
  • a module stack structure 900 is formed on the side of the organic protective layer 800 away from the substrate 100.
  • the first touch insulating layer 710, the first touch metal layer 730, the second touch insulating layer 720, and the second touch metal layer 740 constitute the touch layer 700.
  • the material of the second touch insulating layer 720 includes an organic insulating material; exemplarily, the material of the second touch insulating layer 720 includes an organic photoresist material.
  • an opening 100a is formed in the opening region HA.
  • the orthographic projection of the barrier layer 600 on the substrate 100 covers at least a portion of the orthographic projection of the plurality of isolation pillars 510 on the substrate 100, and the orthographic projection of the barrier layer 600 on the substrate 100 is spaced apart from the orthographic projection of at least a portion of the openings KK on the substrate 100.
  • FIGS 15A-15F schematically illustrate the formation process of a display substrate according to some embodiments of the present disclosure.
  • a driving circuit layer 200, a plurality of isolation pillars 510 and a barrier Dam are formed on a substrate 100.
  • a light-emitting device layer 300 and a pixel defining layer PDL are formed on the side of the driving circuit layer 200 and the plurality of isolation pillars 510 away from the substrate 100.
  • the light-emitting device layer 300 includes a first electrode layer 310 located on the side of the driving circuit layer 200 away from the substrate 100, a light-emitting functional layer 320 located on the side of the first electrode layer 310 away from the substrate 100, and a second electrode layer 330 located on the side of the light-emitting functional layer 320 away from the substrate 100.
  • the pixel defining layer PDL is located between the first electrode layer 310 and the light-emitting functional layer 320.
  • the first electrode layer 310 includes a plurality of first electrode portions 311, and the pixel defining layer PDL includes a plurality of openings KK.
  • the plurality of openings KK expose at least a portion of the plurality of first electrode portions 311, and the light-emitting functional layer 320 is connected to the first electrode portions 311 through the openings KK.
  • an encapsulation layer 400 is formed on the side of the light-emitting device layer 300 away from the substrate 100.
  • the encapsulation layer 400 includes a first inorganic encapsulation layer 410, an organic encapsulation layer 420 located on the side of the first inorganic encapsulation layer 410 away from the substrate 100, and a second inorganic encapsulation layer 430 located on the side of the organic encapsulation layer 420 away from the substrate 100.
  • a touch layer 700 is formed on the side of the encapsulation layer away from the substrate 100.
  • the touch layer 700 includes a first touch insulating layer 710 located on the side of the encapsulation layer 400 away from the substrate 100, a first touch metal layer 730 located on the side of the first touch insulating layer 710 away from the substrate 100, a second touch insulating layer 720 located on the side of the first touch metal layer 730 away from the substrate 100, and a second touch metal layer 740 located on the side of the second touch insulating layer 720 away from the substrate 100.
  • a barrier material film layer 610 is formed on the side of the second touch metal layer 740 away from the substrate 100.
  • the material of the barrier material film layer 610 includes an inorganic insulating material.
  • the barrier material film 610 can be a single-layer silicon nitride film, which is formed by chemical vapor deposition and patterning processes.
  • the material of the first touch insulating layer 710 includes an inorganic insulating material.
  • the material of the first touch insulating layer 710 includes at least one of silicon nitride and silicon oxide.
  • the material of the second touch insulating layer 720 includes an organic insulating material; exemplarily, the material of the second touch insulating layer 720 includes an organic photoresist material.
  • an organic protective layer 800 is formed on the side of the second touch metal layer 740 and the barrier material film layer 610 away from the substrate 100, and a module stack structure 900 is formed on the side of the organic protective layer 800 away from the substrate 100.
  • an opening 100a is formed in the opening region HA.
  • the orthographic projection of the barrier layer 600 on the substrate 100 covers at least a portion of the orthographic projection of the plurality of isolation pillars 510 on the substrate 100, and the orthographic projection of the barrier layer 600 on the substrate 100 is spaced apart from the orthographic projection of at least a portion of the openings KK on the substrate 100.
  • Figures 16A-16F schematically illustrate the formation process of a display substrate according to some embodiments of the present disclosure.
  • a driving circuit layer 200, a plurality of isolation pillars 510 and a barrier Dam are formed on a substrate 100.
  • a light-emitting device layer 300 and a pixel defining layer PDL are formed on the side of the driving circuit layer 200 and the plurality of isolation pillars 510 away from the substrate 100.
  • the light-emitting device layer 300 includes a first electrode layer 310 located on the side of the driving circuit layer 200 away from the substrate 100, a light-emitting functional layer 320 located on the side of the first electrode layer 310 away from the substrate 100, and a second electrode layer 330 located on the side of the light-emitting functional layer 320 away from the substrate 100.
  • the pixel defining layer PDL is located between the first electrode layer 310 and the light-emitting functional layer 320.
  • the first electrode layer 310 includes a plurality of first electrode portions 311, and the pixel defining layer PDL includes a plurality of openings KK.
  • the plurality of openings KK expose at least a portion of the plurality of first electrode portions 311, and the light-emitting functional layer 320 is connected to the first electrode portions 311 through the openings KK.
  • an encapsulation layer 400 is formed on the side of the light-emitting device layer 300 away from the substrate 100.
  • the encapsulation layer 400 includes a first inorganic encapsulation layer 410, an organic encapsulation layer 420 located on the side of the first inorganic encapsulation layer 410 away from the substrate 100, and a second inorganic encapsulation layer 430 located on the side of the organic encapsulation layer 420 away from the substrate 100.
  • a touch layer 700 is formed on the side of the encapsulation layer 400 away from the substrate 100.
  • the touch layer 700 includes a first touch insulating layer 710 on the side of the encapsulation layer 400 away from the substrate 100, a first touch metal layer 730 on the side of the first touch insulating layer 710 away from the substrate 100, a second touch insulating layer 720 on the side of the first touch metal layer 730 away from the substrate 100, and a second touch metal layer 740 on the side of the second touch insulating layer 720 away from the substrate 100.
  • An organic protective layer 800 is formed on the side of the second touch metal layer 740 away from the substrate 100, and a barrier material film layer 610 is formed on the side of the organic protective layer 800 away from the substrate 100.
  • the material of the barrier material film layer 610 includes an inorganic insulating material.
  • the barrier material film 610 can be a single-layer silicon nitride film, which is formed by chemical vapor deposition and patterning processes.
  • the material of the first touch insulating layer 710 includes an inorganic insulating material.
  • the material of the first touch insulating layer 710 includes at least one of silicon nitride and silicon oxide.
  • the material of the second touch insulating layer 720 includes an organic insulating material; exemplarily, the material of the second touch insulating layer 720 includes an organic photoresist material.
  • a module stack structure 900 is formed on the side of the organic protective layer 800 away from the substrate 100.
  • an opening 100a is formed in the opening region HA.
  • the orthographic projection of the barrier layer 600 on the substrate 100 covers at least a portion of the orthographic projection of the plurality of isolation pillars on the substrate 100, and the orthographic projection of the barrier layer 600 on the substrate 100 is spaced apart from the orthographic projection of at least a portion of the openings KK on the substrate 100.
  • FIGS 17A-17F schematically illustrate the formation process of a display substrate according to some embodiments of the present disclosure.
  • a driving circuit layer 200, a plurality of isolation pillars 510 and a barrier Dam are formed on a substrate 100.
  • a light-emitting device layer 300 and a pixel defining layer PDL are formed on the side of the driving circuit layer 200 and the plurality of isolation pillars 510 away from the substrate 100.
  • the light-emitting device layer 300 includes a first electrode layer 310 located on the side of the driving circuit layer 200 away from the substrate 100, a light-emitting functional layer 320 located on the side of the first electrode layer 310 away from the substrate 100, and a second electrode layer 330 located on the side of the light-emitting functional layer 320 away from the substrate 100.
  • the pixel defining layer PDL is located between the first electrode layer 310 and the light-emitting functional layer 320.
  • the first electrode layer 310 includes a plurality of first electrode portions 311, and the pixel defining layer PDL includes a plurality of openings KK.
  • the plurality of openings KK expose at least a portion of the plurality of first electrode portions 311, and the light-emitting functional layer 320 is connected to the first electrode portions 311 through the openings KK.
  • an encapsulation layer 400 is formed on the side of the light-emitting device layer 300 away from the substrate 100.
  • the encapsulation layer 400 includes a first inorganic encapsulation layer 410, an organic encapsulation layer 420 located on the side of the first inorganic encapsulation layer 410 away from the substrate 100, and a second inorganic encapsulation layer 430 located on the side of the organic encapsulation layer 420 away from the substrate 100.
  • the edge of the first inorganic encapsulation layer 410 near the opening region HA is located on the side of the barrier wall Dam near the opening region HA.
  • the edge of the second inorganic encapsulation layer 430 near the opening region HA is located on the side of the barrier wall Dam near the opening region HA.
  • the edge of the organic encapsulation layer 420 near the opening region HA is located on the side of the barrier wall Dam away from the opening region HA.
  • a barrier material film layer 610 is formed on the side of the encapsulation layer 400 away from the substrate 100.
  • the material of the barrier material film layer 610 includes an inorganic insulating material.
  • the barrier material film layer 610 can be a single-layer silicon nitride film layer, and the barrier material film layer 610 is formed by a chemical vapor deposition process and a patterning process.
  • a touch layer 700 is formed on the side of the barrier material film layer 610 away from the substrate 100
  • an organic protective layer 800 is formed on the side of the touch layer 700 away from the substrate 100
  • a module stack structure 900 is formed on the side of the organic protective layer 800 away from the substrate 100.
  • the touch layer 700 includes a first touch insulating layer 710 located on the side of the encapsulation layer 400 away from the substrate 100, a first touch metal layer 730 located on the side of the first touch insulating layer 710 away from the substrate 100, a second touch insulating layer 720 located on the side of the first touch metal layer 730 away from the substrate 100, and a second touch metal layer 740 located on the side of the second touch insulating layer 720 away from the substrate 100.
  • the material of the first touch insulating layer 710 includes an organic insulating material.
  • the material of the first touch insulating layer 710 includes an organic photoresist material, and the first touch insulating layer 710 is formed by a coating process.
  • the material of the second touch insulating layer 720 includes an organic insulating material.
  • the material of the second touch insulating layer 720 includes an organic photoresist material, and the second touch insulating layer 720 is formed by a coating process.
  • an opening 100a is formed in the opening region HA.
  • the orthographic projection of the barrier layer 600 on the substrate 100 covers at least a portion of the orthographic projection of the plurality of isolation pillars 510 on the substrate 100, and the orthographic projection of the barrier layer 600 on the substrate 100 is spaced apart from the orthographic projection of at least a portion of the openings KK on the substrate 100.
  • Figures 18A-18F schematically illustrate the formation process of a display substrate according to some embodiments of the present disclosure.
  • a driving circuit layer 200, a plurality of isolation pillars 510 and a barrier Dam are formed on a substrate 100.
  • a light-emitting device layer 300 and a pixel defining layer PDL are formed on the side of the driving circuit layer 200 and the plurality of isolation pillars 510 away from the substrate 100.
  • the light-emitting device layer 300 includes a first electrode layer 310 located on the side of the driving circuit layer 200 away from the substrate 100, a light-emitting functional layer 320 located on the side of the first electrode layer 310 away from the substrate 100, and a second electrode layer 330 located on the side of the light-emitting functional layer 320 away from the substrate 100.
  • the pixel defining layer PDL is located between the first electrode layer 310 and the light-emitting functional layer 320.
  • the first electrode layer 310 includes a plurality of first electrode portions 311, and the pixel defining layer PDL includes a plurality of openings KK.
  • the plurality of openings KK expose at least a portion of the plurality of first electrode portions 311, and the light-emitting functional layer 320 is connected to the first electrode portions 311 through the openings KK.
  • an encapsulation layer 400 is formed on the side of the light-emitting device layer 300 away from the substrate 100.
  • the encapsulation layer 400 includes a first inorganic encapsulation layer 410, an organic encapsulation layer 420 located on the side of the first inorganic encapsulation layer 410 away from the substrate 100, and a second inorganic encapsulation layer 430 located on the side of the organic encapsulation layer 420 away from the substrate 100.
  • a first touch insulating layer 710 is formed on the side of the encapsulation layer 400 away from the substrate 100, and a first touch metal layer 730 and a barrier material film layer 610 are formed on the side of the first touch insulating layer 710 away from the substrate 100.
  • the material of the barrier material film layer 610 includes inorganic insulating materials.
  • the barrier material film layer 610 can be a single-layer silicon nitride film layer, and the barrier material film layer 610 is formed by chemical vapor deposition and patterning processes.
  • the material of the first touch insulating layer 710 includes an organic insulating material.
  • the material of the first touch insulating layer 710 includes an organic photoresist material, and the first touch insulating layer 710 is formed by a coating process.
  • a second touch insulating layer 720 is formed on the side of the first touch metal layer 730 and the barrier material film layer 610 away from the substrate 100.
  • a second touch metal layer 740 is formed on the side of the second touch insulating layer 720 away from the substrate 100.
  • An organic protective layer 800 is formed on the side of the second touch metal layer 740 away from the substrate 100.
  • a module stack structure 900 is formed on the side of the organic protective layer 800 away from the substrate 100.
  • the first touch insulating layer 710, the first touch metal layer 730, the second touch insulating layer 720, and the second touch metal layer 740 constitute the touch layer 700.
  • the material of the second touch insulating layer 720 includes an organic insulating material; exemplarily, the material of the second touch insulating layer 720 includes an organic photoresist material.
  • an opening is formed in the opening region HA.
  • the portion of the barrier material film 610 retained forms a barrier layer 600.
  • the orthographic projection of the barrier layer 600 on the substrate 100 covers at least a portion of the orthographic projection of the plurality of isolation pillars 510 on the substrate 100, and the orthographic projection of the barrier layer 600 on the substrate 100 is spaced apart from the orthographic projection of at least a portion of the openings KK on the substrate 100.
  • Figures 19A-19F schematically illustrate the formation process of a display substrate according to some embodiments of the present disclosure.
  • a driving circuit layer 200, a plurality of isolation pillars 510 and a barrier Dam are formed on a substrate 100.
  • a light-emitting device layer 300 and a pixel defining layer PDL are formed on the side of the driving circuit layer 200 and the plurality of isolation pillars 510 away from the substrate 100.
  • the light-emitting device layer 300 includes a first electrode layer 310 located on the side of the driving circuit layer 200 away from the substrate 100, a light-emitting functional layer 320 located on the side of the first electrode layer 310 away from the substrate 100, and a second electrode layer 330 located on the side of the light-emitting functional layer 320 away from the substrate 100.
  • the pixel defining layer PDL is located between the first electrode layer 310 and the light-emitting functional layer 320.
  • the first electrode layer 310 includes a plurality of first electrode portions 311, and the pixel defining layer PDL includes a plurality of openings KK.
  • the plurality of openings KK expose at least a portion of the plurality of first electrode portions 311, and the light-emitting functional layer 320 is connected to the first electrode portions 311 through the openings KK.
  • an encapsulation layer 400 is formed on the side of the light-emitting device layer 300 away from the substrate 100.
  • the encapsulation layer 400 includes a first inorganic encapsulation layer 410, an organic encapsulation layer 420 located on the side of the first inorganic encapsulation layer 410 away from the substrate 100, and a second inorganic encapsulation layer 430 located on the side of the organic encapsulation layer 420 away from the substrate 100.
  • a touch layer 700 is formed on the side of the encapsulation layer 400 away from the substrate 100.
  • the touch layer 700 includes a first touch insulating layer 710 on the side of the encapsulation layer 400 away from the substrate 100, a first touch metal layer 730 on the side of the first touch insulating layer 710 away from the substrate 100, a second touch insulating layer 720 on the side of the first touch metal layer 730 away from the substrate 100, and a second touch metal layer 740 on the side of the second touch insulating layer 720 away from the substrate 100.
  • a barrier material film layer 610 is formed on the side of the second touch metal layer 740 away from the substrate 100.
  • the material of the barrier material film layer 610 includes an inorganic insulating material.
  • the barrier material film 610 can be a single-layer silicon nitride film, which is formed by chemical vapor deposition and patterning processes.
  • the material of the first touch insulating layer 710 includes an organic insulating material; exemplarily, the material of the first touch insulating layer 710 includes an organic photoresist material.
  • the material of the second touch insulating layer 720 includes an organic insulating material; exemplarily, the material of the second touch insulating layer 720 includes an organic photoresist material.
  • an organic protective layer 800 is formed on the side of the second touch metal layer 740 and the barrier material film layer 610 away from the substrate 100, and a module stack structure 900 is formed on the side of the organic protective layer 800 away from the substrate 100.
  • an opening 100a is formed in the opening region HA.
  • the orthographic projection of the barrier layer 600 on the substrate 100 covers at least a portion of the orthographic projection of the plurality of isolation pillars 510 on the substrate 100, and the orthographic projection of the barrier layer 600 on the substrate 100 is spaced apart from the orthographic projection of at least a portion of the openings KK on the substrate 100.
  • Figures 20A-20F schematically illustrate the formation process of a display substrate according to some embodiments of the present disclosure.
  • a driving circuit layer 200, a plurality of isolation pillars 510 and a barrier Dam are formed on a substrate 100.
  • a light-emitting device layer 300 and a pixel defining layer PDL are formed on the side of the driving circuit layer 200 and the plurality of isolation pillars 510 away from the substrate 100.
  • the light-emitting device layer 300 includes a first electrode layer 310 located on the side of the driving circuit layer 200 away from the substrate 100, a light-emitting functional layer 320 located on the side of the first electrode layer 310 away from the substrate 100, and a second electrode layer 330 located on the side of the light-emitting functional layer 320 away from the substrate 100.
  • the pixel defining layer PDL is located between the first electrode layer 310 and the light-emitting functional layer 320.
  • the first electrode layer 310 includes a plurality of first electrode portions 311, and the pixel defining layer PDL includes a plurality of openings KK.
  • the plurality of openings KK expose at least a portion of the plurality of first electrode portions 311, and the light-emitting functional layer 320 is connected to the first electrode portions 311 through the openings KK.
  • an encapsulation layer 400 is formed on the side of the light-emitting device layer 300 away from the substrate 100.
  • the encapsulation layer 400 includes a first inorganic encapsulation layer 410, an organic encapsulation layer 420 located on the side of the first inorganic encapsulation layer 410 away from the substrate 100, and a second inorganic encapsulation layer 430 located on the side of the organic encapsulation layer 420 away from the substrate 100.
  • a touch layer 700 is formed on the side of the encapsulation layer 400 away from the substrate 100.
  • the touch layer 700 includes a first touch insulating layer 710 on the side of the encapsulation layer 400 away from the substrate 100, a first touch metal layer 730 on the side of the first touch insulating layer 710 away from the substrate 100, a second touch insulating layer 720 on the side of the first touch metal layer 730 away from the substrate 100, and a second touch metal layer 740 on the side of the second touch insulating layer 720 away from the substrate 100.
  • An organic protective layer 800 is formed on the side of the second touch metal layer 740 away from the substrate 100, and a barrier material film layer 610 is formed on the side of the organic protective layer 800 away from the substrate 100.
  • the material of the barrier material film layer 610 includes an inorganic insulating material.
  • the barrier material film 610 can be a single-layer silicon nitride film, which is formed by chemical vapor deposition and patterning processes.
  • the material of the first touch insulating layer 710 includes an organic insulating material; exemplarily, the material of the first touch insulating layer 710 includes an organic photoresist material.
  • the material of the second touch insulating layer 720 includes an organic insulating material; exemplarily, the material of the second touch insulating layer 720 includes an organic photoresist material.
  • a module stack structure 900 is formed on the side of the organic protective layer 800 away from the substrate 100.
  • an opening 100a is formed in the opening region HA.
  • the orthographic projection of the barrier layer 600 on the substrate 100 covers at least a portion of the orthographic projection of the plurality of isolation pillars 510 on the substrate 100, and the orthographic projection of the barrier layer 600 on the substrate 100 is spaced apart from the orthographic projection of at least a portion of the openings KK on the substrate 100.
  • the display device may include any device or product with display functionality.
  • the display device may be a smartphone, mobile phone, e-book reader, desktop computer (PC), laptop PC, netbook PC, personal digital assistant (PDA), portable multimedia player (PMP), digital audio player, mobile medical device, camera, wearable device (e.g., head-mounted device, electronic clothing, electronic bracelet, electronic necklace, electronic accessory, electronic tattoo, or smartwatch), television set, etc.
  • PDA personal digital assistant
  • PMP portable multimedia player
  • digital audio player digital audio player
  • mobile medical device camera
  • wearable device e.g., head-mounted device, electronic clothing, electronic bracelet, electronic necklace, electronic accessory, electronic tattoo, or smartwatch
  • television set etc.
  • the display device has all the features and advantages of the display substrate described above, which can be referred to in the above description of the display substrate and will not be repeated here.
  • the terms “substantially,” “approximately,” “about,” and other similar terms are used as terms of approximation rather than as terms of degree, and they are intended to account for inherent deviations in measured or calculated values that would be recognized by one of ordinary skill in the art. Taking into account factors such as process variations, measurement problems, and errors associated with the measurement of a particular quantity (i.e., limitations of the measurement system), “approximately” or “about” as used herein includes the stated value and indicates that the particular value is within an acceptable range of deviation for one of ordinary skill in the art. For example, “approximately” may mean within one or more standard deviations, or within ⁇ 10% or ⁇ 5% of the stated value.

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Abstract

提供一种显示基板，包括开孔区域、位于开孔区域周边的缓冲区域以及位于缓冲区域周边的显示区域，显示基板包括：衬底基板；驱动电路层；发光器件层；像素界定层，发光器件层包括第一电极层，第一电极层包括多个第一电极部，像素界定层包括多个开口，多个开口分别暴露多个第一电极部的至少一部分；以及封装层；其中，显示基板还包括位于发光器件层靠近衬底基板一侧的多个隔离柱以及位于封装层远离衬底基板一侧的至少一层阻挡层，多个隔离柱位于缓冲区域，阻挡层的材料包括无机绝缘材料，阻挡层在衬底基板上的正投影覆盖多个隔离柱在衬底基板上的正投影的至少一部分，且阻挡层在衬底基板上的正投影与至少一部分开口在衬底基板上的正投影相间隔。

Description

显示基板及其制备方法和显示装置 技术领域
本公开涉及显示技术领域，尤其涉及一种显示基板及其制备方法和显示装置。
背景技术
随着人们对屏占比的极致追求，屏幕本身的形态和相机的布置也在迅速地优化，从最初的一半屏占比到Notch布局再目前的水滴屏、挖孔屏，新型显示技术层出不穷。其中打孔屏的设计极大地提升了屏占比，满足了消费者对于大屏显示的极致追求。如何避免打孔区域封装失效的问题是显示产品的研发人员关注的课题之一。
在本部分中公开的以上信息仅用于对本公开的发明构思的背景的理解，因此，以上信息可包含不构成现有技术的信息。
发明内容
在一个方面，提供一种显示基板，所述显示基板包括开孔区域、位于所述开孔区域周边的缓冲区域以及位于所述缓冲区域周边的显示区域，所述显示基板包括：
衬底基板；
驱动电路层，位于所述衬底基板上；
发光器件层，位于所述驱动电路层远离所述衬底基板一侧，所述发光器件层包括位于所述驱动电路层远离所述衬底基板一侧的第一电极层，所述第一电极层包括多个第一电极部；
像素界定层，位于所述第一电极层远离所述衬底基板一侧，所述像素界定层包括多个开口，所述多个开口分别暴露所述多个第一电极部的至少一部分；以及
封装层，位于所述发光器件层远离所述衬底基板一侧；
其中，所述显示基板还包括位于所述发光器件层靠近所述衬底基板一侧的多个隔离柱以及位于所述封装层远离所述衬底基板一侧的至少一层阻挡层，所述多个隔离柱位于所述缓冲区域，所述阻挡层的材料包括无机绝缘材料，所述阻挡层在所述衬底基板上的正投影覆盖所述多个隔离柱在所述衬底基板上的正投影的至少一部分，且所述阻挡层在所述衬底基板上的正投影与至少一部分所述开口在所述衬底基板上的正投影相间隔。
根据一些示例性的实施例，所述阻挡层远离所述开孔区域的边缘位于最靠近所述缓冲区域的所述开口靠近所述缓冲区域的一侧。
根据一些示例性的实施例，所述阻挡层在所述衬底基板上的正投影与最靠近所述缓冲区域的所述开口在所述衬底基板上的正投影的间距大于等于5微米。
根据一些示例性的实施例，所述显示基板包括位于所述衬底基板上的挡墙，所述挡墙位于所述缓冲区域且至少部分环绕所述开孔区域，所述多个隔离柱包括位于所述挡墙靠近所述开孔区域一侧的至少一个第一隔离柱与位于所述挡墙远离所述开孔区域一侧的至少一个第二隔离柱，所述阻挡层在所述衬底基板上的正投影覆盖所述多个第一隔离柱在所述衬底基板上的正投影的至少一部分。
根据一些示例性的实施例，所述阻挡层远离所述开孔区域的边缘位于最靠近所述挡墙的所述第一隔离柱远离所述开孔区域的一侧。
根据一些示例性的实施例，所述阻挡层远离所述开孔区域的边缘位于最靠近所述显示区域的所述第二隔离柱远离所述开孔区域的一侧。
根据一些示例性的实施例，所述显示基板包括位于所述开孔区域的开孔，所述阻挡层靠近所述开孔区域的边缘与所述开孔的边缘基本齐平。
根据一些示例性的实施例，所述显示基板还包括位于所述封装层远离所述衬底基板一侧的触控层，所述触控层包括位于所述封装层上的第一触控绝缘层与位于所述第一触控绝缘层远离所述衬底基板一侧的第二触控绝缘层。
根据一些示例性的实施例，至少一层所述阻挡层位于所述封装层与所述第一触控绝缘层之间。
根据一些示例性的实施例，至少一层所述阻挡层位于所述第一触控绝缘层与所述第二触控绝缘层之间。
根据一些示例性的实施例，至少一层所述阻挡层位于所述第二触控绝缘层远离所述衬底基板的一侧。
根据一些示例性的实施例，所述显示基板还包括位于所述触控层远离所述衬底基板一侧的有机保护层，至少一层所述阻挡层位于所述第二触控绝缘层与所述有机保护层之间，和/或至少一层所述阻挡层位于所述有机保护层远离所述衬底基板的一侧。
根据一些示例性的实施例，所述第一触控绝缘层与所述第二触控绝缘层中的至少一者包括有机绝缘材料。
根据一些示例性的实施例，所述阻挡层的厚度为2000-6000埃。
在另一方面，提供一种显示基板的制备方法，所述显示基板包括开孔区域、位于所述开孔区域周边的缓冲区域以及位于所述缓冲区域周边的显示区域，所述制备方法包括如下步骤：
在衬底基板上形成驱动电路层；
在所述衬底基板上形成多个隔离柱，所述多个隔离柱位于所述缓冲区域；
在所述驱动电路层与所述多个隔离柱远离所述衬底基板的一侧形成发光器件层和像素界定层，所述发光器件层包括位于所述驱动电路层远离所述衬底基板一侧的第一电极层，所述像素界定层位于所述第一电极层远离所述衬底基板一侧，所述第一电极层包括多个第一电极部，所述像素界定层包括多个开口，所述多个开口分别暴露所述多个第一电极部的至少一部分；
在所述发光器件层远离所述衬底基板的一侧形成封装层；
在所述封装层远离所述衬底基板的一侧形成阻挡材料膜层，所述阻挡材料膜层的材料包括无机绝缘材料；以及
在所述开孔区域形成开孔，所述阻挡材料膜层保留的部分形成阻挡层，其中，所述阻挡层在所述衬底基板上的正投影覆盖所述多个隔离柱在所述衬底基板上的正投影的至少一部分，且所述阻挡层在所述衬底基板上的正投影与至少一部分所述开口在所述衬底基板上的正投影相间隔。
根据一些示例性的实施例，所述阻挡材料膜层包括位于所述开孔区域的第一部分与位于所述缓冲区域的第二部分，所述第一部分与所述第二部分直接连接，所述第一部分基本覆盖所述开孔区域。
根据一些示例性的实施例，所述阻挡材料膜层包括位于所述开孔区域的第一部分与位于所述缓冲区域的第二部分，所述第一部分与所述第二部分直接连接，所述第一部分覆盖所述开孔区域靠近所述缓冲区域的部分区域，所述第一部分具有镂空结构。
在另一方面，提供一种显示装置，所述显示装置包括上述的显示基板。
附图说明
通过下文中参照附图对本公开所作的描述，本公开的其它目的和优点将显而易见，并可帮助对本公开有全面的理解。
图1示意性地示出了根据本公开实施例的显示基板的平面示意图。
图2示意性地示出了根据本公开一些实施例的显示基板沿图1中AA'截取的剖面图。
图3示意性地示出了根据本公开一些实施例的显示基板沿图1中AA'截取的剖面图。
图4示意性地示出了根据本公开一些实施例的显示基板沿图1中AA'截取的剖面图。
图5示意性地示出了根据本公开一些实施例的显示基板沿图1中AA'截取的剖面图。
图6示意性地示出了根据本公开一些实施例的显示基板沿图1中AA'截取的剖面图。
图7示意性地示出了根据本公开一些实施例的显示基板沿图1中AA'截取的剖面图。
图8示意性地示出了根据本公开一些实施例的显示基板沿图1中AA'截取的剖面图。
图9示意性地示出了根据本公开一些实施例的显示基板沿图1中AA'截取的剖面图。
图10示意性地示出了根据本公开一些实施例的显示基板沿图1中AA'截取的剖面图。
图11示意性地示出了根据本公开一些实施例的显示基板沿图1中AA'截取的剖面图。
图12示意性地示出了根据本公开实施例的显示基板的制备方法的流程图。
图13A－图13H示意性地示出了根据本公开一些实施例的显示基板的形成过程图。
图14A-图14F示意性地示出了根据本公开一些实施例的显示基板的形成过程图。
图15A-图15F示意性地示出了根据本公开一些实施例的显示基板的形成过程图。
图16A-图16F示意性地示出了根据本公开一些实施例的显示基板的形成过程图。
图17A-图17F示意性地示出了根据本公开一些实施例的显示基板的形成过程图。
图18A-图18F示意性地示出了根据本公开一些实施例的显示基板的形成过程图。
图19A-图19F示意性地示出了根据本公开一些实施例的显示基板的形成过程图。
图20A-图20F示意性地示出了根据本公开一些实施例的显示基板的形成过程图。
需要注意的是，为了清晰起见，在用于描述本公开的实施例的附图中，层、结构或区域的尺寸可能被放大或缩小，即这些附图并非按照实际的比例绘制。
具体实施方式
在下面的描述中，出于解释的目的，阐述了许多具体细节以提供对各种示例性实施例的全面的理解。然而，明显的是，在不具有这些具体细节或者具有一个或多个等同布置的情况下，可以实施各种示例性实施例。在其它情况下，以框图形式示出了公知的结构和装置，以避免使各种示例性实施例不必要地模糊。此外，各种示例性实施例可以是不同的，但不必是排他的。例如，在不脱离发明构思的情况下，可以在另一示例性实施例中使用或实施示例性实施例的具体形状、配置和特性。
在附图中，为了清楚和/或描述的目的，可以放大元件的尺寸和相对尺寸。如此，各个元件的尺寸和相对尺寸不必限于图中所示的尺寸和相对尺寸。当可以不同地实施示例性实施例时，可以与描述的顺序不同地执行具体的工艺顺序。例如，可以基本上同时执行或者以与描述的顺序相反的顺序执行两个连续描述的工艺。此外，同样的附图标记表示同样的元件。
当元件被描述为“在”另一元件“上”、“连接到”另一元件或“结合到”另一元件时，元件可以直接在另一元件上、直接连接到另一元件或直接结合到另一元件，或者可以存在中间元件。然而，当元件被描述为“直接在”另一元件“上”、“直接连接到”另一元件或“直接结合到”另一元件时，不存在中间元件。用于描述元件之间的关系的其他术语和/或表述应当以类似的方式解释，例如，“在……之间”对“直接在……之间”、“相邻”对“直接相邻”或“在……上”对“直接在……上”等。此外，术语“连接”可指的是物理连接、电连接、通信连接和/或流体连接。此外，X轴、Y轴和Z轴不限于直角坐标系的三个轴，并且可以以更广泛的含义解释。例如，X轴、Y轴和Z轴可彼此垂直，或者可代表彼此不垂直的不同方向。出于本公开的目的，“X、Y和Z中的至少一个”和“从由X、Y和Z构成的组中选择的至少一个”可以被解释为仅X、仅Y、仅Z、或者诸如XYZ、XY、YZ和XZ的X、Y和Z中的两个或更多个的任何组合。如文中所使用的，术语“和/或”包括所列相关项中的一个或多个的任何组合和所有组合。
应该理解的是，尽管在这里可使用术语第一、第二等来描述不同的元件，但是这些元件不应受这些术语的限制。这些术语仅是用来将一个元件与另一个元件区分开来。例如，在不脱离示例实施例的范围的情况下，第一元件可以被命名为第二元件，类似地，第二元件可以被命名为第一元件。
图1示意性地示出了根据本公开实施例的显示基板的平面示意图。图2示意性地示出了根据本公开一些实施例的显示基板沿图1中AA’截取的剖面图。
参照图1，显示基板包括开孔区域HA、位于开孔区域HA周边的缓冲区域BA、位于缓冲区域BA周边的显示区域AA，以及位于显示区域AA周边的周边区域NA。在该开孔区域HA，显示基板具有一个开孔100a，该开孔100a的边缘即为开孔区域HA的边缘。缓冲区域BA可以呈环状，位于显示区域AA与开孔区域HA之间，通过设置该缓冲区域BA，可以在形成开孔100a的切割工艺中起到缓冲作用，避免造成显示区域AA内相关结构的损伤。同时，该缓冲区域BA内还设置有相应的封装结构，用以阻挡水氧由显示基板的开孔100a边缘处向显示区域AA内的发光器件EM侵蚀。
例如，如图1所示，开孔区域HA靠近周边区域NA位于第二方向Y的一侧，且开孔区域HA的中心分别与周边区域NA位于第一方向X的两侧的距离大致相等。再例如，开孔区域HA也可以更靠近周边区域NA位于第一方向X的一侧。
需要说明的是，本文中所述的“开孔”是显示基板上用来安装硬件结构的区域，为了方便说明，本文将其称为开孔，但所述开孔包括但不限于如下形式：通孔、凹槽、开口等。可选地，所述硬件结构可以包括下列结构中的一种或多种：前置摄像头、HOME键、听筒或扬声器。所述硬件结构的具体安装方式，本公开实施例不做特别限定。另外，可以根据需要安装的所述硬件结构的形状确定所述开孔的形状，例如，所述开孔在平行于显示基板的衬底基板的方向上的截面可以具有下列形状的一种或多种：圆形、椭圆形、矩形、圆角矩形、正方形、菱形、梯形等。
结合参照图1与图2，显示基板包括衬底基板100、驱动电路层200、发光器件层300与封装层400。驱动电路层200位于衬底基板100上，驱动电路层200包括多个驱动电路单元DC与信号走线SL，多个驱动电路单元DC位于显示区域AA，信号走线SL的一部分位于显示区域AA与驱动电路单元DC电连接，信号走线SL的另一部分延伸至周边区域NA与缓冲区域BA。
发光器件层300位于驱动电路层200远离衬底基板100一侧，发光器件层300包括位于显示区域AA的多个发光器件EM，多个发光器件EM分别与多个驱动电路单元DC电连接，相电连接的一个发光器件EM与一个驱动电路单元DC构成一个子像素PX的至少一部分。
发光器件层300包括位于驱动电路层200远离衬底基板100一侧的第一电极层310、位于第一电极层310远离衬底基板100一侧像素界定层PDL、位于像素界定层PDL远离衬底基板100一侧的发光功能层320，以及位于发光功能层320远离衬底基板100一侧的第二电极层330。第一电极层310包括多个发光器件的第一电极部311，发光功能层320包括多个发光器件的发光功能部，第二电极层330包括多个发光器件的第二电极部，像素界定层PDL具有多个开口KK，多个开口KK分别暴露多个第一电极部311的至少一部分，多个发光功能部分别通过多个开口KK与多个第一电极部311连接。
封装层400位于发光器件层300远离衬底基板100一侧，封装层在衬底基板100上的正投影至少覆盖多个发光器件在衬底基板100上的正投影，从而实现对多个发光器件的封装。例如，封装层可以覆盖显示区域AA、周边区域的至少一部分以及缓冲区域BA的至少一部分。
参照图2，发光器件层300靠近衬底基板100一侧还设置有多个隔离柱510，多个隔离柱510位于缓冲区域BA，发光功能层320的至少一部分位于多个隔离柱510远离衬底基板100的一侧，同时，由于隔离柱510具有一定的隔断作用，发光功能层320在隔断柱510的侧壁处会断开，从而可以切断水氧沿发光功能层320由显示基板的开孔边缘处向显示区域AA内的发光器件入侵的路径。
然而，发明人经研究发现，封装层400位于多个隔离柱510远离衬底基板100一侧的部分的封装效果相较于位于显示区域AA的部分的封装效果变差，甚至封装层400位于多个隔离柱510远离衬底基板100一侧的部分还存在产生微裂纹的风险，从而会导致水氧以及其他杂质从该处入侵，进而导致封装失效的问题发生。为了避免该问题，本公开实施例的显示基板进一步还设置有至少一层阻挡层600，阻挡层600的材料包括无机绝缘材料，阻挡层600在衬底基板100上的正投影覆盖多个隔离柱510在衬底基板100上的正投影的至少一部分，阻挡层600在衬底基板100上的正投影与至少一部分开口KK在衬底基板100上的正投影相间隔。按照此设置，包括无机绝缘材料的阻挡层600可以起到有效地阻挡水氧以及其他杂质入侵至隔离柱510的效果，进而可以避免水氧等其他杂质由隔离柱510入侵至显示区域AA内的发光器件而导致显示不良的问题出现，即通过设置该阻挡层600可以大大提升显示基板位于开孔区域HA处的封装可靠性。
根据一些示例性的实施例，阻挡层600的材料可以包括氮化硅与氧化硅中的至少一者。例如，阻挡层600为单层的氮化硅膜层。
根据一些示例性的实施例，显示区域AA包括折叠显示区域，阻挡层600避开折叠显示区域设置，即阻挡层600在衬底基板100上的正投影与位于折叠显示区域内的各个开口KK在衬底基板100上的正投影相间隔，从而可以保证显示基板位于折叠显示区域的部分具有较好的折叠与反拱能力。
根据一些示例性的实施例，显示区域AA包括卷曲显示区域，阻挡层600避开卷曲显示区域设置，即阻挡层600在衬底基板100上的正投影与位于卷曲显示区域内的各个开口KK在衬底基板100上的正投影相间隔，从而可以保证显示基板位于卷曲显示区域的部分具有较好的卷曲与反拱能力。
根据一些示例性的实施例，参照图2，隔离柱510具有底切结构，隔离柱包括第一隔离部510a、第二隔离部510b与第三隔离部510c。第一隔离部510a可以位于层间绝缘层ILD远离衬底基板100的一侧，第二隔离部510b位于第一隔离部510a远离衬底基板100的一侧，第三隔离部510c位于第二隔离部510b远离衬底基板100的一侧。第二隔离部510b在衬底基板100上的正投影位于第三隔离部510c在衬底基板100上的正投影以内。即第二隔离部510b的边缘相较于第三隔离部510c的边缘内缩，第二隔离部510b与第三隔离部510c形成底切结构，以实现较好的隔断效果。
例如，第一隔离部510a与第三隔离部510c的材料包括钛，第二隔离部510b的材料包括铝。刻蚀形成该隔离柱510的工艺可以为湿法刻蚀工艺，该湿法刻蚀工艺中所使用的刻蚀液与铝的反应速率显著大于与钛的刻蚀速率，因此，可以使得第二隔离部510b所在的层被刻蚀去除的部分相较于第三隔离部510c所在的层被刻蚀去除的部分更多，从而使得在刻蚀形成的隔离柱中，第二隔离部510b的边缘相较于第三隔离部510c的边缘内缩。
根据一些示例性的实施例，发光器件可以为有机发光二极管(OLED)。例如，发光器件可以为顶发射结构的OLED，可以发红光、绿光、蓝光或白光等。例如，该发光器件为微型OLED(Micro OLED)。本公开的实施例对发光器件的具体结构不作限制。例如，该发光器件的第一电极部为OLED的阳极，第二电极部为OLED的阴极。
根据一些示例性的实施例，衬底基板可以采用刚性基板，例如玻璃基板、硅基板等，也可以由具有优良的耐热性和耐久性的柔性材料形成，例如聚酰亚胺(PI)、聚碳酸酯(PC)、聚乙烯对苯二甲酸乙二醇酯(PET)、聚乙烯、聚丙烯酸酯、多芳基化合物、聚醚酰亚胺、聚醚砜、聚乙二醇对苯二甲酸酯(PET)、聚乙烯(PE)、聚丙烯(PP)、聚砜(PSF)、聚甲基丙烯酸甲酯(PMMA)、三醋酸纤维素(TAC)、环烯烃聚合物(COP)和环烯烃共聚物(COC)等。
根据一些示例性的实施例，参照图2，驱动电路层200可以包括位于衬底基板100上的有源层ACT、位于有源层ACT远离衬底基板100一侧的第一栅绝缘层GI1、位于第一栅绝缘层GI1远离衬底基板100一侧的第一栅金属层Gate1、位于第一栅金属层Gate1远离衬底基板100一侧的第二栅绝缘层GI2、位于第二栅绝缘层GI2远离衬底基板100一侧的第二栅金属层Gate2、位于第二栅金属层Gate2远离衬底基板100一侧的层间绝缘层ILD、位于层间绝缘层ILD远离衬底基板100一侧的源漏金属层SD、位于源漏金属层SD远离衬底基板100一侧的平坦化层PLN。
根据一些示例性的实施例，隔离柱510可以位于源漏金属层SD。
根据一些示例性的实施例，隔离柱510靠近衬底基板100的一侧还包括第一垫高部530与第二垫高部540，第一垫高部530可以位于第一栅金属层Gatel，第二垫高部540可以位于第二栅金属层Gate2。
根据一些示例性的实施例，参照图2，所述阻挡层600远离所述开孔区域HA的边缘位于最靠近所述缓冲区域BA的所述开口KK靠近所述缓冲区域BA的一侧。即，阻挡层600位于显示区域AA以外，显示区域AA内的各处均不设置阻挡层600，以保证显示区域AA中膜层的一致性，进而保证显示均一性。
根据一些示例性的实施例，参照图2，考虑到构图工艺中的刻蚀宽度波动以及对位波动等因素的影响，阻挡层600远离开孔区域HA的边缘与最靠近缓冲区域BA的开口KK之间需间隔一定的距离，从而避免因工艺波动导致阻挡层600覆盖至显示区域AA。例如，阻挡层600在衬底基板100上的正投影与最靠近缓冲区域BA的开口KK在衬底基板100上的正投影间的间距a可以设置为大于等于5μm。，
图3示意性地示出了根据本公开一些实施例的显示基板沿图1中AA’截取的剖面图。
根据一些示例性的实施例，参照图3，显示基板还可以包括位于衬底基板100上的挡墙Dam，挡墙Dam位于缓冲区域BA且至少部分环绕开孔区域HA设置，例如，挡墙Dam可以呈环绕开孔区域HA的环形。多个隔离柱510包括位于挡墙Dam靠近开孔区域HA一侧的多个第一隔离柱511与位于挡墙Dam远离开孔区域HA一侧的多个第二隔离柱512。封装层400包括第一无机封装层410、位于第一无机封装层410远离衬底基板100一侧的有机封装层420，以及位于有机封装层420远离衬底基板100一侧的第二无机封装层430。第一无机封装层410靠近开孔区域HA的边缘位于挡墙Dam靠近开孔区域HA的一侧，第二无机封装层430靠近开孔区域HA的边缘位于挡墙Dam靠近开孔区域HA的一侧，有机封装层420靠近开孔区域HA的边缘位于挡墙Dam远离开孔区域HA的一侧。有机封装层420在衬底基板100上的正投影覆盖多个第二隔离柱512在衬底基板100上的正投影，有机封装层420在衬底基板100上的正投影与多个第一隔离柱511在衬底基板100上的正投影相间隔。因此，有机封装层420可以将第二隔离柱512形成的不平坦图案填平，相较于第二无机封装层430位于第一隔离柱511上的部分，第二无机封装层430位于第二隔离柱512上的部分出现微裂纹进而引发封装失效的风险相对较小，基于此，可以至少在第一隔离柱511的上方设置阻挡层600，即阻挡层600在衬底基板100上的正投影覆盖多个第一隔离柱511在衬底基板100上的正投影的至少一部分。
根据一些示例性的实施例，参照图3，阻挡层600远离开孔区域HA的边缘位于最靠近挡墙Dam的第一隔离柱511远离开孔区域HA的一侧，即阻挡层600可以至少覆盖多个第一隔离柱511。
根据一些示例性的实施例，参照图3，阻挡层600远离开孔区域HA的边缘位于最靠近挡墙Dam的第二隔离柱512靠近开孔区域HA的一侧，即阻挡层600远离开孔区域HA的边缘截止于多个第二隔离柱512靠近开孔区域HA的一侧，阻挡层600可以不覆盖第二隔离柱512。例如，阻挡层600远离开孔区域HA的边缘在衬底基板100上的正投影位于挡墙Dam在衬底基板100上的正投影内。
根据一些示例性的实施例，返回参照图2，也可以根据实际的工艺需求，在多个第一隔离柱511与多个第二隔离柱512的上方均设置阻挡层600，阻挡层600在衬底基板100上的正投影覆盖多个第一隔离柱511与多个第二隔离柱512在衬底基板100上的正投影，即阻挡层600远离开孔区域HA的边缘位于最靠近显示区域AA的第二隔离柱512远离开孔区域HA的一侧。
根据一些示例性的实施例，结合参照图1与图2，阻挡层600靠近开孔区域HA的边缘可以与开孔100a的边缘基本齐平。
图4示意性地示出了根据本公开一些实施例的显示基板沿图1中AA’截取的剖面图。
根据一些示例性的实施例，参照图4，显示基板还包括位于封装层400远离衬底基板100一侧的触控层700，触控层700包括位于封装层400远离衬底基板100一侧的第一触控绝缘层710、位于第一触控绝缘层710远离衬底基板100一侧的第一触控金属层730、位于第一触控金属层730远离衬底基板100一侧的第二触控绝缘层720，以及位于第二触控绝缘层720远离衬底基板100一侧的第二触控金属层740。第一触控金属层730与第二触控金属层740中设置有多个触控电极与多条触控走线，触控电极布置于显示区域AA内，触控走线的一端与触控电极电连接且另一端延伸至周边区域并与驱动芯片电连接，从而实现显示区域AA内的触控功能。第一触控绝缘层710用于将第一触控金属层730与下层其他膜层进行隔离，第二触控绝缘层720用于将第一触控金属层730中的部分结构与第二触控金属层740中的部分结构进行绝缘。
第一触控绝缘层710与第二触控绝缘层720除了设置于显示区域AA内的部分之外，还可以进一步延伸设置于缓冲区域BA中，即第一触控绝缘层710在衬底基板100上的正投影覆盖多个隔离柱在衬底基板100上的正投影的至少一部分，第二触控绝缘层720在衬底基板100上的正投影覆盖多个隔离柱在衬底基板100上的正投影的至少一部分。第一触控绝缘层710与第二触控绝缘层720位于缓冲区域BA的部分可以进一步提升显示基板位于开孔区域HA处的封装可靠性。
根据一些示例性的实施例，第一触控绝缘层710与第二触控绝缘层720中的至少一者包括有机绝缘材料。包括有机绝缘材料的触控绝缘层的反拱能力比包括无机绝缘材料的触控绝缘层的反拱能力更强，因此将第一触控绝缘层710与第二触控绝缘层720中的至少一者设置为包括有机绝缘材料，可以提升显示基板的反拱能力，从而满足显示基板的折叠或卷曲需求。
根据一些示例性的实施例，第一触控绝缘层710包括无机绝缘材料，第二触控绝缘层720包括有机绝缘材料。例如，第一触控绝缘层710的材料包括氮化硅或氧化硅中的至少一者，第二触控绝缘层720的材料包括有机聚合物材料。
根据一些示例性的实施例，参照图4，至少一层阻挡层600位于第二无机封装层430与第一触控绝缘层710之间，阻挡层600分别与第二无机封装层430以及第一触控绝缘层710连接，即阻挡层600与第二无机封装层430远离衬底基板100的表面的至少一部分直接连接，且阻挡层600与第一触控绝缘层710靠近衬底基板100的表面的至少一部分直接连接。按此设置，在多个隔离柱的远离衬底基板100的一侧设置有由第二无机封装层430、阻挡层600以及第一触控绝缘层710构成的无机绝缘一体结构，该无机绝缘一体结构由三层包含无机绝缘绝缘材料的膜层堆叠形成，厚度较厚，可以实现较好的阻挡水氧以及其他杂质入侵的效果。
例如，第二无机封装层430、阻挡层600以及第一触控绝缘层710的材料相同，示例性地，第二无机封装层430、阻挡层600以及第一触控绝缘层710的材料均包括氮化硅。
图5示意性地示出了根据本公开一些实施例的显示基板沿图1中AA’截取的剖面图。
根据一些示例性的实施例，参照图5，至少一层阻挡层600位于第一触控绝缘层710与第二触控绝缘层720之间，第一触控绝缘层710分别与第一触控绝缘层710以及阻挡层600直接连接。按此设置，在多个隔离柱510的远离衬底基板100的一侧设置有由第二无机封装层430、第一触控绝缘层710以及阻挡层600构成的无机绝缘一体结构，该无机绝缘一体结构由三层包含无机绝缘绝缘材料的膜层堆叠形成，厚度较厚，可以实现较好的阻挡水氧以及其他杂质入侵的效果。
图6示意性地示出了根据本公开一些实施例的显示基板沿图1中AA’截取的剖面图。
根据一些示例性的实施例，参照图6，显示基板还包括位于触控层700远离衬底基板100一侧的有机保护层800，至少一层阻挡层600位于第二触控绝缘层720与有机保护层800之间。即阻挡层600位于第二触控绝缘层720远离衬底基板100的一侧，而第二触控绝缘层720包括有机绝缘材料，第二触控绝缘层720远离衬底基板100的表面平坦性较高，使得形成于第二触控绝缘层720上的阻挡层600产生微裂纹的风险小，其膜质更为致密，可以起到较好的阻挡水氧以及其他杂质入侵的效果。
图7示意性地示出了根据本公开一些实施例的显示基板沿图1中AA’截取的剖面图。
根据一些示例性的实施例，参照图7，显示基板还包括位于触控层700远离衬底基板100一侧的有机保护层800，至少一层阻挡层600位于有机保护层800远离衬底基板100的一侧。有机保护层800包括有机绝缘材料，有机保护层800远离衬底基板100的表面平坦性较高，使得形成于有机保护层800上的阻挡层600产生微裂纹的风险小，其膜质更为致密，可以起到较好的阻挡水氧以及其他杂质入侵的效果。
图8示意性地示出了根据本公开一些实施例的显示基板沿图1中AA’截取的剖面图。
根据一些示例性的实施例，参照图8，第一触控绝缘层710包括有机绝缘材料，并且第二触控绝缘层720包括有机绝缘材料。即将第一触控绝缘层710与第二触控绝缘层720均设置为包括有机绝缘材料的膜层，可以有效提升显示基板的反拱能力，从而满足显示基板的折叠或卷曲需求。
根据一些示例性的实施例，参照图8，至少一层阻挡层600位于封装层400与第一触控绝缘层710之间，即阻挡层600与第二无机封装层430远离衬底基板100的表面的至少一部分直接连接。按此设置，在多个隔离柱510的远离衬底基板100的一侧设置有由第二无机封装层430与阻挡层600构成的无机绝缘一体结构，该无机绝缘一体结构由两层包含无机绝缘绝缘材料的膜层堆叠形成，厚度较厚，可以实现较好的阻挡水氧以及其他杂质入侵的效果。
图9示意性地示出了根据本公开一些实施例的显示基板沿图1中AA’截取的剖面图。
根据一些示例性的实施例，参照图9，至少一层阻挡层600位于第一触控绝缘层710与第二触控绝缘层720之间，且第一触控绝缘层710包括有机绝缘材料，第二触控绝缘层720包括有机绝缘材料。即阻挡层600位于第一触控绝缘层710远离衬底基板100的一侧，而第一触控绝缘层710包括有机绝缘材料，第一触控绝缘层710远离衬底基板100的表面平坦性较高，使得形成于第一触控绝缘层710上的阻挡层600产生微裂纹的风险小，其膜质更为致密，可以起到较好的阻挡水氧以及其他杂质入侵的效果。
图10示意性地示出了根据本公开一些实施例的显示基板沿图1中AA’截取的剖面图。
根据一些示例性的实施例，参照图10，显示基板还包括位于触控层700远离衬底基板100一侧的有机保护层800，至少一层阻挡层600位于第二触控绝缘层720与有机保护层800之间。即阻挡层600位于第二触控绝缘层720远离衬底基板100的一侧，而位于阻挡层600靠近衬底基板100一侧的第一触控绝缘层710与第二触控绝缘层720均包括有机绝缘材料，第二触控绝缘层720远离衬底基板100的表面平坦性较高，使得形成于第二触控绝缘层720上的阻挡层600产生微裂纹的风险小，其膜质更为致密，可以起到较好的阻挡水氧以及其他杂质入侵的效果。
图11示意性地示出了根据本公开一些实施例的显示基板沿图1中AA’截取的剖面图。
根据一些示例性的实施例，参照图11，显示基板还包括位于触控层700远离衬底基板100一侧的有机保护层800，至少一层阻挡层600位于有机保护层800远离衬底基板100的一侧。有机保护层800包括有机绝缘材料，即位于阻挡层600靠近衬底基板100一侧的第一触控绝缘层710、第二触控绝缘层720与有机保护层800均包括有机绝缘材料，有机保护层800远离衬底基板100的表面平坦性较高，使得形成于有机保护层800上的阻挡层600产生微裂纹的风险小，其膜质更为致密，可以起到较好的阻挡水氧以及其他杂质入侵的效果。
根据一些示例性的实施例，阻挡层600的厚度为2000-6000埃。
例如，当第一触控绝缘层710包括无机绝缘材料，第二触控绝缘层720包括有机绝缘材料时，阻挡层600的厚度可以为2000-4000埃。
例如，当第一触控绝缘层710包括有机绝缘材料，第二触控绝缘层720包括有机绝缘材料时，阻挡层600的厚度可以为4000-6000埃。
根据一些示例性的实施例，参照图4，显示基板还包括位于有机保护层800远离衬底基板100一侧的模组堆叠结构900。例如，模组堆叠结构900可以包括位于有机保护层800远离衬底基板100一侧的偏光层以及位于偏光层远离衬底基板100一侧的保护盖板。
图12示意性地示出了根据本公开实施例的显示基板的制备方法的流程图。
根据一些示例性的实施例，参照图1，显示基板包括开孔区域HA、位于开孔区域HA周边的缓冲区域BA以及位于缓冲区域BA周边的显示区域AA，参照图12，显示基板的制备方法包括如下步骤S10～S60。
在步骤S10中，在衬底基板上形成驱动电路层。
在步骤S20中，在衬底基板上形成多个隔离柱，多个隔离柱位于缓冲区域。
在步骤S30中，在驱动电路层与多个隔离柱远离衬底基板的一侧形成发光器件层和像素界定层，发光器件层包括位于驱动电路层远离衬底基板一侧的第一电极层，像素界定层位于第一电极层远离衬底基板的一侧，第一电极层包括多个第一电极部，像素界定层包括多个开口，多个开口分别暴露多个第一电极部的至少一部分。
在步骤S40中，在发光器件层远离衬底基板的一侧形成封装层。
在步骤S50中，在封装层远离衬底基板的一侧形成阻挡材料膜层，阻挡材料膜层的材料包括无机绝缘材料。
在步骤S60中，在开孔区域中形成开孔，阻挡材料膜层保留的部分形成阻挡层，阻挡层在衬底基板上的正投影覆盖多个隔离柱在衬底基板上的正投影的至少一部分，且阻挡层在衬底基板上的正投影与至少一部分开口在衬底基板上的正投影相间隔。
图13A－图13H示意性地示出了根据本公开一些实施例的显示基板的形成过程图。
参照图13A，在衬底基板100上形成驱动电路层200、多个隔离柱510与挡墙Dam。
例如，形成驱动电路层200可以包括在衬底基板100上形成有源层ACT、在有源层ACT远离衬底基板100的一侧形成第一栅绝缘层GI1、在第一栅绝缘层GI1远离衬底基板100的一侧形成第一栅金属层Gatel、在第一栅金属层Gate1远离衬底基板100的一侧形成第二栅绝缘层GI2、在第二栅绝缘层GI2远离衬底基板100的一侧形成第二栅金属层Gate2、在第二栅金属层Gate2远离衬底基板100的一侧形成层间绝缘层ILD、在层间绝缘层ILD远离衬底基板100的一侧形成源漏金属层SD、在源漏金属层SD远离衬底基板100的一侧形成平坦化层PLN。
例如，在形成驱动电路层200中的至少部分层的同时一并形成挡墙Dam，即挡墙Dam位于驱动电路层200，挡墙Dam位形成于缓冲区域BA且至少部分环绕开孔区域HA设置。
例如，在形成源漏金属层SD的同时一并形成多个隔离柱510，即多个隔离柱510位于源漏金属层SD。多个隔离柱510包括位于挡墙Dam靠近开孔区域HA一侧的至少一个第一隔离柱511与位于挡墙Dam远离开孔区域HA一侧的至少一个第二隔离柱512。
参照图13B，在驱动电路层200与多个隔离柱510远离衬底基板100的一侧形成发光器件层300与像素界定层PDL，发光器件层300包括位于驱动电路层200远离衬底基板100一侧的第一电极层310、位于第一电极层310远离衬底基板100一侧的发光功能层320以及位于发光功能层320远离衬底基板100一侧的第二电极层330，像素界定层PDL位于与第一电极层310与发光功能层320之间。第一电极层310包括多个第一电极部311，像素界定层PDL包括多个开口KK，多个开口KK分别暴露多个第一电极部311的至少一部分，发光功能层320通过开口KK与第一电极部311连接。
例如，发光功能层320可以包括第一公共功能层、发光层与第二公共功能层。第一公共功能层与第二公共功能层通过蒸镀工艺形成，在该蒸镀过程中使用开放式掩模板(Open Mask)，第一公共功能层与第二公共功能层会在缓冲区域BA蒸镀沉积，由于缓冲区域BA具有隔离柱510，形成于隔离柱510上方的第一公共功能层与第二公共功能层会在隔离柱的侧壁处断开，从而切断了水氧在第一公共功能层与第二公共功能层中的入侵路径。发光层同样通过蒸镀工艺形成，在该蒸镀过程中使用高精度金属掩模板(FMM)，发光层基本仅形成于像素界定层PDL的开口KK内。
例如，第一公共功能层可以包括空穴注入层与空穴传输层，第二公共功能层可以包括电子传输层与电子注入层。
例如，第二电极层330通过蒸镀工艺形成，在该蒸镀过程中使用开放式掩模板(Open Mask)，第二电极层330会在缓冲区域BA蒸镀沉积，由于缓冲区域BA具有隔离柱510，形成于隔离柱510上方的第二电极层330会在隔离柱510的侧壁处断开，从而切断了水氧在第二电极层330中的入侵路径。
参照图13C，在发光器件层300远离衬底基板100的一侧形成封装层400，封装层400包括第一无机封装层410、位于第一无机封装层410远离衬底基板100一侧的有机封装层420，以及位于有机封装层420远离衬底基板100一侧的第二无机封装层430。第一无机封装层410靠近开孔区域HA的边缘位于挡墙Dam靠近开孔区域HA的一侧，第二无机封装层430靠近开孔区域HA的边缘位于挡墙Dam靠近开孔区域HA的一侧，有机封装层420靠近开孔区域HA的边缘位于挡墙Dam远离开孔区域HA的一侧。
参照图13D，在封装层400远离衬底基板100的一侧形成阻挡材料膜层610，阻挡材料膜层610的材料包括无机绝缘材料。例如，阻挡材料膜层610可以为单层的氮化硅膜层，阻挡材料膜层610通过化学气相沉积工艺与构图工艺形成。
例如，结合参照图13G，阻挡材料膜层610包括位于开孔区域HA的第一部分611与位于缓冲区域BA的第二部分612，第一部分611与第二部分612直接连接，第一部分611基本覆盖开孔区域HA。例如，第一部分611与第二部分612为一体结构。
例如，结合参照图13H，阻挡材料膜层610包括位于开孔区域HA的第一部分611与位于缓冲区域BA的第二部分612，第一部分611与第二部分612直接连接，第一部分611覆盖开孔区域HA靠近缓冲区域BA的部分区域，第一部分611具有镂空结构611a。例如，第一部分611与第二部分612为一体结构，第一部分611呈环状。
参照图13E，在阻挡材料膜层610远离衬底基板100的一侧形成触控层700，在触控层700远离衬底基板100的一侧形成有机保护层800，在有机保护层800远离衬底基板100的一侧形成模组堆叠结构900。触控层700包括位于封装层400远离衬底基板100一侧的第一触控绝缘层710、位于第一触控绝缘层710远离衬底基板100一侧的第一触控金属层730、位于第一触控金属层730远离衬底基板100一侧的第二触控绝缘层720，以及位于第二触控绝缘层720远离衬底基板100一侧的第二触控金属层740。
例如，第一触控绝缘层710的材料包括无机绝缘材料，示例性地，第一触控绝缘层710的材料包括氮化硅与氧化硅中的至少一者，第一触控绝缘层710通过化学气相沉积工艺形成。
例如，第二触控绝缘层720的材料包括有机绝缘材料，示例性地，第二触控绝缘层720的材料包括有机光阻材料，第二触控绝缘层720通过涂布工艺形成。
结合参照图13E与图13F，形成位于开孔区域HA的开孔100a，阻挡材料膜层610保留的部分形成阻挡层600，阻挡层600在衬底基板100上的正投影覆盖多个隔离柱510在衬底基板100上的正投影的至少一部分，且阻挡层600在衬底基板100上的正投影与至少一部分开口KK在衬底基板100上的正投影相间隔。
例如，通过激光切割工艺形成开孔100a，该开孔100a的边缘基本与预设的开孔区域HA的边缘齐平。阻挡材料膜层610中的第二部分612被切割去除，仅保留位于缓冲区域BA的第二部分612。
图14A-图14F示意性地示出了根据本公开一些实施例的显示基板的形成过程图。
参照图14A，在衬底基板100上形成驱动电路层200、多个隔离柱510与挡墙Dam。
参照图14B，在驱动电路层200与多个隔离柱510远离衬底基板100的一侧形成发光器件层300与像素界定层PDL，发光器件层300包括位于驱动电路层200远离衬底基板100一侧的第一电极层310、位于第一电极层310远离衬底基板100一侧的发光功能层320以及位于发光功能层320远离衬底基板100一侧的第二电极层330，像素界定层PDL位于与第一电极层310与发光功能层320之间。第一电极层310包括多个第一电极部311，像素界定层PDL包括多个开口KK，多个开口KK分别暴露多个第一电极部311的至少一部分，发光功能层320通过开口KK与第一电极部311连接。
参照图14C，在发光器件层300远离衬底基板100的一侧形成封装层400，封装层400包括第一无机封装层410、位于第一无机封装层410远离衬底基板100一侧的有机封装层420，以及位于有机封装层420远离衬底基板100一侧的第二无机封装层430。
参照图14D，在封装层400远离衬底基板100的一侧形成第一触控绝缘层710，在第一触控绝缘层710远离衬底基板100的一侧形成第一触控金属层730与阻挡材料膜层610。阻挡材料膜层610的材料包括无机绝缘材料。例如，阻挡材料膜层610可以为单层的氮化硅膜层，阻挡材料膜层610通过化学气相沉积工艺与构图工艺形成。
例如，第一触控绝缘层710的材料包括无机绝缘材料，示例性地，第一触控绝缘层710的材料包括氮化硅与氧化硅中的至少一者。
参照图14E，在第一触控金属层730与阻挡材料膜层610远离衬底基板100的一侧形成第二触控绝缘层720，在第二触控绝缘层720远离衬底基板100的一侧形成第二触控金属层740，在第二触控金属层740远离衬底基板100的一侧形成有机保护层800，在有机保护层800远离衬底基板100的一侧形成模组堆叠结构900。第一触控绝缘层710、第一触控金属层730、第二触控绝缘层720与第二触控金属层740构成触控层700。
例如，第二触控绝缘层720的材料包括有机绝缘材料，示例性地，第二触控绝缘层720的材料包括有机光阻材料。
结合参照图14E与参照图14F，形成位于开孔区域HA的开孔100a，阻挡材料膜层610保留的部分形成阻挡层600，阻挡层600在衬底基板100上的正投影覆盖多个隔离柱510在衬底基板100上的正投影的至少一部分，且阻挡层600在衬底基板100上的正投影与至少一部分开口KK在衬底基板100上的正投影相间隔。
图15A-图15F示意性地示出了根据本公开一些实施例的显示基板的形成过程图。
参照图15A，在衬底基板100上形成驱动电路层200、多个隔离柱510与挡墙Dam。
参照图15B，在驱动电路层200与多个隔离柱510远离衬底基板100的一侧形成发光器件层300与像素界定层PDL，发光器件层300包括位于驱动电路层200远离衬底基板100一侧的第一电极层310、位于第一电极层310远离衬底基板100一侧的发光功能层320以及位于发光功能层320远离衬底基板100一侧的第二电极层330，像素界定层PDL位于与第一电极层310与发光功能层320之间。第一电极层310包括多个第一电极部311，像素界定层PDL包括多个开口KK，多个开口KK分别暴露多个第一电极部311的至少一部分，发光功能层320通过开口KK与第一电极部311连接。
参照图15C，在发光器件层300远离衬底基板100的一侧形成封装层400，封装层400包括第一无机封装层410、位于第一无机封装层410远离衬底基板100一侧的有机封装层420，以及位于有机封装层420远离衬底基板100一侧的第二无机封装层430。
参照图15D，在封装层远离衬底基板100的一侧形成触控层700，触控层700包括位于封装层400远离衬底基板100一侧的第一触控绝缘层710、位于第一触控绝缘层710远离衬底基板100一侧的第一触控金属层730、位于第一触控金属层730远离衬底基板100一侧的第二触控绝缘层720，以及位于第二触控绝缘层720远离衬底基板100一侧的第二触控金属层740。在第二触控金属层740远离衬底基板100的一侧形成阻挡材料膜层610。阻挡材料膜层610的材料包括无机绝缘材料。
例如，阻挡材料膜层610可以为单层的氮化硅膜层，阻挡材料膜层610通过化学气相沉积工艺与构图工艺形成。
例如，第一触控绝缘层710的材料包括无机绝缘材料，示例性地，第一触控绝缘层710的材料包括氮化硅与氧化硅中的至少一者。
例如，第二触控绝缘层720的材料包括有机绝缘材料，示例性地，第二触控绝缘层720的材料包括有机光阻材料。
参照图15E，在第二触控金属层740与阻挡材料膜层610远离衬底基板100的一侧形成有机保护层800，在有机保护层800远离衬底基板100的一侧形成模组堆叠结构900。
结合参照图15E与参照图15F，形成位于开孔区域HA的开孔100a，阻挡材料膜层610保留的部分形成阻挡层600，阻挡层600在衬底基板100上的正投影覆盖多个隔离柱510在衬底基板100上的正投影的至少一部分，且阻挡层600在衬底基板100上的正投影与至少一部分开口KK在衬底基板100上的正投影相间隔。
图16A-图16F示意性地示出了根据本公开一些实施例的显示基板的形成过程图。
参照图16A，在衬底基板100上形成驱动电路层200、多个隔离柱510与挡墙Dam。
参照图16B，在驱动电路层200与多个隔离柱510远离衬底基板100的一侧形成发光器件层300与像素界定层PDL，发光器件层300包括位于驱动电路层200远离衬底基板100一侧的第一电极层310、位于第一电极层310远离衬底基板100一侧的发光功能层320以及位于发光功能层320远离衬底基板100一侧的第二电极层330，像素界定层PDL位于与第一电极层310与发光功能层320之间。第一电极层310包括多个第一电极部311，像素界定层PDL包括多个开口KK，多个开口KK分别暴露多个第一电极部311的至少一部分，发光功能层320通过开口KK与第一电极部311连接。
参照图16C，在发光器件层300远离衬底基板100的一侧形成封装层400，封装层400包括第一无机封装层410、位于第一无机封装层410远离衬底基板100一侧的有机封装层420，以及位于有机封装层420远离衬底基板100一侧的第二无机封装层430。
参照图16D，在封装层400远离衬底基板100的一侧形成触控层700，触控层700包括位于封装层400远离衬底基板100一侧的第一触控绝缘层710、位于第一触控绝缘层710远离衬底基板100一侧的第一触控金属层730、位于第一触控金属层730远离衬底基板100一侧的第二触控绝缘层720，以及位于第二触控绝缘层720远离衬底基板100一侧的第二触控金属层740。在第二触控金属层740远离衬底基板100的一侧形成有机保护层800，在有机保护层800远离衬底基板100的一侧形成阻挡材料膜层610。阻挡材料膜层610的材料包括无机绝缘材料。
例如，阻挡材料膜层610可以为单层的氮化硅膜层，阻挡材料膜层610通过化学气相沉积工艺与构图工艺形成。
例如，第一触控绝缘层710的材料包括无机绝缘材料，示例性地，第一触控绝缘层710的材料包括氮化硅与氧化硅中的至少一者。
例如，第二触控绝缘层720的材料包括有机绝缘材料，示例性地，第二触控绝缘层720的材料包括有机光阻材料。
参照图16E，在有机保护层800远离衬底基板100的一侧形成模组堆叠结构900。
结合参照图16E与参照图16F，形成位于开孔区域HA的开孔100a，阻挡材料膜层610保留的部分形成阻挡层600，阻挡层600在衬底基板100上的正投影覆盖多个隔离柱在衬底基板100上的正投影的至少一部分，且阻挡层600在衬底基板100上的正投影与至少一部分开口KK在衬底基板100上的正投影相间隔。
图17A-图17F示意性地示出了根据本公开一些实施例的显示基板的形成过程图。
参照图17A，在衬底基板100上形成驱动电路层200、多个隔离柱510与挡墙Dam。
参照图17B，在驱动电路层200与多个隔离柱510远离衬底基板100的一侧形成发光器件层300与像素界定层PDL，发光器件层300包括位于驱动电路层200远离衬底基板100一侧的第一电极层310、位于第一电极层310远离衬底基板100一侧的发光功能层320以及位于发光功能层320远离衬底基板100一侧的第二电极层330，像素界定层PDL位于与第一电极层310与发光功能层320之间。第一电极层310包括多个第一电极部311，像素界定层PDL包括多个开口KK，多个开口KK分别暴露多个第一电极部311的至少一部分，发光功能层320通过开口KK与第一电极部311连接。
参照图17C，在发光器件层300远离衬底基板100的一侧形成封装层400，封装层400包括第一无机封装层410、位于第一无机封装层410远离衬底基板100一侧的有机封装层420，以及位于有机封装层420远离衬底基板100一侧的第二无机封装层430。第一无机封装层410靠近开孔区域HA的边缘位于挡墙Dam靠近开孔区域HA的一侧，第二无机封装层430靠近开孔区域HA的边缘位于挡墙Dam靠近开孔区域HA的一侧，有机封装层420靠近开孔区域HA的边缘位于挡墙Dam远离开孔区域HA的一侧。
参照图17D，在封装层400远离衬底基板100的一侧形成阻挡材料膜层610，阻挡材料膜层610的材料包括无机绝缘材料。例如，阻挡材料膜层610可以为单层的氮化硅膜层，阻挡材料膜层610通过化学气相沉积工艺与构图工艺形成。
参照图17E，在阻挡材料膜层610远离衬底基板100的一侧形成触控层700，在触控层700远离衬底基板100的一侧形成有机保护层800，在有机保护层800远离衬底基板100的一侧形成模组堆叠结构900。触控层700包括位于封装层400远离衬底基板100一侧的第一触控绝缘层710、位于第一触控绝缘层710远离衬底基板100一侧的第一触控金属层730、位于第一触控金属层730远离衬底基板100一侧的第二触控绝缘层720，以及位于第二触控绝缘层720远离衬底基板100一侧的第二触控金属层740。
例如，第一触控绝缘层710的材料包括有机绝缘材料，示例性地，第一触控绝缘层710的材料包括有机光阻材料，第一触控绝缘层710通过涂布工艺形成。
例如，第二触控绝缘层720的材料包括有机绝缘材料，示例性地，第二触控绝缘层720的材料包括有机光阻材料，第二触控绝缘层720通过涂布工艺形成。
结合参照图17E与参照图17F，形成位于开孔区域HA的开孔100a，阻挡材料膜层610保留的部分形成阻挡层600，阻挡层600在衬底基板100上的正投影覆盖多个隔离柱510在衬底基板100上的正投影的至少一部分，且阻挡层600在衬底基板100上的正投影与至少一部分开口KK在衬底基板100上的正投影相间隔。
图18A-图18F示意性地示出了根据本公开一些实施例的显示基板的形成过程图。
参照图18A，在衬底基板100上形成驱动电路层200、多个隔离柱510与挡墙Dam。
参照图18B，在驱动电路层200与多个隔离柱510远离衬底基板100的一侧形成发光器件层300与像素界定层PDL，发光器件层300包括位于驱动电路层200远离衬底基板100一侧的第一电极层310、位于第一电极层310远离衬底基板100一侧的发光功能层320以及位于发光功能层320远离衬底基板100一侧的第二电极层330，像素界定层PDL位于与第一电极层310与发光功能层320之间。第一电极层310包括多个第一电极部311，像素界定层PDL包括多个开口KK，多个开口KK分别暴露多个第一电极部311的至少一部分，发光功能层320通过开口KK与第一电极部311连接。
参照图18C，在发光器件层300远离衬底基板100的一侧形成封装层400，封装层400包括第一无机封装层410、位于第一无机封装层410远离衬底基板100一侧的有机封装层420，以及位于有机封装层420远离衬底基板100一侧的第二无机封装层430。
参照图18D，在封装层400远离衬底基板100的一侧形成第一触控绝缘层710，在第一触控绝缘层710远离衬底基板100的一侧形成第一触控金属层730与阻挡材料膜层610。阻挡材料膜层610的材料包括无机绝缘材料。例如，阻挡材料膜层610可以为单层的氮化硅膜层，阻挡材料膜层610通过化学气相沉积工艺与构图工艺形成。
例如，第一触控绝缘层710的材料包括有机绝缘材料，示例性地，第一触控绝缘层710的材料包括有机光阻材料，第一触控绝缘层710通过涂布工艺形成。
参照图18E，在第一触控金属层730与阻挡材料膜层610远离衬底基板100的一侧形成第二触控绝缘层720，在第二触控绝缘层720远离衬底基板100的一侧形成第二触控金属层740，在第二触控金属层740远离衬底基板100的一侧形成有机保护层800，在有机保护层800远离衬底基板100的一侧形成模组堆叠结构900。第一触控绝缘层710、第一触控金属层730、第二触控绝缘层720与第二触控金属层740构成触控层700。
例如，第二触控绝缘层720的材料包括有机绝缘材料，示例性地，第二触控绝缘层720的材料包括有机光阻材料。
结合参照图18E与参照图18F，形成位于开孔区域HA的开孔，阻挡材料膜层610保留的部分形成阻挡层600，阻挡层600在衬底基板100上的正投影覆盖多个隔离柱510在衬底基板100上的正投影的至少一部分，且阻挡层600在衬底基板100上的正投影与至少一部分开口KK在衬底基板100上的正投影相间隔。
图19A-图19F示意性地示出了根据本公开一些实施例的显示基板的形成过程图。
参照图19A，在衬底基板100上形成驱动电路层200、多个隔离柱510与挡墙Dam。
参照图19B，在驱动电路层200与多个隔离柱510远离衬底基板100的一侧形成发光器件层300与像素界定层PDL，发光器件层300包括位于驱动电路层200远离衬底基板100一侧的第一电极层310、位于第一电极层310远离衬底基板100一侧的发光功能层320以及位于发光功能层320远离衬底基板100一侧的第二电极层330，像素界定层PDL位于与第一电极层310与发光功能层320之间。第一电极层310包括多个第一电极部311，像素界定层PDL包括多个开口KK，多个开口KK分别暴露多个第一电极部311的至少一部分，发光功能层320通过开口KK与第一电极部311连接。
参照图19C，在发光器件层300远离衬底基板100的一侧形成封装层400，封装层400包括第一无机封装层410、位于第一无机封装层410远离衬底基板100一侧的有机封装层420，以及位于有机封装层420远离衬底基板100一侧的第二无机封装层430。
参照图19D，在封装层400远离衬底基板100的一侧形成触控层700，触控层700包括位于封装层400远离衬底基板100一侧的第一触控绝缘层710、位于第一触控绝缘层710远离衬底基板100一侧的第一触控金属层730、位于第一触控金属层730远离衬底基板100一侧的第二触控绝缘层720，以及位于第二触控绝缘层720远离衬底基板100一侧的第二触控金属层740。在第二触控金属层740远离衬底基板100的一侧形成阻挡材料膜层610。阻挡材料膜层610的材料包括无机绝缘材料。
例如，阻挡材料膜层610可以为单层的氮化硅膜层，阻挡材料膜层610通过化学气相沉积工艺与构图工艺形成。
例如，第一触控绝缘层710的材料包括有机绝缘材料，示例性地，第一触控绝缘层710的材料包括有机光阻材料。
例如，第二触控绝缘层720的材料包括有机绝缘材料，示例性地，第二触控绝缘层720的材料包括有机光阻材料。
参照图19E，在第二触控金属层740与阻挡材料膜层610远离衬底基板100的一侧形成有机保护层800，在有机保护层800远离衬底基板100的一侧形成模组堆叠结构900。
结合参照图19E与参照图19F，形成位于开孔区域HA的开孔100a，阻挡材料膜层610保留的部分形成阻挡层600，阻挡层600在衬底基板100上的正投影覆盖多个隔离柱510在衬底基板100上的正投影的至少一部分，且阻挡层600在衬底基板100上的正投影与至少一部分开口KK在衬底基板100上的正投影相间隔。
图20A-图20F示意性地示出了根据本公开一些实施例的显示基板的形成过程图。
参照图20A，在衬底基板100上形成驱动电路层200、多个隔离柱510与挡墙Dam。
参照图20B，在驱动电路层200与多个隔离柱510远离衬底基板100的一侧形成发光器件层300与像素界定层PDL，发光器件层300包括位于驱动电路层200远离衬底基板100一侧的第一电极层310、位于第一电极层310远离衬底基板100一侧的发光功能层320以及位于发光功能层320远离衬底基板100一侧的第二电极层330，像素界定层PDL位于与第一电极层310与发光功能层320之间。第一电极层310包括多个第一电极部311，像素界定层PDL包括多个开口KK，多个开口KK分别暴露多个第一电极部311的至少一部分，发光功能层320通过开口KK与第一电极部311连接。
参照图20C，在发光器件层300远离衬底基板100的一侧形成封装层400，封装层400包括第一无机封装层410、位于第一无机封装层410远离衬底基板100一侧的有机封装层420，以及位于有机封装层420远离衬底基板100一侧的第二无机封装层430。
参照图20D，在封装层400远离衬底基板100的一侧形成触控层700，触控层700包括位于封装层400远离衬底基板100一侧的第一触控绝缘层710、位于第一触控绝缘层710远离衬底基板100一侧的第一触控金属层730、位于第一触控金属层730远离衬底基板100一侧的第二触控绝缘层720，以及位于第二触控绝缘层720远离衬底基板100一侧的第二触控金属层740。在第二触控金属层740远离衬底基板100的一侧形成有机保护层800，在有机保护层800远离衬底基板100的一侧形成阻挡材料膜层610。阻挡材料膜层610的材料包括无机绝缘材料。
例如，阻挡材料膜层610可以为单层的氮化硅膜层，阻挡材料膜层610通过化学气相沉积工艺与构图工艺形成。
例如，第一触控绝缘层710的材料包括有机绝缘材料，示例性地，第一触控绝缘层710的材料包括有机光阻材料。
例如，第二触控绝缘层720的材料包括有机绝缘材料，示例性地，第二触控绝缘层720的材料包括有机光阻材料。
参照图20E，在有机保护层800远离衬底基板100的一侧形成模组堆叠结构900。
结合参照图20E与参照图20F，形成位于开孔区域HA的开孔100a，阻挡材料膜层610保留的部分形成阻挡层600，阻挡层600在衬底基板100上的正投影覆盖多个隔离柱510在衬底基板100上的正投影的至少一部分，且阻挡层600在衬底基板100上的正投影与至少一部分开口KK在衬底基板100上的正投影相间隔。
本公开的至少一些实施例还提供一种显示装置，该显示装置包括如上所述的显示基板。所述显示装置可以包括任何具有显示功能的设备或产品。例如，所述显示装置可以是智能电话、移动电话、电子书阅读器、台式电脑(PC)、膝上型PC、上网本PC、个人数字助理(PDA)、便携式多媒体播放器(PMP)、数字音频播放器、移动医疗设备、相机、可穿戴设备(例如头戴式设备、电子服饰、电子手环、电子项链、电子配饰、电子纹身、或智能手表)、电视机等。
应该理解，根据本公开的一些示例性实施例的显示装置具有上述显示基板的所有特点和优点，这些特点和优点可以参照上文针对显示基板的描述，在此不再赘述。
如这里所使用的，术语“基本上”、“大约”、“近似”和其它类似的术语用作近似的术语而不是用作程度的术语，并且它们意图解释将由本领域普通技术人员认识到的测量值或计算值的固有偏差。考虑到工艺波动、测量问题和与特定量的测量有关的误差(即，测量系统的局限性)等因素，如这里所使用的“大约”或“近似”包括所陈述的值，并表示对于本领域普通技术人员所确定的特定值在可接受的偏差范围内。例如，“大约”可以表示在一个或更多个标准偏差内，或者在所陈述的值的±10％或±5％内。
虽然根据本公开的总体发明构思的一些实施例已被图示和说明，本领域普通技术人员将理解，在不远离本公开的总体发明构思的原则和精神的情况下，可对这些实施例做出改变，本公开的范围以权利要求和它们的等同物限定。

Claims (18)

  1. 一种显示基板，其中，所述显示基板包括开孔区域、位于所述开孔区域周边的缓冲区域以及位于所述缓冲区域周边的显示区域，所述显示基板包括：
    衬底基板；
    驱动电路层，位于所述衬底基板上；
    发光器件层，位于所述驱动电路层远离所述衬底基板一侧，所述发光器件层包括位于所述驱动电路层远离所述衬底基板一侧的第一电极层，所述第一电极层包括多个第一电极部；
    像素界定层，位于所述第一电极层远离所述衬底基板一侧，所述像素界定层包括多个开口，所述多个开口分别暴露所述多个第一电极部的至少一部分；以及
    封装层，位于所述发光器件层远离所述衬底基板一侧，
    其中，所述显示基板还包括位于所述发光器件层靠近所述衬底基板一侧的多个隔离柱以及位于所述封装层远离所述衬底基板一侧的至少一层阻挡层，所述多个隔离柱位于所述缓冲区域，所述阻挡层的材料包括无机绝缘材料，所述阻挡层在所述衬底基板上的正投影覆盖所述多个隔离柱在所述衬底基板上的正投影的至少一部分，且所述阻挡层在所述衬底基板上的正投影与至少一部分所述开口在所述衬底基板上的正投影相间隔。
  2. 根据权利要求1所述的显示基板，其中，所述阻挡层远离所述开孔区域的边缘位于最靠近所述缓冲区域的所述开口靠近所述缓冲区域的一侧。
  3. 根据权利要求2所述的显示基板，其中，所述阻挡层在所述衬底基板上的正投影与最靠近所述缓冲区域的所述开口在所述衬底基板上的正投影的间距大于等于5微米。
  4. 根据权利要求1所述的显示基板，其中，所述显示基板包括位于所述衬底基板上的挡墙，所述挡墙位于所述缓冲区域且至少部分环绕所述开孔区域，所述多个隔离柱包括位于所述挡墙靠近所述开孔区域一侧的至少一个第一隔离柱与位于所述挡墙远离所述开孔区域一侧的至少一个第二隔离柱，所述阻挡层在所述衬底基板上的正投影覆盖所述至少一个第一隔离柱在所述衬底基板上的正投影的至少一部分。
  5. 根据权利要求4所述的显示基板，其特征在于，所述阻挡层远离所述开孔区域的边缘位于最靠近所述挡墙的所述第一隔离柱远离所述开孔区域的一侧。
  6. 根据权利要求4所述的显示基板，其特征在于，所述阻挡层远离所述开孔区域的边缘位于最远离所述开孔区域的第二隔离柱远离所述开孔区域的一侧。
  7. 根据权利要求1-6中任一项所述的显示基板，其中，所述显示基板包括位于所述开孔区域的开孔，所述阻挡层靠近所述开孔区域的边缘与所述开孔的边缘基本齐平。
  8. 根据权利要求1-7中任一项所述的显示基板，其中，所述显示基板还包括位于所述封装层远离所述衬底基板一侧的触控层，所述触控层包括位于所述封装层上的第一触控绝缘层与位于所述第一触控绝缘层远离所述衬底基板一侧的第二触控绝缘层。
  9. 根据权利要求8所述的显示基板，其中，至少一层所述阻挡层位于所述封装层与所述第一触控绝缘层之间。
  10. 根据权利要求8所述的显示基板，其中，至少一层所述阻挡层位于所述第一触控绝缘层与所述第二触控绝缘层之间。
  11. 根据权利要求8所述的显示基板，其中，至少一层所述阻挡层位于所述第二触控绝缘层远离所述衬底基板的一侧。
  12. 根据权利要求11所述的显示基板，其中，所述显示基板还包括位于所述触控层远离所述衬底基板一侧的有机保护层，至少一层所述阻挡层位于所述第二触控绝缘层与所述有机保护层之间，和/或至少一层所述阻挡层位于所述有机保护层远离所述衬底基板的一侧。
  13. 根据权利要求8-12中任一项所述的显示基板，其中，所述第一触控绝缘层与所述第二触控绝缘层中的至少一者包括有机绝缘材料。
  14. 根据权利要求1-13中任一项所述的显示基板，其中，所述阻挡层的厚度为2000-6000埃。
  15. 一种显示基板的制备方法，其中，所述显示基板包括开孔区域、位于所述开孔区域周边的缓冲区域以及位于所述缓冲区域周边的显示区域，所述制备方法包括如下步骤：
    在衬底基板上形成驱动电路层；
    在所述衬底基板上形成多个隔离柱，所述多个隔离柱位于所述缓冲区域；
    在所述驱动电路层与所述多个隔离柱远离所述衬底基板的一侧形成发光器件层和像素界定层，所述发光器件层包括位于所述驱动电路层远离所述衬底基板一侧的第一电极层，所述像素界定层位于所述第一电极层远离所述衬底基板的一侧，所述第一电极层包括多个第一电极部，所述像素界定层包括多个开口，所述多个开口分别暴露所述多个第一电极部的至少一部分；
    在所述发光器件层远离所述衬底基板的一侧形成封装层；
    在所述封装层远离所述衬底基板的一侧形成阻挡材料膜层，所述阻挡材料膜层的材料包括无机绝缘材料；以及
    在所述开孔区域中形成开孔，所述阻挡材料膜层保留的部分形成阻挡层，
    其中，所述阻挡层在所述衬底基板上的正投影覆盖所述多个隔离柱在所述衬底基板上的正投影的至少一部分，且所述阻挡层在所述衬底基板上的正投影与至少一部分所述开口在所述衬底基板上的正投影相间隔。
  16. 根据权利要求15所述的制备方法，其中，所述阻挡材料膜层包括位于所述开孔区域的第一部分与位于所述缓冲区域的第二部分，所述第一部分与所述第二部分直接连接，所述第一部分基本覆盖所述开孔区域。
  17. 根据权利要求15所述的制备方法，其中，所述阻挡材料膜层包括位于所述开孔区域的第一部分与位于所述缓冲区域的第二部分，所述第一部分与所述第二部分直接连接，所述第一部分覆盖所述开孔区域靠近所述缓冲区域的部分区域，所述第一部分具有镂空结构。
  18. 一种显示装置，其中，所述显示装置包括根据权利要求1-14中任一项所述的显示基板。
PCT/CN2025/095429 2024-05-21 2025-05-16 显示基板及其制备方法和显示装置 Pending WO2025242000A1 (zh)

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CN117915730A (zh) * 2024-01-23 2024-04-19 京东方科技集团股份有限公司 显示面板及显示装置
CN117915700A (zh) * 2022-10-18 2024-04-19 三星显示有限公司 显示面板及包括显示面板的电子装置
CN118475176A (zh) * 2024-05-21 2024-08-09 京东方科技集团股份有限公司 显示基板及其制备方法和显示装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117915700A (zh) * 2022-10-18 2024-04-19 三星显示有限公司 显示面板及包括显示面板的电子装置
CN117915730A (zh) * 2024-01-23 2024-04-19 京东方科技集团股份有限公司 显示面板及显示装置
CN118475176A (zh) * 2024-05-21 2024-08-09 京东方科技集团股份有限公司 显示基板及其制备方法和显示装置

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