WO2025018385A1

WO2025018385A1 - Photodetector and photodetection system

Info

Publication number: WO2025018385A1
Application number: PCT/JP2024/025765
Authority: WO
Inventors: Yasunori Tsukuda
Original assignee: Sony Semiconductor Solutions Corp
Current assignee: Sony Semiconductor Solutions Corp
Priority date: 2023-07-18
Filing date: 2024-07-18
Publication date: 2025-01-23
Anticipated expiration: 2026-01-18
Also published as: KR20260039647A; CN121079987A; JP2025014517A

Abstract

There is provided a photodetector. The photodetector according to an embodiment of the present disclosure includes: a light-receiving element configured to receive light and output a current; and a first output circuit that is configured to output a first signal based on a current of the light-receiving element and includes a P-type transistor, an N-type transistor, and a resistance element electrically coupled in series between a first power supply line and a reference potential line.

Description

PHOTODETECTOR AND PHOTODETECTION SYSTEM

Cross Reference to Related Applications

This application claims the benefit of Japanese Priority Patent Application JP2023-117139 filed July 18, 2023, the entire contents of which are incorporated herein by reference.

The present disclosure relates to a photodetector and a photodetection system.

A photodetector has been proposed which is provided with a plurality of pixels each including a light-receiving element configured using an SPAD (Single Photon Avalanche Diode: single photon avalanche diode) (PTL 1).

[PTL 1] Japanese Unexamined Patent Application Publication No. 2020-24138

Summary

It is desired for a photodetector to have improved detection performance.

It is desirable to provide a photodetector having favorable detection performance.

A photodetector according to an embodiment of the present disclosure includes: a light-receiving element configured to receive light and output a current; and a first output circuit including a P-type transistor, an N-type transistor, and a resistance element electrically coupled between a first power supply line and a reference potential line, the first output circuit being configured to output a first signal based on a current of the light-receiving element.
A photodetection system according to an embodiment of the present disclosure includes: a light source configured to irradiate an object with light; and a photodetector that receives a portion of the light from the object, the photodetector including a light-receiving element configured to receive the portion of the light and output a current, and a first output circuit including a P-type transistor, an N-type transistor, and a resistance element electrically coupled between a first power supply line and a reference potential line, the first output circuit being configured to output a first signal based on a current of the light-receiving element.

Fig. 1 is a diagram illustrating an example of a schematic configuration of a photodetection system according to an embodiment of the present disclosure. Fig. 2 is a diagram illustrating a configuration example of a pixel of a photodetector according to an embodiment of the present disclosure. Fig. 3 is an explanatory timing chart of an operation example of the photodetector according to an embodiment of the present disclosure. Fig. 4 is an explanatory timing chart of the operation example of the photodetector according to an embodiment of the present disclosure. Fig. 5 is an explanatory diagram of an operation example of the photodetector according to an embodiment of the present disclosure. Fig. 6 is a diagram illustrating a configuration example of the photodetector according to an embodiment of the present disclosure. Fig. 7 is a diagram illustrating a configuration example of the photodetector according to an embodiment of the present disclosure. Fig. 8 is an explanatory diagram of a configuration example of the photodetector according to an embodiment of the present disclosure. Fig. 9 is a diagram illustrating another configuration example of the photodetector according to an embodiment of the present disclosure. Fig. 10 is a diagram illustrating another configuration example of the photodetector according to an embodiment of the present disclosure. Fig. 11 is a diagram illustrating another configuration example of the photodetector according to an embodiment of the present disclosure. Fig. 12A is an explanatory diagram of a configuration example of a photodetector according to Modification Example 1 of the present disclosure. Fig. 12B is an explanatory diagram of a configuration example of the photodetector according to Modification Example 1 of the present disclosure. Fig. 13 is an explanatory diagram of a configuration example of a photodetector according to Modification Example 2 of the present disclosure. Fig. 14A is an explanatory diagram of another configuration example of the photodetector according to Modification Example 2 of the present disclosure. Fig. 14B is an explanatory diagram of another configuration example of the photodetector according to Modification Example 2 of the present disclosure. Fig. 15 is an explanatory diagram of a configuration example of a photodetector according to Modification Example 3 of the present disclosure. Fig. 16 is an explanatory diagram of a configuration example of the photodetector according to Modification Example 3 of the present disclosure. Fig. 17 is an explanatory diagram of a configuration example of a photodetector according to Modification Example 4 of the present disclosure. Fig. 18 is an explanatory diagram of a configuration example of the photodetector according to Modification Example 4 of the present disclosure. Fig. 19 is an explanatory diagram of a configuration example of a photodetector according to Modification Example 5 of the present disclosure. Fig. 20 is a block diagram depicting an example of schematic configuration of a vehicle control system. Fig. 21 is a diagram of assistance in explaining an example of installation positions of an outside-vehicle information detecting section and an imaging section.

Hereinafter, description is given in detail of embodiments of the present disclosure with reference to the drawings. It is to be noted that the description is given in the following order.
1. Embodiment
2. Modification Examples
3. Usage Examples
4. Practical Application Example
<1. Embodiment>

Fig. 1 is a diagram illustrating an example of a schematic configuration of a photodetection system according to an embodiment of the present disclosure. A photodetection system 200 includes a photodetector 1, a light source control unit 210, and a light source 220. The photodetector 1 is a device that is able to detect incident light. The photodetector 1 includes a plurality of pixels P each including a light-receiving element, and is configured to receive incident light to generate a signal.

The light-receiving element of the pixel P of the photodetector 1 is an APD (Avalanche Photo Diode: avalanche photodiode), for example, and is configured to be able to receive light and output a current. The light-receiving element (light-receiving section) of each of the pixels P may be configured to generate a signal in response to light reception of photons. For example, the photodetector 1 receives light transmitted through an optical system (unillustrated) including an optical lens to generate a signal.

The photodetector 1 is configured using, for example, a semiconductor substrate (e.g., a silicon substrate) provided with the plurality of pixels P. As an example, the photodetector 1 includes a region (a pixel section 100) in which the plurality of pixels P is two-dimensionally arranged in matrix. The pixel section 100 of the photodetector 1 is a pixel array in which the plurality of pixels P is arranged.

The light-receiving element of each of the pixels P may be configured by an SPAD (single-photon avalanche diode). The photodetector 1 takes in incident light from a measurement target via the optical system including the optical lens. The light-receiving element may receive light (e.g., infrared light, visible light, etc.) from the measurement target to generate electric charge by photoelectric conversion, and generate a photocurrent.

The photodetector 1 may be configured as a distance measurement sensor, an image sensor, or the like. The photodetector 1 is a device that is able to execute distance measurement, and is configured to be able to execute distance measurement in a TOF (Time Of Flight) method, for example. As an example, the photodetector 1 is applied as a distance measurement sensor that enables the distance measurement in the TOF method.

The light source 220 is configured to be able to generate light (optical signal). The light source 220 includes, for example, a plurality of light-emitting elements, and is configured to be able to irradiate a measurement target with light. The light-emitting element may be, for example, an LD (Laser Diode), an LED (Light Emitting Diode), or the like, and may output light (infrared light, visible light, etc.) to the outside.

In the light source 220, the plurality of light-emitting elements may be two-dimensionally arranged in matrix. As an example, the light source 220 (light source section) may generate laser light to emit the laser light to the outside. The light source 220 may be configured using a semiconductor laser element, e.g., a vertical cavity surface emitting laser (VCSEL: Vertical Cavity Surface Emitting Laser).

The light source control unit 210 is configured to be able to control the light source 220. The light source control unit 210 is a drive unit (drive circuit), and is configured to drive the light source 220. As an example, the light source control unit 210 may be configured by a plurality of circuits including a DA conversion circuit (DAC: Digital to Analog Converter), an amplifier circuit, and the like, and may control an operation of the light source 220. The light source control unit 210 is configured to be able to control, for example, a voltage and a current to the light-emitting element of the light source 220.

The light source control unit 210 may supply the light source 220 with a voltage and a current for driving each of the light-emitting elements of the light source 220 to control light emission (e.g., light emission timing, light emission time, etc.) by the light source 220. The light source control unit 210 can also be referred to as a light source drive unit configured to be able to drive the light source 220 (light-emitting elements thereof). It is to be noted that some or all of the light source 220 and the light source control unit 210 may be integrally configured as a light source device (light source unit).

The photodetection system 200 may cause the light source 220 to irradiate a measurement target with light (e.g., laser light) to receive light reflected by the measurement target. In the photodetector 1, for example, reflected light (return light) reflected by the measurement target is incident on the pixel section 100, and an electric signal corresponding to light reception of the reflected light is detected. An electric signal generated by the light reception of the reflected light from the measurement target is a signal corresponding to a distance to the measurement target.

The photodetection system 200 including the photodetector 1 may transmit and receive light to measure the distance to the measurement object. As an example, the photodetector 1 is configured be able to detect a distance to an object (subject), which is the measurement target, for each of the pixels P, to generate image data (distance image data) regarding the distance to the object. The photodetector 1 may generate a depth map (depth map), for example.

It is to be noted that the photodetector 1 is also applicable as a sensor that enables detection of an event, e.g., as an event-driven sensor (referred to as an EVS (Event Vision Sensor), an EDS (Event Driven Sensor), a DVS (Dynamic Vision Sensor), or the like). The photodetector 1 and the photodetection system 200 are applicable to various electronic apparatuses.

As an example, the photodetector 1 includes the pixel section 100, a pixel control section 111, a signal processing section 112, and a control section 113, as in the example illustrated in Fig. 1. It is to be noted that the photodetector 1 may include the light source control unit 210. In addition, the light source 220 may be mounted on the photodetector 1, or may be provided outside the photodetector 1.

The pixel control section 111 is configured to be able to control each of the pixels P of the pixel section 100. The pixel control section 111 is a control circuit, and is configured by a plurality of circuits including a buffer, a shift register, an address decoder, and the like, as an example. The pixel control section 111 generates a signal for controlling the pixel P, and outputs the generated signal to each of the pixels P of the pixel section 100. The pixel control section 111 is controlled by the control section 113, and controls the pixel P of the pixel section 100.

The pixel control section 111 generates a signal for controlling the pixel P, such as a signal to control a readout circuit of the pixel P, for example, and supplies the generated signal to each of the pixels P. The pixel control section 111 may perform a control to read a pixel signal from each of the pixels P. The pixel control section 111 can also be referred to as a pixel drive section configured to be able to drive each of the pixels P. It is to be noted that the pixel control section 111 and the control section 113 can also be collectively referred to as the pixel control section.

The control section 113 is configured to be able to control each section of the photodetector 1. The control section 113 may receive a clock provided from the outside, data ordering an operation mode, or the like, and may output data such as internal information on the photodetector 1. The control section 113 is a control circuit, and includes, for example, a timing generator configured to be able to generate various timing signals.

The control section 113 controls driving of the pixel control section 111, the signal processing section 112, and the like on the basis of the various timing signals (pulse signal, clock signal, etc.) generated by the timing generator. The control section 113 may include circuits such as a PLL (Phase Locked Loop) or a DAC (Digital to Analog Converter).

In addition, the control section 113 is configured to supply the light source control unit 210 with a signal that controls the light source control unit 210 and to control an operation of the light source control unit 210. The control section 113 may be configured to be able to control the processing to generate a pixel signal by the pixel P of the pixel section 100, the timing to irradiate light by the light source 220, and the like.

The signal processing section 112 is a signal processing circuit, and is configured to be able to execute signal processing. The signal processing section 112 is configured by a circuit that performs various types of signal processing on a signal outputted from each of the pixels P. The signal processing section 112 includes an arithmetic circuit, a memory circuit, and the like, and may perform various types of signal processing such as noise reduction processing, TD (Time to Digital) conversion processing, or counting (cumulative) processing.

The signal processing section 112 is configured to acquire a signal of each of the pixels P and to generate and output a signal regarding a distance to a measurement target. For example, the signal processing section 112 may perform various types of signal processing on the signal of each of the pixels, and may generate and output distance image data indicating the distance to the measurement target. It is to be noted that the signal processing section 112 and the control section 113 may be integrally configured. The signal processing section 112 and the control section 113 may include a processor and a memory.

The signal processing section 112 includes, for example, a converter 70 and a calculator 80, as in the example illustrated in Fig. 1. It is to be noted that the signal processing section 112 may include a pulse shaping circuit configured to shape a pixel signal to be a pulse signal read from the pixel P. The pulse shaping circuit may be provided for each of the pixels P or for every plurality of pixels P, for example.

The converter 70 is configured to be able to convert an inputted pixel signal into a digital signal regarding a light reception timing in the pixel P. The converter 70 is configured by a TDC (Time to Digital Converter) circuit, for example. For example, the converter 70 is configured to convert the pixel signal to be a pulse signal generated by the pixel P into a digital signal corresponding to elapsed time from the time of light emission by the light source 220 to the time of light reception by the light-receiving element of the pixel P.

The converter 70 is configured using a flip-flop circuit, a delay circuit (e.g., Delay buffer), a counter circuit, or the like. The converter 70 is a TD converter (TD conversion circuit), and is provided for each of the pixels P or for every plurality of pixels P, for example. A pixel signal to be a pulse signal to be sequentially read from each of the pixels P is subjected to TD conversion processing by the converter 70, for example, and is converted as a digital signal indicating a light reception timing of reflected light from the measurement target.

The converter 70 (conversion circuit) may output, as a converted pixel signal, a digital signal corresponding to time from a timing of light emission by the light source 220 to a timing of light reception of reflected light (return light) by the light-receiving element. As an example, the converter 70 converts a pixel signal, which is a pulse signal, into a digital signal of a predetermined number of bits, and outputs the converted digital signal as a signal indicating round-trip time (i.e., flight time) of light.

The converter 70 may measure time from the start of light irradiation by the light source 220 to a transition timing (rising edge or falling edge) of a pixel signal corresponding to the light reception of reflected light to generate a signal indicating a count value as the converted pixel signal. On the basis of the pulse signal outputted from the pixel P, the converter 70 may output, as the converted pixel signal, a signal indicating a count value corresponding to a period from the start of the light irradiation to the measurement target to the light reception of reflected light from the measurement target.

In the photodetection system 200, for example, the light source 220 repeatedly performs and stops the irradiation of light, and the pixel P repeatedly detects reflected light (return light). In the photodetector 1, pixel signals sequentially outputted from the pixels P by a plurality of distance measurement operations are each converted into a digital signal by the conversion processing in the converter 70.

The calculator 80 is configured to be able to acquire a pixel signal of the pixel P and execute signal processing. The calculator 80 is configured to generate a signal (distance signal) regarding the distance to the measurement object, for example, on the basis of the pixel signal converted by the converter 70. The calculator 80 may analyze the pixel signal of each of the pixels P to thereby generate and output image data (distance image data) including the distance signal for each of the pixels P.

The calculator 80 includes, for example, a histogram generator 85, and is configured to be able to generate a histogram of the pixel signal, which is a digital signal, converted by the converter 70. As an example, the histogram generator 85 (histogram generation circuit) is configured to generate, for each of the pixels P, a histogram of a count value corresponding to a signal value of the pixel signal, i.e., round-trip time of light.

The histogram generator 85 may generate, as histogram data, data on a correspondence relationship between the count value corresponding to the round-trip time of light and frequency (number) of the count value to store the histogram data in a memory or the like inside the signal processing section 112. For example, the histogram generator 85 classifies count values by each predetermined interval (range), i.e., by each class (BIN), and generates histogram data indicating a distribution of the count values corresponding to distances to the measurement target.

The calculator 80 is configured to be able to calculate the distance to the measurement target on the basis of a peak value (local maximum value) of the values of pixel signals in the histogram. For example, the calculator 80 calculates (estimates) a difference between the starting time of light irradiation and the arrival time of reflected light, i.e., the round-trip time (flight time) of light on the basis of the value (count value) of the pixel signal in which frequency of the pixel signal in the histogram indicates a peak value.

The calculator 80 is configured to perform an arithmetic operation on a distance between the photodetector 1 and the measurement object using the calculated round-trip time, for example. The calculator 80 calculates a distance to the object for each of the pixels P to generate a distance signal regarding the distance to the object. The distance to the measurement object is determined on the basis of time during which light irradiated from the light source 220 is reflected by the measurement object to reach the photodetector 1. The signal processing section 112 may generate the distance image data including a distance signal for each of the pixels P by the calculator 80 to output the generated distance image data to the outside of the photodetector 1.

It is to be noted that the pixel section 100, the pixel control section 111, the signal processing section 112, the control section 113, and the like described above may be provided in one substrate or may be provided separately in a plurality of substrates. The photodetector 1 may have a structure (stacked structure) configured by stacking the plurality of substrates. It is to be noted that some or all of the pixel control section 111, the signal processing section 112, and the control section 113 may be integrally configured.

Fig. 2 is a diagram illustrating a configuration example of a pixel of the photodetector according to the embodiment. The pixel P of the photodetector 1 includes a light-receiving element 10 (light-receiving element) and a readout circuit 20. The readout circuit 20 is provided for each light-receiving element 10, for example. It is to be noted that the readout circuit 20 may be provided for a plurality of light-receiving elements 10. The photodetector 1 may have a configuration in which the plurality of pixels P shares one readout circuit 20.

The light-receiving element 10 is configured to receive light to generate a signal. The light-receiving element 10 is an SPAD (Single Photon Avalanche Diode), and includes a multiplication region (multiplication part) that enables avalanche multiplication. The light-receiving element 10 may convert an incident photon into electric charge to output a signal S1 which is an electric signal corresponding to the incident photon. It is to be noted that the light-receiving element 10 can also be referred to as a photoelectric conversion element (photoelectric conversion section) configured to be able to photoelectrically convert light.

The readout circuit 20 is configured to be able to output a signal based on a current of the light-receiving element 10. The readout circuit 20 includes a circuit for reading a signal based on a photocurrent flowing through the light-receiving element 10, e.g., a supply part 30, a first output circuit 40, a second output circuit 50, and the like.

The supply part 30 is configured to be able to supply a current and a voltage to the light-receiving element 10. The supply part 30 (supply circuit) is electrically coupled to a power supply line L1a to which a power supply voltage VDDH is applied, and may supply a current and a voltage to the light-receiving element 10. The supply part 30 is a charging part (charge circuit), and is configured by a current source that is able to supply a current to the light-receiving element 10, for example.

As an example, the supply part 30 may be configured using a P-type transistor (e.g., a PMOS transistor). For example, one of a source or a drain of a transistor of the supply part 30 is electrically coupled to a power supply line to which the power supply voltage VDDH is applied, and another of a source or a drain of a transistor M3 is electrically coupled to the light-receiving element 10. It is to be noted that the supply part 30 may be configured using a resistance element. In addition, the supply part 30 may be configured by a switch that electrically couples or decouples the power supply line and the light-receiving element 10 to or from each other.

The supply part 30 supplies a current to the light-receiving element 10, for example, in a case where a potential difference between electrodes of the light-receiving element 10 is less than a breakdown voltage due to occurrence of avalanche multiplication. The supply part 30 recharges the light-receiving element 10 to bring the light-receiving element 10 back into a state that enables an operation in a Geiger mode. The supply part 30 can also be referred to as a recharge part (recharge circuit). The supply part 30 may recharge the light-receiving element 10 with electric charge, and may recharge a voltage of the light-receiving element 10.

The light-receiving element 10 is electrically coupled to, for example, an electrode or a power supply line being able to supply a predetermined voltage. In the example illustrated in Fig. 2, a cathode, which is one electrode of the light-receiving element 10, is electrically coupled, via the supply part 30, to the power supply line L1a to be supplied with the power supply voltage VDDH. An anode, which is another electrode of the light-receiving element 10, is coupled to a side of a reference potential line.

The anode of the light-receiving element 10 is electrically coupled to, for example, an electrode or wiring to be supplied with a relatively low power supply voltage. In the example illustrated in Fig. 2, the anode of the light-receiving element 10 is supplied with a power supply voltage (a voltage VSP in Fig. 2) via a power supply line L1b from a power supply section (voltage source) that is able to supply a voltage (current). The voltage VSP is a negative (minus) voltage, for example.

A voltage, which has a larger potential difference than a breakdown voltage (breakdown voltage) of the light-receiving element 10, may be applied between the cathode and the anode of the light-receiving element 10 by a voltage supplied via the supply part 30 and the voltage VSP supplied by the power supply line L1b. That is, the potential difference across both ends of the light-receiving element 10 may be set to a potential difference larger than the breakdown voltage.

The light-receiving element 10 comes into a state that enables an operation in the Geiger mode in a case where a reverse bias voltage larger than the breakdown voltage is applied. In the light-receiving element 10 in the Geiger mode, an avalanche multiplication phenomenon may occur in response to incidence of photons, thus generating a pulsed current. In the pixel P, the signal S1 corresponding to a photocurrent flowing through the light-receiving element 10 caused by the incidence of photons is outputted to the first output circuit 40.

The first output circuit 40 is configured to generate a signal S11 based on the signal S1 generated by the light-receiving element 10. In the example illustrated in Fig. 2, the first output circuit 40 includes an inverter. The first output circuit 40 is configured using a transistor M1, a transistor M2, and a resistance element R electrically coupled in series. The first output circuit 40 includes an input part 41 and an output part 42, and may output an inversion signal of the inputted signal.

The second output circuit 50 is configured to generate a signal S12 based on the signal S11 outputted by the first output circuit 40. In the example illustrated in Fig. 2, the second output circuit 50 includes an inverter. The second output circuit 50 is configured using the transistor M3 and a transistor M4 electrically coupled in series. The second output circuit 50 may include an input part 51 and an output part 52, and may output an inversion signal of the inputted signal.

The transistors M1 to M4 are each a MOS transistor (MOSFET) including terminals of a gate, a source, and a drain. The transistor M1 and the transistor M3 are each an N-type transistor (NMOS transistor in Fig. 2). In addition, the transistor M2 and the transistor M4 are each a P-type transistor (PMOS transistor in Fig. 2).

The respective gates of the transistor M1 and the transistor M2 are electrically coupled to each other, and constitute the input part 41. The respective gates of the transistors M1 and M2 are electrically coupled to the light-receiving element 10. The source of the transistor M2 is electrically coupled to the power supply line L1a to be supplied with the power supply voltage VDDH. The drain of the transistor M1 and the drain of the transistor M2 are electrically coupled to each other, and constitute the output part 42.

The source of the transistor M1 is electrically coupled to a reference potential line L2b. The reference potential line L2b is a ground line (ground line), for example. The reference potential line L2b is supplied with a specific potential, e.g., a GND potential (ground potential). In the example illustrated in Fig. 2, the reference potential line L2b is wiring to which a voltage VSS (e.g., 0 V) is applied.

The respective gates of the transistor M3 and the transistor M4 are electrically coupled to each other, and constitute the input part 51. The respective gates of the transistors M3 and M4 are electrically coupled to the first output circuit 40. The source of the transistor M4 is electrically coupled to a power supply line L2a to be supplied with a power supply voltage VDDL. The power supply voltage VDDL is a voltage lower than the power supply voltage VDDH, for example.

The source of the transistor M3 is electrically coupled to the reference potential line L2b. The drain of the transistor M3 and the drain of the transistor M4 are electrically coupled to each other, and constitute the output part 52. The first output circuit 40 described above is, for example, a first-stage output circuit, and can also be referred to as a first amplification circuit. In addition, the second output circuit 50 is, for example, a second-stage output circuit, and can also be referred to as a second amplification circuit. It is to be noted that the first output circuit 40 and the second output circuit 50 may each be configured by an AND circuit, an OR circuit, or the like.

The input part 41 of the first output circuit 40 is electrically coupled to the cathode of the light-receiving element 10 and the supply part 30, for example. The output part 42 of the first output circuit 40 is electrically coupled to the input part 51 of the second output circuit 50. In the example illustrated in Fig. 2, the input part 41 of the first output circuit 40 is electrically coupled to a node N1 that couples the light-receiving element 10 and the supply part 30 to each other. In addition, the output part 42 of the first output circuit 40 is electrically coupled to a node N2 that couples the first output circuit 40 and the second output circuit 50 to each other.

In the example illustrated in Fig. 2, the node N1 is a portion of the input part 41 of the first output circuit 40, and serves as an input node of the first output circuit 40. The node N2 is a portion of the input part 51 of the second output circuit 50, and serves as an input node of the second output circuit 50. In addition, the node N2 is also a portion of the output part 42 of the first output circuit 40, and serves as an output node of the first output circuit 40. Each of the node N1 and the node N2 can also be referred to as a coupling node.

The transistor M1, the transistor M2, and the resistance element R of the first output circuit 40 are electrically coupled between the power supply line L1a and the reference potential line L2b. The resistance element R is electrically coupled in series between the transistor M1 and the transistor M2. In the example illustrated in Fig. 2, the resistance element R is electrically coupled between the transistor M2 and the node N2.

The resistance element R is, for example, a resistor (resistance member) such as a Poly resistor or a Metal resistor. The resistance element R may be formed using polysilicon (Poly-Si), or may be formed using a metal material such as tungsten (W) or titanium (Ti). The resistance element R may be a resistance element (substrate resistor) provided in a semiconductor substrate. For example, the resistance element R (substrate resistor) may be formed by doping (adding) impurities into a silicon substrate. It is to be noted that the resistance element R may be configured by a metal compound (metal oxide, metal nitride, etc.) or may be configured by another material.

The resistance element R may be configured using a transistor. The resistance element R may be configured using a transistor including a gate to be supplied with a predetermined voltage (bias voltage). The resistance element R may be configured by a diode-coupled transistor. The resistance element R may have a configuration in which a plurality of resistors is coupled in series or in parallel.

The first output circuit 40 receives an input of the signal S1 from the light-receiving element 10. A signal level of the signal S1, i.e., a voltage (potential) of the signal S1 varies depending on a current flowing through the light-receiving element 10. In a case where a voltage of the signal S1 is higher than a threshold, for example, the first output circuit 40 outputs the signal S11 at a low level. In addition, in a case where the voltage of the signal S1 is lower than the threshold, the first output circuit 40 outputs the signal S11 at a high level. The first output circuit 40 may output the signal S11 based on the voltage of the signal S1 to the second output circuit 50.

The second output circuit 50 receives an input of the signal S11 from the first output circuit 40. A signal level of the signal S12 outputted by the second output circuit 50, i.e., a voltage of the signal S12 varies depending on the signal S11. In a case where the voltage of the signal S11 is higher than the threshold, for example, the second output circuit 50 outputs the signal S12 at a low level. In addition, in a case where the voltage of the signal S11 is lower than the threshold, the second output circuit 50 outputs the signal S12 at a high level. The second output circuit 50 may output, to a signal line L10, the signal S12 to be a pulse signal based on the voltage of the signal S11.

In the example illustrated in Fig. 2, the inverter, which is the first output circuit 40, causes the voltage of the signal S11 to transition from a low level to a high level, when the voltage of the signal S1 becomes smaller than a threshold voltage of the inverter due to the light reception of photons in the light-receiving element 10. In this case, the inverter, which is the second output circuit 50, causes the voltage of the signal S12 to transition from a high level to a low level, when the voltage of the signal S11 becomes larger than the threshold voltage of the inverter.

In addition, when the voltage of the signal S1 becomes larger than the threshold voltage of the inverter in association with the recharge of the light-receiving element 10 by the supply part 30, the first output circuit 40 causes the voltage of the signal S11 to transition from a high level to a low level. In this case, when the voltage of the signal S11 becomes smaller than the threshold voltage of the inverter, the second output circuit 50 causes the voltage of the signal S12 to transition from a low level to a high level. In this manner, the second output circuit 50 may output, as a pixel signal, the signal S12 to be a pulse signal to the signal processing section 112 (see Fig. 1) via the signal line L10.

Time from voltage drop between the electrodes of the light-receiving element 10 due to the light reception of photons to voltage rise between the electrodes of the light-receiving element 10 due to the recharge is dead time (Dead time). The dead time can also be referred to as a period during which quench and the recharge are performed. The dead time is, for example, a period from a rising timing of the signal S11, which is an output signal of the first output circuit 40, to a falling timing thereof, i.e., time corresponding to a high-level pulse width of the signal S11.

In the example illustrated in Fig. 2, the dead time is, for example, time equivalent to a period from the time when the voltage of the signal S11 exceeds a threshold voltage of the second output circuit 50 to the time when the voltage of the signal S11 falls to or below the threshold voltage of the second output circuit 50. In the photodetector 1, in a case where the dead time is long, there is a possibility that it may not be possible to perform photodetection with high accuracy.

Therefore, in the photodetector 1 according to the present embodiment, the first output circuit 40 includes the resistance element R electrically coupled in series to the transistor M1 and the transistor M2. This makes it possible to shorten the transition time of the signal S11 of the first output circuit 40. For example, it is possible to shorten a period until the time when the voltage of the signal S11 falls to or below the threshold voltage of the second output circuit 50. It becomes possible to shorten the dead time, and thus to suppress a decrease in the accuracy of the photodetection. Hereinafter, description is given further of the photodetector 1 according to the present embodiment.

Fig. 3 is an explanatory timing chart of an operation example of the photodetector according to the embodiment. Description is given, with reference to Fig. 2, the timing chart of Fig. 3, and other drawings, of the operation example of the photodetector 1. In Fig. 3, the signal S1, a current I1 flowing to the resistance element R, the signal S11, and the signal S12 are schematically illustrated on the same time axis.

During a period from time t1 to time t2, when photons enter the light-receiving element 10 to cause occurrence of avalanche multiplication, a current flowing through the light-receiving element 10 increases, thus decreasing a potential difference between the cathode and the anode of the light-receiving element 10. In the example illustrated in Figs. 2 and 3, a cathode voltage of the light-receiving element 10 decreases, thus decreasing the voltage of the signal S1 to be inputted to the first output circuit 40.

During the period from the time t1 to the time t2, the potential difference between the electrodes of the light-receiving element 10 becomes smaller than the breakdown voltage, thus causing the avalanche multiplication to be stopped (quenched). The first output circuit 40 causes the voltage of the signal S11 to transition from a low level to a high level, in association with the decrease in the voltage of the signal S1. The second output circuit 50 causes the voltage of the signal S12 to transition from a high level to a low level, depending on the voltage of the signal S11.

During a period from the time t2 to time t3, when the light-receiving element 10 is supplied with a current (recharge current) from the supply part 30, the potential difference between the electrodes of the light-receiving element 10 increases. In the example illustrated in Figs. 2 and 3, the cathode voltage of the light-receiving element 10, i.e., the voltage of the signal S1 increases.

The potential difference between the electrodes of the light-receiving element 10 becomes larger than the breakdown voltage, thus bringing the light-receiving element 10 back into a state that enables an operation in the Geiger mode. The first output circuit 40 changes the voltage of the signal S11 from a high level to a low level, in association with the increase in the voltage of the signal S1. In addition, the second output circuit 50 changes the voltage of the signal S12 from a low level to a high level, in association with the decrease in the voltage of the signal S11.

If the first output circuit 40 does not include the resistance element R, as schematically indicated by a broken line A1 in Fig. 3, there is a possibility that it may take longer time to decrease the voltage of the signal S11 to or below a threshold voltage Vt of the second output circuit 50. The dead time may increase due to delayed time (delayed amount) in the first output circuit 40. For this reason, for example, as schematically indicated by a broken line A2 in Fig. 4, there is a possibility that the signal S12 to be a pulse signal in response to the reception of light from the measurement target may not be appropriately generated, thus making it unable to accurately perform the photodetection.

The photodetector 1 according to the present embodiment is provided with the resistance element R, as described above. This makes it possible to shorten the time until the voltage of the signal S11 is decreased to or below the threshold voltage Vt of the second output circuit 50, as indicated by a solid line in Fig. 3. Providing the first output circuit 40 with the resistance element R allows the current I1, which is to be a flow-through current, to flow to the resistance element R, thus making it possible to accelerate the voltage drop of the signal S11. It becomes possible to shorten the time until the voltage of the signal S11 reaches (changes to) the threshold voltage Vt of the second output circuit 50.

In this manner, in the present embodiment, providing the resistance element R makes it possible to achieve shorter dead time. As indicated by a solid line in Fig. 4, it is possible to appropriately generate the signal S12 to be a pulse signal, and thus to accurately perform the photodetection. It becomes possible to appropriately measure distances to a plurality of objects in the vicinity.

In addition, in the photodetector 1, the resistance element R is electrically coupled between the transistor M1 and the transistor M2. It is therefore possible to suppress a decrease in the voltage between the gate and the source of each of the transistor M1 and the transistor M2. This makes it possible to effectively reduce the dead time.

Fig. 5 is an explanatory diagram of an operation example of the photodetector according to the embodiment. (A) of Fig. 5 exemplifies a case where an electronic apparatus (e.g., a smartphone), to which the photodetector 1 is applied, is used to measure a distance to a person to be a measurement target. (B) of Fig. 5 schematically illustrates an example of histogram data to be obtained by the photodetector 1.

As described above, the photodetector 1 includes the resistance element R, thus making it possible to achieve lower dead time. This may enable the photodetector 1 to generate histogram data by capturing reflected light (signal light) from a person behind an automatic door that is a translucent body such as a glass, for example, as illustrated in (A) and (B) of Fig. 5. In the example illustrated in (B) of Fig. 5, the photodetector 1 is able to appropriately measure a distance to the automatic door and a distance to the person. It becomes possible to achieve a photodetector having higher performance of distinction.

Fig. 6 is a diagram illustrating a configuration example of the photodetector according to the embodiment. The photodetector 1 may have a stacked structure in which a plurality of substrates is stacked. In the example illustrated in (A) and (B) of Fig. 6, the photodetector 1 includes a first substrate 101 and a second substrate 102. The photodetector 1 has a stacked structure in which the first substrate 101 and the second substrate 102 are stacked. The first substrate 101 and the second substrate 102 are stacked to overlap each other.

The plurality of substrates of the photodetector 1 (the first substrate 101 and the second substrate 102 in Fig. 6) is configured by a semiconductor substrate (e.g., silicon substrate, SOI substrate, etc.). As an example, the first substrate 101 and the second substrate 102 are bonded to each other by a junction between metal electrodes including Cu, i.e., a Cu-Cu junction. The first substrate 101 and the second substrate 102 may be coupled to each other via a TSV (Through Silicon Via). A circuit of the first substrate 101 and a circuit of the second substrate 102 are electrically coupled to each other via a through-electrode, for example. It is to be noted that a bump (e.g., micro bump) may be used to stack the plurality of substrates.

(A) of Fig. 6 illustrates an example of a planar configuration in the first substrate 101 of the photodetector 1. (B) of Fig. 6 illustrates an example of a planar configuration in the second substrate 102 of the photodetector 1. In the first substrate 101, e.g., in the first substrate 101 provided with the light-receiving element 10 of each of the pixels P of the pixel section 100, the plurality of light-receiving elements 10 may be arranged in a horizontal direction (a row direction) as a first direction and in a vertical direction (a column direction) as a second direction orthogonal to the first direction, as in the example illustrated in (A) of Fig. 6.

The second substrate 102 includes, for example, the readout circuit 20, the signal processing section 112, the control section 113, and the like of each of the pixels P, as in the example illustrated in (B) of Fig. 6. As illustrated in (A) and (B) of Fig. 6, the readout circuit 20 is provided for a region of one pixel P. The signal processing section 112, the control section 113, and the like are arranged, for examples, in a peripheral region of a plurality of readout circuits 20 arranged in matrix.

The readout circuit 20 may be provided for a region of the plurality of pixels P sharing the readout circuit 20, as illustrated in (A) and (B) of Fig. 7. In the example illustrated in (A) and (B) of Fig. 7, the readout circuit 20 is arranged for a region of four pixels Pa to Pd each including the light-receiving element 10.

The resistance element R described above may be provided, for example, in a substrate (semiconductor substrate) in which each transistor of the readout circuit 20 is provided. As an example, the resistance element R may be a substrate resistor formed by doping the semiconductor substrate with impurities. It is to be noted that the resistance element R may be provided in a wiring layer on the semiconductor substrate (semiconductor layer).

Fig. 8 is an explanatory diagram of a configuration example of the photodetector according to the embodiment. As an example, the resistance element R may be provided in a wiring layer between a plurality of substrates (semiconductor layers). In the example illustrated in Fig. 8, the resistance element R is formed in a wiring layer 121 provided between the first substrate 101 and the second substrate 102. The resistance element R may be configured by, for example, a metal material such as tungsten (W) or titanium (Ti), polysilicon (Poly-Si), or the like.

It is to be noted that the resistance element R may be provided in the wiring layer 121 as in the example schematically illustrated in Fig. 8, or may be provided in a wiring layer 122. In addition, the resistance element R may be provided in the second substrate 102. The resistance element R may be configured by a Poly resistor, or may be configured by a transistor. It is to be noted that the resistance element R may be provided in the first substrate 101.

Figs. 9 to 11 are each a diagram illustrating another configuration example of the photodetector according to the embodiment. The light-receiving element 10 and the readout circuit 20 of each of the pixels P, the signal processing section 112, the control section 113, and the like may be provided in one semiconductor substrate (the first substrate 101 in Fig. 9), as in the example illustrated in Fig. 9. In addition, as in the example illustrated in Fig. 9, the converter 70, which is the TDC circuit, may be arranged for each of the pixels P.

As in the example illustrated in Fig. 10 or 11, the photodetector 1 may include the first substrate 101, the second substrate 102, and a third substrate 103. In the third substrate 103, for example, the signal processing section 112, the control section 113, and the like may be arranged, as in the example illustrated in (C) of Fig. 10 or (C) of Fig. 11. It is to be noted that, as illustrated in (C) of Fig. 11, the converter 70 may be provided for each of the pixels P. In the example illustrated in Fig. 11, the signal processing section 112 and the control section 113 are arranged in a peripheral region of a plurality of converters 70 arranged two-dimensionally.

Workings and Effects

The photodetector (photodetector 1) according to the present embodiment includes: a light-receiving element (light-receiving element 10) configured to receive light and output a current; and a first output circuit (first output circuit 40) that is configured to output a first signal (signal S11) based on a current of the light-receiving element and includes a P-type transistor (transistor M2), an N-type transistor (transistor M1), and a resistance element (resistance element R) electrically coupled in series between a first power supply line (e.g., power supply line L1a) and a reference potential line (reference potential line L2b).

In the photodetector 1 according to the present embodiment, the first output circuit 40 includes the resistance element R electrically coupled in series to the transistor M1 and the transistor M2. This makes it possible to shorten the dead time. It becomes possible to achieve a photodetector having favorable detection performance.

Next, description is given of modification examples of the present disclosure. Hereinafter, components similar to those of the foregoing embodiment are denoted by the same reference numerals, and descriptions thereof are omitted as appropriate.
<2. Modification Examples>
(2-1. Modification Example 1)

Figs. 12A and 12B are each an explanatory diagram of a configuration example of a photodetector according to Modification Example 1 of the present disclosure. The resistance element R may be configured using a transistor M5, as in the example illustrated in Fig. 12A or 12B. Configuring the resistance element R by the transistor enables implementation of the resistance element R in a relatively small area. In the example illustrated in Fig. 12A, the transistor M5 includes a gate to which a predetermined voltage (potential) is applied, and may constitute a resistance element (resistor).

In the example illustrated in Fig. 12B, the resistance element R is configured by the diode-coupled transistor M5. Providing the diode-coupled transistor M5 makes it possible to suppress a voltage amplitude of the signal S11, and thus to reduce the dead time. Also in the case of the present modification example, it is possible to obtain effects similar to those of the foregoing embodiment.
(2-2. Modification Example 2)

The description has been given, in the foregoing embodiment, of the configuration examples of the pixel P and the readout circuit 20, but the configuration examples thereof are merely exemplary. The configurations of the pixel P and the readout circuit 20 are not limited to the above-described examples. Fig. 13 is an explanatory diagram of a configuration example of a photodetector according to Modification Example 2. For example, as in the example illustrated in Fig. 13, the resistance element R of the first output circuit 40 may be electrically coupled in series between the power supply line L1a and the transistor M2.

Fig. 14A is an explanatory diagram of another configuration example of the photodetector according to Modification Example 2. In the example illustrated in 14A, the cathode of the light-receiving element 10 is electrically coupled to the power supply line L1b. In addition, the anode of the light-receiving element 10 is electrically coupled to the supply part 30 and the first output circuit 40. The cathode of the light-receiving element 10 is supplied with the voltage VSP, for example, from a power supply section (power supply circuit) that is able to supply a voltage via the power supply line L1b. The voltage VSP is a positive (plus) voltage, for example.

In the example illustrated in Fig. 14A, the resistance element R is electrically coupled between the transistor M1 and the node N2. It is to be noted that, as in the example illustrated in Fig. 14B, the resistance element R may be electrically coupled between the transistor M1 and the reference potential line L2b. Also in the case of the photodetector 1 according to the present modification example, providing the resistance element R makes it possible to prevent an increase in the dead time. It becomes possible to suppress deterioration in the accuracy of the photodetection.

(2-3. Modification Example 3)
Figs. 15 and 16 are each an explanatory diagram of a configuration example of a photodetector according to Modification Example 3. As in the example illustrated in Fig. 15 or 16, the first output circuit 40 may include circuits (e.g., inverters) in a plurality of stages. The first output circuit 40 may output the signal S11 amplified by the circuits in the plurality of stages. As in the example illustrated in Fig. 15, for example, the resistance element R may be electrically coupled in series between a transistor M1c and a transistor M2c in a third stage of the plurality of stages.

In addition, as in the example illustrated in Fig. 16, for example, the resistance element R may be electrically coupled in series between a transistor M1a and a transistor M2a in a first stage. Also in the present modification example, it is possible to obtain effects similar to those of the foregoing embodiment. It is to be noted that the first output circuit 40 and the second output circuit 50 may each include circuits in a plurality of stages.
(2-4. Modification Example 4)

In the foregoing embodiment and modification examples, the description has been given of the configuration example of the first output circuit 40, but the configuration of the first output circuit 40 is not limited to the above-described example. Figs. 17 and 18 are each an explanatory diagram of a configuration example of a photodetector according to Modification Example 4. The first output circuit 40 may have a configuration of a NAND circuit, as in the example illustrated in Fig. 17 or 18.

The pixel control section 111 (see Fig. 1) is configured to be able to supply the first output circuit 40 with a signal EN to be an enable signal, for example, and control an output of a signal of the first output circuit 40. For example, in a case where the signal EN, which is a control signal, is at a high level, the first output circuit 40 is able to generate the signal S11 and output the generated signal S11 to the second control signal 50. It is to be noted that the first output circuit 40 may have a configuration of a NOR circuit. In addition, the second output circuit 50 may have a configuration of a NAND circuit, a NOR circuit, or the like.
(2-5. Modification Example 5)

Fig. 19 is an explanatory diagram of a configuration example of a photodetector according to Modification Example 5. The first output circuit 40 and the second output circuit 50 may be electrically coupled to reference potential lines different from each other. In the example illustrated in Fig. 19, the first output circuit 40 is electrically coupled to the reference potential line L2b. In addition, the second output circuit 50 is electrically coupled to a reference potential line L3b. In this case, it is possible to suppress, between the first output circuit 40 and the second output circuit 50, propagation of a noise component in IR drop caused by a flow-through current.

<3. Usage Examples>
For example, the photodetector 1 and the photodetection system 200 described above is usable in a variety of cases of sensing light, including visible light, infrared light, ultraviolet light, and X-rays, as follows.
- Apparatuses that shoot images for appreciation, including digital cameras and mobile equipment having a camera function
- Apparatuses for traffic use, including onboard sensors that shoot images of the front, back, surroundings, inside, and so on of an automobile for safe driving such as automatic stop and for recognition of a driver's state, monitoring cameras that monitor traveling vehicles and roads, and distance measurement sensors that measure distances including a vehicle-to-vehicle distance
- Apparatuses for use in home electrical appliances including televisions, refrigerators, and air-conditioners to shoot images of a user's gesture and bring the appliances into operation in accordance with the gesture
- Apparatuses for medical treatment and health care use, including endoscopes and apparatuses that shoot images of blood vessels by receiving infrared light
- Apparatuses for security use, including monitoring cameras for crime prevention and cameras for individual authentication
- Apparatuses for beauty care use, including skin measuring apparatuses that shoot images of skin and microscopes that shoot images of scalp
- Apparatuses for sports use, including action cameras and wearable cameras for sports applications and the like
- Apparatuses for agricultural use, including cameras for monitoring the states of fields and crops
<4. Practical Application Example>
(Example of Practical Application to Mobile Body)

The technology (the present technology) according to the present disclosure is applicable to a variety of products. For example, the technology according to the present disclosure may be achieved as a device mounted on any type of mobile body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility, an aircraft, a drone, a vessel, or a robot.

Fig. 20 is a block diagram depicting an example of schematic configuration of a vehicle control system as an example of a mobile body control system to which the technology according to an embodiment of the present disclosure can be applied.

The vehicle control system 12000 includes a plurality of electronic control units connected to each other via a communication network 12001. In the example depicted in Fig. 20, the vehicle control system 12000 includes a driving system control unit 12010, a body system control unit 12020, an outside-vehicle information detecting unit 12030, an in-vehicle information detecting unit 12040, and an integrated control unit 12050. In addition, a microcomputer 12051, a sound/image output section 12052, and a vehicle-mounted network interface (I/F) 12053 are illustrated as a functional configuration of the integrated control unit 12050.

The driving system control unit 12010 controls the operation of devices related to the driving system of the vehicle in accordance with various kinds of programs. For example, the driving system control unit 12010 functions as a control device for a driving force generating device for generating the driving force of the vehicle, such as an internal combustion engine, a driving motor, or the like, a driving force transmitting mechanism for transmitting the driving force to wheels, a steering mechanism for adjusting the steering angle of the vehicle, a braking device for generating the braking force of the vehicle, and the like.

The body system control unit 12020 controls the operation of various kinds of devices provided to a vehicle body in accordance with various kinds of programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various kinds of lamps such as a headlamp, a backup lamp, a brake lamp, a turn signal, a fog lamp, or the like. In this case, radio waves transmitted from a mobile device as an alternative to a key or signals of various kinds of switches can be input to the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals, and controls a door lock device, the power window device, the lamps, or the like of the vehicle.

The outside-vehicle information detecting unit 12030 detects information about the outside of the vehicle including the vehicle control system 12000. For example, the outside-vehicle information detecting unit 12030 is connected with an imaging section 12031. The outside-vehicle information detecting unit 12030 makes the imaging section 12031 image an image of the outside of the vehicle, and receives the imaged image. On the basis of the received image, the outside-vehicle information detecting unit 12030 may perform processing of detecting an object such as a human, a vehicle, an obstacle, a sign, a character on a road surface, or the like, or processing of detecting a distance thereto.

The imaging section 12031 is an optical sensor that receives light, and which outputs an electric signal corresponding to a received light amount of the light. The imaging section 12031 can output the electric signal as an image, or can output the electric signal as information about a measured distance. In addition, the light received by the imaging section 12031 may be visible light, or may be invisible light such as infrared rays or the like.

The in-vehicle information detecting unit 12040 detects information about the inside of the vehicle. The in-vehicle information detecting unit 12040 is, for example, connected with a driver state detecting section 12041 that detects the state of a driver. The driver state detecting section 12041, for example, includes a camera that images the driver. On the basis of detection information input from the driver state detecting section 12041, the in-vehicle information detecting unit 12040 may calculate a degree of fatigue of the driver or a degree of concentration of the driver, or may determine whether the driver is dozing.

The microcomputer 12051 can calculate a control target value for the driving force generating device, the steering mechanism, or the braking device on the basis of the information about the inside or outside of the vehicle which information is obtained by the outside-vehicle information detecting unit 12030 or the in-vehicle information detecting unit 12040, and output a control command to the driving system control unit 12010. For example, the microcomputer 12051 can perform cooperative control intended to implement functions of an advanced driver assistance system (ADAS) which functions include collision avoidance or shock mitigation for the vehicle, following driving based on a following distance, vehicle speed maintaining driving, a warning of collision of the vehicle, a warning of deviation of the vehicle from a lane, or the like.

In addition, the microcomputer 12051 can perform cooperative control intended for automated driving, which makes the vehicle to travel automatedly without depending on the operation of the driver, or the like, by controlling the driving force generating device, the steering mechanism, the braking device, or the like on the basis of the information about the outside or inside of the vehicle which information is obtained by the outside-vehicle information detecting unit 12030 or the in-vehicle information detecting unit 12040.

In addition, the microcomputer 12051 can output a control command to the body system control unit 12020 on the basis of the information about the outside of the vehicle which information is obtained by the outside-vehicle information detecting unit 12030. For example, the microcomputer 12051 can perform cooperative control intended to prevent a glare by controlling the headlamp so as to change from a high beam to a low beam, for example, in accordance with the position of a preceding vehicle or an oncoming vehicle detected by the outside-vehicle information detecting unit 12030.

The sound/image output section 12052 transmits an output signal of at least one of a sound and an image to an output device capable of visually or auditorily notifying information to an occupant of the vehicle or the outside of the vehicle. In the example of Fig. 20, an audio speaker 12061, a display section 12062, and an instrument panel 12063 are illustrated as the output device. The display section 12062 may, for example, include at least one of an on-board display and a head-up display.

Fig. 21 is a diagram depicting an example of the installation position of the imaging section 12031.

In Fig. 21, the imaging section 12031 includes imaging sections 12101, 12102, 12103, 12104, and 12105.

The imaging sections 12101, 12102, 12103, 12104, and 12105 are, for example, disposed at positions on a front nose, sideview mirrors, a rear bumper, and a back door of the vehicle 12100 as well as a position on an upper portion of a windshield within the interior of the vehicle. The imaging section 12101 provided to the front nose and the imaging section 12105 provided to the upper portion of the windshield within the interior of the vehicle obtain mainly an image of the front of the vehicle 12100. The imaging sections 12102 and 12103 provided to the sideview mirrors obtain mainly an image of the sides of the vehicle 12100. The imaging section 12104 provided to the rear bumper or the back door obtains mainly an image of the rear of the vehicle 12100. The imaging section 12105 provided to the upper portion of the windshield within the interior of the vehicle is used mainly to detect a preceding vehicle, a pedestrian, an obstacle, a signal, a traffic sign, a lane, or the like.

Incidentally, Fig. 21 depicts an example of photographing ranges of the imaging sections 12101 to 12104. An imaging range 12111 represents the imaging range of the imaging section 12101 provided to the front nose. Imaging ranges 12112 and 12113 respectively represent the imaging ranges of the imaging sections 12102 and 12103 provided to the sideview mirrors. An imaging range 12114 represents the imaging range of the imaging section 12104 provided to the rear bumper or the back door. A bird’s-eye image of the vehicle 12100 as viewed from above is obtained by superimposing image data imaged by the imaging sections 12101 to 12104, for example.

At least one of the imaging sections 12101 to 12104 may have a function of obtaining distance information. For example, at least one of the imaging sections 12101 to 12104 may be a stereo camera constituted of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

For example, the microcomputer 12051 can determine a distance to each three-dimensional object within the imaging ranges 12111 to 12114 and a temporal change in the distance (relative speed with respect to the vehicle 12100) on the basis of the distance information obtained from the imaging sections 12101 to 12104, and thereby extract, as a preceding vehicle, a nearest three-dimensional object in particular that is present on a traveling path of the vehicle 12100 and which travels in substantially the same direction as the vehicle 12100 at a predetermined speed (for example, equal to or more than 0 km/hour). Further, the microcomputer 12051 can set a following distance to be maintained in front of a preceding vehicle in advance, and perform automatic brake control (including following stop control), automatic acceleration control (including following start control), or the like. It is thus possible to perform cooperative control intended for automated driving that makes the vehicle travel automatedly without depending on the operation of the driver or the like.

For example, the microcomputer 12051 can classify three-dimensional object data on three-dimensional objects into three-dimensional object data of a two-wheeled vehicle, a standard-sized vehicle, a large-sized vehicle, a pedestrian, a utility pole, and other three-dimensional objects on the basis of the distance information obtained from the imaging sections 12101 to 12104, extract the classified three-dimensional object data, and use the extracted three-dimensional object data for automatic avoidance of an obstacle. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that the driver of the vehicle 12100 can recognize visually and obstacles that are difficult for the driver of the vehicle 12100 to recognize visually. Then, the microcomputer 12051 determines a collision risk indicating a risk of collision with each obstacle. In a situation in which the collision risk is equal to or higher than a set value and there is thus a possibility of collision, the microcomputer 12051 outputs a warning to the driver via the audio speaker 12061 or the display section 12062, and performs forced deceleration or avoidance steering via the driving system control unit 12010. The microcomputer 12051 can thereby assist in driving to avoid collision.

At least one of the imaging sections 12101 to 12104 may be an infrared camera that detects infrared rays. The microcomputer 12051 can, for example, recognize a pedestrian by determining whether or not there is a pedestrian in imaged images of the imaging sections 12101 to 12104. Such recognition of a pedestrian is, for example, performed by a procedure of extracting characteristic points in the imaged images of the imaging sections 12101 to 12104 as infrared cameras and a procedure of determining whether or not it is the pedestrian by performing pattern matching processing on a series of characteristic points representing the contour of the object. When the microcomputer 12051 determines that there is a pedestrian in the imaged images of the imaging sections 12101 to 12104, and thus recognizes the pedestrian, the sound/image output section 12052 controls the display section 12062 so that a square contour line for emphasis is displayed so as to be superimposed on the recognized pedestrian. The sound/image output section 12052 may also control the display section 12062 so that an icon or the like representing the pedestrian is displayed at a desired position.

The description has been given hereinabove of the mobile body control system to which the technology according to an embodiment of the present disclosure is applicable. The technology according to an embodiment of the present disclosure is applicable to the imaging section 12031, for example, of the configurations described above. Specifically, for example, the photodetector 1 can be applied to the imaging section 12031. Applying the technology according to an embodiment of the present disclosure to the imaging section 12031 enables obtainment of a photographed image having high definition, thus making it possible to perform highly accurate control utilizing the photographed image in the mobile body control system.

Although the description has been given hereinabove of the present disclosure with reference to the embodiment, the modification examples, the usage examples, and the practical application example, the present technology is not limited to the foregoing embodiments and the like, and may be modified in a wide variety of ways. For example, although the foregoing modification examples have been described as modification examples of the foregoing embodiments, the configurations of the respective modification examples may be combined as appropriate.

The photodetector according to an embodiment of the present disclosure includes: a light-receiving element configured to receive light and output a current; and a first output circuit that is configured to output a first signal based on a current of the light-receiving element and includes a P-type transistor, an N-type transistor, and a resistance element electrically coupled in series between a first power supply line and a reference potential line. This makes it possible to achieve a photodetector having favorable detection performance.

It is to be noted that the effects described herein are merely exemplary and are not limited to the description, and may further include other effects. In addition, the present disclosure may also have the following configurations.
(1)
A photodetector including:
a light-receiving element configured to receive light and output a current; and
a first output circuit including a P-type transistor, an N-type transistor, and a resistance element electrically coupled in series between a first power supply line and a reference potential line, the first output circuit being configured to output a first signal based on a current of the light-receiving element.
(2)
The photodetector according to (1), in which the resistance element is electrically coupled in series between the P-type transistor and the N-type transistor.
(3)
The photodetector according to (1) or (2), in which the resistance element is electrically coupled between the P-type transistor and a first node to which the first signal is outputted.
(4)
The photodetector according to any one of (1) to (3), further including a second output circuit configured to output a second signal based on the first signal, in which
the light-receiving element includes a cathode electrically coupled to the first output circuit,
the resistance element is electrically coupled between the P-type transistor and the first node to which the first signal is outputted, and is electrically coupled to the N-type transistor via the first node, and
the second output circuit is electrically coupled to the first node.
(5)
The photodetector according to any one of (1) to (3), in which
the light-receiving element includes a cathode electrically coupled to the first output circuit, and
the resistance element is electrically coupled between the first power supply line and the P-type transistor.
(6)
The photodetector according to (1) or (2), further including a second output circuit configured to output a second signal based on the first signal, in which
the light-receiving element includes an anode electrically coupled to the first output circuit,
the resistance element is electrically coupled between the N-type transistor and a first node to which the first signal is outputted, and is electrically coupled to the P-type transistor via the first node, and
the second output circuit is electrically coupled to the first node.
(7)
The photodetector according to (1) or (2), in which
the light-receiving element includes an anode electrically coupled to the first output circuit, and
the resistance element is electrically coupled between the N-type transistor and the reference potential line.
(8)
The photodetector according to any one of (1) to (7), in which the P-type transistor and the N-type transistor each include a gate electrically coupled to the light-receiving element.
(9)
The photodetector according to any one of (1) to (8), further including a supply circuit configured to supply a current to the light-receiving element.
(10)
The photodetector according to any one of (1) to (9), in which the first output circuit includes an inverter including the P-type transistor and the N-type transistor.
(11)
The photodetector according to any one of (1) to (10), further including the second output circuit electrically coupled to the first output circuit and being configured to output the second signal based on the first signal, in which
the second output circuit is electrically coupled to a second power supply line different from the first power supply line.
(12)
The photodetector according to any one of (1) to (11), further including:
a first substrate including a plurality of the light-receiving elements; and
a second substrate including a plurality of the first output circuits, the second substrate being stacked on the first substrate.
(13)
The photodetector according to (12), further including the second output circuit electrically coupled to the first output circuit and being configured to output the second signal based on the first signal, in which
the second substrate includes a plurality of the second output circuits.
(14)
The photodetector according to (13), in which the first output circuit and the second output circuit are provided for each of the light-receiving elements or for every plurality of the light-receiving elements.
(15)
The photodetector according to any one of (12) to (14), further including a third substrate including a signal processing section configured to perform signal processing.
(16)
The photodetector according to (15), further including the second output circuit electrically coupled to the first output circuit and being configured to output the second signal based on the first signal, in which
the third substrate includes the plurality of the second output circuits, and
the signal processing section is configured to execute signal processing of the second signal.
(17)
The photodetector according to any one of (1) to (16), in which the resistance element is configured using a transistor.
(18)
The photodetector according to any one of (1) to (17), in which the reference potential line includes a ground line.
(19)
The photodetector according to any one of (1) to (18), in which the light-receiving element includes an avalanche photodiode.
(20)
A photodetection system including:
a light source configured to irradiate an object with light; and
a photodetector that receives light from the object,
the photodetector including
a light-receiving element configured to receive light and output a current, and
a first output circuit including a P-type transistor, an N-type transistor, and a resistance element electrically coupled in series between a first power supply line and a reference potential line, the first output circuit being configured to output a first signal based on a current of the light-receiving element.
(21)
A photodetector comprising:
a light-receiving element configured to receive light and output a current; and
a first output circuit including a P-type transistor, an N-type transistor, and a resistance element electrically coupled between a first power supply line and a reference potential line, the first output circuit being configured to output a first signal based on a current of the light-receiving element.
(22)
The photodetector according to (21), wherein the resistance element is electrically coupled in series between the P-type transistor and the N-type transistor.
(23)
The photodetector according to any one of (21) or (22), further comprising:
a second output circuit configured to output a second signal based on the first signal, wherein
the first output circuit is electrically coupled to the N-type transistor via a first node, the first output circuit is configured to output the first signal at the first node,
the light-receiving element includes a second node electrically coupled to the first output circuit, and
the second output circuit is electrically coupled to the first node.
(24)
The photodetector according to any one of (21) to (23), wherein the first output circuit is configured to output the first signal at a first node, and the resistance element is electrically coupled between the P-type transistor and the first node.
(25)
The photodetector according to any one of (21) to (24), further comprising:
a third transistor as the resistance element,
wherein
the first output circuit is configured to output the first signal at a first node, , and
the third transistor is electrically coupled to the P-type transistor via a second node and electrically coupled to the first node.
(26)
The photodetector according to (25), wherein a gate of the third transistor is electrically coupled to the second node.
(27)
The photodetector according to (25), wherein a gate of the third transistor is electrically coupled to a predetermined voltage.
(28)
The photodetector according to any one of (21) to (27), wherein
the resistance element is electrically coupled between the first power supply line and the P-type transistor.
(29)
The photodetector according to any one of (21) to (28), wherein the first output circuit is configured to output the first signal at a first node, and
the resistance element is electrically coupled between the N-type transistor and the first node, and is electrically coupled to the P-type transistor via the first node.
(30)
The photodetector according to any one of (21) to (29),
the resistance element is electrically coupled between the N-type transistor and the reference potential line.
(31)
The photodetector according to any one of (21) to (30), wherein the P-type transistor includes a first gate electrically coupled to the light-receiving element, and the N-type transistor includes a second gate electrically coupled to the light-receiving element.
(32)
The photodetector according to any one of (21) to (31), further comprising:
a supply circuit configured to supply a current to the light-receiving element.
(33)
The photodetector according to any one of (21) to (32), wherein the first output circuit further includes an inverter including the P-type transistor and the N-type transistor.
(34)
The photodetector according to any one of (21) to (33), further comprising:
a second output circuit electrically coupled to the first output circuit and a second power supply line different from the first power supply line, the second output circuit is configured to output a second signal based on the first signal.
(35)
The photodetector according to any one of (21) to (34), further comprising:
a plurality of light-receiving elements including the light-receiving element;
a plurality of first output circuits including the first output circuit;
a first substrate including the plurality of light-receiving elements; and
a second substrate including the plurality of first output circuits, the second substrate being stacked on and distinct from the first substrate.

(36)
The photodetector according to (35), further comprising:
a plurality of second output circuits, one of the plurality of second output circuits is electrically coupled to the first output circuit and is configured to output a second signal based on the first signal, wherein
the second substrate includes the plurality of second output circuits.
(37)
The photodetector according to (36), further comprising:
a plurality of first output circuits, including the first output circuit; and
a plurality of light-receiving elements including the light-receiving element,
wherein each of the plurality of first output circuits is electrically coupled to a first one or more of the plurality of light-receiving elements, and
each of the plurality of second output circuits is electrically coupled to a second one or more of the plurality of light-receiving elements.
(38)
The photodetector according to (35), further comprising:
a third substrate including a signal processing section configured to perform signal processing.
(39)
The photodetector according to (38), further comprising:
a plurality of second output circuits, one of the plurality of second output circuits is t electrically coupled to the first output circuit and is configured to output a second signal based on the first signal, wherein
the third substrate includes the plurality of second output circuits, and
the signal processing section is configured to perform the signal processing on the second signal.
(40)
The photodetector according to any one of (21) to (39), wherein the reference potential line comprises a ground line.
(41)
The photodetector according to any one of (21) to (40), wherein the light-receiving element comprises an avalanche photodiode.
(42)
A photodetection system comprising:
a light source configured to irradiate an object with light; and
a photodetector that receives a portion of the light from the object,
the photodetector including
a light-receiving element configured to receive the portion of the light and output a current, and
a first output circuit including a P-type transistor, an N-type transistor, and a resistance element electrically coupled between a first power supply line and a reference potential line, the first output circuit being configured to output a first signal based on a current of the light-receiving element.

Reference Numerals List

1 photodetector
10 light-receiving element
20 readout circuit
30 supply part
40 first output circuit
50 second output circuit
100 pixel section
101 first substrate
102 second substrate
103 third substrate
112 signal processing section
200 photodetection system
210 light source control unit
220 light source

Claims

A photodetector comprising:
a light-receiving element configured to receive light and output a current; and
a first output circuit including a P-type transistor, an N-type transistor, and a resistance element electrically coupled between a first power supply line and a reference potential line, the first output circuit being configured to output a first signal based on a current of the light-receiving element.
The photodetector according to claim 1, wherein the resistance element is electrically coupled in series between the P-type transistor and the N-type transistor.
The photodetector according to claim 1, further comprising:
a second output circuit configured to output a second signal based on the first signal, wherein
the first output circuit is electrically coupled to the N-type transistor via a first node, the first output circuit is configured to output the first signal at the first node,
the light-receiving element includes a second node electrically coupled to the first output circuit, and
the second output circuit is electrically coupled to the first node.
The photodetector according to claim 1, wherein the first output circuit is configured to output the first signal at a first node, and the resistance element is electrically coupled between the P-type transistor and the first node.
The photodetector according to claim 1, further comprising:
a third transistor as the resistance element,
wherein
the first output circuit is configured to output the first signal at a first node, and
the third transistor is electrically coupled to the P-type transistor via a second node and electrically coupled to the first node.
The photodetector according to claim 5, wherein a gate of the third transistor is electrically coupled to the second node.
The photodetector according to claim 5, wherein a gate of the third transistor is electrically coupled to a predetermined voltage.
The photodetector according to claim 1, wherein
the resistance element is electrically coupled between the first power supply line and the P-type transistor.
The photodetector according to claim 1, wherein the first output circuit is configured to output the first signal at a first node, and
the resistance element is electrically coupled between the N-type transistor and the first node, and is electrically coupled to the P-type transistor via the first node.
The photodetector according to claim 1,
the resistance element is electrically coupled between the N-type transistor and the reference potential line.
The photodetector according to claim 1, wherein the P-type transistor includes a first gate electrically coupled to the light-receiving element, and the N-type transistor includes a second gate electrically coupled to the light-receiving element.
The photodetector according to claim 1, further comprising:
a supply circuit configured to supply a current to the light-receiving element.
The photodetector according to claim 1, wherein the first output circuit further includes an inverter including the P-type transistor and the N-type transistor.
The photodetector according to claim 1, further comprising:
a second output circuit electrically coupled to the first output circuit and a second power supply line different from the first power supply line, the second output circuit is configured to output a second signal based on the first signal.
The photodetector according to claim 1, further comprising:
a plurality of light-receiving elements including the light-receiving element;
a plurality of first output circuits including the first output circuit;
a first substrate including the plurality of light-receiving elements; and
a second substrate including the plurality of first output circuits, the second substrate being stacked on and distinct from the first substrate.
The photodetector according to claim 15, further comprising:
a plurality of second output circuits, one of the plurality of second output circuits is electrically coupled to the first output circuit and is configured to output a second signal based on the first signal, wherein
the second substrate includes the plurality of second output circuits.
The photodetector according to claim 16, further comprising:
a plurality of first output circuits, including the first output circuit; and
a plurality of light-receiving elements including the light-receiving element,
wherein each of the plurality of first output circuits is electrically coupled to a first one or more of the plurality of light-receiving elements, and
each of the plurality of second output circuits is electrically coupled to a second one or more of the plurality of light-receiving elements.
The photodetector according to claim 15, further comprising:
a third substrate including a signal processing section configured to perform signal processing.
The photodetector according to claim 18, further comprising:
a plurality of second output circuits, one of the plurality of second output circuits is t electrically coupled to the first output circuit and is configured to output a second signal based on the first signal, wherein
the third substrate includes the plurality of second output circuits, and
the signal processing section is configured to perform the signal processing on the second signal.
The photodetector according to claim 1, wherein the reference potential line comprises a ground line.
The photodetector according to claim 1, wherein the light-receiving element comprises an avalanche photodiode.
A photodetection system comprising:
a light source configured to irradiate an object with light; and
a photodetector that receives a portion of the light from the object,
the photodetector including
a light-receiving element configured to receive the portion of the light and output a current, and
a first output circuit including a P-type transistor, an N-type transistor, and a resistance element electrically coupled between a first power supply line and a reference potential line, the first output circuit being configured to output a first signal based on a current of the light-receiving element.