WO2025007923A1 - 数据分级存储 - Google Patents

数据分级存储 Download PDF

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Publication number
WO2025007923A1
WO2025007923A1 PCT/CN2024/103629 CN2024103629W WO2025007923A1 WO 2025007923 A1 WO2025007923 A1 WO 2025007923A1 CN 2024103629 W CN2024103629 W CN 2024103629W WO 2025007923 A1 WO2025007923 A1 WO 2025007923A1
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WIPO (PCT)
Prior art keywords
data
storage area
target data
access frequency
mark
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PCT/CN2024/103629
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English (en)
French (fr)
Inventor
沈春杰
白墨琛
陆江涛
张吉
韩旭东
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Alipay Hangzhou Information Technology Co Ltd
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Alipay Hangzhou Information Technology Co Ltd
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Publication of WO2025007923A1 publication Critical patent/WO2025007923A1/zh
Priority to US19/417,236 priority Critical patent/US20260099444A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0811—Multiuser, multiprocessor or multiprocessing cache systems with multilevel cache hierarchies
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604—Improving or facilitating administration, e.g. storage management
    • G06F3/0607—Improving or facilitating administration, e.g. storage management by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G06F12/0868—Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638—Organizing or formatting or addressing of data
    • G06F3/0644—Management of space entities, e.g. partitions, extents, pools
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656—Data buffering arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/604—Details relating to cache allocation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • the present invention relates to the technical field of data storage, and in particular to a data hierarchical storage method and system.
  • Some embodiments of this specification aim to provide a data hierarchical storage method that supports large-capacity data storage while effectively improving data access efficiency.
  • One or more embodiments of the present specification provide a data hierarchical storage method, which is executed by more than one processor, and includes: obtaining a current access frequency of the target data based on an access request for the target data initiated to a first storage area and a historical access frequency of the target data; the data in the first storage area is migrated from the second storage area and has a historical access frequency mark, which reflects the historical number of times the corresponding data has been requested to be accessed from the first storage area; when the current access frequency is greater than a cache threshold, the target data is retained in the first storage area or migrated from the second storage area to the first storage area, and its historical access frequency mark is updated based on the current access frequency of the target data; the first storage area has a data transmission bandwidth greater than that of the second storage area.
  • the data hierarchical storage system includes: an access frequency determination module, which is used to obtain the current access frequency of the target data based on the access request for the target data initiated to the first storage area and the historical access frequency of the target data; the data in the first storage area is migrated from the second storage area and has a historical access frequency mark, which reflects the historical number of times the corresponding data is requested to be accessed from the first storage area; a grading module, which is used to retain the target data in the first storage area or migrate it from the second storage area to the first storage area when the current access frequency is greater than the cache threshold, and update its historical access frequency mark based on the current access frequency of the target data; the first storage area has a data transmission bandwidth greater than the second storage area.
  • One or more embodiments of the present specification provide a storage medium for storing computer instructions. When at least a portion of the computer instructions is executed by a processor, the aforementioned data hierarchical storage method is implemented.
  • One or more embodiments of the present specification provide a data hierarchical storage device, including a storage medium and a processor, wherein the storage medium stores computer instructions, and the processor is used to execute at least a portion of the computer instructions. Implement the aforementioned data hierarchical storage method.
  • One or more embodiments of the present specification provide a storage medium storing a cache data table, wherein the data in the cache data table is migrated from other storage areas and the historical access frequency is greater than a cache threshold; the data in the cache data table has a historical access frequency mark, and the historical access frequency mark reflects the historical number of times the corresponding data has been requested to access from the cache data table.
  • One or more embodiments of the present specification provide a data access method, which is executed by one or more processors, including: initiating an access request for target data to a first storage area; if the target data does not exist in the first storage area, initiating an access request for the target data to a second storage area; wherein the access includes reading or writing data, and the data is stored in the first storage area and the second storage area by the aforementioned data hierarchical storage method.
  • One or more embodiments of the present specification provide a data access system, including: a first access module, used to initiate an access request for target data to a first storage area; a second access module, used to initiate an access request for target data to a second storage area if the target data does not exist in the first storage area; wherein access includes reading or writing data, and the data is stored hierarchically in the first storage area and the second storage area through the aforementioned method.
  • One or more embodiments of the present specification provide a storage medium storing computer instructions, which implement the aforementioned data access method when the computer instructions are executed by a processor.
  • FIG. 1 is a schematic diagram of a data hierarchical storage architecture according to some embodiments of the present specification.
  • FIG. 4 is a schematic diagram of data access according to some embodiments of the present specification.
  • FIG. 5 is an exemplary block diagram of a data hierarchical storage system according to some embodiments of the present specification.
  • FIG. 6 is an exemplary block diagram of a data access system according to some embodiments of the present specification.
  • system means for distinguishing different components, elements, parts, portions or assemblies at different levels.
  • device means for distinguishing different components, elements, parts, portions or assemblies at different levels.
  • unit means for distinguishing different components, elements, parts, portions or assemblies at different levels.
  • the words can be replaced by other expressions.
  • click prediction model is used to predict the probability of a product being clicked (i.e. accepted) by a user after it is advertised or recommended to the user. For advertisers (or product recommenders), accurate click prediction can help them make better advertising and product recommendation decisions and improve the recommendation effect.
  • the input features used for click prediction are mostly high-dimensional sparse vectors, such as product numbers, user identifiers, display platform (or advertisement) identifiers, etc. These features are usually encoded (such as one-hot encoding) into vectors with a large number of elements, and most of the elements in the vector have a value of 0.
  • mapping is a technology that maps discrete objects (such as users, products or some specific features thereof) to an element or a "point" in a continuous low-dimensional vector space (embedded vector space).
  • This technology can capture the similarities and relationships between objects while mapping objects to "points" in the embedding vector space. Therefore, after mapping objects to corresponding "points" in the embedding vector space, these "points” still maintain the similarities and relationships between objects. Therefore, embedding technology is widely used in machine learning to efficiently and accurately Characterize the input features needed by the model, especially sparse features.
  • the embedding vector space is obtained following the model training.
  • the embedding vector space can be regarded as part of the model parameters, and the embedding vector therein is called the embedding parameter.
  • the "points" in the embedding vector space tend to converge, and will also increase with the increase in the number of training samples and their features. It can be seen that for models such as click prediction models that use high-dimensional sparse features as the main input features, their embedding parameters can reach hundreds of billions or even trillions, which brings huge storage pressure to the computing device.
  • the embedding parameters of the model may continue to grow, which not only further increases the storage pressure of the device, but also causes the memory usage of the computing device to continue to increase, which in turn causes the resource usage to exceed the pre-set quota and the problem of out of memory (OOM), which will further have a negative impact on the performance and stability of the computing device.
  • OOM problem of out of memory
  • some embodiments of this specification provide a data hierarchical storage method that supports large-capacity data storage while effectively improving data access efficiency. It should be noted that although some embodiments of this specification use the training of a click prediction model as an example, it should not be understood as a limitation on the application scenario of the technical solution provided in this specification.
  • the data hierarchical storage method provided in this specification can be applied to the storage and management of data in a computing device in any application scenario.
  • FIG. 1 is a schematic diagram of a data hierarchical storage architecture according to some embodiments of the present specification.
  • data is hierarchically stored in a first storage area and a second storage area, wherein the first storage area has a larger data transmission bandwidth than the second storage area, and the data transmission bandwidth here can be the rate at which the memory reads or writes data.
  • the computing device is a single processor device, the first storage area can be located in the memory MEM of the main processor, or the central processing unit CPU, and the second storage area can be located in the external memory of the computing device, such as a solid-state hard disk.
  • a solid-state hard disk i.e., Solid State Disk or Solid State Drive, referred to as SSD, is also called a solid-state drive. It is a hard disk made of a solid-state electronic storage chip array, which has a high data transmission bandwidth and a data storage capacity of up to several T (GB).
  • the computing device is a multi-processor device, including a main processor and a coprocessor, and the main processor is the processing core of the processing device, which is generally implemented by a general-purpose CPU.
  • the coprocessor receives the scheduling of the main processor, and is used to assist the main processor in performing certain specific computing tasks, and can be implemented by a graphics processor GPU, etc.
  • the graphics processor's video memory can be an HBM chip.
  • HBM High Bandwidth Memory
  • DDR Double Data Rate
  • the video memory has a larger data transmission bandwidth than the internal memory, and the data transmission bandwidth of the internal memory is much higher than the hard disk.
  • the storage space of the video memory, internal memory, and hard disk is from small to large.
  • the data transmission bandwidth of the hard disk is hundreds of MB/s
  • the data transmission bandwidth of the internal memory can be tens of GB/s
  • the data transmission bandwidth of the video memory is The transmission bandwidth can reach hundreds of GB/s.
  • the first storage area can be located in the video memory of the graphics processor, and the second storage area can be located in the memory of the central processing unit.
  • the first storage area can also be located in the memory of the central processing unit, and the second storage area is still located in the external memory, such as a hard disk.
  • the first storage area and the second storage area may be a physical storage area in a corresponding memory or storage chip.
  • the first storage area and the second storage area may be respectively in the form of data tables, such as hash tables.
  • the amount of data in the first storage area does not exceed that in the second storage area.
  • the data in the first storage area may be migrated from the second storage area.
  • data that is frequently requested to be accessed by the processor is stored in the first storage area, and data with a lower access frequency is retained in the second storage area.
  • its large-scale embedded parameters can be stored in a memory with a larger storage capacity, among which the embedded parameters that are frequently accessed can be stored in a memory with a larger data transmission bandwidth, which supports large-capacity storage of embedded parameters while effectively improving data access efficiency.
  • FIG2 is an exemplary flow chart of a data hierarchical storage method according to some embodiments of this specification. It further provides a data hierarchical storage method based on the storage partition architecture shown in FIG1.
  • the process 200 shown in FIG2 can be implemented by more than one processor (such as a central processing unit or a graphics processing unit), and specifically, it can be implemented by a data hierarchical storage system 500 (or simply referred to as system 500) thereon.
  • the process 200 described in FIG2 can include the following steps.
  • Step 210 based on the access request for the target data initiated to the first storage area and the historical access frequency of the target data, obtain the current access frequency of the target data.
  • step 210 may be implemented by the access frequency determination module 510 .
  • Access can be reading or writing data, and writing includes inserting new data or changing the value of existing data.
  • the access request can be initiated by the processor, specifically, by a thread running on the processor, such as a training thread, a data access thread, a calculation result writing thread, etc.
  • the access request to the target data is first initiated to the first storage area.
  • the target data may or may not be stored in the first storage area, but regardless of whether it is stored or not, an access frequency will be recorded. Therefore, the target data will have a historical access frequency, reflecting the number of times it has been requested to access from the first storage area.
  • additional data tables such as metatables, can be maintained to record the historical access frequency of data requested to access from the first storage area.
  • the data in the first storage area may have a historical access frequency mark to record the number of times it has been requested to access from the first storage area.
  • the mark can be a symbol or number reflecting the number of times, or it can be a pointer or address pointing to the corresponding number of times.
  • its historical access frequency can be recorded in the first storage space.
  • Access frequency mark can be recorded in the first storage space.
  • the key of the data can be stored in the first storage space in correspondence with its historical access frequency mark.
  • the key of the data can be the field name of the data, the hash value of the value of the data, etc.
  • the current access frequency of the target data can be obtained based on the current access request and the historical access frequency of the target data.
  • the historical access frequency of the target data can be obtained by querying the meta table or the first storage area, and 1 (i.e., the number of times the current access request contributes) is added to the historical access frequency to obtain the current access frequency of the target data.
  • 1 i.e., the number of times the current access request contributes
  • the historical access frequency of the target data is 5
  • the current access frequency is 6.
  • the historical access frequency of the target data can be 0, that is, it has not been requested to be accessed from the first storage area, and the current access frequency is 1.
  • Step 220 determine whether the current access frequency is greater than the cache threshold; if so, jump to step 230 , if not, jump to step 240 .
  • step 220 may be implemented by the classification module 520 .
  • Step 230 retain the target data in the first storage area or migrate the target data from the second storage area to the first storage area, and update the historical access frequency mark of the target data based on the current access frequency of the target data.
  • step 230 may be implemented by the classification module 520 .
  • the cache threshold may be a preset constant, such as 50, 200, etc., or may be a variable, such as the minimum historical access frequency of data in the first storage area.
  • the target data When the current access frequency is greater than the cache threshold, it can be considered that the target data has a high access frequency and is hot data, and can be stored in the first storage area. Specifically, since the current access frequency is accumulated one by one, when the current access frequency is significantly higher than the cache threshold, it indicates that the target data already exists in the first storage area. At this time, there is no need to migrate the target data. It can be understood that it will continue to be retained in the first storage area, and its historical access frequency mark will be updated based on the current access frequency. As an example, the historical access frequency mark of the target data is 10, and the current access frequency is 11. If the cache threshold is set to 5, the target data will continue to be retained in the first storage area, and its historical access frequency mark will be updated from the original 10 to 11.
  • the target data may not exist in the first storage area. This can be regarded as a critical state, and the target data needs to be migrated from the second storage area to the first storage area.
  • the value of the target data can be read from the second storage area based on the field name or key of the target data as a query condition, and the value can be written to the first storage area.
  • the historical access frequency mark of the target data is determined based on the current access frequency and stored in the first storage area.
  • the first storage area has pre-stored the historical access frequency mark of the target data, and it only needs to be updated based on the current access frequency.
  • the “migration” mentioned in some embodiments of this specification may delete the original storage area (such as the second storage area).
  • the data may not be deleted in order to be used as a backup.
  • the “retention” mentioned in some embodiments of this specification can be understood in a broad sense, that is, the data can be “archived” in the first storage area, but it does not mean that the value of the data is immutable.
  • the data is stored in the first storage area in the form of a key-value pair (key: value), and "retention" can be understood as the key of the data remains unchanged, the value of the data is stored in the first storage area, but the value can be updated.
  • the data to be migrated can be directly written into the first storage area.
  • the first storage area is full, some data in the first storage area must be moved out before the newly migrated data can be accommodated.
  • at least one data in the first storage area whose historical access frequency is equal to the cache threshold can be removed from the first storage area. Specifically, part of the data can be removed, or all of the data can be removed.
  • the cache threshold is the minimum historical access frequency of the data in the first storage area, after the aforementioned data is removed, the cache threshold will change, such as adding 1. The removed data will be migrated back to the second storage area.
  • the first storage area is filled at the initial stage, for example, a portion of data can be randomly selected from the second storage area and written into the first storage area.
  • a portion of data can be randomly selected from the second storage area and written into the first storage area.
  • the data to be migrated into the first storage area and the data to be migrated back to the second storage area can be recorded in the exchange table.
  • the record can be understood as temporarily storing the data itself in the exchange table, or it can be understood as only recording the identifier of the data in the exchange table.
  • the data to be migrated back to the second storage area can be removed from the first storage area and stored in the exchange table. When a certain amount of data to be migrated back is accumulated in the exchange table, these data are migrated back to the second storage area.
  • the data to be migrated into the first storage area can be stored from the second storage area into the exchange table.
  • the exchange table When a certain amount of data to be migrated is accumulated in the exchange table, these data are migrated into the first storage area. Alternatively, the total amount of data to be migrated in and to be migrated back in the exchange table is counted, and when it reaches a set threshold, migration and migration are performed separately. In some other embodiments, only the identifiers of the data to be migrated in and to be migrated back, such as field names or keys, may be recorded in the exchange table. When the amount of data reaches a set threshold, the values of the corresponding data are migrated from the second storage area to the first storage area, and/or the values of the corresponding data are migrated back from the first storage area to the second storage area. Recording only the identifiers of the data in the exchange table helps to reduce the storage overhead of the exchange table and reduce the amount of data exchange.
  • Step 240 Determine the historical access frequency mark of the target data based on the current access frequency of the target data, and record it in the first storage area in correspondence with the key of the target data.
  • step 240 may be implemented by the classification module 520 .
  • the storage area is moved to the first storage area, but the historical access frequency mark can be recorded in the first storage area.
  • the content about recording and maintaining the historical access frequency mark of each data in the first storage area can also be found in the relevant description of step 210.
  • the historical access frequency and the current access frequency both reflect the number of times the target data is accessed from the first storage area. Based on this and compared with the cache threshold, the hotter data is moved from the second storage area to the first storage area, thus realizing hierarchical storage of data.
  • the data in the first storage area can be stored in the form of a key-value pair, that is, a piece of data includes a key and a value, such as a key that can be an ID, a field name, or a hash value of a value, etc., which can uniquely identify the data itself.
  • a key can be Xiao Li
  • the value can be the phone number 138xxxx1234.
  • the key can be the hash value of an embedded parameter, and the value is the embedded parameter.
  • the data in the first storage area can form a hash table, and the data can be directly accessed through the key of the data, with a space complexity of O(1), thereby improving access efficiency.
  • the first storage area can also record data and its historical access frequency mark.
  • Figure 3 is a schematic diagram of the data storage structure in the first storage area shown in some embodiments of this specification.
  • the data in the first storage area can be stored in a combination of a hash table and a linked list.
  • the data in the first storage area is first stored in the form of a key-value pair, such as kx:x, ky:y, ..., etc., where kx, ky... are keys and x, y... are values.
  • the historical access frequency mark of each data can be an address or a pointer, pointing to the corresponding frequency value (such as an arrow pointing from data value x to frequency value 1).
  • the historical access frequency mark is the storage address of the corresponding frequency value.
  • the values 1, 2, 5, and 9 in Figure 3 are frequency values, the historical access frequency of data kx:x, ky:y is 1, and the historical access frequency of data kz:z, ka:a is 2.
  • the data in the first storage area also has its adjacent data mark, and the adjacent data of the data includes its upstream data and downstream data, and the data has the same historical access frequency with its adjacent data.
  • the adjacent data mark can be an address or a pointer, such as the storage address of its upstream data or downstream data. Through the adjacent data mark, the data with the same historical access frequency are linked together. For example, z-a, x-y in Figure 3.
  • the frequency value can also be regarded as a data node linked to the data in the first storage area.
  • data with the same historical access frequency and its historical access frequency value can form a frequency value linked list, such as linked list 1-x-y, and linked list 5-b, etc., where frequency values 1, 2, etc. can be used as the head nodes of the frequency value linked list.
  • each frequency value can also form a linked list, such as the linked list head node-1-2-5-9 in Figure 3.
  • retaining the target data in the first storage area, and updating the historical access frequency mark of the target data based on the current access frequency of the target data may further include: updating the historical access frequency mark of the target data based on the neighboring data of the target data; Connect the data tag, modify the adjacent data tag of its adjacent data to directly connect the upstream data of the target data with the downstream data; modify the historical access frequency tag and the neighbor data tag of the target data to remove the target data from the original frequency value chain list and add it to the frequency value chain list corresponding to the current access frequency.
  • the following will describe in detail how to update the historical access frequency mark of the target data (assuming it already exists in the first storage area) based on its current access frequency.
  • its historical access frequency is 1, and its current access frequency is 2.
  • its adjacent data that is, the adjacent data mark of frequency value 1 and data y, can be modified to directly connect the upstream data (frequency value 1) of the target data x with the downstream data (data y).
  • the upstream data mark of data y can be modified to the upstream data mark of data x
  • the downstream data mark of frequency value 1 can be modified to the downstream data mark of data x, so that data y and frequency value 1 are directly connected by "skipping" number x.
  • the historical access frequency mark of data x is modified to point to frequency value 2. Modify the adjacent data mark of data x and add it to the linked list corresponding to frequency value 2. In order to save computational overhead, data x can be added to the first or last position of the corresponding frequency value linked list.
  • the downstream data mark of data x can be updated to the storage address of the first data in the linked list where frequency value 2 is located, that is, z, and the upstream data mark of data x can be updated to the storage address of frequency value 2.
  • the historical data access mark of data x has been updated to the storage address of frequency value 2, so the upstream data mark of data x can also be directly cleared.
  • the upstream data mark of data z is updated to the storage address of data x.
  • the downstream data mark of frequency value 2 is updated to the storage address of data x.
  • the upstream data mark of data x can be updated to the storage address of the tail data in the linked list where frequency value 2 is located, that is, a, and the downstream data mark of data x is cleared.
  • the downstream data mark of data a is updated to the storage address of data x.
  • the target data is migrated from the second storage area to the first storage area, and the historical access frequency mark of the target data is updated based on the current access frequency of the target data, including: migrating the value of the target data from the second storage area and storing it in the first storage area corresponding to its key; making the historical access frequency mark of the target data point to the frequency value corresponding to the current access frequency; adding an adjacent data mark to the target data so that the upstream data mark of the target data points to the tail data in the linked list where the frequency value is located, or making the downstream data mark of the target data point to the first data in the linked list where the frequency value is located.
  • Data d comes from the second storage area.
  • the value d and the key kd are stored in the first storage area correspondingly.
  • the historical access frequency mark is added to the data d, such as the frequency corresponding to the current access frequency.
  • the storage address of the frequency value As described in the previous step 210, in some embodiments, the first storage area has previously stored the historical access frequency mark of the data that has initiated the access request from the first storage area. At this time, the historical access frequency mark of data d can be updated to point to the frequency value corresponding to the current access frequency, such as 2.
  • an upstream data mark can be added to data d, such as the storage address of the tail data a in the linked list, so that data d is used as the new tail data in the frequency value 2 linked list.
  • a downstream data mark can also be added to data d, and the downstream data mark can be a null value. Accordingly, the downstream data identifier of data a is modified, such as the storage address of data d.
  • a downstream data mark can be added to data d, such as the storage address of the first data z in the linked list, so that data d is the new first data in the frequency value 2 linked list.
  • an upstream data mark can be added to data d, such as the storage address of the frequency value 2. Accordingly, the upstream data mark of data z is modified, such as the storage address of data d.
  • the downstream data mark of the frequency value 2 is modified to be the storage start and end of the data d. At this point, the data d is added to the linked list corresponding to the frequency value 2.
  • At least one data in the first storage area whose historical access frequency is equal to the cache threshold is removed from the first storage area, including for each of the at least one data: modifying the adjacent data mark of its adjacent data, removing the data from the frequency value linked list in which it is located; deleting the value of the data and the adjacent data mark.
  • the following describes in detail how to remove at least one data in the first storage area whose historical access frequency is equal to the cache threshold from the first storage area.
  • data can be removed starting from the tail data in the linked list corresponding to the frequency value equal to the cache threshold.
  • the downstream data mark of its upstream data x is modified to a null value, and then the value y and the adjacent data mark of data y are deleted.
  • other data can be deleted from the linked list corresponding to the frequency value equal to the cache threshold.
  • the downstream data mark of its upstream data frequency value 1 is modified to the downstream data mark of data x, such as the storage address of data y
  • the upstream data mark of data x's downstream data y is modified to the upstream data mark of data x, such as the storage address of frequency value 1
  • the value y and its adjacent data mark are deleted.
  • Some embodiments of the present specification provide a data access method, which includes: firstly initiating an access request for target data to a first storage area; if the target data does not exist in the first storage area, initiating an access request for the target data to a second storage area.
  • accessing includes reading or writing data.
  • data is stored in the form of key-value pairs, and the accessing may include reading or updating (i.e., writing) the value of the data based on the key of the target data, wherein writing may also include adding new data in the form of key-value pairs.
  • the first storage area is located in the memory of the central processing unit, and the second storage area is located in the hard disk.
  • the data in the first storage area and the second storage area may include embedded parameters of the model.
  • the model training task runs in the GPU of the multi-processor device.
  • the GPU which can be specifically a data access thread on the GPU, requests to read the embedded parameters in the first storage area or the second storage area according to the above-mentioned data access method for calculation, such as model training, and writes the calculation results, such as the updated model parameters after training, to the first storage area or the second storage area.
  • the data will also migrate between the first storage area and the second storage area according to the process shown in Figure 2, and finally form a hierarchical storage structure or called double-layer storage.
  • two data tables can be set in the GPU's video memory, which can be a hash table.
  • the data access thread in the GPU can request the required embedding parameters from the double-layer storage based on the training task, such as obtaining the embedding parameters of samples 1 to 1000, caching the read data in the backup table, and then reading at least part of the data in the backup table, such as samples 1 to 100 (as a training batch) into the forward table.
  • the training thread of the GPU directly reads the data in the forward table for model training. As the model is trained, the model parameters including the embedding parameters will be updated, and the updated model parameters will be written into the forward table as the calculation results.
  • the writing process includes updating the value of the existing model parameters based on the key, or adding new model parameters in the form of key-value pairs. Thereafter, the backup table is updated based on the forward table, and the two are kept synchronized, and finally the double-layer storage is updated based on the backup table.
  • the update includes changing the value of the existing data in the original storage, or adding a new key-value pair.
  • a time threshold can be set for the update of each level of storage, so that each level of storage periodically updates and synchronizes the data according to the time threshold.
  • a dual-meter pipeline can be set to automatically maintain and update the forward table and the backup table on a regular basis.
  • the storage level can be further increased to meet the processor's requirement for high-speed data access.
  • system 500 some embodiments of the present specification provide a data hierarchical storage system (or simply referred to as system 500 ), where the system 500 includes an access frequency determination module 510 and a grading module 520 .
  • the access frequency determination module 510 is used to obtain the current access frequency of the target data based on the access request for the target data initiated in the first storage area and the historical access frequency of the target data; the data in the first storage area is migrated from the second storage area and has a historical access frequency mark, and the historical access frequency mark reflects the historical number of times the corresponding data has been requested to be accessed from the first storage area.
  • the grading module 520 is used to retain the target data in the first storage area or migrate it from the second storage area to the first storage area when the current access frequency is greater than the cache threshold, and to determine to update its historical access frequency mark based on the current access frequency of the target data; the first storage area has a data transmission bandwidth greater than that of the second storage area.
  • the system 600 includes a first access module 610 and a second access module 620 .
  • the first access module 610 is used to initiate an access request for target data to the first storage area.
  • the second access module 620 is configured to initiate an access request for the target data to the second storage area if the target data does not exist in the first storage area.
  • the system 600 also includes a storage update module 630, which is used to record the read target data in a backup table; obtain at least part of the data from the backup table and record it in a forward table for the processor to calculate; update the forward table based on the calculation result; update the backup table based on the forward table; update the first storage area and/or the second storage area based on the backup table, wherein the update includes updating the value of the original data or writing new data.
  • a storage update module 630 which is used to record the read target data in a backup table; obtain at least part of the data from the backup table and record it in a forward table for the processor to calculate; update the forward table based on the calculation result; update the backup table based on the forward table; update the first storage area and/or the second storage area based on the backup table, wherein the update includes updating the value of the original data or writing new data.
  • system and its modules shown in Figures 5 and 6 can be implemented in various ways.
  • the system and its modules can be implemented by hardware, software, or a combination of software and hardware.
  • the hardware part can be implemented using dedicated logic;
  • the software part can be stored in a memory and executed by an appropriate instruction execution system, such as a microprocessor or dedicated design hardware.
  • the above modules can be implemented by computer code, and when the computer code is executed, the client can be expressed as a function body and its interface, and the server can be expressed as an independent process.
  • processor control code for example, such codes are provided on a carrier medium such as a disk, CD or DVD-ROM, a programmable memory such as a read-only memory (firmware), or a data carrier such as an optical or electronic signal carrier.
  • a carrier medium such as a disk, CD or DVD-ROM
  • a programmable memory such as a read-only memory (firmware)
  • a data carrier such as an optical or electronic signal carrier.
  • the system and its modules of the present specification can be implemented not only by hardware circuits such as very large-scale integrated circuits or gate arrays, semiconductors such as logic chips, transistors, or programmable hardware devices such as field programmable gate arrays, programmable logic devices, but can also be implemented by software executed by, for example, various types of processors, and can also be implemented by a combination of the above hardware circuits and software (for example, firmware).
  • Some embodiments of the present specification also provide a storage medium on which a cache data table is stored, wherein the data in the cache data table is migrated from other storage areas and the historical access frequency is greater than a cache threshold; the data in the cache data table has a historical access frequency mark, and the historical access frequency mark reflects the historical number of times the corresponding data has been requested to access the cache data table.
  • the data in the cache data table is stored in the form of key-value pairs; the data in the cache data table also has its adjacent data tag; the adjacent data of the data includes its upstream data and downstream data, and the data and its adjacent data have the same historical access frequency; the cache data table also includes the key and historical access frequency tag of the data whose historical access frequency is not greater than the cache threshold; the tag includes a pointer, and the data with the same historical access frequency and its historical access frequency value form a frequency value linked list.
  • beneficial effects include but are not limited to: (1) adopting hierarchical storage to increase data storage capacity while improving data access efficiency; (2) adopting a data storage architecture that combines hash tables and linked lists, the space complexity of add, delete, query and modify operations is O(1), which greatly improves data access efficiency and throughput; (3) automatically and in real time realizes data hierarchical migration during data access, while taking into account memory capacity.
  • numbers describing the number of components and attributes are used. It should be understood that such numbers used in the description of the embodiments are modified by the modifiers "about”, “approximately” or “substantially” in some examples. Unless otherwise specified, “about”, “approximately” or “substantially” indicate that the numbers are allowed to vary by ⁇ 20%. Accordingly, in some embodiments, the numerical parameters used in the specification and claims are approximate values, which may change according to the required features of individual embodiments. In some embodiments, the numerical parameters should take into account the specified significant digits and adopt the general method of retaining digits. Although the numerical domains and parameters used to confirm the breadth of their range in some embodiments of this specification are approximate values, in specific embodiments, the setting of such numerical values is as accurate as possible within the feasible range.

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Abstract

说明书实施例提供一种数据分级存储方法和系统，涉及数据存储技术，其要点包括：基于向第一存储区域发起的对目标数据的访问请求以及所述目标数据的历史访问频次，获得所述目标数据的当前访问频次；第一存储区域中的数据从第二存储区域迁入，且具有历史访问频次标记，历史访问频次标记反映相应数据从第一存储区域被请求访问的历史次数；当所述当前访问频次大于缓存阈值时，将目标数据保留在第一存储区域或从第二存储区域迁入第一存储区域，以及基于所述目标数据的当前访问频次更新其历史访问频次标记；所述第一存储区域具有大于所述第二存储区域的数据传输带宽。

Description

数据分级存储 技术领域
本说明书涉及数据存储技术领域，特别涉及一种数据分级存储方法和系统。
背景技术
数据在计算设备中的存储对计算效率乃至整个设备的性能的影响是不可小视的，如何提供一种高效的数据存储方式是业内长期关注的重要问题之一。本说明书一些实施例旨在提供一种数据分级存储方法，支持数据大容量存储的同时，有效提高数据访问效率。
发明内容
本说明书一个或多个实施例提供一种数据分级存储方法，由一个以上处理器执行，其包括：基于向第一存储区域发起的对目标数据的访问请求以及目标数据的历史访问频次，获得目标数据的当前访问频次；第一存储区域中的数据从第二存储区域迁入，且具有历史访问频次标记，历史访问频次标记反映相应数据从第一存储区域被请求访问的历史次数；当当前访问频次大于缓存阈值时，将目标数据保留在第一存储区域或从第二存储区域迁入第一存储区域，以及基于目标数据的当前访问频次更新其历史访问频次标记；第一存储区域具有大于第二存储区域的数据传输带宽。
本说明书一个或多个实施例提供一种数据分级存储系统。数据分级存储系统包括：访问频次确定模块，用于基于向第一存储区域发起的对目标数据的访问请求以及目标数据的历史访问频次，获得目标数据的当前访问频次；第一存储区域中的数据从第二存储区域迁入，且具有历史访问频次标记，历史访问频次标记反映相应数据从第一存储区域被请求访问的历史次数；分级模块，用于当当前访问频次大于缓存阈值时，将目标数据保留在第一存储区域或从第二存储区域迁入第一存储区域，以及基于目标数据的当前访问频次更新其历史访问频次标记；第一存储区域具有大于第二存储区域的数据传输带宽。
本说明书一个或多个实施例提供一种存储介质，用于存储计算机指令，当计算机指令中的至少一部分被处理器执行时，实现前述数据分级存储方法。
本说明书一个或多个实施例提供一种数据分级存储装置，包括存储介质和处理器，所述存储介质存储有计算机指令，所述处理器用于执行所述计算机指令中的至少一部分， 实现前述数据分级存储方法。
本说明书一个或多个实施例提供一种存储介质，存储有缓存数据表，缓存数据表中的数据从其余存储区域迁入且历史访问频次大于缓存阈值；缓存数据表的数据具有历史访问频次标记，历史访问频次标记反映相应数据从该缓存数据表被请求访问的历史次数。
本说明书一个或多个实施例提供一种数据访问方法，由一个以上处理器执行，包括：向第一存储区域发起对目标数据的访问请求；如果第一存储区域不存在所述目标数据，则向第二存储区域发起对目标数据的访问请求；其中，访问包括对数据进行读出或写入，数据通过前述的数据分级存储方法存储于所述第一存储区域和所述第二存储区域中。
本说明书一个或多个实施例提供一种数据访问系统，包括：第一访问模块，用于向第一存储区域发起对目标数据的访问请求；第二访问模块，用于如果第一存储区域不存在所述目标数据，则向第二存储区域发起对目标数据的访问请求；其中，访问包括对数据进行读出或写入，数据通过前述的方法分级存储于所述第一存储区域和所述第二存储区域中。
本说明书一个或多个实施例提供一种存储介质，存储有计算机指令，当计算机指令被处理器执行时，实现前述的数据访问方法。
附图说明
本说明书将以示例性实施例的方式进一步说明，这些示例性实施例将通过附图进行详细描述。这些实施例并非限制性的，在这些实施例中，相同的编号表示相同的结构。
图1是根据本说明书一些实施例所示的数据分级存储架构的示意图。
图2是根据本说明书一些实施例所示的数据分级存储方法的示例性流程图。
图3是根据本说明书一些实施例所示的第一存储区域中数据存储结构的示意图。
图4是根据本说明书一些实施例所示的数据访问的示意图。
图5是根据本说明书一些实施例所示的数据分级存储系统的示例性框图。
图6是根据本说明书一些实施例所示的数据访问系统的示例性框图。
具体实施方式
为了更清楚地说明本说明书实施例的技术方案，下面将对实施例描述中所需要使用 的附图作简单的介绍。显而易见地，下面描述中的附图仅仅是本说明书的一些示例或实施例，对于本领域的普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图将本说明书应用于其它类似情景。除非从语言环境中显而易见或另做说明，图中相同标号代表相同结构或操作。
应当理解，本文使用的“系统”、“装置”、“单元”和/或“模块”是用于区分不同级别的不同组件、元件、部件、部分或装配的一种方法。然而，如果其他词语可实现相同的目的，则可通过其他表达来替换所述词语。
如本说明书和权利要求书中所示，除非上下文明确提示例外情形，“一”、“一个”、“一种”和/或“该”等词并非特指单数，也可包括复数。一般说来，术语“包括”与“包含”仅提示包括已明确标识的步骤和元素，而这些步骤和元素不构成一个排它性的罗列，方法或者设备也可能包含其它的步骤或元素。
本说明书中使用了流程图用来说明根据本说明书的实施例的系统所执行的操作。应当理解的是，前面或后面操作不一定按照顺序来精确地执行。相反，可以按照倒序或同时处理各个步骤。同时，也可以将其他操作添加到这些过程中，或从这些过程移除某一步或数步操作。
数据存储与计算设备的计算效率有着紧密的关联。随着计算设备处理器的算力提升，一方面，数据存储需要进一步优化，以匹配处理器读取或写入数据的速度，另一方面，数据存储需要有更大的空间，以满足待处理数据规模增长的需求。
以点击预测模型为例，该模型用于预测将某商品进行广告投放或推荐给用户后，被用户点击(即接受)的概率。对于广告投放者(或商品推荐者)来说，准确的点击预测可以帮助他们更好地进行广告投放、商品推荐决策，提高推荐效果。用于点击预测的输入特征大多为高维的稀疏向量，如商品编号、用户标识、展示平台(或广告)标识等特征，这些特征通常会被编码(如one-hot编码)为元素数量较多的向量，而向量中的大多数元素的值为0。为了减小计算复杂度和存储开销，通常会将这些高维(如256维)稀疏向量形式的特征映射为低维(如32维、64维)嵌入向量的形式。这种映射，又称为嵌入(embedding)，是一种将离散的对象(如用户、商品或其某些特定特征)对应到连续的低维向量空间(嵌入向量空间)中的某一个元素或某一个“点”的技术。这种技术在将对象与嵌入向量空间中的“点”对应的同时，能够捕捉到对象之间的相似性和关系，从而在将对象映射到嵌入向量空间中的相应“点”后，这些“点”之间依然保持着对象之间的相似性和关系。因此，嵌入技术广泛用于机器学习中，以高效、准确的 表征模型需要的输入特征，尤其是稀疏特征。
嵌入向量空间是跟随着模型训练得到的，在一些实施例中，可以将嵌入向量空间视为模型参数的一部分，称其中的嵌入向量为嵌入参数。在训练过程中随着模型的优化和完善，嵌入向量空间中的“点”会趋于收敛的同时，也会随着训练样本及其特征数量的增加而增加。可见，对于点击预测模型这类以高维稀疏特征为主要输入特征的模型，其嵌入参数可达千亿甚至万亿，给计算设备带来了巨大的存储压力。另一方面，在在线学习场景中，由于样本数据分布的变化，模型的嵌入参数可能会持续增长，不仅进一步加大了设备的存储压力，还会导致计算设备内存占用不断增加，进而导致资源用量超出预先设定的配额，出现内存不足(OOM)的问题，这将进一步给计算设备的性能和稳定性带来负面影响。
为此，本说明书一些实施例提供了一种数据分级存储方法，支持数据大容量存储的同时，有效提高数据访问效率。需要说明的是，尽管本说明书一些实施例以点击预测模型的训练为例进行说明，但不应将其理解为对本说明书提供的技术方案的应用场景限制，本说明书提供的数据分级存储方法可以适用于任意应用场景下计算设备中数据的存储和管理。
图1是根据本说明书一些实施例所示的数据分级存储架构的示意图。如图1所示的数据分级存储架构100中，数据分级存储在第一存储区域和第二存储区域，其中，第一存储区域具有比第二存储区域较大的数据传输带宽，这里的数据传输带宽可以是存储器读入或写入数据的速率。在一些实施例中，计算设备为单处理器设备，第一存储区域可以位于主处理器，或中央处理器CPU，的内存MEM中，第二存储区域可以位于计算设备的外存中，如固态硬盘。固态硬盘，即Solid State Disk或Solid State Drive，简称SSD，又称固态驱动器，是用固态电子存储芯片阵列制成的硬盘，其具有较高的数据传输带宽以及高达数T(GB)的数据存储容量。在又一些实施例中，计算设备为多处理器设备，包括主处理器和协处理器，主处理器是处理设备的处理核心，一般由通用CPU实现。协处理器接收主处理器调度，用于协助主处理器进行某些特定的计算任务，可由图形处理器GPU等实现。图形处理器的显存可以是HBM芯片，HBM，即High Bandwidth Memory，由多个DDR(Double Data Rate双倍速率)存储芯片堆叠在一起，实现大容量、高位宽的DDR组合阵列。一般来说，显存具有大于内存的数据传输带宽，而内存的数据传输带宽又远高于硬盘，但是显存、内存和硬盘的存储空间却是由小到大。例如，硬盘的数据传输带宽为百MB/s，内存的数据传输带宽可以是几十GB/s，而显存的数据传 输带宽可达到上百GB/s。此时，第一存储区域可以位于图形处理器的显存中，第二存储区域可以位于中央处理器的内存中。在多处理器设备中，第一存储区域也可以位于中央处理器的内存中，第二存储区域依然位于外存，如硬盘中。
第一存储区域和第二存储区域可以是相应存储器或存储芯片中的一段物理存储区域，在一些实施实例中第一存储区域和第二存储区域可以分别表现为数据表的形式，例如哈希表。
如前述，存储器的容量与其数据传输带宽呈相反的变化趋势，因此在一些实施例中第一存储区域的数据量不超过第二存储区域，具体的，第一存储区域的数据可以是从第二存储区域迁入的。一般来说，经常被处理器请求访问的数据被存储在第一存储区域，访问频率较低的数据则保留在第二存储区域。以点击预测模型为例，其大规模的嵌入参数能够存储于存储容量较大的存储器中，其中被经常访问的嵌入参数则可以存储于数据传输带宽较大的存储器中，支持嵌入参数大容量存储的同时，有效提高数据访问效率。
图2是根据本说明书一些实施例所示的数据分级存储方法的示例性流程图。其在图1所示的存储分区架构上，进一步提供了一种数据分级存储方法。在一些实施例中，图2所示的流程200可由一个以上处理器(如中央处理器或图形处理器)实现，具体的，可以由其上的数据分级存储系统500(或简称为系统500)实现。图2所述的流程200可以包括以下步骤。
步骤210，基于向第一存储区域发起的对目标数据的访问请求以及所述目标数据的历史访问频次，获得所述目标数据的当前访问频次。在一些实施例中，步骤210可以由访问频次确定模块510实现。
访问可以是对数据的读出或写入，写入包括插入新的数据或者更改已有的数据的值。访问请求可以是处理器发起，具体可以是处理器上运行的线程，如训练线程、数据访问线程、计算结果写入线程等，发起。对目标数据的访问请求首先是对第一存储区域发起的，此时，第一存储区域内可能存储有目标数据，也可能没有，但不论有无，都会记录一次访问频次。因此，目标数据会具有历史访问频次，反映其从第一存储区域被请求访问的次数。在一些实施例中，可以维护额外的数据表，如元表，以记录从第一存储区域被请求访问的数据的历史访问频次。在又一些实施例中，第一存储区域中的数据可以具有历史访问频次标记，以记录其从第一存储区域被请求访问的次数。所述标记可以是反映所述次数的符号、数字，也可以是指针或地址，指向对应的次数数值。在一些实施例中，不论被访问的数据是否存储于第一存储空间，都可以在第一存储空间中记录其历史 访问频次标记。示例性的，可以在第一存储空间将数据的键与其历史访问频次标记对应存储。数据的键可以是数据的字段名、数据的值的哈希值等。
可以基于当前的访问请求以及所述目标数据的历史访问频次，获得所述目标数据的当前访问频次。具体的，可以通过查询元表或第一存储区域得到目标数据的历史访问频次，并在历史访问频次基础上加1(即当前访问请求贡献的次数)，得到目标数据的当前访问频次。作为示例，目标数据的历史访问频次为5，则当前访问频次为6，又例如，目标数据的历史访问频次可以是0，即未从第一存储区域被请求访问过，则当前访问频次为1。
步骤220，判断当前访问频次是否大于缓存阈值；若是，则跳转到步骤230，若否，则跳转到步骤240。在一些实施例中，步骤220可由分级模块520实现。
步骤230，将目标数据保留在第一存储区域或从第二存储区域迁入第一存储区域，以及基于所述目标数据的当前访问频次更新其历史访问频次标记。在一些实施例中，步骤230可由分级模块520实现。
缓存阈值可以是预先设置的常数，如50、200等，也可以是一个变量，如可以是第一存储区域中数据的最小历史访问频次。
当当前访问频次大于缓存阈值时，可以认为目标数据的访问频次较高，是较热的数据，可以存储在第一存储区域。具体的，由于当前访问频次是逐次累加得到的，因此当当前访问频次明显高于缓存阈值时，则表明目标数据已经是存在于第一存储区域的，此时则无需对目标数据进行迁移，可以理解为将其继续保留在第一存储区域，同时基于当前访问频次更新其历史访问频次标记。作为示例，目标数据的历史访问频次标记为10，当前访问频次则为11，若缓存阈值设为5，则继续将目标数据保留在第一存储区域，同时将其历史访问频次标记由原来的10更新为11。
当当前访问频次仅比缓存阈值多1时，目标数据可能并不存在于第一存储区域，此时可以看成是临界状态，需要将目标数据从第二存储区域迁移到第一存储区域中。具体的，可以基于目标数据的字段名或键作为查询条件，从第二存储区域读出目标数据的值，并将该值写入第一存储区域。与此同时，基于当前访问频次确定目标数据的历史访问频次标记，一并存储在第一存储区域中。在一些实施例中，第一存储区域已经预先存储了目标数据的历史访问频次标记，此时只需要基于当前访问频次对其更新即可。
本说明书一些实施例提及的“迁入”，可以删除原存储区域(如第二存储区域)中 的数据，也可以不删除，以便作为备份。本说明书一些实施例提及的“保留”，可作广义理解，即数据可以“归档”在第一存储区域，但并不意味着数据的值是一成不变的，作为示例，数据以键值对(key：value)的形式存储在第一存储区域，“保留”可以理解为数据的键保持不变，数据的值存储于第一存储区域，但是值可以被更新。
在一些实施例中，当第一存储区域未存满时，可以直接将需要迁入的数据写入第一存储区域，当第一存储区域存满后，则需要先将第一存储区域中的一些数据移出，才能容纳新迁入的数据。在一些实施例中，可以将第一存储区域中历史访问频次等于缓存阈值的至少一个数据从第一存储区域移除。具体的，可以是将这些数据中的一部分移除，也可以是将这些数据全部移除。当缓存阈值是第一存储区域中数据的最小历史访问频次时，将前述数据移除后，缓存阈值将会改变，如加1。被移除的数据会被回迁到第二存储区域。
在又一些实施例中，第一存储区域在初始阶段就被存满，例如，可以从第二存储区域随机选择一部分数据写入第一存储区域。当有新的数据需要迁入时，则按照前述方式将至少一个数据移除，回迁到第二存储区域。
在一些实施例中，可以将待迁入第一存储区域的数据和待回迁到第二存储区域的数据记录于交换表中。其中，记录可以理解为将数据本身暂存在交换表中，也可以理解为仅在交换表中记录数据的标识。例如，可以将待回迁到第二存储区域的数据从第一存储区域移除，并存入交换表中，当交换表中积攒到一定数据量的待回迁数据后，再将这些数据一并回迁到第二存储区域。又例如，可以将待迁入第一存储区域的数据从第二存储区域存入交换表中，当交换表中积攒到一定数据量的待迁入数据后，再将这些数据一并迁入到第一存储区域。又或者，统计交换表中待迁入和待回迁的数据的总数据量，当其达到设定阈值后，再分别进行迁入和回迁。在又一些实施例中，可以仅在交换表中记录待迁入和待回迁的数据的标识，如字段名或键，当数据量达到设定阈值后，再将对应数据的值从第二存储区域迁入第一存储区域，和/或将对应数据的值从第一存储区域回迁到第二存储区域。仅在交换表中记录数据的标识，有助于降低交换表的存储开销，以及减少数据交换量。
步骤240，基于所述目标数据的当前访问频次确定其历史访问频次标记，并与目标数据的键对应记录在第一存储区域中。在一些实施例中，步骤240可以由分级模块520实现。
在一些实施例中，当当前访问频次不大于缓存阈值时，则无需将目标数据从第二存 储区域迁入到第一存储区域，但可以在第一存储区域记录其历史访问频次标记。关于在第一存储区域记录、维护各数据的历史访问频次标记的内容还可以在步骤210的相关说明中找到。
历史访问频次以及当前访问频次反映的都是目标数据从第一存储区域被访问的次数，基于此与缓存阈值比较，将热度较高的数据从第二存储区域迁入第一存储区域，实现了数据的分级存储。
在一些实施例中，第一存储区域中的数据可以以键值对(key-value)的形式存储，即一条数据包括键和值，如键(key)可以是ID、字段名或值(value)的哈希值等能唯一标识数据本身的信息。如键可以是小李，值可以是电话号码138xxxx1234。又例如，键可以是某嵌入参数的哈希值，值是该嵌入参数。当第一存储区域的数据以键值对形式存储时，第一存储区域的数据可以组成一张哈希表，通过数据的键可以直接对数据进行访问，空间复杂度为O(1)，提高了访问效率。
在一些实施例中，第一存储区域还可以记录数据及其历史访问频次标记。图3是根据本说明书一些实施例所示的第一存储区域中数据存储结构的示意图。如图3所示，第一存储区域中的数据可以以哈希表和链表结合的方式进行存储。作为示例，第一存储区域的数据首先以键值对的形式存储，如kx：x，ky：y，…等，其中，kx、ky…为键，x、y…为值。其中，各数据的历史访问频次标记可以为地址或指针，指向对应的频次值(如数据值x指向频次值1的箭头)。示例性的，历史访问频次标记为对应频次值的存储地址。图3中的数值1、2、5、9为频次值，数据kx：x，ky：y的历史访问频次为1，数据kz：z，ka：a的历史访问频次为2。在一些实施例中，第一存储区域中的数据还具有其邻接数据标记，数据的邻接数据包括其上游数据和下游数据，数据与其邻接数据具有相同的历史访问频次。邻接数据标记可以是地址或指针，如是其上游数据或下游数据的存储地址。通过邻接数据标记，将具有相同历史访问频次的数据链接起来。如图3中z—a、x—y。在一些实施例中，频次值也可以视为一个数据节点与第一存储区域中的数据链接，这样一来，具有相同历史访问频次的数据及其历史访问频次值可以组成一条频次值链表，如链表1—x—y，又如链表5—b等，其中，频次值1、2等可以分别作为其所在频次值链表的头节点。在又一些实施例中，各频次值也可以组成一条链表，如图3中的链表头节点—1—2—5—9。
基于图3所示的数据存储结构，将目标数据保留在第一存储区域，以及基于所述目标数据的当前访问频次更新其历史访问频次标记，可以进一步包括：基于目标数据的邻 接数据标记，修改其邻接数据的邻接数据标记，以将目标数据的上游数据与下游数据直连；修改目标数据的历史访问频次标记以及邻居数据标记，以将目标数据从原频次值链表中移出，并加入到所述当前访问频次对应的频次值链表中。
下面结合图3详细阐述如何基于目标数据(假设已存在于第一存储区域中)的当前访问频次更新其历史访问频次标记。以x为例，其历史访问频次为1，当前访问频次为2，此时，需要将数据x从频次值1对应的链表中移出，加入频次值2对应的链表。首先，可以基于目标数据x的邻接数据标记，修改其邻接数据，即频次值1和数据y，的邻接数据标记，以将目标数据x的上游数据(频次值1)与下游数据(数据y)直连。具体的，可以将数据y的上游数据标记修改为数据x的上游数据标记，将频次值1的下游数据标记修改为数据x的下游数据标记，这样数据y与频次值1便“跳过”数x直接连接了。之后，再修改数据x的历史访问频次标记，使其指向频次值2。修改数据x的邻接数据标记，将其添加到频次值2对应的链表中。为了节省运算开销，可以将数据x添加到对应频次值链表的首位或者末位之后。具体的，可以将数据x的下游数据标记更新为频次值2所在链表中的首数据，即z，的存储地址，将数据x的上游数据标记更新为频次值2的存储地址。实际上，数据x的历史数据访问标记已更新为频次值2的存储地址，因此，也可以直接将数据x的上游数据标记清空。相应的，将数据z的上游数据标识更新为数据x的存储地址。可选的，将频次值2的下游数据标记更新为数据x的存储地址。或者，可以将数据x的上游数据标记更新为频次值2所在链表中的尾数据，即a，的存储地址，将数据x的下游数据标记清空。相应的，将数据a的下游数据标记更新为数据x的存储地址。至此，数据x已从频次值1对应的链表中移出，并加入到了频次值2对应的链表中。
基于图3所示的数据存储结构，将目标数据从第二存储区域迁入第一存储区域，以及基于所述目标数据的当前访问频次更新其历史访问频次标记，包括：将目标数据的值从第二存储区域迁入并与其键对应存储于第一存储区域中；使目标数据的历史访问频次标记指向当前访问频次对应的频次值；为目标数据添加邻接数据标记，以使得目标数据的上游数据标记指向该频次值所在的链表中的尾数据，或者使得目标数据的下游数据标记指向该频次值所在的链表中的首数据。
下面结合图3详细阐述如何将目标数据迁入第一存储区域中，并基于当前访问频次更新其历史访问频次标记。以数据d为例，数据d来自第二存储区域，将值d与键kd对应存储在第一存储区域，为数据d添加历史访问频次标记，如当前访问频次对应的频 次值的存储地址。如前面步骤210所述，在一些实施例中，第一存储区域预先已经存储了曾经从第一存储区域发起访问请求的数据的历史访问频次标记，此时，则可以更新数据d的历史访问频次标记，使其指向当前访问频次对应的频次值，如2。进一步，需要将数据d加入频次值2对应的频次值链表，具体可以为数据d添加上游数据标记，如链表中尾数据a的存储地址，使数据d作为频次值2链表中新的尾数据。进一步，还可以为数据d添加下游数据标记，下游数据标记可以是空值。相应的，修改数据a的下游数据标识，如数据d的存储地址。又或者，可以为数据d添加下游数据标记，如链表中首数据z的存储地址，是数据d作为频次值2链表中新的首数据。可选的，可以为数据d添加上游数据标记，如频次值2的存储地址。相应的，修改数据z的上游数据标记，如数据d的存储地址。可选的，修改频次值2的下游数据标记为数据d的存储起止。至此，数据d加入到了频次值2对应的链表。
基于图3所示的数据存储结构，将第一存储区域中历史访问频次等于缓存阈值的至少一个数据从第一存储区域移除，包括对所述至少一个数据中的每一个：修改其邻接数据的邻接数据标记，将该数据从其所在频次值链表中移出；删除该数据的值以及邻接数据标记。
下面结合图3详细阐述如何将第一存储区域中历史访问频次等于缓存阈值的至少一个数据从第一存储区域移除。为了节省运算开销，可以从等于缓存阈值的频次值对应的链表中的尾数据开始移出数据，以y数据为例，修改其上游数据x的下游数据标记为空值，然后删除值y，以及数据y的邻接数据标记。在一些实施例中，可以从等于缓存阈值的频次值对应的链表中删除其他数据，以删除数据x为例，修改其上游数据频次值1的下游数据标记为数据x的下游数据标记，如数据y的存储地址，修改数据x的下游数据y的上游数据标记为数据x的上游数据标记，如频次值1的存储地址，最后删除值y及其邻接数据标记。
由上述在图3所示数据结构基础上更新历史访问频次标记，将目标数据迁入或移出第一存储区域的过程可以看出，这些都只需要常数个步骤，其空间复杂度依然为O(1)，不会随着第一存储区域中的数据量增加而增加，具有较高的处理效率，随着数据量的增加，这种处理的效率优势更加突出。
本说明书一些实施例提供了一种数据访问方法。该方法包括：首先向第一存储区域发起对目标数据的访问请求；如果第一存储区域不存在所述目标数据，则向第二存储区域发起对目标数据的访问请求。
其中，访问包括对数据进行读出或写入。在一些实施例中，数据是以键值对的形式存储，所述访问可以包括基于目标数据的键对数据的值进行读取或者更新(即写入)，其中，写入还可以包括增加新的键值对形式的数据。
在一些实施例中，第一存储区域位于中央处理器的内存，第二存储区域位于硬盘，第一存储区域和第二存储区域中的数据可以包括模型的嵌入参数。模型训练任务在多处理器设备的GPU中运行。GPU，具体可以是GPU上的数据访问线程，按照上述数据访问方法请求读取第一存储区域或第二存储区域中的嵌入参数进行计算，如进行模型训练，将计算结果，如训练更新后的模型参数，写入到第一存储区域或第二存储区域。在数据访问的过程中，数据也会按照图2所示的流程在第一存储区域和第二存储区域中迁移，最终形成分级存储结构或称为双层存储。
如图4所示，在一些实施例中，可以在GPU的显存中设置两张数据表，即前向表和备份表，具体可以是哈希表。GPU中的数据访问线程可以基于训练任务向双层存储请求所需的嵌入参数，如获取样本1～样本1000的嵌入参数，读取的数据缓存于备份表中，再将备份表中的至少部分数据，如样本1～100(作为一个训练批次)读取到前向表中，GPU的训练线程直接读取前向表中的数据用于模型训练，随着模型训练，包括嵌入参数在内的模型参数，会被更新，将更新后的模型参数作为计算结果写入到前向表中，写入过程包括基于已有模型参数的键更新其值，或者增加新的键值对形式的模型参数。此后，再基于前向表更新备份表，两者保持同步，最后基于备份表更新双层存储。所述更新包括更改原存储中已有的数据的值，或增加新的键值对。在一些实施例中，可以对各级存储的更新分别设置一个时间阈值，以便各级存储根据时间阈值周期性对数据进行更新同步。在一些实施例中，可以设置双表管线定时自动的维护、更新前向表和备份表。
本说明书一些实施例，通过设置双数据表，可以进一步增加存储层级，满足处理器高速访问数据的要求。
如图5所示，本说明书一些实施例提供了一种数据分级存储系统(或简称为系统500)，系统500包括访问频次确定模块510和分级模块520。
访问频次确定模块510用于基于在向第一存储区域中发起的对目标数据的访问请求以及所述目标数据的历史访问频次，获得所述目标数据的当前访问频次；第一存储区域中的数据从第二存储区域迁入，且具有历史访问频次标记，历史访问频次标记反映相应数据从第一存储区域被请求访问的历史次数。
分级模块520用于当所述当前访问频次大于缓存阈值时，将目标数据保留在第一存储区域或从第二存储区域迁入第一存储区域，以及基于所述目标数据的当前访问频次确定更新其历史访问频次标记；所述第一存储区域具有大于所述第二存储区域的数据传输带宽。
本说明书一些实施例还提供了一种数据访问系统，如图6所示，系统600包括第一访问模块610和第二访问模块620。
第一访问模块610用于向第一存储区域发起对目标数据的访问请求。
第二访问模块620用于如果第一存储区域不存在所述目标数据，则向第二存储区域发起对目标数据的访问请求。
在一些可选的实施例中，系统600还包括存储更新模块630，存储更新模块630用于将读出的目标数据记录在备份表中；从所述备份表中获取至少部分数据记录在前向表中，供处理器进行计算；基于计算结果，更新前向表；基于所述前向表更新所述备份表；基于备份表更新所述第一存储区域和/或第二存储区域，其中，所述更新包括将原有数据的值更新或者写入新的数据。
关于系统500和系统600中各模块的更多内容可以分别参见图2和图4的相关说明，在此不再赘述。应当理解，图5和图6所示的系统及其模块可以利用各种方式来实现。例如，在一些实施例中，系统及其模块可以通过硬件、软件或者软件和硬件的结合来实现。其中，硬件部分可以利用专用逻辑来实现；软件部分则可以存储在存储器中，由适当的指令执行系统，例如微处理器或者专用设计硬件来执行。在一些实施例中，上述各模块可以由计算机代码实现，当计算机代码被执行时，客户端可以表现为函数本体及其接口，服务端可以表现为独立的进程。本领域技术人员可以理解上述的方法和系统可以使用计算机可执行指令和/或包含在处理器控制代码中来实现，例如在诸如磁盘、CD或DVD-ROM的载体介质、诸如只读存储器(固件)的可编程的存储器或者诸如光学或电子信号载体的数据载体上提供了这样的代码。本说明书的系统及其模块不仅可以有诸如超大规模集成电路或门阵列、诸如逻辑芯片、晶体管等的半导体、或者诸如现场可编程门阵列、可编程逻辑设备等的可编程硬件设备的硬件电路实现，也可以用例如由各种类型的处理器所执行的软件实现，还可以由上述硬件电路和软件的结合(例如，固件)来实现。
需要注意的是，以上对于系统及其模块的描述，仅为描述方便，并不能把本说明书 限制在所举实施例范围之内。可以理解，对于本领域的技术人员来说，在了解该系统的原理后，可能在不背离这一原理的情况下，对各个模块进行任意组合，或者构成子系统与其他模块连接。或者对某些模块进行拆分，得到更多的模块或者该模块下的多个单元。诸如此类的变形，均在本说明书的保护范围之内。
本说明书一些实施例还提供了一种存储介质，其上存储有缓存数据表，缓存数据表中的数据从其余存储区域迁入且历史访问频次大于缓存阈值；缓存数据表的数据具有历史访问频次标记，历史访问频次标记反映相应数据从该缓存数据表被请求访问的历史次数。
在一些实施例中，所述缓存数据表的数据以键值对的形式存储；所述缓存数据表的数据还具有其邻接数据标记；数据的邻接数据包括其上游数据和下游数据，数据与其邻接数据具有相同的历史访问频次；所述缓存数据表还包括历史访问频次不大于缓存阈值的数据的键和历史访问频次标记；所述标记包括指针，具有相同历史访问频次的数据及其历史访问频次值组成一条频次值链表。
关于缓存数据表结构的更多内容还可以参见图3的相关说明，在此不再赘述。
本说明书实施例可能带来的有益效果包括但不限于：(1)采用分级存储，在增加数据存储容量的同时，提高了数据访问效率；(2)采用哈希表与链表结合的数据存储架构，增删查改操作的空间复杂度为O(1)，大幅提升了数据访问效率和吞吐；(3)在数据访问过程中自动、实时的实现了数据分级迁移，兼顾内存容量。
上文已对基本概念做了描述，显然，对于本领域技术人员来说，上述详细披露仅仅作为示例，而并不构成对本说明书的限定。虽然此处并没有明确说明，本领域技术人员可能会对本说明书进行各种修改、改进和修正。该类修改、改进和修正在本说明书中被建议，所以该类修改、改进、修正仍属于本说明书示范实施例的精神和范围。
同时，本说明书使用了特定词语来描述本说明书的实施例。如“一个实施例”、“一实施例”、和/或“一些实施例”意指与本说明书至少一个实施例相关的某一特征、结构或特点。因此，应强调并注意的是，本说明书中在不同位置两次或多次提及的“一实施例”或“一个实施例”或“一个替代性实施例”并不一定是指同一实施例。此外，本说明书的一个或多个实施例中的某些特征、结构或特点可以进行适当的组合。
此外，除非权利要求中明确说明，本说明书所述处理元素和序列的顺序、数字字母的使用、或其他名称的使用，并非用于限定本说明书流程和方法的顺序。尽管上述披露 中通过各种示例讨论了一些目前认为有用的发明实施例，但应当理解的是，该类细节仅起到说明的目的，附加的权利要求并不仅限于披露的实施例，相反，权利要求旨在覆盖所有符合本说明书实施例实质和范围的修正和等价组合。例如，虽然以上所描述的系统组件可以通过硬件设备实现，但是也可以只通过软件的解决方案得以实现，如在现有的服务器或移动设备上安装所描述的系统。
同理，应当注意的是，为了简化本说明书披露的表述，从而帮助对一个或多个发明实施例的理解，前文对本说明书实施例的描述中，有时会将多种特征归并至一个实施例、附图或对其的描述中。但是，这种披露方法并不意味着本说明书对象所需要的特征比权利要求中提及的特征多。实际上，实施例的特征要少于上述披露的单个实施例的全部特征。
一些实施例中使用了描述成分、属性数量的数字，应当理解的是，此类用于实施例描述的数字，在一些示例中使用了修饰词“大约”、“近似”或“大体上”来修饰。除非另外说明，“大约”、“近似”或“大体上”表明所述数字允许有±20％的变化。相应地，在一些实施例中，说明书和权利要求中使用的数值参数均为近似值，该近似值根据个别实施例所需特点可以发生改变。在一些实施例中，数值参数应考虑规定的有效数位并采用一般位数保留的方法。尽管本说明书一些实施例中用于确认其范围广度的数值域和参数为近似值，在具体实施例中，此类数值的设定在可行范围内尽可能精确。
针对本说明书引用的每个专利、专利申请、专利申请公开物和其他材料，如文章、书籍、说明书、出版物、文档等，特此将其全部内容并入本说明书作为参考。与本说明书内容不一致或产生冲突的申请历史文件除外，对本说明书权利要求最广范围有限制的文件(当前或之后附加于本说明书中的)也除外。需要说明的是，如果本说明书附属材料中的描述、定义、和/或术语的使用与本说明书所述内容有不一致或冲突的地方，以本说明书的描述、定义和/或术语的使用为准。
最后，应当理解的是，本说明书中所述实施例仅用以说明本说明书实施例的原则。其他的变形也可能属于本说明书的范围。因此，作为示例而非限制，本说明书实施例的替代配置可视为与本说明书的教导一致。相应地，本说明书的实施例不仅限于本说明书明确介绍和描述的实施例。

Claims (25)

  1. 一种数据分级存储方法，由一个以上处理器执行，其包括：
    基于向第一存储区域发起的对目标数据的访问请求以及所述目标数据的历史访问频次，获得所述目标数据的当前访问频次；第一存储区域中的数据从第二存储区域迁入，且具有历史访问频次标记，历史访问频次标记反映相应数据从第一存储区域被请求访问的历史次数；
    当所述当前访问频次大于缓存阈值时，将目标数据保留在第一存储区域或从第二存储区域迁入第一存储区域，以及基于所述目标数据的当前访问频次更新其历史访问频次标记；
    所述第一存储区域具有大于所述第二存储区域的数据传输带宽。
  2. 如权利要求1所述的方法，包括：当所述当前访问频次仅比缓存阈值多1时，将目标数据从第二存储区域迁入第一存储区域。
  3. 如权利要求1所述的方法，还包括：当第一存储区域存满后，在将目标数据从第二存储区域迁入第一存储区域前，将第一存储区域中历史访问频次等于缓存阈值的至少一个数据从第一存储区域移除，并回迁到第二存储区域。
  4. 如权利要求1或3所述的方法，第一存储区域的数据以键值对的形式存储；第一存储区域的数据还具有其邻接数据标记，数据的邻接数据包括其上游数据和/或下游数据，数据与其邻接数据具有相同的历史访问频次；
    所述标记包括指针，具有相同历史访问频次的数据及其历史访问频次值组成一条频次值链表。
  5. 如权利要求4所述的方法，将目标数据保留在第一存储区域，以及基于所述目标数据的当前访问频次更新其历史访问频次标记，包括：
    基于目标数据的邻接数据标记，修改其邻接数据的邻接数据标记，以将目标数据的上游数据与下游数据直连；
    修改目标数据的历史访问频次标记以及邻居数据标记，以将目标数据从原频次值链表中移出，并加入到所述当前访问频次对应的频次值链表中；
    修改目标数据当前邻接数据的邻接数据标记，使目标数据当前邻接数据的上游数据标记或下游数据标记指向目标数据。
  6. 如权利要求5所述的方法，所述修改目标数据的历史访问频次标记以及邻居数据标记，以将目标数据从原频次值链表中移出，并加入到所述当前访问频次对应的频次值链表中，包括：
    修改目标数据的历史访问频次标记，以指向当前访问频次对应的频次值；
    修改目标数据的邻接数据标记，以使得目标数据的上游数据标记指向该频次值所在的链表中的尾数据并清空目标数据的下游数据标记，或者使得目标数据的下游数据标记指向该频次值所在的链表中的首数据，并清空目标数据的上游数据标记或者使得目标数据的上游数据标记指向该频次值。
  7. 如权利要求4所述的方法，将目标数据从第二存储区域迁入第一存储区域，以及基于所述目标数据的当前访问频次更新其历史访问频次标记，包括：
    将目标数据的值从第二存储区域迁入并与其键对应存储于第一存储区域中；
    使目标数据的历史访问频次标记指向当前访问频次对应的频次值；
    为目标数据添加邻接数据标记，以使得目标数据的上游数据标记指向该频次值所在的链表中的尾数据，或者使得目标数据的下游数据标记指向该频次值所在的链表中的首数据；
    修改目标数据当前邻接数据的邻接数据标记，使目标数据当前邻接数据的下游数据标记或上游数据标记指向目标数据。
  8. 如权利要求4所述的方法，将第一存储区域中历史访问频次等于缓存阈值的至少一个数据从第一存储区域移除，包括对所述至少一个数据中的每一个：
    修改其邻接数据的邻接数据标记，以将该数据从所在频次值链表中移出；
    删除该数据的值以及邻接数据标记。
  9. 如权利要求1所述的方法，还包括：
    当所述当前访问频次不大于缓存阈值时，基于所述目标数据的当前访问频次确定其历史访问频次标记，并与目标数据的键对应记录在第一存储区域中。
  10. 如权利要求9所述的方法，所述目标数据的历史访问频次基于目标数据的键在第一存储区域中查询其历史访问频次标记获得。
  11. 如权利要求1～3中任一项所述的方法，还包括：先将待迁入第一存储区域的数据和待回迁第二存储区域的数据记录于交换表中，当待迁入和/或待回迁的数据的量大于设定阈值时，再将待迁入的数据迁入第一数据区域和/或将待回迁的数据回迁到第二存储区域。
  12. 如权利要求1所述的方法，第一存储区域位于中央处理器的内存，第二存储区域位于硬盘；或者第一存储区域位于图形处理器的显存，第二存储区位于中央处理器的内存。
  13. 如权利要求1所述的方法，所述缓存阈值为第一存储区域中数据的最小历史访 问频次。
  14. 如权利要求1所述的方法，第一存储区域的数据以键值对的形式存储；访问包括基于数据的键对数据的值进行读出或写入。
  15. 一种数据分级存储系统，包括：
    访问频次确定模块，用于基于向第一存储区域发起的对目标数据的访问请求以及所述目标数据的历史访问频次，获得所述目标数据的当前访问频次；第一存储区域中的数据从第二存储区域迁入，且具有历史访问频次标记，历史访问频次标记反映相应数据从第一存储区域被请求访问的历史次数；
    分级模块，用于当所述当前访问频次大于缓存阈值时，将目标数据保留在第一存储区域或从第二存储区域迁入第一存储区域，以及基于所述目标数据的当前访问频次更新其历史访问频次标记；
    所述第一存储区域具有大于所述第二存储区域的数据传输带宽。
  16. 一种存储介质，存储有计算机指令，当计算机指令被处理器执行时，实现如权利要求1～14任一项所述的方法。
  17. 一种数据分级存储装置，包括存储介质和处理器，所述存储介质存储有计算机指令，所述处理器用于执行所述计算机指令中的至少一部分，以实现如权利要求1～14任一项所述的方法。
  18. 一种存储介质，存储有缓存数据表，缓存数据表中的数据从其余存储区域迁入且历史访问频次大于缓存阈值；
    缓存数据表的数据具有历史访问频次标记，历史访问频次标记反映相应数据从该缓存数据表被请求访问的历史次数。
  19. 如权利要求18所述的存储介质，所述缓存数据表的数据以键值对的形式存储；
    所述缓存数据表的数据还具有其邻接数据标记；数据的邻接数据包括其上游数据和/或下游数据，数据与其邻接数据具有相同的历史访问频次；
    所述缓存数据表还包括历史访问频次不大于缓存阈值的数据的键和历史访问频次标记；
    所述标记包括指针，具有相同历史访问频次的数据及其历史访问频次值组成一条频次值链表。
  20. 一种数据访问方法，由一个以上处理器执行，包括：
    向第一存储区域发起对目标数据的访问请求；
    如果第一存储区域不存在所述目标数据，则向第二存储区域发起对目标数据的访问 请求；
    其中，访问包括对数据进行读出或写入，数据通过如权利要求1～14任一项所述的方法分级存储于所述第一存储区域和所述第二存储区域中。
  21. 如权利要求20所述的方法，还包括：
    将读出的目标数据记录在备份表中；
    从所述备份表中获取至少部分数据记录在前向表中，供处理器进行计算；
    基于计算结果，更新前向表；
    基于所述前向表更新所述备份表；
    基于备份表更新所述第一存储区域和/或第二存储区域，
    其中，所述更新包括将原有数据的值更新或者写入新的数据。
  22. 如权利要求21所述的方法，所述前向表和备份表位于图形处理器的显存，第一存储区域位于中央处理器的内存，第二存储区域位于硬盘。
  23. 如权利要求21所述的方法，所述计算包括模型训练，所述数据或目标数据为键值对形式的嵌入特征，所述计算结果包括仅更新值的嵌入特征和/或新增的键值对形式的嵌入特征。
  24. 一种数据访问系统，包括：
    第一访问模块，用于向第一存储区域发起对目标数据的访问请求；
    第二访问模块，用于如果第一存储区域不存在所述目标数据，则向第二存储区域发起对目标数据的访问请求；
    其中，访问包括对数据进行读出或写入，数据通过如权利要求1～14任一项所述的方法分级存储于所述第一存储区域和所述第二存储区域中。
  25. 一种存储介质，存储有计算机指令，当计算机指令被处理器执行时，实现如权利要求20～23任一项所述的方法。
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