WO2024249397A1

WO2024249397A1 - System and associated methods for controlling radiofrequency power delivery to plasma processing chamber

Info

Publication number: WO2024249397A1
Application number: PCT/US2024/031228
Authority: WO
Inventors: Amit Kumar Singh; Sanghyeon Park
Original assignee: Lam Research Corp
Current assignee: Lam Research Corp
Priority date: 2023-05-30
Filing date: 2024-05-28
Publication date: 2024-12-05
Anticipated expiration: 2025-11-30

Abstract

A system for controlling radiofrequency (RF) power delivery to a plasma processing chamber includes a switching signal generator, first and second switching converters, first and second resonant element networks, a phase shift control loop, and a source power control loop. The switching signal generator generates first and second pulsed signals. The first and second switching converters generate first and second RF signals, respectively, in accordance with first and second switching signals, respectively, derived from the first and second pulsed signals, respectively. The first and second RF signals are transmitted through the first and second resonant element networks, respectively, to a coil. The phase shift control loop controls a phase difference between the first and second switching signals to control transmitted RF power. The power source control loop controls a direct current voltage supplied to the first and second switching converters to optimize efficiency of RF power delivery to the coil.

Description

System and Associated Methods for Controlling Radiofrequency Power Delivery to Plasma Processing Chamber by inventors

Amit Kumar Singh and Sanghyeon Park

Background of the Invention

[0001] Plasma processing systems are used to manufacture semiconductor devices, e.g., chips/die, on semiconductor wafers. In the plasma processing system, the semiconductor wafer is exposed to various types of plasma to cause prescribed changes to a condition of the semiconductor wafer, such as through material deposition and/or material removal and/or material implantation and/or material modification, etc. During plasma processing of the semiconductor wafer, radiofrequency (RF) power is transmitted through a process gas within a chamber to transform the process gas into the plasma in exposure to the semiconductor wafer. Reactive constituents of the plasma, such as radicals and ions, interact with materials on the semiconductor wafer to achieve a prescribed effect on the semiconductor wafer. In some plasma processing systems, RF power is transmitted from an antenna or coil through a window, e.g., an RF transparent ceramic structure, to the processing region within the chamber in order to transform the process gas into the plasma in exposure to the semiconductor wafer. It is within this context that various embodiments described herein arise.

Summary of the Invention

[0002] In an example embodiment, a system for controlling RF power delivery to a plasma processing chamber is disclosed. The system includes a switching signal generator configured to generate and output a first pulsed signal and a second pulsed signal. The second pulsed signal is equivalent to the first pulsed signal. The system also includes a first switching converter configured to generate and output a first RF signal in accordance with a first switching signal and a second switching signal. The first switching signal is the first pulsed signal. The second switching signal is a complement of the first pulsed signal. The system also includes a first inductor that has an input terminal electrically connected to receive the first RF signal from the first switching converter. The system also includes a first capacitor that has an input terminal electrically connected to an output terminal of the first inductor. The system also includes a second capacitor that has an input terminal electrically connected to both the output terminal of the first inductor and the input terminal of the first capacitor. The second capacitor also has an output terminal electrically connected to a reference ground potential. The system also includes a second switching converter configured to generate and output a second RF signal in accordance with a third switching signal and a fourth switching signal. The third switching signal is the second pulsed signal. The fourth switching signal is a complement of the second pulsed signal. The system also includes a second inductor that has an input terminal electrically connected to receive the second RF signal from the second switching converter. The system also includes a third capacitor that has an input terminal electrically connected to an output terminal of the second inductor. The system also includes a fourth capacitor that has an input terminal electrically connected to both the output terminal of the second inductor and the input terminal of the third capacitor. The fourth capacitor also has an output terminal electrically connected to the reference ground potential. The system also includes a coil disposed to deliver RF power to a plasma processing chamber. The coil has an input terminal electrically connected to both an output terminal of the first capacitor and an output terminal of the third capacitor.

[0003] In an example embodiment, a method is disclosed for controlling radiofrequency power delivery to a plasma processing chamber. The method includes operating a switching signal generator to generate a first pulsed signal and a second pulsed signal. The second pulsed signal is equivalent to the first pulsed signal. The method includes operating a first switching converter to generate a first RF signal in accordance with a first switching signal and a second switching signal, where the first switching signal is the first pulsed signal, and where the second switching signal is a complement of the first pulsed signal. The method also includes conveying the first RF signal through a first set of resonant elements to an input terminal of a coil that is disposed to deliver RF power to a plasma processing chamber. The first set of resonant elements includes a first inductor and a first capacitor electrically connected in a serial manner between an output of the first switching converter and the input terminal of the coil. The first set of resonant elements also includes a second capacitor that is electrically connected between a reference ground potential and a node located between the first inductor and the first capacitor. The method also includes operating a second switching converter to generate a second RF signal in accordance with a third switching signal and a fourth switching signal, where the third switching signal is the second pulsed signal, and where the fourth switching signal is a complement of the second pulsed signal. The method also includes conveying the second RF signal through a second set of resonant elements to the input terminal of the coil. The second set of resonant elements includes a second inductor and a third capacitor electrically connected in a serial manner between an output of the second switching converter and the input terminal of the coil. The second set of resonant elements also includes a fourth capacitor that is electrically connected between the reference ground potential and a node located between the second inductor and the third capacitor.

[0004] Other aspects and advantages of the embodiments disclosed herein will become more apparent from the following detailed description and the accompanying drawings.

Brief Description of the Drawings

[0005] Figure 1 shows an example configuration of an RF power supply system, in accordance with some embodiments.

[0006] Figure 2 shows an immittance Smith chart that includes a shaded region indicating an example non-ZVS window of plasma load impedance over which the RF power supply system is not able to maintain ZVS, in accordance with some embodiments.

[0007] Figure 3 shows an example configuration of an RF power supply system, in accordance with some embodiments.

[0008] Figure 4 shows an immittance Smith chart that includes a shaded region indicating an example ZVS operational regime of the plasma load impedance over which the RF power supply system is able to maintain ZVS, in accordance with some embodiments.

[0009] Figures 5A and 5B collectively show a system for controlling RF delivery to the plasma processing chamber, in accordance with some embodiments.

[0010] Figure 6A shows a flowchart of a method for controlling RF power delivery to the plasma processing chamber, in accordance with some embodiments.

[0011] Figure 6B shows a flowchart for an extension of the method of Figure 6A for controlling RF power delivery to the plasma processing chamber, in accordance with some embodiments.

[0012] Figure 6C shows a more detailed method for performing the operation to control the amount of phase shift between first pulsed signal and the second pulsed signal to cause the amount of RF power delivered to the coil to be substantially equal to the setpoint RF power, in accordance with some embodiments.

[0013] Figure 6D shows a flowchart of a method for determining the real-time measured RF power delivered to the coil, in accordance with some embodiments.

Detailed Description of the Invention

[0014] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. It will be apparent, however, to one skilled in the art that embodiments of the present disclosure may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail in order not to unnecessarily obscure the present disclosure.

[0015] Figure 1 shows an example configuration of an RF power supply system 101, in accordance with some embodiments. The RF power supply system 101 is configured to generate and output a first RF signal on a first output line 110 and a second RF signal on a second output line 116. The first RF signal and the second RF signal are combined on an RF power transmission line 118 connected to an input terminal of a coil 121 of a plasma processing chamber 123. The coil 121 is disposed over a window 125 of the plasma processing chamber 123. The plasma processing chamber 123 includes a substrate support structure 131 configured to support a substrate 129 undergoing plasma processing within the plasma processing chamber 123. In various embodiments, the window 125 is formed of a dielectric material, such as quartz or other similar material, that allows RF power to be transmitted from the coil 121 through the window 125 and into the plasma processing chamber 123. The plasma processing chamber 123 is electrically connected to a reference ground potential 133.

[0016] As the RF power is transmitted into and through the plasma processing chamber 123, the RF power transforms a process gas into a plasma 127 within the plasma processing chamber 123 in exposure to the substrate 129 that is supported on the substrate support structure 131. The RF power supply system 101 injects high voltage and high current to the coil 121 in order to drive the plasma 127. In various embodiments, the plasma 127 is used to provide controlled modification of a condition of the substrate 129, such as through material deposition and/or material removal and/or material implantation and/or material modification, etc. Also, in some embodiments, the plasma 127 is generated to provide for cleaning of the plasma processing chamber 123. During operation of the plasma processing chamber 123, exhaust gases and byproduct materials from processing of the substrate 129 are exhausted from the plasma processing chamber 123.

[0017] It should be understood that in various embodiments operation of the plasma processing chamber 123 can include many other additional operations, such as generating a bias voltage at the substrate 129 level to attract or repel electrically charged constituents of the plasma 127 toward or away from the substrate 129, and/or controlling a temperature of the substrate 129, and/or applying additional RF power to one or more electrode(s) disposed within the substrate support structure 131 to generate additional plasma, among other additional operations. Also, in various embodiments, the plasma processing chamber 123 is operated in accordance with a prescribed recipe that specifies a temporal schedule for controlling one or more of: supply of process gas(es) to the plasma processing chamber 123, pressure and temperature within the plasma processing chamber 123, supply of RF power to the coil 121, supply of bias voltage at the substrate 129 level, supply of RF power to electrode(s) within the substrate support structure 131, among essentially any other process parameter associated with operation of the plasma processing chamber 123.

[0018] The RF power supply system 101 is configured to generate the first and second RF signals with a prescribed waveform as a function of time, respectively, and deliver the generated first and second RF signals to the coil 121. The RF power supply system 101 includes a first RF generator 103 for generating the first RF signal, and a second RF generator 113 for generating the second RF signal. In some embodiments, each of the first RF generator 103 and the second RF generator 113 is respectively configured to include an intermediate direct current (DC) voltage link followed by an RF amplifier, such as a Class D or Class E RF amplifier. A ground rail of the first RF generator 103 is electrically connected to a reference ground potential 111. Similarly, a ground rail of the second RF generator 113 is electrically connected to the reference ground potential 111.

[0019] The first RF signal generated by the first RF generator 103 is transmitted through a first resonant element network 105 in route to the first output line 110. In the example embodiment of Figure 1, the first resonant element network 105 includes an inductor 107 and a capacitor 109. The inductor 107 is electrically connected in series with respect to transmission of the first RF signal from the first RF generator 103 to the first output line 110. Specifically, an input terminal 107i of the inductor 107 is electrically connected to an output of the first RF generator 103, and an output terminal 107o of the inductor 107 is electrically connected to the first output line 110. The capacitor 109 is electrically connected in parallel with respect to transmission of the first RF signal from the first RF generator 103 to the first output line 110. Specifically, an input terminal 109i of the capacitor 109 is electrically connected to the first output line 110, and an output terminal 109o of the capacitor 109 is electrically connected to the reference ground potential 111.

[0020] The second RF signal generated by the second RF generator 113 is transmitted through a second resonant element network 112 in route to the second output line 116. In the example embodiment of Figure 1, the second resonant element network 112 includes an inductor 115 and a capacitor 117. The inductor 115 is electrically connected in series with respect to transmission of the second RF signal from the second RF generator 113 to the second output line 116. Specifically, an input terminal 115i of the inductor 115 is electrically connected to an output of the second RF generator 113, and an output terminal 115o of the inductor 115 is electrically connected to the second output line 116. The capacitor 117 is electrically connected in parallel with respect to transmission of the second RF signal from the second RF generator 113 to the second output line 116. Specifically, an input terminal 117i of the capacitor 117 is electrically connected to the second output line 116, and an output terminal 117o of the capacitor 117 is electrically connected to the reference ground potential 111.

[0021] In some embodiments, the first RF signal generated by the first RF generator 103 is a reference signal (or baseline signal) in which a phase differential between voltage and current is substantially zero so that the power transmitted by first RF signal is near its maximum. Also, in these embodiments, the second RF signal generated by the second RF generator 113 is a power control signal in which a phase differential between voltage and current is controlled so as to provide for control of the combined power of the first RF signal and the second RF signal that is transmitted through the RF power transmission line 118 to the coil 121.

[0022] In some embodiments, the RF amplifier (class D or class E) within each of the first RF generator 103 and the second RF generator 113, respectively, is optimized to operate at a narrow range of frequencies with a limited voltage standing wave ratio (VSWR) range. The RF power output of the RF amplifier is controlled by controlling an input DC bus voltage. Due to the relatively large energy storage and filtering requirement of the DC bus, the speed with which RF power can be controlled is limited. Also, in some embodiments, a separate frequency tuning control is needed to maintain zero voltage switching (ZVS) for less inductive or capacitive plasma 127 loads. In some plasma processing situations, the RF power supply system 101 may not be able to reliably deliver RF power to the plasma processing chamber 123 due to the slow speed of RF power control and the limited ZVS range, especially with highly dynamic plasma 127 loads. Also, in some embodiments, implementation of the RF power supply system 101 with multiple control loops requires that the multiple control loops to be separated in bandwidth to avoid interference. This required separation in bandwidth limits the maximum bandwidth for the slower control loop. Therefore, it should be understood that the RF power supply system 101, having the symmetrical inductor-capacitor configurations of the first resonant element network 105 and the second resonant element network 112, is not able to maintain ZVS over some plasma 127 load impedance ranges.

[0023] Figure 2 shows an immittance Smith chart that includes a shaded region 201 indicating an example non-ZVS window of plasma 127 load impedance over which the RF power supply system 101 is not able to maintain ZVS, in accordance with some embodiments. It should be understood that requiring a plasma processing operation to maintain a plasma 127 load impedance that is outside of the non-ZVS window of plasma 127 load impedance corresponding to the shaded region 201 may be too constraining and/or infeasible for many plasma processing operations. Also, it should be understood that allowing the RF power supply system 101 to operate within the non-ZVS window of plasma 127 load impedance corresponding to the shaded region 201 will allow for unacceptably high electrical current transmission through switching transistors within the RF power supply system 101, which can cause overheating and irreparable damage to the RF power supply system 101. Therefore, it is of interest to improve the configuration of the RF power supply system 101 and its method of operation in order to reduce and/or eliminate the non-ZVS window of plasma 127 load impedance corresponding to the shaded region 201.

[0024] Figure 3 shows an example configuration of an RF power supply system 301, in accordance with some embodiments. The RF power supply system 301 is configured to generate and output a first RF signal on a first output line 310 and a second RF signal on a second output line 316. The first RF signal and the second RF signal are combined on an RF power transmission line 320 connected to an input terminal of the coil 121 of the plasma processing chamber 123. The RF power supply system 301 is configured to generate each of the first RF signal and the second RF signal with a prescribed waveform as a function of time, respectively, and deliver the first RF signal and the second RF signals to the coil 121. The RF power supply system 301 includes a first RF generator 303 for generating the first RF signal, and a second RF generator 313 for generating the second RF signal. In some embodiments, each of the first RF generator 303 and the second RF generator 313 is respectively configured to include an intermediate DC voltage link followed by an RF amplifier, such as a Class D or Class E RF amplifier. A ground rail of the first RF generator 303 is electrically connected to a reference ground potential 311. Similarly, a ground rail of the second RF generator 313 is electrically connected to the reference ground potential 311.

[0025] The first RF signal generated by the first RF generator 303 is transmitted through a first resonant element network 305 in route to the first output line 310. In the example embodiment of Figure 3, the first resonant element network 305 includes an inductor 307, a capacitor 309, and a capacitor 308. The inductor 307 and the capacitor 308 are electrically connected in series with respect to transmission of the first RF signal from the first RF generator 303 to the first output line 310. Specifically, an input terminal 307i of the inductor 307 is electrically connected to an output of the first RF generator 303. An output terminal 307o of the inductor 307 is electrically connected to an input terminal 308i of the capacitor 308. An output terminal 308o of the capacitor 308 is electrically connected to the first output line 310. The capacitor 309 is electrically connected in parallel with respect to transmission of the first RF signal from the first RF generator 303 to the first output line 310. Specifically, an input terminal 309i of the capacitor 309 is electrically connected to both the output terminal 307o of the inductor 307 and the input terminal 308i of the capacitor 308. An output terminal 309o of the capacitor 309 is electrically connected to the reference ground potential 311.

[0026] The second RF signal generated by the second RF generator 313 is transmitted through a second resonant element network 312 in route to the second output line 316. In the example embodiment of Figure 3, the second resonant element network 312 includes an inductor 315, a capacitor 317, and a capacitor 318. The inductor 315 and the capacitor 318 are electrically connected in series with respect to transmission of the second RF signal from the second RF generator 313 to the second output line 316. Specifically, an input terminal 315i of the inductor 315 is electrically connected to an output of the second RF generator 313. An output terminal 315o of the inductor 315 is electrically connected to an input terminal 318i of the capacitor 318. An output terminal 318o of the capacitor 318 is electrically connected to the second output line 316. The capacitor 317 is electrically connected in parallel with respect to transmission of the second RF signal from the second RF generator 313 to the second output line 316. Specifically, an input terminal 317i of the capacitor 317 is electrically connected to both the output terminal 315o of the inductor 315 and the input terminal 318i of the capacitor 318. An output terminal 317o of the capacitor 317 is electrically connected to the reference ground potential 311.

[0027] In some embodiments, the first RF signal generated by the first RF generator 303 is a reference signal (or baseline signal) in which a phase differential between voltage and current is substantially zero so that the power transmitted by first RF signal is near its maximum. Also, in these embodiments, the second RF signal generated by the second RF generator 313 is a power control signal in which a phase differential between voltage and current is controlled so as to provide for control of the combined power of the first RF signal and the second RF signal that is transmitted through the RF power transmission line 320 to the coil 121.

[0028] Inclusion of the capacitor 308 in the first resonant element network 305, along with inclusion of the capacitor 318 in the second resonant element network 312, serves to extend the ZVS region of the RF power supply system 301 for higher VSWR, as compared to the RF power supply system 101 of Figure 1. Specifically, with the RF power supply system 101 of Figure 1, to have ZVS in the first RF generator 103, the electrical current of the first RF signal through the inductor 107 should be lagging with respect to the voltage of the first RF signal. Further, assuming a mostly inductive plasma 127 load, if the impedance of the capacitor 109 at the operating frequency of the first RF generator 103 is Zci, then for Zci less than the impedance of the plasma 127, the electrical current through the inductor 107 will be capacitive and the RF amplifier within the first RF generator 103 will experience a non-ZVS condition. Similarly, with the RF power supply system 101 of Figure 1, to have ZVS in the second RF generator 113, the electrical current of the second RF signal through the inductor 115 should be lagging with respect to the voltage of the second RF signal. Further, assuming a mostly inductive plasma 127 load, if the impedance of the capacitor 117 at the operating frequency of the second RF generator 113 is Zc2, then for Zc2 less than the impedance of the plasma 127, the electrical current through the inductor 115 will be capacitive and the RF amplifier within the second RF generator 113 will experience a non-ZVS condition.

[0029] In contrast with the foregoing, with the RF power supply system 301 of Figure 3, the capacitor 308 in the first resonant element network 305 reduces the inductive portion of the plasma 127 load and provides a design parameter that can be used to maintain the inductive impedance of the plasma 127 load at a small enough level to meet the ZVS requirement of the first RF generator 303. Similarly, with the RF power supply system 301 of Figure 3, the capacitor 318 in the second resonant element network 312 reduces the inductive portion of the plasma 127 load and provides a design parameter that can be used to maintain the inductive impedance of the plasma 127 load at a small enough level to meet the ZVS requirement of the second RF generator 313. Also, each of the capacitor 308 and the capacitor 318 has an upper bound of acceptable capacitance and a lower bound of acceptable capacitance. The lower bound of acceptable capacitance of each of the capacitors 308 and 318 is set to ensure that the RF generators 303 and 313, respectively, operate in the ZVS regime. The upper bound of acceptable capacitance of each of the capacitors 308 and 318 does not affect whether or not the RF generators 303 and 313, respectively, operate in the ZVS regime. Also, setting the capacitance of the capacitor 308 at the upper bound of acceptable capacitance serves to maximum the amount of RF power that is delivered by the first RF signal to the RF power transmission line 320. Conversely, setting the capacitance of the capacitor 308 at the lower bound of acceptable capacitance serves to reduce the amount of RF power that is delivered by the first RF signal to the RF power transmission line 320. Similarly, setting the capacitance of the capacitor 318 at the upper bound of acceptable capacitance serves to maximum the amount of RF power that is delivered by the second RF signal to the RF power transmission line 320. Conversely, setting the capacitance of the capacitor 318 at the lower bound of acceptable capacitance serves to reduce the amount of RF power that is delivered by the second RF signal to the RF power transmission line 320. Optimum capacitance settings of the capacitors 308 and 318 are achieved when a required amount RF power is delivered to the plasma 127 while maximizing the efficiency of both the first RF generator 303 and the second RF generator 313, where maximum efficiency exists when the first/second RF generator 303/313 operates within the ZVS regime with reduced/minimal electrical current flow through the switching transistor(s) within the RF amplifier of first/second RF generator 303/313. Figure 4 shows an immittance Smith chart that includes a shaded region 401 indicating an example ZVS operational regime of the plasma 127 load impedance over which the RF power supply system 301 is able to maintain ZVS, in accordance with some embodiments.

[0030] Figures 5A and 5B collectively show a system 500 for controlling RF delivery to the plasma processing chamber 123, in accordance with some embodiments. As shown in Figure 5B, the system 500 includes a controller 541 that includes a switching signal generator 543 configured to generate and output a first pulsed signal on a conductor line 545 and a second pulsed signal on a conductor line 551, where the second pulsed signal is equivalent to the first pulsed signal. The first pulsed signal is output from the controller 541 through the conductor line 545 as a first switching signal GA. The first pulsed signal is also transmitted through an inverter 547 to create a second switching signal GA that is output from the controller 541 through a conductor line 549. The second switching signal GA is a complement, i.e., inverse, of the first switching signal GA.

[0031] The second pulsed signal output by the switching signal generator 543 on the conductor line 551 is transmitted through a delay controller 552 that is configured to apply a controlled amount of temporal delay to the second pulsed signal and thereby create a phase-adjusted version of the second pulsed signal that is output from the controller 541 through a conductor line 557 as a third switching signal GB. The phase-adjusted version of the second pulsed signal is also transmitted through an inverter 553 to create a fourth switching signal GB that is output from the controller 541 through a conductor line 555. The fourth switching signal GB is a complement, i.e., inverse, of the third switching signal GB.

[0032] With reference back to Figure 5A, the system 500 includes an RF amplifier 507 that includes a first switching converter 509 and a second switching converter 511. The first switching converter 509 is configured to generate and output a first RF signal on a conductor line 514 in accordance with the first switching signal GA and the second switching signal GA, where the first RF signal has a voltage [V_rfi] and current [I_rfi]. The first switching signal GA is the first pulsed signal as output by the switching signal generator 543, and the second switching signal GA is the complement of the first pulsed signal as output by the switching signal generator 543. In some embodiments, the first switching converter 509 is configured as a first half-bridge switching converter. In some embodiments, the first switching converter 509 includes a first NMOS transistor 513 and a second NMOS transistor 515. The first NMOS transistor 513 has a drain terminal 513d electrically connected to a voltage input rail 504. The first NMOS transistor 513 also has a source terminal 513s electrically connected to the conductor line 514. The second NMOS transistor 515 has a drain terminal 515d electrically connected to the conductor line 514. The second NMOS transistor 515 also has a source terminal 515s electrically connected to a reference ground potential 505. In this manner, the first NMOS transistor 513 and the second NMOS transistor 515 are serially connected between the voltage input rail 504 and the reference ground potential 505. [0033] The system 500 includes a DC-to-DC converter 503 configured to operate in accordance with a pulse width modulated input signal PWM. The DC-to-DC converter 503 is electrically connected to a DC voltage supply 501. The DC-to-DC converter 503 is configured to convert the voltage supplied by the DC voltage supply 501 to a controlled voltage level in accordance with the PWM input signal. The DC-to-DC converter 503 is electrically connected to control a DC voltage [Vdc] and DC current [Ide] on the voltage input rail 504.

[0034] A gate of the first NMOS transistor 513 is electrically connected to receive the first switching signal GA as output by the controller 541. Also, a gate of the second NMOS transistor 515 is electrically connected to receive the second switching signal GA as output by the controller 541. In this manner, when the first NMOS transistor 513 turns on, the second NMOS transistor 515 turns off, and vice-versa. Therefore, pulsing of the first switching signal GA and the second switching signal GA at an RF frequency creates the first RF signal on the conductor line 514.

[0035] The conductor line 514 is electrically connected to a first resonant element network 521, such that the first RF signal generated by the first switching converter 509 is transmitted through the first resonant element network 521 in route to a first output line 532. The first output line 532 is electrically connected to an RF power transmission line 540 that is connected to deliver RF power to the coil 121 of the plasma processing chamber 123. The first resonant element network 521 includes an inductor 527, a capacitor 531, and a capacitor 529. The inductor 527 and the capacitor 531 are electrically connected in series with respect to transmission of the first RF signal from the first switching converter 509 to the first output line 532. Specifically, an input terminal 527i of the inductor 527 is electrically connected to the conductor line 514. An output terminal 527o of the inductor 527 is electrically connected to an input terminal 53 li of the capacitor 531. An output terminal 53 lo of the capacitor 531 is electrically connected to the first output line 532. The capacitor 529 is electrically connected in parallel with respect to transmission of the first RF signal from the first switching converter 509 to the first output line 532. Specifically, an input terminal 529i of the capacitor 529 is electrically connected to both the output terminal 527o of the inductor 527 and the input terminal 53 li of the capacitor 531. An output terminal 529o of the capacitor 529 is electrically connected to the reference ground potential 505.

[0036] The second switching converter 511 of the RF amplifier 507 is configured to generate and output a second RF signal on a conductor line 518 in accordance with the third switching signal GB and the fourth switching signal GB, where the second RF signal has a voltage [Vre] and current [Ln]. The third switching signal GB is the second pulsed signal as output by the switching signal generator 543, and the fourth switching signal GB is the complement of the second pulsed signal as output by the switching signal generator 543. In some embodiments, the second switching converter 511 is configured as a second half-bridge switching converter. In some embodiments, the second switching converter 511 includes a third NMOS transistor 517 and a fourth NMOS transistor 519. The third NMOS transistor 517 has a drain terminal 517d electrically connected to the voltage input rail 504. The third NMOS transistor 517 also has a source terminal 517s electrically connected to the conductor line 518. The fourth NMOS transistor 519 has a drain terminal 519d electrically connected to the conductor line 518. The fourth NMOS transistor 519 also has a source terminal 519s electrically connected to the reference ground potential 505. In this manner, the third NMOS transistor 517 and the fourth NMOS transistor 519 are serially connected between the voltage input rail 504 and the reference ground potential 505.

[0037] A gate of the third NMOS transistor 517 is electrically connected to receive the third switching signal GB as output by the controller 541. Also, a gate of the fourth NMOS transistor 519 is electrically connected to receive the fourth switching signal GB as output by the controller 541. In this manner, when the third NMOS transistor 517 turns on, the fourth NMOS transistor 519 turns off, and vice-versa. Therefore, pulsing of the third switching signal GB and the fourth switching signal GB at an RF frequency creates the second RF signal on the conductor line 518. [0038] The conductor line 518 is electrically connected to a second resonant element network 525, such that the second RF signal generated by the second switching converter 511 is transmitted through the second resonant element network 525 in route to a second output line 538. The second output line 538 is electrically connected to the RF power transmission line 540 that is connected to deliver RF power to the coil 121 of the plasma processing chamber 123. The second resonant element network 525 includes an inductor 533, a capacitor 537, and a capacitor 535. The inductor 533 and the capacitor 537 are electrically connected in series with respect to transmission of the second RF signal from the second switching converter 511 to the second output line 538. Specifically, an input terminal 533i of the inductor 533 is electrically connected to the conductor line 518. An output terminal 533o of the inductor 533 is electrically connected to an input terminal 537i of the capacitor 537. An output terminal 537o of the capacitor 537 is electrically connected to the second output line 538. The capacitor 535 is electrically connected in parallel with respect to transmission of the second RF signal from the second switching converter 511 to the second output line 538. Specifically, an input terminal 535i of the capacitor 535 is electrically connected to both the output terminal 533o of the inductor 533 and the input terminal 537i of the capacitor 537. An output terminal 535o of the capacitor 535 is electrically connected to the reference ground potential 505.

[0039] It should be understood that the inductance value of the inductor 533 is substantially equal to the inductance value of the inductor 527. Also, the capacitance value of the capacitor 537 is substantially equal to the capacitance value of the capacitor 531. Also, the capacitance value of the capacitor 535 is substantially equal to the capacitance value of the capacitor 529. In this manner, the second resonant element network 525 is symmetrical with (substantially equal in configuration to) the first resonant element network 521.

[0040] With the first resonant element network 521 and the second resonant element network 525 considered together, the inductor 527 represents a first inductor 527, the capacitor 531 represents a first capacitor 531, the capacitor 529 represents a second capacitor 529, the inductor 533 represents a second inductor 533, the capacitor 537 represents a third capacitor 537, and the capacitor 535 represents a fourth capacitor 535. The first inductor 527 has the input terminal 527i electrically connected to receive the first RF signal from the first switching converter 509. The first capacitor 531 has the input terminal 53 li electrically connected to the output terminal 527o of the first inductor 527. The second capacitor 529 has the input terminal 529i electrically connected to both the output terminal 527o of the first inductor 527 and the input terminal 53 li of the first capacitor531. The second capacitor 529 has the output terminal 529o electrically connected to the reference ground potential 505. The second inductor 533 has the input terminal 533i electrically connected to receive the second RF signal from the second switching converter 511. The third capacitor 537 has the input terminal 537i electrically connected to the output terminal 533o of the second inductor 533. The fourth capacitor 535 has the input terminal 535i electrically connected to both the output terminal 533o of the second inductor 533 and the input terminal 537i of the third capacitor 537. The fourth capacitor 535 has the output terminal 535o electrically connected to the reference ground potential 505. The coil has an input terminal electrically connected to both the output terminal 53 lo of the first capacitor 531 (by way of the RF power transmission line 540 and the first output line 532) and the output terminal 537o of the third capacitor 537 (by way of the RF power transmission line 540 and the second output line 538).

[0041] With reference back to the controller 541 of the system 500 as shown in Figure 5B, the delay controller 552 is disposed between the switching signal generator 543 and the second switching converter 511. The delay controller 552 is configured to control an amount of phase shift between the first pulsed signal (as output by the switching signal generator 543 on the conductor line 551) and the second pulsed signal (as output by the switching signal generator 543 on the conductor line 545) in accordance with a phase setting input signal [<t>] . The controller 541 includes a phase shift control loop 563 configured to generate the phase setting input signal [<t>] to control operation of the delay controller 552 to cause an amount of RF power delivered to the coil 121 by the combination of the first RF signal on the first output line 532 and the second RF signal on the second output line 538 to be substantially equal to a setpoint RF power Psetpoint. In some embodiments, the phase shift control loop 563 is implemented as a proportional- integral-derivative (PID) control loop. In some embodiments, the setpoint RF power Psetpoint is input by a user/operator of the system 500 and is stored within a power setpoint store 559 within the controller 541, as indicated by arrow 561. In various embodiments, the power setpoint store 559 is essentially any type of computer memory device that is configured to store a digital value representing the setpoint RF power Psetpoint.

[0042] The phase shift control loop 563 includes a power comparator circuit 565 configured to determine a power offset AP_off_set as a difference between a real-time measured radiofrequency power PRF delivered to the coil 121 by the combination of the first RF signal on the first output line 532 and the second RF signal on the second output line 538 and the setpoint RF power Psetpoint, as shown in Equation 1. The power comparator circuit 565 receives the value of the setpoint RF power Psetpoint from power setpoint store 559, as indicated by arrow 567. The power comparator circuit 565 also receives the value of the real-time measured radiofrequency power PRF from a power computation circuit 575, as indicated by arrow 577.

[0043] Equation 1. AP_off_set PRF Psetpoint

[0044] The power computation circuit 575 is included in the phase shift control loop 563. The real-time measured radio frequency power PRF delivered to the coil 121 by the combination of the first RF signal on the first output line 532 and the second RF signal on the second output line 538 is determined as a sum of a first average RF power PRFI and a second average RF power PRF2, as shown in Equation 2. The first average RF power PRFI is conveyed by the first RF signal at the conductor line 514 of the first switching converter 509 over a prescribed time period having just elapsed, as shown in Equation 3. In Equation 3, the index (k) denotes an instance of voltage [Vrfi] and current [I_rfi ] measurement at a particular time on the conductor line 514. Also, in Equation 3, the prescribed period of time having just elapsed corresponds to voltage [V_rfi] and current [I_rfi] measurement instances (k=n+l) to (k=n+N), where (n) is a counter of voltage [Vrfi] and current [I_rfi] measurement instances over time on the conductor line 514, and where (N) is a total number of voltage [Vrfi] and current [I_rfi ] measurement instances to be used in computing the first average RF power PRFI. The second average RF power PRF2 is conveyed by the second RF signal at the conductor line 518 of the second switching converter 511 over the prescribed time period having just elapsed, as shown in Equation 4. In Equation 4, the index (k) denotes an instance of voltage [VT ] and current [ EE | measurement at a particular time on the conductor line 518. Also, in Equation 4, the prescribed period of time having just elapsed corresponds to voltage [Vrf2] and current [ Lt2 ] measurement instances (k=n+l) to (k=n+N), where (n) is a counter of voltage [VT ] and current | LE I measurement instances over time on the conductor line 518, and where (N) is a total number of voltage [VT ] and current [Irm] measurement instances to be used in computing the second average RF power PRF2. The power computation circuit 575 is connected to continuously receive input signals indicating the real-time measured values of each of the voltage [V_rfi] , the current [Irfi], the voltage [ VT ], and the current [Irm] .

[0045] Equation 2. P_RF = P_RF1 + P_RF2

[0046] Equation

[0047] Equation

[0048] In some embodiments, the system 500 includes a first voltage measurement device 594 connected to measure the voltage [V_rfi] on the conductor line 514 at the output of the first switching converter 509. The system 500 also includes a first current measurement device 595 connected to measure the current [I_rfi] on the conductor line 514 at the output of the first switching converter 509. The power computation circuit 575 also includes a first power computation circuit 596 configured to multiply the voltage [Vrfi] measured by the first voltage measurement device 594 and the current [I_rfi] measured by the first current measurement device 595 at the number (N) of sampling/measurement times during the prescribed time period having just elapsed to determine the first average RF power PRFI over the prescribed time period having just elapsed. Additionally, the system 500 includes a second voltage measurement device 597 connected to measure the voltage [VT ] on the conductor line 518 at the output of the second switching converter 511. The system 500 also includes a second current measurement device 598 connected to measure the current [EE] on the conductor line 518 at the output of the second switching converter 511. The power computation circuit 575 also includes a second power computation circuit 599 configured to multiply the voltage [V_rE] measured by the second voltage measurement device 597 and the current [EE] measured by the second current measurement device 598 at the number (N) of sampling/measurement times during the prescribed time period having just elapsed to determine the second average RF power PRF2 over the prescribed time period having just elapsed.

[0049] The power comparator circuit 565 is configured to convey the real-time value of the power offset APoffset to the phase adjustment determination circuit 569, as indicated by arrow 571. In some embodiments, the phase adjustment determination circuit 569 is configured to compare the real-time value of the power offset APoffset to a power offset threshold value APth to generate the phase setting input signal [<t>] that directs the delay controller 552 to implement a phase adjustment (within a range extending from zero degree to 180 degrees) to the second pulsed signal on the conductor line 551 when the real-time value of the power offset APoffset is equal to or greater than the power offset threshold value APth. The phase adjustment determination circuit 569 is connected to convey the phase setting input signal [<t>] to the delay controller 552, as indicated by arrow 573. In some embodiments, the phase adjustment determination circuit 569 is configured to generate and convey the phase setting input signal [<t>] to the delay controller 552 to drive the power offset APoffset toward zero. In some embodiments, the phase adjustment determination circuit 569 is configured to determine a required phase adjustment between the first RF signal on the first output line 532 and the second RF signal on the second output line 538 needed to substantially eliminate the real-time value of the power offset APoffset. The phase adjustment determination circuit 569 is configured to use the determined required phase adjustment in generating the phase setting input signal [<t>] for the delay controller 552. In some embodiments, the delay controller 552 and the phase shift control loop 563 operate in essentially real-time to implement an amount of phase adjustment between the first pulsed signal on the conductor line 545 and the second pulsed signal on the conductor line 551 that is needed to substantially zero out the power offset APoffset. In some embodiments, the power computation circuit 575, the power comparator circuit 565, and the phase adjustment determination circuit 569 are implemented as respective portions of either a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or another type of integrated circuit device. Also, in various embodiments, any one or more of the power computation circuit 575, the power comparator circuit 565, and the phase adjustment determination circuit 569 is/are implemented as either digital circuitry, analog circuitry, or a combination of digital and analog circuitry.

[0050] The controller 541 also includes a source power control loop 579 configured to control the DC voltage on the voltage input rail 504 connected to supply voltage to each of the first switching converter 509 and the second switching converter 511, so as to drive the phase setting input signal [<t>] as generated by the phase shift control loop 563 toward an optimum phase setting (^optimum. In some embodiments, the source power control loop 579 is implemented as a PID control loop. The optimum phase setting <t>optimum is related to the efficiency of the system 500. The source power control loop 579 includes an optimum phase computation circuit 581 configured to compute a real-time value of the optimum phase setting <t>optimum. The optimum phase setting <t>optimum is a real-time value equal to a real-time DC power Pdc on the voltage input rail 504 divided by a value equal to a factor (kf) multiplied by the real-time measured radiofrequency power PRF delivered to the coil 121 by the combination of the first RF signal on the first output line 532 and the second RF signal on the second output line 538, as indicated by Equation 5. In some embodiments, the factor (kf) is a predetermined constant. In some embodiments, the factor (kf) is a function evaluated in real-time. The optimum phase computation circuit 581 is connected to receive the value of the real-time measured radiofrequency power PRF from the power computation circuit 575, as indicated by arrow 583. Therefore, the power computation circuit 575 is also part of the source power control loop 579. [0051] Equation

[0052] In some embodiments, the system 500 includes a third voltage measurement device 582 connected to measure a voltage [Vdc] on the voltage input rail 504. The system 500 also includes a third current measurement device 584 connected to measure a current [Ide] on the voltage input rail 504. The optimum phase computation circuit 581 is connected to receive as inputs both the value of the voltage [Vdc] and the value of the current [Ide] as measured on the voltage input rail 504. The optimum phase computation circuit 581 also includes a third power computation circuit 586 configured to multiply the value of the voltage [Vdc] on the voltage input rail 504 as measured by the third voltage measurement device 582 and the value of the current [Ide] on the voltage input rail 504 as measured by the third current measurement device 584 to determine the real-time DC power Pdc on the voltage input rail 504.

[0053] The optimum phase computation circuit 581 is connected to convey the optimum phase setting <t>optimum to a phase comparator circuit 585 within the source power control loop 579, as indicated by arrow 587. The phase comparator circuit 585 is also connected to receive the phase setting input signal [<t>] as generated by the phase shift control loop 563 as an input. The phase comparator circuit 585 is configured to determine a real-time value of a phase setting difference <t>diff as the difference between the phase setting input signal [<t>] and the optimum phase setting 4>optimum. The phase comparator circuit 585 is connected to convey the real-time value of the phase setting difference <t>diff to a voltage adjustment determination circuit 589 within the source power control loop 579, as indicated by arrow 591. The voltage adjustment determination circuit 589 is configured to generate the pulse width modulated input signal PWM in real-time for controlling the DC-to-DC converter 503 to adjust the DC voltage on the voltage input rail 504, so as to minimize the phase setting difference <t>diff. The PWM signal is conveyed from the voltage adjustment determination circuit 589 to the DC-to-DC converter 503, as indicated by arrow 593. In this manner, the source power control loop 579 is electrically connected to control the PWM input signal to the DC-to-DC converter 503 in order to minimize a real-time difference between the phase setting input signal [<t>] as generated by the phase shift control loop 563 and the optimum phase setting 4>optimum, which serves to minimize power loss in the system 500 and improve efficiency of the system 500. In some embodiments, the power computation circuit 575, the optimum phase computation circuit 581, the phase comparator circuit 585, and the voltage adjustment determination circuit 589 are implemented as respective portions of either an FPGA, an ASIC, or another type of integrated circuit device. Also, in various embodiments, any one or more of the power computation circuit 575, the optimum phase computation circuit 581, the phase comparator circuit 585, and the voltage adjustment determination circuit 589 is/are implemented as either digital circuitry, analog circuitry, or a combination of digital and analog circuitry.

[0054] It should be understood that the phase shift control loop 563 reacts quickly (essentially instantaneously) to any change in the DC voltage [Vdc] on the voltage input rail 504 that is caused by operation of the source power control loop 579. In some embodiments, the phase shift control loop 563 reacts to any change in the DC voltage [Vdc] on the voltage input rail 504 that is caused by operation of the source power control loop 579 in less than about 20 microseconds. With simultaneous operation of the phase shift control loop 563 and the source power control loop 579, the phase setting input signal [<t>] will substantially match the optimum phase setting ^optimum, in conjunction with the real-time measured radiofrequency power PRF delivered to the coil 121 substantially matching the setpoint RF power Psetpoint as input by the user/operator of the system 500.

[0055] In accordance with the foregoing, the system 500 provides two ways of controlling the RF power delivered to the coil 121 in real-time in order to achieve delivery of the setpoint RF power Psetpoint to the coil 121: 1) by using the phase shift control loop 563 to control the phase difference between the first RF signal generated on the first output line 532 and the second RF signal generated on the second output line 538, and 2) by using the source power control loop 579 to control the DC-to-DC converter 503 to control the voltage on the voltage input rail 504 to control the maximum possible RF power PMAX available for delivery to the coil 121 at a given time. The phase shift control loop 563 provides for fast real-time control of the RF power delivered to the coil 121. The source power control loop 579 provides for slower control of the RF power delivered to the coil 121. The source power control loop 579 provides for improvement in the RF power delivery efficiency of the system 500. Maximizing the efficiency of the system 500 includes maintaining ZVS within the first and second switching converters 509 and 511, while also reducing electrical current flow through the NMOS transistors 513/515 and 517/519 of the first and second switching converters 509 and 511, respectively. The source power control loop 579 is also referred to as a loss optimization loop 579.

[0056] It should be understood that implementation of the capacitors 531 and 537 in the first and second resonant element networks 521 and 525, respectively, provides for capacitive isolation between the RF amplifier 507 and the plasma 127 load, while also providing a design variable (capacitance setting) that can optimize the plasma 127 load range and RF power delivery efficiency. Use of the capacitors 531 and 537 in the first and second resonant element networks 521 and 525, respectively, also provides for ZVS of the first and second switching converters 509 and 511, respectively, over a broader range of plasma 127 load impedance for higher VS WR, while also providing for reduce electrical current flow through the NMOS transistors 513/515 and 517/519 of the first and second switching converters 509 and 511, respectively, which contributes to improvement in the efficiency of the system 500. Additionally, it should be appreciated that the system 500 implements a single DC voltage supply 501, which eliminates a need for having to match up multiple different DC voltage supplies. Also, it should be appreciated that because the system 500 has a symmetrical configuration with respect to the first and second switching converter 509 and 511, and with respect to the first and second resonant element networks 521 and 525, hardware supply and implementation for the system 500 is made easier due to duplication of components.

[0057] Figure 6A shows a flowchart of a method for controlling RF power delivery to the plasma processing chamber 123, in accordance with some embodiments. The method includes an operation 601 for operating the switching signal generator 543 to generate the first pulsed signal on the conductor line 545 and the second pulsed signal on the conductor line 551, where the second pulsed signal is equivalent to the first pulsed signal. The method also includes an operation 603 for operating the first switching converter 509 to generate the first RF signal on the conductor line 514 in accordance with the first switching signal GA and the second switching signal GA, where the first switching signal GA is the first pulsed signal, and where the second switching signal GA is the complement of the first pulsed signal. The method also includes an operation 605 for conveying the first RF signal through the first set of resonant elements 521 to the input terminal of the coil 121 that is disposed to deliver RF power to the plasma processing chamber 123. The first set of resonant elements includes the first inductor 527 and the first capacitor 531 electrically connected in a serial manner between the output of the first switching converter 509 and the input terminal of the coil 121. The first set of resonant elements 521 includes the second capacitor 529 electrically connected between the reference ground potential 505 and a node located between the first inductor 527 and the first capacitor 531. The method also includes an operation 607 for operating the second switching converter 511 to generate the second RF signal in accordance with the third switching signal GB and the fourth switching signal GB, where the third switching signal GB is the second pulsed signal, and where the fourth switching signal GB is the complement of the second pulsed signal. The method also includes an operation 609 for conveying the second RF signal through the second set of resonant elements 525 to the input terminal of the coil 121. The second set of resonant elements 525 includes the second inductor 533 and the third capacitor 537 electrically connected in a serial manner between the output of the second switching converter 511 and the input terminal of the coil 121. The second set of resonant elements 525 includes the fourth capacitor 535 electrically connected between the reference ground potential 505 and a node located between the second inductor 533 and the third capacitor 537.

[0058] Figure 6B shows a flowchart for an extension of the method of Figure 6A for controlling RF power delivery to the plasma processing chamber 123, in accordance with some embodiments. The method includes an operation 611 for operating both the phase shift control loop 563 to control RF power delivered to coil 121, and the source power control loop 579 to optimize efficiency of RF power delivery to coil 121. The operation 611 includes an operation 613 for controlling an amount of phase shift between the first pulsed signal and the second pulsed signal in accordance with the phase setting input signal [<t>] to cause the amount of RF power PRF delivered to the coil 121 by the combination of the first RF signal on the first output line 532 and the second RF signal on the second output line 538 to be substantially equal to the setpoint RF power Psetpoint. The operation 611 also includes an operation 615 for controlling the DC voltage on the voltage input rail 504 that is connected to supply voltage to each of the first switching converter 509 and the second switching converter 511, so as to drive the phase setting input signal [<t>] as generated by the phase shift control loop 563 toward the optimum phase setting [ optimum], where the optimum phase setting [4>optimum] is a real-time value equal to the real-time DC power Pdc on the voltage input rail 504 divided by the value equal to the factor (kf) multiplied by the real-time RF power PRF delivered to the coil 121 by the combination of the first RF signal on the first output line 532 and the second RF signal on the second output line 538. In some embodiments, the method also includes operating the DC-to-DC converter 503 in accordance with the PWM input signal to control the DC voltage on the voltage input rail 504, where the PWM input signal is controlled to minimize a real-time difference between the phase setting input signal [<t>] and the optimum phase setting | <t>optimum | .

[0059] Figure 6C shows a more detailed method for performing the operation 613 to control the amount of phase shift between first pulsed signal and the second pulsed signal to cause the amount of RF power PRF delivered to the coil 121 to be substantially equal to the setpoint RF power P setpoint, in accordance with some embodiments. The method includes an operation 617 for determining the power offset APoffset as the difference between the setpoint RF power Pset oint and the real-time measured RF power PRF delivered to the coil 121 by the combination of the first RF signal on the first output line 532 and the second RF signal on the second output line 538. The method also includes an operation 619 for generating the phase setting input signal [<t>] to drive the power offset APoffset toward zero. In some embodiments, the method includes generating the phase setting input signal [<t>] to direct implementation of a phase adjustment to the second pulsed signal output by the switching signal generator 543 when a real-time value of the power offset APoffset is greater than or equal to the power offset threshold value APth. In some embodiments, the method includes an operation for determining a required phase adjustment between the first RF signal on the first output line 532 and the second RF signal on the second output line 538 needed to substantially eliminate a real-time value of the power offset APoffset. The method then proceeds with an operation for using the required phase adjustment to generate the phase setting input signal [<t>].

[0060] Figure 6D shows a flowchart of a method for determining the real-time measured RF power PRF delivered to the coil 121 as referenced in the operation 617, in accordance with some embodiments. The method includes an operation 621 for measuring a first voltage [V_rfi] at the output of the first switching converter 509 over a prescribed time period having just elapsed. The method also includes an operation 623 for measuring a first current [I_rfi] at the output of the first switching converter 509 over the prescribed time period having just elapsed. The method also includes an operation 625 for using the first voltage [V_rfi] and the first current [I_rfi] to compute the first power PRFI at the output of the first switching converter 509 over the prescribed time period having just elapsed. The method also includes an operation 627 for measuring a second voltage [Vrf2] at the output of the second switching converter 511 over the prescribed time period having just elapsed. The method also includes an operation 629 for measuring a second current [I_rf2] at the output of the second switching converter 511 over the prescribed time period having just elapsed. The method also includes an operation 631 for using the second voltage [Vrf2] and the second current [I_rf2] to compute the second power PRF2 at the output of the second switching converter 511 over the prescribed time period having just elapsed. The method also includes an operation 633 for computing the real-time measured radiofrequency power PRF delivered to the coil 121 by the combination of the first RF signal on the first output line 532 and the second RF signal on the second output line 538 as a sum of the first power PRFI and the second power PRF2. [0061] The system 500 provides for combining of RF power using two half-bridge switching converters (509 and 511), while maximizing the RF power PRF delivered to the coil 121 during the mismatch of the plasma 127 load impedance. The system 500 implements a high-frequency resonant link (521 and 525) that is designed to maximize the RF power PRF delivered to the coil 121 and minimize switch current within the two half-bridge switching converters (509 and 511), while providing zero voltage switching to all switching devices within two half-bridge switching converters (509 and 511). A fast feedback-based phase shift modulation provided by the phase shift control loop 563 in combination with a slow feedforward DC voltage control provided by the source power control loop 579 provides for control the RF power PRF delivered to the coil 121 in a faster and more reliable manner. The system 500 implements a series-parallel-series resonant power combining topology with phase-modulated power control. The design of resonant link components (521 and 525) provides for RF power delivery to high VSWR plasma 127 loads with reduced switch current while maintaining ZVS. The resonant link (521 and 525) also optimizes active and reactive RF power delivery to the plasma 127, which results in improved power conversion efficiency.

[0062] In the system 500, the RF power PRF delivered to the coil 121 is controlled by phaseshifting one half-bridge (511) with respect to another half-bridge (509). Unlike with a DC bus voltage control scheme, the approach implemented in the system 500 provides for faster RF power PRF control. The system 500 also includes the slow feedforward DC voltage control based on the RF power setting Psetpoint. This slow feedforward control of DC voltage combined with the fast phase-shift RF control provides higher efficiency and faster RF power delivery to highly dynamic plasma 127 loads. It should be appreciated that the resonant link network (521 and 525) optimizes the switch current for a specified VSWR range and, therefore, improves the RF amplifier 507 efficiency. The system 500 also improves efficiency at lower power by implementing the feedforward control of the DC voltage on the voltage input rail 504 based on the RF power setpoint Psetpoint. The feedforward approach results in faster and more stable control of RF power PRF delivery to the coil 121.

[0063] Although the method operations were described in a specific order, it should be understood that other housekeeping operations may be performed in between operations, or operations may be adjusted so that they occur at slightly different times or may be distributed in a system which allows the occurrence of the processing operations at various intervals associated with the processing.

[0064] Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications can be practiced within the scope of the appended claims. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the embodiments are not to be limited to the details given herein, but may be modified within the scope and equivalents of the appended claims.

[0065] It should be understood that the various embodiments defined herein may be combined or assembled into specific implementations using the various features disclosed herein. Thus, the examples provided are just some possible examples, without limitation to the various implementations that are possible by combining the various elements to define many more implementations. In some examples, some implementations may include fewer elements, without departing from the spirit of the disclosed or equivalent implementations.

[0066] What is claimed is:

Claims

1. A system for controlling radiofrequency power delivery to a plasma processing chamber, comprising: a switching signal generator configured to generate and output a first pulsed signal and a second pulsed signal, wherein the second pulsed signal is equivalent to the first pulsed signal; a first switching converter configured to generate and output a first radiofrequency signal in accordance with a first switching signal and a second switching signal, wherein the first switching signal is the first pulsed signal and the second switching signal is a complement of the first pulsed signal; a first inductor having an input terminal electrically connected to receive the first radiofrequency signal from the first switching converter; a first capacitor having an input terminal electrically connected to an output terminal of the first inductor; a second capacitor having an input terminal electrically connected to both the output terminal of the first inductor and the input terminal of the first capacitor, the second capacitor having an output terminal electrically connected to a reference ground potential; a second switching converter configured to generate and output a second radiofrequency signal in accordance with a third switching signal and a fourth switching signal, wherein the third switching signal is the second pulsed signal and the fourth switching signal is a complement of the second pulsed signal; a second inductor having an input terminal electrically connected to receive the second radiofrequency signal from the second switching converter; a third capacitor having an input terminal electrically connected to an output terminal of the second inductor; a fourth capacitor having an input terminal electrically connected to both the output terminal of the second inductor and the input terminal of the third capacitor, the fourth capacitor having an output terminal electrically connected to the reference ground potential; and a coil disposed to deliver radiofrequency power to a plasma processing chamber, the coil having an input terminal electrically connected to both an output terminal of the first capacitor and an output terminal of the third capacitor.

2. The system as recited in claim 1, further comprising: a delay controller disposed between the switching signal generator and the second switching converter, the delay controller configured to control an amount of phase shift between the first pulsed signal and the second pulsed signal in accordance with a phase setting input signal.

3. The system as recited in claim 2, further comprising: a phase shift control loop configured to generate the phase setting input signal to control operation of the delay controller to cause an amount of radiofrequency power delivered to the coil by a combination of the first radiofrequency signal and the second radiofrequency signal to be substantially equal to a setpoint radiofrequency power.

4. The system as recited in claim 3, wherein the phase shift control loop includes a power comparator circuit configured to determine a power offset as a difference between the setpoint radiofrequency power and a real-time measured radiofrequency power delivered to the coil by the combination of the first radiofrequency signal and the second radiofrequency signal, the phase shift control loop including a phase adjustment determination circuit configured to generate and convey the phase setting input signal to the delay controller to drive the power offset toward zero.

5. The system as recited in claim 4, wherein the phase adjustment determination circuit is configured to compare a real-time value of the power offset to a power offset threshold value to generate the phase setting input signal that directs the delay controller to implement a phase adjustment to the second pulsed signal when the real-time value of the power offset is equal to or greater than the power offset threshold value.

6. The system as recited in claim 4, wherein the phase adjustment determination circuit is configured to determine a required phase adjustment between the first radiofrequency signal and the second radiofrequency signal needed to substantially eliminate a real-time value of the power offset, the phase adjustment determination circuit configured to use the required phase adjustment in generating the phase setting input signal for the delay controller.

7. The system as recited in claim 4, wherein the delay controller and the phase shift control loop operate in essentially real-time to implement an amount of phase adjustment between the first pulsed signal and the second pulsed signal that is needed to substantially zero out the power offset.

8. The system as recited in claim 4, wherein the real-time measured radiofrequency power delivered to the coil by the combination of the first radiofrequency signal and the second radiofrequency signal is determined as a sum of a first average radiofrequency power and a second average radiofrequency power, wherein the first average radiofrequency power is conveyed by the first radiofrequency signal at the output of the first switching converter over a prescribed time period having just elapsed, and wherein the second average radiofrequency power is conveyed by the second radiofrequency signal at the output of the second switching converter over the prescribed time period having just elapsed.

9. The system as recited in claim 8, further comprising: a first voltage measurement device connected to measure a voltage at the output of the first switching converter; a first current measurement device connected to measure a current at the output of the first switching converter; a first power computation circuit configured to multiply the voltage measured by the first voltage measurement device and the current measured by the first current measurement device at a number of sampling times during the prescribed time period having just elapsed to determine the first average radiofrequency power over the prescribed time period having just elapsed; a second voltage measurement device connected to measure a voltage at the output of the second switching converter; a second current measurement device connected to measure a current at the output of the second switching converter; and a second power computation circuit configured to multiply the voltage measured by the second voltage measurement device and the current measured by the second current measurement device at the number of sampling times during the prescribed time period having just elapsed to determine the second average radiofrequency power over the prescribed time period having just elapsed.

10. The system as recited in claim 3, further comprising: a source power control loop configured to control a direct current voltage on a voltage input rail connected to supply voltage to each of the first switching converter and the second switching converter so as to drive the phase setting input signal as generated by the phase shift control loop toward an optimum phase setting, wherein the optimum phase setting is a real-time value equal to a real-time direct current power on the voltage input rail divided by a value equal to a factor multiplied by a real-time radiofrequency power delivered to the coil by the combination of the first radiofrequency signal and the second radiofrequency signal.

11. The system as recited in claim 10, wherein the real-time radiofrequency power delivered to the coil by the combination of the first radiofrequency signal and the second radiofrequency signal is determined as a sum of a first average radiofrequency power and a second average radiofrequency power, wherein the first average radiofrequency power is conveyed by the first radiofrequency signal at the output of the first switching converter over a prescribed time period having just elapsed, and wherein the second average radiofrequency power is conveyed by the second radiofrequency signal at the output of the second switching converter over the prescribed time period having just elapsed.

12. The system as recited in claim 10, further comprising: a direct current-to-direct current converter configured to operate in accordance with a pulse width modulated input signal, the direct current-to-direct current converter electrically connected to control the direct current voltage on the voltage input rail, the source power control loop electrically connected to control the pulse width modulated input signal to minimize a realtime difference between the phase setting input signal as generated by the phase shift control loop and the optimum phase setting.

13. A method for controlling radiofrequency power delivery to a plasma processing chamber, comprising: operating a switching signal generator to generate a first pulsed signal and a second pulsed signal, wherein the second pulsed signal is equivalent to the first pulsed signal; operating a first switching converter to generate a first radiofrequency signal in accordance with a first switching signal and a second switching signal, wherein the first switching signal is the first pulsed signal and the second switching signal is a complement of the first pulsed signal; conveying the first radiofrequency signal through a first set of resonant elements to an input terminal of a coil that is disposed to deliver radiofrequency power to a plasma processing chamber, the first set of resonant elements including a first inductor and a first capacitor electrically connected in a serial manner between an output of the first switching converter and the input terminal of the coil, the first set of resonant elements including a second capacitor electrically connected between a reference ground potential and a node located between the first inductor and the first capacitor; operating a second switching converter to generate a second radiofrequency signal in accordance with a third switching signal and a fourth switching signal, wherein the third switching signal is the second pulsed signal and the fourth switching signal is a complement of the second pulsed signal; and conveying the second radiofrequency signal through a second set of resonant elements to the input terminal of the coil, the second set of resonant elements including a second inductor and a third capacitor electrically connected in a serial manner between an output of the second switching converter and the input terminal of the coil, the second set of resonant elements including a fourth capacitor electrically connected between the reference ground potential and a node located between the second inductor and the third capacitor.

14. The method as recited in claim 13, further comprising: controlling an amount of phase shift between the first pulsed signal and the second pulsed signal in accordance with a phase setting input signal to cause an amount of radiofrequency power delivered to the coil by a combination of the first radiofrequency signal and the second radiofrequency signal to be substantially equal to a setpoint radiofrequency power.

15. The method as recited in claim 14, further comprising: determining a power offset as a difference between the setpoint radiofrequency power and a real-time measured radiofrequency power delivered to the coil by the combination of the first radiofrequency signal and the second radiofrequency signal; and generating the phase setting input signal to drive the power offset toward zero.

16. The method as recited in claim 15, further comprising: generating the phase setting input signal to direct implementation of a phase adjustment to the second pulsed signal when a real-time value of the power offset is greater than or equal to a power offset threshold value.

17. The method as recited in claim 15, further comprising: determining a required phase adjustment between the first radiofrequency signal and the second radiofrequency signal needed to substantially eliminate a real-time value of the power offset; and using the required phase adjustment to generate the phase setting input signal.

18. The method as recited in claim 15, further comprising: measuring a first voltage at the output of the first switching converter over a prescribed time period having just elapsed; measuring a first current at the output of the first switching converter over the prescribed time period having just elapsed; using the first voltage and the first current to compute a first power at the output of the first switching converter over the prescribed time period having just elapsed; measuring a second voltage at the output of the second switching converter over the prescribed time period having just elapsed; measuring a second current at the output of the second switching converter over the prescribed time period having just elapsed; using the second voltage and the second current to compute a second power at the output of the second switching converter over the prescribed time period having just elapsed; and computing the real-time measured radiofrequency power delivered to the coil by the combination of the first radiofrequency signal and the second radiofrequency signal as a sum of the first power and the second power.

19. The method as recited in claim 14, further comprising: controlling a direct current voltage on a voltage input rail connected to supply voltage to each of the first switching converter and the second switching converter so as to drive the phase setting input signal as generated by the phase shift control loop toward an optimum phase setting, wherein the optimum phase setting is a real-time value equal to a real-time direct current power on the voltage input rail divided by a value equal to a factor multiplied by a real-time radiofrequency power delivered to the coil by the combination of the first radiofrequency signal and the second radiofrequency signal.

20. The method as recited in claim 19, further comprising: operating a direct current-to-direct current converter in accordance with a pulse width modulated input signal to control the direct current voltage on the voltage input rail; and controlling the pulse width modulated input signal to minimize a real-time difference between the phase setting input signal and the optimum phase setting.