WO2024222871A1 - 电池管理系统、电池、车辆和电池管理方法 - Google Patents

电池管理系统、电池、车辆和电池管理方法 Download PDF

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Publication number
WO2024222871A1
WO2024222871A1 PCT/CN2024/090068 CN2024090068W WO2024222871A1 WO 2024222871 A1 WO2024222871 A1 WO 2024222871A1 CN 2024090068 W CN2024090068 W CN 2024090068W WO 2024222871 A1 WO2024222871 A1 WO 2024222871A1
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WIPO (PCT)
Prior art keywords
chip
battery
circuit
battery pack
voltage
Prior art date
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Pending
Application number
PCT/CN2024/090068
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English (en)
French (fr)
Inventor
鲍文静
李�杰
李奇峰
杨云
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BYD Semiconductor Co Ltd
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BYD Semiconductor Co Ltd
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Publication of WO2024222871A1 publication Critical patent/WO2024222871A1/zh
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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/48—Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
    • H01M2010/4271—Battery management systems including electronic circuits, e.g. control of current or voltage to keep battery in healthy state, cell balancing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
    • H01M2010/4278—Systems for data transfer from batteries, e.g. transfer of battery parameters to a controller, data transferred between battery controller and main controller

Definitions

  • the present application relates to the field of battery technology, and in particular to a battery management system, as well as a battery, a vehicle and a battery management method.
  • the performance of battery management system is low, and it cannot estimate and manage the battery status in a timely and accurate manner, which in turn affects the working efficiency of the battery management system.
  • the existing battery management system is not applicable, which in turn affects the use and promotion of batteries.
  • the present application aims to solve at least one of the technical problems existing in the prior art.
  • the first embodiment of the present application proposes a battery management system, which can improve the operating efficiency of the battery management system, improve the safety and reliability of the system, and thus be applicable to more application scenarios.
  • a second aspect of the present application provides a battery
  • a third aspect of the present application provides a vehicle
  • the fourth embodiment of the present application proposes a battery management method.
  • the battery management system of the first aspect of the present application includes: an analog front-end chip, the analog front-end chip is connected to a battery pack, and is used to detect the status parameter information of a single cell in the battery pack, and the battery pack includes at least one single cell; a high-voltage management chip, the high-voltage management chip is connected to the power line of the battery pack, and is used to detect the status parameter information of the battery pack, and the battery pack includes a plurality of the battery packs; an integrated dedicated chip; and a processor chip, the processor chip is electrically connected to the analog front-end chip through the integrated dedicated chip, the high-voltage management chip is electrically connected to the processor chip through the integrated dedicated chip, and the processor chip is used to manage the battery management system according to the status parameter information of the single cell and the battery pack.
  • battery management is implemented based on the architecture of an analog front-end chip, a high-voltage management chip, an integrated dedicated chip and a processor chip.
  • the processor chip acquires data more quickly and efficiently, which improves the operating efficiency of the system.
  • the data transmission path is more unified, which improves data stability.
  • the battery management system can be applicable to more application scenarios.
  • the integrated dedicated chip includes: a power supply circuit, which is used to connect to an external power supply and provide working power to at least one chip in the battery management system.
  • the integrated dedicated chip also includes: a power input port and a power output port, the power supply circuit is connected to an external power supply through the power input port, and the power supply circuit is connected to the processor chip through the power output port to provide working power for the processor chip.
  • the power supply circuit is connected to the high-voltage management chip through the power output port to provide working power for the high-voltage management chip.
  • the power supply circuit includes a voltage conversion subcircuit to provide different operating voltages for the processor chip and the high-voltage management chip.
  • the processor chip is also used to generate power supply configuration information according to the power supply requirements of the internal power-consuming chip of the battery management system and send the power supply configuration information to the integrated dedicated chip, so as to manage the battery management system to provide working power to the internal power-consuming chip;
  • the integrated dedicated chip also includes: a first digital logic circuit, which is electrically connected to the processor chip and the power supply circuit respectively, and is used to control the power supply circuit to provide working power to the internal power-consuming chip of the battery management system according to the power supply configuration information.
  • the integrated dedicated chip also includes: a power switch circuit, a first end of the power switch circuit is connected to the power supply circuit, a second end of the power switch circuit is suitable for connecting to an external power unit, and the power switch circuit is used to control the on and off status of the power supply of the external power unit.
  • the power switch circuit includes: a high-side driving sub-circuit, a first end of the high-side driving sub-circuit is connected to the output end of the power supply circuit, a second end of the high-side driving sub-circuit is suitable for being connected to the power supply side of the power supply circuit of the external power unit, a third end of the high-side driving sub-circuit is suitable for being connected to the positive terminal of the external power unit, and the high-side driving sub-circuit is used to control the on-off between the external power unit and the power supply side.
  • the power switch circuit includes: a low-side driving sub-circuit, a first end of the low-side driving sub-circuit is connected to the output end of the power supply circuit, a second end of the low-side driving sub-circuit is suitable for being connected to the power supply ground side of the power supply circuit of the external power unit, a third end of the low-side driving sub-circuit is suitable for being connected to the negative terminal of the external power unit, and the low-side driving sub-circuit is used to control the on-off between the external power unit and the power supply ground side.
  • the power switch circuit further includes: an enable switch subcircuit, one end of the enable switch subcircuit being connected to the high-side drive subcircuit and the low-side drive subcircuit respectively, and the other end of the enable switch subcircuit being connected to the power supply circuit, for controlling the on and off of the high-side drive subcircuit and the low-side drive subcircuit.
  • the processor chip is also used to generate a power switch channel selection control signal for the high-side drive sub-circuit and the low-side drive sub-circuit according to the power demand of the external power unit, and send the power switch channel selection control signal to the integrated dedicated chip to manage the battery management system's power supply to the external power unit; and the first digital logic circuit is electrically connected to the enable switch sub-circuit, and is used to control the enable switch sub-circuit according to the power switch channel selection control signal.
  • the integrated dedicated chip further includes: an input source detection subcircuit, one end of which is connected to the circuit via the electrical The source input port is connected to the external power supply, and the other end of the input source detection subcircuit is connected to the first digital logic circuit, for detecting the external power supply and transmitting the power detection information of the external power supply to the first digital logic circuit.
  • the integrated dedicated chip includes: an input source isolation circuit, the input source isolation circuit is connected to the external power supply and the power supply circuit, and the power supply circuit is connected to the external power supply through the input source isolation circuit.
  • the integrated dedicated chip includes: a first daisy chain serial peripheral interface circuit, and the integrated dedicated chip is electrically connected to the analog front-end chip through the first daisy chain serial peripheral interface circuit.
  • the integrated dedicated chip includes:
  • a first standard serial peripheral interface circuit one end of the first standard serial peripheral interface circuit is electrically connected to a first daisy chain serial peripheral interface circuit, and the other end of the first standard serial peripheral interface circuit is electrically connected to the processor chip.
  • the first standard serial peripheral interface circuit is used to send standard serial data to the processor chip or receive data from the processor chip, and transmit the data received from the processor chip to the first daisy chain serial peripheral interface circuit as standard serial data
  • the first daisy chain serial peripheral interface circuit is used to convert the standard serial data into corresponding differential data, and send the corresponding differential data to the analog front end chip
  • the first daisy chain serial peripheral interface circuit is also used to receive differential data from the analog front-end chip, and send the differential data received from the analog front-end chip to the first standard serial peripheral interface circuit, the first standard serial peripheral interface circuit converts the differential data into corresponding standard serial data, and sends the corresponding standard serial data to the processor chip.
  • the integrated dedicated chip includes:
  • a second daisy chain serial peripheral interface circuit the integrated dedicated chip is connected to the high-voltage management chip through the second daisy chain serial peripheral interface circuit.
  • the integrated dedicated chip includes:
  • a second standard serial peripheral interface circuit one end of the second standard serial peripheral interface circuit is electrically connected to the second daisy chain serial peripheral interface circuit, and the other end of the second standard serial peripheral interface circuit is electrically connected to the processor chip.
  • the second standard serial peripheral interface circuit is used to receive data from the processor chip, and transmit the data received from the processor chip to the second daisy chain serial peripheral interface circuit in the form of standard serial data
  • the second daisy chain serial peripheral interface circuit is used to convert the standard serial data into corresponding differential data, and send the corresponding differential data to the high voltage management chip
  • the second daisy chain serial peripheral interface circuit is also used to receive differential data from the high-voltage management chip, and send the differential data received from the high-voltage management chip to the second standard serial peripheral interface circuit, the second standard serial peripheral interface circuit converts the differential data into corresponding standard serial data, and sends the corresponding standard serial data to the processor chip.
  • the integrated dedicated chip also includes at least one interface circuit among a first I2C bus interface circuit, a first universal asynchronous receiver/transmitter interface circuit, and a first controller area network bus interface circuit.
  • the at least one interface circuit is used for the electrical connection between the daisy chain serial peripheral interface circuit of the integrated dedicated chip and the processor chip, or the at least one interface circuit is used for communication between the integrated dedicated chip and an external control system.
  • the integrated dedicated chip further comprises:
  • a first analog input interface circuit one end of which is electrically connected to an external sensor, and the other end of which is electrically connected to the first digital logic circuit, is used to collect sensor information of the external sensor.
  • the integrated dedicated chip further comprises:
  • a first universal input/output interface circuit wherein one end of the first universal input/output interface circuit is electrically connected to a peripheral circuit, and the other end of the first universal input/output interface circuit is connected to the first digital logic circuit, and is used for outputting control information of the first digital logic circuit to the peripheral circuit or collecting status information of the peripheral circuit.
  • the processor chip is also used to send configuration information of the integrated dedicated chip to the integrated dedicated chip, and to obtain at least one of interface circuit transmission information, security monitoring information, security alarm information and operating status information of the integrated dedicated chip.
  • the high voltage management chip includes:
  • a signal input port used to input the status parameter information of the battery pack
  • a first detection circuit wherein the first detection circuit is connected to a power line of the battery pack through the signal input port, and is used for detecting status parameter information of the battery pack.
  • the high voltage management chip further includes:
  • a peripheral differential detection circuit one end of which is connected to the power line of the battery pack, and the other end of which is connected to the signal input port of the high-voltage management chip, and the first detection circuit detects the status parameter information of the battery pack through the peripheral differential detection circuit.
  • the first detection circuit includes: a first voltage detection circuit, the first voltage detection circuit is connected to the signal input port, and is used to detect voltage information of the battery pack.
  • the first detection circuit includes: a first current detection circuit, the first current detection circuit is connected to the signal input port, and is used to detect current information of the battery pack.
  • the processor chip is used to manage the battery management system according to the status parameter information of the single cell and the battery pack, including: the processor chip is used to estimate the charge state value and/or health state value of the battery pack according to the voltage information and current information of the battery pack.
  • the high-voltage management chip also includes: a data processing circuit, which is respectively connected to the first voltage detection circuit and the first current detection circuit, and is used to estimate the charge state value and/or health state value of the battery pack based on the voltage information and current information of the battery pack.
  • the first detection circuit includes: an insulation resistance detection circuit, the insulation resistance detection circuit is used to detect the battery pack The resistance between the power line and the vehicle body insulation ground;
  • the data processing unit is further used to determine the leakage state of the battery pack according to the resistance value.
  • the high voltage management chip further includes:
  • a first safety diagnostic circuit is connected to the first detection circuit and is used to identify whether the state parameter information of the battery pack is abnormal and to perform safety protection when the state parameter information of the battery pack is abnormal.
  • the first safety diagnostic circuit comprises:
  • a first current diagnostic circuit is connected to the first current detection circuit and is used to identify whether the battery pack has overcurrent based on the current information of the battery pack and perform overcurrent protection when the battery pack has overcurrent.
  • the first safety diagnostic circuit comprises:
  • a first voltage diagnostic circuit is connected to the first voltage detection circuit, and is used to identify whether the battery pack has overvoltage or undervoltage according to the voltage information of the battery pack, and perform overvoltage or undervoltage protection when the battery pack has overvoltage or undervoltage.
  • the high voltage management chip includes:
  • a second universal input/output interface circuit wherein the second universal input/output interface circuit is connected to an external sensor or an external load and is used to collect information from the external sensor or output a control signal to the external load.
  • the high voltage management chip further includes:
  • first temperature detection circuit is connected to an external temperature sensor through the second universal input/output interface circuit to detect temperature information of the high voltage management chip
  • a first temperature diagnostic circuit is connected to the first temperature detection circuit, and is used to identify whether the high-voltage management chip is overheated according to the temperature information of the high-voltage management chip, and perform over-temperature protection when the high-voltage management chip is overheated.
  • the processor chip is also used to send the configuration information of the high-voltage management chip to the high-voltage management chip through the integrated dedicated chip, and to obtain at least one of the detection information, calculation result information, safety diagnosis information and safety alarm information of the high-voltage management chip through the integrated dedicated chip.
  • the high voltage management chip includes:
  • a third daisy chain serial peripheral interface circuit through which the high-voltage management chip is connected to the second daisy chain serial peripheral interface circuit of the integrated dedicated chip.
  • the high voltage management chip includes at least one of a second standard serial peripheral interface circuit and a second I2C bus interface circuit, and at least one of the second standard serial peripheral interface circuit and the second I2C bus interface circuit is a backup interface circuit.
  • the high voltage management chip includes: a second controller area network bus interface circuit, and the second controller area network bus interface circuit is used to connect to an external communication bus to obtain external bus information.
  • the analog front-end chip includes: a second detection circuit, which is connected to the battery pack and is used to detect status parameter information of single cells in the battery pack.
  • the analog front-end chip further includes: a second analog input interface circuit, and the second detection circuit is connected to an external detection circuit through the second analog input interface circuit to detect status parameter information of single cells in the battery pack.
  • the analog front-end chip also includes: a third universal input/output interface circuit, the third universal input/output interface circuit is connected to an external sensor, and the second detection circuit is connected to the external sensor through the third universal input/output interface circuit to detect status parameter information of single cells in the battery pack.
  • the second detection circuit includes: a second voltage detection circuit, and the second voltage detection circuit is used to collect voltage information of single cells in the battery pack.
  • the second detection circuit further includes: a second current detection circuit, and the second current detection circuit is used to collect current information of single cells in the battery pack.
  • the second detection circuit further includes: a stress detection circuit, and the stress detection circuit is used to detect stress information in the single cells in the battery pack.
  • the second detection circuit further includes: a second temperature detection circuit, and the second temperature detection circuit is used to detect temperature information of single cells in the battery pack.
  • the front-end analog chip also includes: a second safety diagnostic circuit, which is connected to the second detection circuit and is used to identify whether the status parameter information of the single cell battery is abnormal, and to perform safety protection when the status parameters of the single cell battery are abnormal.
  • the second safety diagnostic circuit includes: a second voltage diagnostic circuit, which is connected to the second voltage detection circuit and is used to identify whether the voltage of the single cell in the battery pack is overvoltage/undervoltage, and perform overvoltage or undervoltage protection when the voltage of the single cell is overvoltage or undervoltage.
  • the second voltage detection circuit is also used to detect the voltage of the battery pack and the voltage of the internal components of the analog front-end chip; the second voltage diagnostic circuit is also used to identify whether the voltage of the battery pack is abnormal and whether the voltage of the internal components of the analog front-end chip is abnormal, and perform voltage safety protection when an abnormality occurs.
  • the second safety diagnostic circuit includes: a second current diagnostic circuit, which is connected to the second current detection circuit and is used to identify whether there is an overcurrent in the current of the single cell and perform overcurrent protection when there is an overcurrent in the current of the single cell.
  • the second current detection circuit is also used to detect the current of the battery pack and the current of the internal components of the analog front-end chip; the second current diagnosis circuit is also used to diagnose whether the current of the battery pack is abnormal and to identify whether the current of the internal components of the analog front-end chip is abnormal, and to perform current abnormality safety protection when current abnormality exists.
  • the second safety diagnosis circuit includes: a stress diagnosis circuit, which is used to identify whether the stress in the single battery in the battery pack is abnormal, and perform stress abnormality safety protection when the stress is abnormal.
  • the second safety diagnostic circuit includes: a second temperature diagnostic circuit, which is connected to a second temperature detection circuit and is used to identify whether the temperature of a single cell in the battery pack is overtemperature, and to perform overtemperature safety protection when the temperature of the single cell is overtemperature.
  • the analog front-end chip also includes: a second digital logic circuit, which is connected to the second safety diagnostic circuit and is used to generate abnormal information when there is an abnormality in the status parameter information of the single battery in the battery pack to provide an alarm prompt.
  • the processor chip is also used to send the configuration information of the analog front-end chip to the analog front-end chip through the integrated dedicated chip, and to obtain at least one of the detection information, safety diagnosis information, safety alarm information and calculation result information of the analog front-end chip through the integrated dedicated chip.
  • the processor chip is used to manage the battery management system according to the status parameter information of the single cells and the battery pack, including: the processor chip is used to generate power balancing information when determining the power imbalance of the single cells in the battery pack according to the status parameter information of the single cells in the battery pack, and forward the power balancing information to the corresponding front-end analog chip through the integrated dedicated chip; the analog front-end chip includes a balancing circuit, and the balancing circuit is used to perform power balancing processing on the single cells in the battery pack according to the power balancing information.
  • the processor chip is used to manage the battery management system according to the status parameter information of the single cell and the battery pack, including: the processor chip is used to determine the battery status according to the status parameter information of the single cell and the battery pack, and judge whether to charge or discharge the battery pack and whether to stop charging or discharging the battery pack according to the battery status.
  • the processor chip is used to manage the battery management system according to the status parameter information of the single cell and the battery pack, including: the processor is used to estimate the state of charge value of the battery pack according to the state parameter information of the single cell and/or the battery pack, and obtain the state of charge value of the battery pack estimated by the high-voltage management chip, and perform battery status verification based on the state of charge value of the battery pack estimated by itself and the state of charge value of the battery pack estimated by the high-voltage management chip.
  • each of the analog front-end chips includes a fourth daisy chain serial peripheral interface circuit and a fifth daisy chain serial peripheral interface circuit; and among the multiple analog front-end chips connected in series, the head-end analog front-end chip is connected to one of the first daisy chain serial peripheral interface circuits of the integrated dedicated chip through the fourth daisy chain serial peripheral interface circuit, and the end analog front-end chip is connected to another of the first daisy chain serial peripheral interface circuits of the integrated dedicated chip through the fifth daisy chain serial peripheral interface circuit.
  • the nth analog front-end chip is connected to the fourth daisy chain serial peripheral interface circuit of the (n+1)th analog front-end chip through the fifth daisy chain serial peripheral interface circuit, wherein 1 ⁇ n ⁇ n+1 ⁇ N, N is the total number of the multiple analog front-end chips connected in series.
  • the analog front-end chip includes at least one interface circuit among a third standard serial peripheral interface circuit and a third I2C bus interface circuit, and at least one interface circuit among the third standard serial peripheral interface circuit and the third I2C bus interface circuit is a backup interface circuit.
  • the second aspect embodiment of the present application proposes a battery, including: a battery pack, the battery pack including a plurality of battery groups, each battery group including at least one single cell; wherein the battery pack is connected to the battery management system, and each of the battery groups is connected to the battery management system.
  • the battery management system operates efficiently, has high data stability and reliability, thereby improving the safety of battery use.
  • the vehicle of the third aspect embodiment of the present application includes: a battery pack, the battery pack includes a plurality of battery groups, each battery group includes at least one single battery; and the battery management system, the battery management system is connected to the battery pack.
  • the battery management system has high operating efficiency, high safety and reliability, and multiple application scenarios, thereby improving the efficiency and safety of vehicle battery management.
  • the battery management method of the fourth aspect embodiment of the present application is used for the battery management system, and the battery management method includes: a high-voltage management chip detects the status parameter information of the battery pack, and an analog front end detects the status parameter information of the single cell in the battery pack, the battery pack includes a plurality of the battery packs, and the battery pack includes at least one single cell; an integrated dedicated chip forwards the status parameter information of the battery pack and the status parameter information of the single cell in the battery pack to a processor chip; and the processor chip manages the battery management system according to the status parameter information of the single cell and the status parameter information of the battery pack.
  • the battery management method of the embodiment of the present application by integrating a dedicated chip to realize data interaction between the analog front end and the high-voltage management chip and the processor chip, data can be transmitted effectively and quickly, the operating efficiency of the system can be improved, the data transmission path is more unified, the system safety and reliability are improved, and it can be applied to more application scenarios.
  • the processor chip manages the battery management system according to the status parameter information of the single cell and the status parameter information of the battery pack, including: the processor chip estimates the charge state value and/or health state value of the battery pack according to the voltage information and current information of the battery pack.
  • the processor chip manages the battery management system according to the status parameter information of the single cell and the status parameter information of the battery pack, and further includes: the processor chip determines whether to charge or discharge the battery pack and whether to stop charging or discharging the battery pack according to the charge state of the battery pack.
  • the processor chip manages the battery management system according to the status parameter information of the single cell and the status parameter information of the battery pack, including: the processor chip determines the power imbalance of the single cells in the battery pack according to the status parameter information of the single cells in the battery pack, generates power balancing information, and forwards the power balancing information to the front-end analog chip through the integrated dedicated chip.
  • the battery management method also includes: the processor chip generates power supply configuration information according to the power supply requirements of the power-consuming chip inside the battery management system and sends it to the integrated dedicated chip to manage the battery management system to provide working power to the internal power-consuming chip.
  • the battery management method also includes: the processor chip generates a power switch channel selection control signal according to the power demand of the external power unit, and sends the power switch channel selection control signal to the integrated dedicated chip to manage the power supply of the battery management system to the external power unit; the integrated dedicated chip controls the connection and disconnection of the external power unit connected to the power supply circuit and the power supply side, or controls the connection and disconnection of the external power unit and the power supply ground side according to the power switch channel selection control signal.
  • the battery management method also includes: the processor chip sends the configuration information of the integrated dedicated chip to the integrated dedicated chip, and obtains the interface circuit transmission information of the integrated dedicated chip; and the processor chip obtains at least one of the safety monitoring information, safety alarm information and operating status information of the integrated dedicated chip.
  • the battery management method also includes: the processor chip sends the configuration information of the high-voltage management chip to the high-voltage management system through the integrated dedicated chip, and obtains the detection information of the high-voltage management system through the integrated dedicated information; and the processor chip obtains at least one of the calculation result information, safety diagnosis information and safety alarm information of the high-voltage management chip through the integrated dedicated information.
  • the battery management method also includes: the processor chip sends the configuration information of the analog front-end chip to the analog front-end chip through the integrated dedicated chip, and obtains the detection information of the analog front-end chip through the integrated dedicated chip; and the processor chip obtains at least one of the safety diagnosis information, safety alarm information and calculation result information of the analog front-end chip through the integrated dedicated chip.
  • the battery management method further includes: the integrated dedicated chip controls the power supply circuit of the integrated dedicated chip according to the power supply configuration information to provide working power to at least one chip among the power-consuming chips inside the battery management system.
  • the status parameter information of the battery pack includes voltage information and current information of the battery pack
  • the battery management method also includes: the high-voltage management chip estimates the charge state value and/or health state value of the battery pack based on the voltage information and current information of the battery pack.
  • the processor chip manages the battery management system based on the status parameter information of the single cell and the status parameter information of the battery pack, and also includes: the processor chip obtains the charge state value of the battery pack estimated by the high-voltage management chip through the integrated dedicated chip, and verifies the status of the battery pack based on the charge state value of the battery pack estimated by itself and the charge state value of the battery pack estimated by the high-voltage management chip.
  • the status parameter information of the battery pack includes the resistance between the power line of the battery pack and the vehicle body insulation ground
  • the battery management method further includes: the high-voltage management chip determines the leakage state of the battery pack according to the resistance.
  • the battery management method further includes: the high-voltage management chip identifies whether the status parameter information of the battery pack is abnormal, and performs safety protection when the status parameter information of the battery pack is abnormal.
  • the high-voltage management chip identifies whether the status parameter information of the battery pack is abnormal, and performs safety protection when the status parameter information of the battery pack is abnormal, including at least one of the following: the high-voltage management chip identifies whether the battery pack has overcurrent based on the current information of the battery pack, and performs overcurrent protection when the battery pack has overcurrent; the high-voltage management chip identifies whether the battery pack has overvoltage or undervoltage based on the voltage information of the battery pack, and performs overvoltage or undervoltage protection when the battery pack has overvoltage or undervoltage.
  • the battery management method also includes: the high-voltage management chip obtains the temperature information of the high-voltage management chip itself; the high-voltage management chip identifies whether the high-voltage management chip is over-temperature based on the temperature information of the high-voltage management chip itself, and performs over-temperature protection when the high-voltage management chip is over-temperature.
  • the battery management method further includes: the analog front-end chip identifies whether the status parameter information of the single battery is abnormal, and performs safety protection when the status parameter of the single battery is abnormal.
  • the analog front-end chip identifies whether the status parameter information of the single cell is abnormal, and performs safety protection when the status parameter of the single cell is abnormal, including at least one of the following: the analog front-end chip identifies whether the voltage of the single cell in the battery pack is overvoltage/undervoltage, and performs overvoltage or undervoltage protection when the voltage of the single cell is overvoltage or undervoltage; the analog front-end chip identifies whether the current of the single cell is overcurrent, and performs overcurrent protection when the current of the single cell is overcurrent; the analog front-end chip identifies whether the pressure inside the single cell in the battery pack is abnormal, and performs safety protection when the pressure is abnormal; and the analog front-end chip identifies whether the temperature of the single cell in the battery pack is overtemperature, and performs overtemperature safety protection when the temperature of the single cell is overtemperature.
  • the battery management method also includes at least one of the following: the analog front-end chip identifies whether the voltage of the battery pack is abnormal and identifies whether the voltage of the internal device of the analog front-end chip is abnormal, and performs voltage safety protection when an abnormality exists; and the analog front-end chip diagnoses whether the current of the battery pack is abnormal and identifies whether the current of the internal device of the analog front-end chip is abnormal, and performs current protection when a current abnormality exists.
  • FIG1 is a schematic diagram of the structure of a battery management system according to an embodiment of the present application.
  • FIG2 is a schematic block diagram of an integrated application-specific chip according to an embodiment of the present application.
  • FIG3 is a flow chart of high and low side driver configuration according to one embodiment of the present application.
  • FIG. 4 is a schematic diagram of implementing communication connection between a processor chip and an analog front-end chip through an interface circuit integrating a dedicated chip according to an embodiment of the present application;
  • FIG5 is a schematic block diagram of a high voltage management chip according to an embodiment of the present application.
  • FIG6 is a schematic block diagram of an analog front-end chip according to an embodiment of the present application.
  • FIG7 is a flow chart of data interaction according to an embodiment of the present application.
  • FIG8 is a schematic block diagram of a vehicle according to an embodiment of the present application.
  • FIG9 is a flow chart of a battery management method according to an embodiment of the present application.
  • FIG. 10 is a schematic block diagram of a battery according to an embodiment of the present application.
  • the following describes a battery management system according to an embodiment of the first aspect of the present application with reference to FIGS. 1 to 7 .
  • FIG1 is a block diagram of a battery management system according to an embodiment of the present application.
  • the battery management system 100 of the embodiment of the present application includes an analog front-end chip 10 , a high-voltage management chip 20 , an integrated dedicated chip 30 and a processor chip 40 .
  • the analog front-end chip 10 is connected to the battery pack and is used to detect the state parameter information of the single cell in the battery pack, for example, the battery pack includes at least one single cell.
  • the analog front-end chip 10 monitors the state parameter information of the battery pack composed of a single cell or multiple single cells, for example, including but not limited to battery current, voltage, internal and external stress or external temperature, etc.
  • the single cell can be a lithium battery, a storage battery, or a secondary lithium battery or a secondary storage battery.
  • the high-voltage management chip 20 is connected to the power line of the battery pack and is used to detect status parameter information of the battery pack, such as current, voltage, etc.
  • the battery pack includes multiple battery groups.
  • the battery pack includes multiple battery groups, each of which is connected to an analog front-end chip 10, which is used to detect the state parameter information of each single battery in the corresponding battery group.
  • the high-voltage management chip 20 is used to detect the state parameter information of the battery pack as a whole, that is, the battery pack.
  • the integrated dedicated chip 30 serves as a bridge chip, the processor chip 40 is connected to the analog front-end chip 10 through the integrated dedicated chip 30, and the processor chip 40 is connected to the high-voltage management chip 20 through the integrated dedicated chip 30.
  • the integrated dedicated chip 30 is used to forward the detection data or generated data of the analog front-end chip 10 to the processor chip 40, and the integrated dedicated chip 30 is used to forward the detection data and generated data of the high-voltage management chip 20 to the processor chip 40, and the processor chip 40 can also send monitoring parameters to the analog front-end chip 10 and the high-voltage management chip 20 through the integrated dedicated chip 30.
  • the processor chip 40 may be a processing unit with control, management and computing capabilities, and is responsible for monitoring the operating status, data scheduling, data computing, etc. of the entire battery management system 100 and its connected modules.
  • the processor chip 40 realizes data interaction with the analog front-end chip 10 and the high-voltage management chip 20 by bridging with the integrated dedicated chip 30, and is used to perform data processing and task scheduling based on feedback information.
  • the battery management system is managed based on the status parameter information of the single cell and the battery pack, which can include battery pack charging and discharging, single cell balancing, power estimation, functional safety monitoring, etc.
  • the integrated dedicated chip 30 can serve as an expansion interface of the processor chip 40, which is equivalent to a bridge chip between the processor chip 40 and the front-end analog chip 10 and the high-voltage management chip 20. At the same time, it can also realize data transmission between the high-voltage management chip 20 and the processor chip 40 and data transmission between the analog front-end chip 10 and the processor chip 40. Through this mode, data can be transmitted efficiently, the operating efficiency of the processor chip 40 is improved, the data transmission path is more unified, the system security and reliability are improved, and it can be applied to more application scenarios.
  • the processor chip 40 can monitor the operating status of other systems and devices such as the analog front-end chip 10 and the high-voltage management chip 20 connected to the interface of the integrated dedicated chip 30, configure operating parameters, and transmit data.
  • the processor chip 40 can configure the status of the front-end analog chip 10 and the high-voltage management chip 20 through the integrated dedicated chip 30, and can also obtain corresponding data such as collected data or directly obtain processed data, thereby reducing the workload of the processor chip 40.
  • the processor chip 40 can send configuration information and pass information to the integrated special chip 30, and can also obtain the collected data, stored data, and calculation result data fed back by the integrated special chip 30, and receive at least one of the information transmitted by the interface circuit of the integrated special chip 30, security monitoring information, security alarm information, and operation status information. Further, the processor chip 40 can perform task scheduling or monitor the operation of the integrated special chip 30 based on such information.
  • the processor chip 40 can send the configuration information of the analog front-end chip 10 to the analog front-end chip 10 through the integrated dedicated chip 30, such as the system running time parameters, acquisition parameters and data communication parameters of the analog front-end chip 10, so that the analog front-end chip 10 samples the parameters of the connected battery pack and monitors its own safety, and provides feedback to the processor chip 40 according to the configuration.
  • the collected battery parameters include but are not limited to signals such as single cell voltage, current, temperature and stress.
  • the processor chip 40 can obtain at least one of the detection information, safety diagnosis information, safety alarm information and calculation result information of the analog front-end chip 10 through the integrated dedicated chip 30, and after receiving the collected data transmitted by the analog front-end chip 10, it can estimate the state of each single cell, including but not limited to calculating the SOC value.
  • the processor chip 40 sends the configuration information of the high-voltage management chip 20 to the high-voltage management chip 20 through the integrated dedicated chip 30, such as the system runtime parameters, acquisition parameters, data communication and calculation operations of the high-voltage management chip 20, so that the high-voltage management chip 20 performs differential sampling of the total voltage and total current of all batteries connected to itself, and estimates the execution status of all single cells in the high-voltage management chip 20, including but not limited to calculating SoC, and performs safety monitoring inside the chip, and transmits relevant data to the processor chip 40 according to the configuration.
  • the processor chip 40 can obtain at least one of the detection information, calculation result information, safety diagnosis information and safety alarm information of the high-voltage management chip 20 through the integrated dedicated chip 30.
  • FIG. 2 is a functional block diagram of an integrated dedicated chip 30 according to an embodiment of the present application. As shown in FIG. 2 , the integrated dedicated chip 30 includes a power supply circuit 31 .
  • the power supply circuit 31 is used to connect to an external power supply and provide working power to at least one chip in the battery management system 100.
  • the analog front-end chip 10 is connected to a battery pack, and the driving power can be directly provided by the battery pack.
  • the integrated dedicated chip 30 is provided with a power supply circuit 31, and the external power supply can be distributed to the chips in the system through the power supply circuit 31 to realize the power supply of the internal power-consuming chips. Therefore, there is no need to set an independent driving power supply for each module in the battery management system 100, which improves the consistency of the power supply, reduces the design complexity of the entire system, and reduces the cost.
  • the integrated dedicated chip 30 also includes a power input port 32 and a power output port 33 .
  • the power supply circuit 31 is connected to an external power source via the power input port 32 , and the power supply circuit 31 is connected to the processor chip 40 via the power output port 33 to provide working power to the processor chip 40 .
  • the integrated dedicated chip 30 can obtain working power from the vehicle battery through the power input port 32, and convert it into a stable power supply, such as through a voltage stabilization circuit, and provide working power for the processor chip 40, so that the processor chip 40 does not need to be set up with an independent driving power supply.
  • the power supply circuit 31 can convert the input power supply voltage into the operating voltage of the chip internal module and the driving voltage of the external unit connected to the power output port 33 through a low dropout regulator module (LDO). That is, through the power input port 32, the power supply circuit 31 (low dropout regulator) and the power output port 33, the cascade input power is converted into a stable voltage, which can provide a power supply voltage for the power-consuming chip inside the system.
  • LDO low dropout regulator module
  • the power supply circuit 31 can also be connected to the high voltage management chip 20 through the power output port 33 to provide the high voltage management chip 20 with working power.
  • the management chip 20 does not need to be provided with an independent driving power supply.
  • the power supply circuit 31 includes a voltage conversion sub-circuit 311.
  • One end of the voltage conversion sub-circuit 311 is connected to the external circuit through the power input port 33, and the other end of the voltage conversion sub-circuit 311 is connected to the processor chip 40 and the high-voltage management chip 20.
  • the voltage conversion sub-circuit 311 can provide different operating voltages for the processor chip 40 and the high-voltage management chip 20 to meet the operating voltage requirements of different power-consuming chips.
  • the processor chip 40 can generate power supply configuration information according to the power supply requirements of the internal power-consuming chips of the battery management system 100 and send the power supply configuration information to the integrated dedicated chip 30 to manage the battery management system 100 to provide working power to the internal power-consuming chips.
  • the integrated dedicated chip 30 also includes a first digital logic circuit 34, which is electrically connected to the processor chip 40 and the power supply circuit 31 respectively, and is used to control the power supply circuit 31 according to the power supply configuration information to provide working power for the internal power chip of the battery management system 100.
  • the processor chip 40 After the processor chip 40 obtains power from the integrated dedicated chip 30 and starts up, it checks the connection status between the integrated dedicated chip 30 and itself, and the status of the devices mounted on the integrated dedicated chip 30. If the processor chip 40 detects that the integrated dedicated chip 30 is connected to the analog front-end chip 10 and the high-voltage management chip 20, the above two chips are configured and monitored.
  • the external power supply is distributed to the internal power-consuming chips of the system, and the internal power-consuming chips do not need to be equipped with independent power supplies, thereby reducing the complexity of the circuit and improving the consistency of the power supply.
  • the high-voltage management chip 20 has data processing capabilities, and the processor chip 40 can directly obtain the calculation results, which reduces the calculation burden of the processor chip 40 and improves the data processing efficiency.
  • the integrated dedicated chip 30 can also monitor the power supply for the power-consuming unit outside the battery management system 100.
  • the integrated dedicated chip 30 includes a power switch circuit 35, the first end of the power switch circuit 35 is connected to the power supply circuit 31, and the second end of the power switch circuit 35 is suitable for connecting to an external power-consuming unit.
  • the external power-consuming device can be an expansion device connected to the integrated dedicated chip 30 or an external high-voltage device connected through a contactor, etc.
  • the power switch circuit 35 is used to control the on and off of the power supply state of the external power-consuming unit. That is, the integrated dedicated chip 30 of the embodiment of the present application can have functions such as voltage stabilization, voltage conversion, and switching, and can realize power supply for the internal power-consuming chip of the system and control the on and off of the power supply of the external power-consuming unit.
  • the power switch circuit 35 includes a high-side driver subcircuit 351, a first end of the high-side driver subcircuit 351 is connected to the output end of the power supply circuit 31, a second end of the high-side driver subcircuit 351 is suitable for being connected to the power supply side of the power supply circuit of the external power unit, a third end of the high-side driver subcircuit 351 is suitable for being connected to the positive terminal of the external power unit, and the high-side driver subcircuit 351 is used to control the on-off between the external power unit and its power supply side.
  • the input of the power supply side of the external power unit can be controlled by the high-side driver subcircuit 351 to realize the power supply control of the external power unit.
  • the power switch circuit 35 further includes a low-side drive subcircuit 352, wherein a first end of the low-side drive subcircuit 352 is connected to the output end of the power supply circuit 31, a second end of the low-side drive subcircuit 352 is suitable for being connected to the power supply ground side of the power supply circuit of the external power unit, and a third end of the low-side drive subcircuit 352 is suitable for being connected to the negative terminal of the external power unit, and the low-side drive subcircuit 352 is used to control the connection between the external power unit and its power supply ground side. That is, the connection of the power supply ground side of the external power unit can be controlled by the low-side drive subcircuit 352, thereby realizing the power supply control of the external power unit.
  • the high-side driving sub-circuit 351 and the low-side driving sub-circuit 352 can both be transistors or MOS tubes or other switching tubes.
  • the high-side driving sub-circuit 351 and/or the low-side driving sub-circuit 352 can be connected to an external power unit through a contactor to control the on and off of the power supply or ground of the external power unit according to the power supply requirements of the external power unit.
  • the power switch circuit 35 further includes an enabling switch subcircuit 353, one end of which is connected to the high-side driving subcircuit 351 and the low-side driving subcircuit 352, and the other end of which is connected to the power supply circuit 31, for controlling the on and off of the high-side driving subcircuit 351 and the low-side driving subcircuit 352. That is, the high-side and low-side gating is realized by the enabling switch subcircuit 353, so as to realize the control of the power supply to the external power-consuming unit.
  • the processor chip 40 is also used to generate a power switch channel selection control signal for the high-side driver sub-circuit 351 and the low-side driver sub-circuit 352 according to the power demand of the external power unit, and send the power switch channel selection control signal to the integrated dedicated chip 30 to manage the power supply on and off of the external power unit by the battery management system 100.
  • the first digital logic circuit 34 is electrically connected to the enable switch sub-circuit 353, and is used to control the enable switch sub-circuit 353 according to the power switch channel selection control signal, so that the enable switch sub-circuit 353 can select the low-side driver sub-circuit 352 or the high-side driver sub-circuit 351 according to the power switch channel selection control signal, so as to realize the power supply control of the external power supply unit.
  • the integrated dedicated chip 30 of the embodiment of the present application can not only realize the power supply control of the power-consuming units inside the battery management system 100, but also control the power supply of the external power-consuming units.
  • the integrated dedicated chip 30 provides a power supply voltage for the processor chip 40.
  • the processor chip 40 can select an interface type, enable the interface and select a transmission channel according to the demand and the idle status of the interface of the current integrated dedicated chip 30.
  • the processor chip 40 can configure the operating parameters of the integrated dedicated chip 30 through the interface connected to the integrated dedicated chip 30, such as the enablement and selection of the high and low side drive sub-circuit, the enablement and channel selection of the drive power supply, the interface parameters (transmission rate, transmission cycle, etc.), the time-related parameters (WDT, internal clock check, etc.), the working mode (different working modes are configured according to the system state) and the safety monitoring parameters (detection time, detection parameter type, etc.).
  • the first digital logic circuit 34 can control the power switch circuit 35 and the power supply circuit 31 according to the configuration information and the task scheduling information of the processor chip 40 to meet the power supply requirements of different modules.
  • FIG3 is a flow chart of the configuration of a high-side driver sub-circuit 351 and a low-side driver sub-circuit 352 according to an embodiment of the present application, as shown in FIG3 , including:
  • the integrated dedicated chip connects to the vehicle battery to obtain starting power, starts and generates stable power to the outside.
  • the processor chip obtains power from the integrated dedicated chip and starts.
  • the processor chip scans the systems and devices connected to the contactor connected to the integrated dedicated chip through the integrated dedicated chip.
  • the processor chip configures the working state of the high and low side drivers of the relevant contactor channels according to the characteristics of the systems and devices connected to the contactors.
  • the integrated application specific chip 30 further includes an input source detection subcircuit 36 .
  • the first digital logic circuit 34 can adjust the power signal input to the high-side drive subcircuit 351 and the low-side drive subcircuit 352 according to the power detection information of the external power supply, such as performing voltage increase or decrease or over-voltage or under-voltage protection, and can also perform fault diagnosis on the input source based on the power detection information of the input external power supply (such as detection voltage), such as whether it is over/under-voltage or there is a difference before and after.
  • the integrated dedicated chip 30 of the embodiment of the present application can form a controllable contactor circuit based on the power input port 32, the input external power supply, the low-side drive subcircuit 352, the high-side drive subcircuit 351 and the input source detection subcircuit 36.
  • the circuit embeds the input power into the low-side drive subcircuit 352 and high-side drive subcircuit 352, and extended to multiple contactor output ports, can realize programmable control of the connection state of its contactor, and can effectively protect the connected device and change the operating state of the device by quickly configuring its drive state.
  • the integrated dedicated chip 30 adds safety protection measures for the power supply output to ensure the normal operation of the circuit.
  • the integrated dedicated chip 30 of the embodiment of the present application is also provided with an input source isolation circuit 37, and the input source isolation circuit 37 is connected to the external power supply and the power supply circuit 31, and the power supply circuit 31 is connected to the external power supply through the input source isolation circuit 37. Since the power used inside the chip is low voltage compared to the external power supply, the communication signal or the high and low power supplies can be isolated through the input source isolation circuit 37 to avoid crosstalk of the communication signal and interference between the high and low voltage power supplies, thereby improving the stability of the power supply provided by the integrated dedicated chip 30.
  • the integrated dedicated chip 30 includes a first daisy chain serial peripheral interface circuit 301, and the integrated dedicated chip 30 is electrically connected to the analog front-end chip 10 through the first daisy chain serial peripheral interface circuit 301.
  • the communication between the integrated dedicated chip 30 and the analog front-end chip 10 is realized through the first daisy chain serial peripheral interface circuit 301, and the daisy chain serial peripheral interface circuit 301 can play a role in communication isolation, reduce signal crosstalk, and improve communication stability.
  • the integrated dedicated chip 30 also includes a first standard serial peripheral interface circuit 302 , one end of which is electrically connected to the first daisy chain serial peripheral interface circuit 301 , and the other end of which is electrically connected to the processor chip 40 .
  • the data isolation communication between the processor chip 40 and the analog front-end chip 10 is realized by the first daisy chain serial peripheral interface circuit 301 and the first standard serial peripheral interface circuit 302 of the integrated dedicated chip 30 .
  • Figure 4 is a schematic diagram of realizing the communication connection between the processor chip 40 and the analog front-end chip 10 through the first daisy chain serial peripheral interface circuit 301 and the first standard serial peripheral interface circuit 302. As shown in Figure 4, the conversion and transmission between the standard serial signal of the processor chip 40 and the differential signal of the analog front-end chip 10 are realized by integrating the dedicated chip 30.
  • the first standard serial peripheral interface circuit 302 is used to send standard serial data such as "0" or "1" to the processor chip 40 or receive data from the processor chip 40, and transmit the data received from the processor chip 40 to the first daisy chain serial peripheral interface circuit 301 as standard serial data.
  • the first daisy chain serial peripheral interface circuit 301 is used to convert the standard serial data into corresponding differential data and send the corresponding differential data to the analog front-end chip 10.
  • the first daisy chain serial peripheral interface circuit 301 is also used to receive data from the analog front-end chip 10, and send the data received from the analog front-end chip 10 to the first standard serial peripheral interface circuit 302 as corresponding differential data.
  • the first standard serial peripheral interface circuit 302 converts the differential data into corresponding standard serial data and sends the corresponding standard serial data to the processor chip 40.
  • the isolated communication between the analog front-end chip 10 and the processor chip 40 is realized by integrating the dedicated chip 30.
  • the integrated dedicated chip 30 includes a second daisy chain serial peripheral interface circuit 303, and the integrated dedicated chip 30 is connected to the high-voltage management chip 20 through the second daisy chain serial peripheral interface circuit 303, that is, the communication between the integrated dedicated chip 30 and the high-voltage management chip 10 is realized through the second daisy chain serial peripheral interface circuit 303.
  • the daisy chain serial peripheral interface circuit can play a role in communication isolation, reduce signal crosstalk, and improve communication stability.
  • the integrated dedicated chip 30 further includes a second standard serial peripheral interface circuit 304 , one end of which is electrically connected to the second daisy chain serial peripheral interface circuit 303 , and the other end of which is electrically connected to the processor chip 40 .
  • the data isolation communication between the processor chip 40 and the high voltage management chip 20 is realized by the second daisy chain serial peripheral interface circuit 303 and the second standard serial peripheral interface circuit 304 of the integrated dedicated chip 30 .
  • the second standard serial peripheral interface circuit 304 is used to receive data from the processor chip 40, and transmit the data received from the processor chip 40 to the second daisy chain serial peripheral interface circuit 303 in the form of standard serial data, such as "1" and "0".
  • the second daisy chain serial peripheral interface circuit 303 is used to convert the standard serial data into corresponding differential data, and send the corresponding differential data to the high-voltage management chip 20;
  • the second daisy chain serial peripheral interface circuit 303 is also used to receive data from the high-voltage management chip 20, and send the data received from the high-voltage management chip 20 to the second standard serial peripheral interface circuit 304 in the form of corresponding differential data.
  • the second standard serial peripheral interface circuit 304 converts the differential data into corresponding standard serial data, and sends the corresponding standard serial data to the processor chip 40.
  • the isolated communication between the high-voltage management chip 20 and the processor chip 40 is realized by integrating the dedicated chip 30.
  • the integrated dedicated chip 30 also includes a first analog input interface circuit 305, one end of the first analog input interface circuit 305 is electrically connected to the external sensor, and the other end of the first analog input interface circuit 305 is electrically connected to the first digital logic circuit 34, for collecting sensor information of the external sensor.
  • the external sensor may include a voltage sensor, a current sensor, etc., and analog detection signals such as circuit signals and voltage signals may be received through the first analog input interface circuit 305.
  • the integrated dedicated chip 30 also includes a first universal input/output interface circuit 306, one end of the first universal input/output interface circuit 306 is connected to a peripheral circuit such as an LED loop, and the other end of the first universal input/output interface circuit 306 is connected to a first digital logic circuit 34, for outputting control information of the first digital logic circuit 34 to the peripheral circuit or collecting status information of the peripheral circuit.
  • a peripheral circuit such as an LED loop
  • a first digital logic circuit 34 for outputting control information of the first digital logic circuit 34 to the peripheral circuit or collecting status information of the peripheral circuit.
  • the integrated dedicated chip 30 also includes at least one interface circuit selected from the group consisting of a first I2C bus interface circuit, a first universal asynchronous receiver/transmitter interface circuit, and a first controller area network bus interface circuit.
  • the at least one interface circuit is used for the electrical connection between the daisy chain serial peripheral interface circuit of the integrated dedicated chip 30 and the processor chip 40, or the at least one interface circuit is used for the communication between the integrated dedicated chip 30 and an external control system, which is beneficial to system expansion.
  • the integrated dedicated chip 30 of the embodiment of the present application not only integrates the functions of wide voltage input, multi-port, and multi-power supply output, but also can provide the required stable power supply for the peripheral system; at the same time, it also integrates a variety of interface circuits, which can not only interact with the control system of other systems, but also convert different interface data formats, provide the required interface data for the less intelligent system, and provide support for the functional expansion of the integrated dedicated chip 30; and, the integrated dedicated chip 30 can be organized into a certain power supply network for the power supply system, such as the internal power consumption and external power consumption of the battery management system 100, so as to realize multi-party monitoring and improve the consistency and reliability of the entire battery management system 100.
  • the power output port 32 connected to the power supply circuit 31 can provide a linear and stable power supply for the system that is not directly connected to the battery; at the same time, the controllable contactor output can be realized through the high-side drive and the low-side drive to control the power supply of the external power unit.
  • FIG. 5 is a schematic diagram of the internal structure of a high-voltage management chip 20 according to an embodiment of the present application. As shown in FIG. 5 , the high-voltage management chip 20 includes a signal input port 21 and a first detection circuit 22 .
  • the signal input port 21 is used to input the state parameter information of the battery pack.
  • the first detection circuit 22 is connected to the power line of the battery pack through the signal input port 21, and is used to detect the state parameter information of the battery pack, such as voltage signal, current signal, etc., so as to realize the detection of the state parameter information of the battery pack, and then the high-voltage management chip 20 can estimate the battery state based on the detection information, and can also send it to the processor chip 40 through the integrated dedicated chip 30.
  • the processor chip 40 Management and task scheduling are performed based on this type of information.
  • the high-voltage management chip 20 includes a peripheral differential detection circuit 23, one end of the peripheral differential detection circuit 23 is connected to the power line of the battery pack, and the other end of the peripheral differential detection circuit 23 is connected to the signal input port 21 of the high-voltage management chip 20.
  • the first detection circuit 22 detects the status parameter information of the battery pack through the peripheral differential detection circuit 23.
  • the peripheral differential detection circuit 23 can detect the status parameter information of the battery pack, such as voltage differential signals, current differential signals, etc., and send the detected status parameter information of the battery pack to the first detection circuit 22 in the high-voltage management chip 20 through the signal input port 21, so as to enable the first detection circuit 22 to detect the status parameter information of the battery pack.
  • the status parameter information of the battery pack such as voltage differential signals, current differential signals, etc.
  • the first detection circuit 22 includes a first voltage detection circuit 221 .
  • the first voltage detection circuit 221 is connected to the signal input port 21 and is used to detect voltage information of the battery pack.
  • the first voltage detection circuit 22 can be an AD circuit
  • the peripheral differential detection circuit 23 detects the voltage information of the battery pack, and sends the voltage information to the first voltage detection circuit 221 in the high-voltage management chip 20 through the signal input port 21.
  • the first voltage detection circuit 221 obtains the voltage signal and converts the voltage information.
  • the first detection circuit 22 includes a first current detection circuit 222 .
  • the first current detection circuit 222 is connected to the signal input port 21 and is used to detect current information of the battery pack.
  • the first current detection circuit 222 can be an AD circuit.
  • the peripheral differential detection circuit 23 detects the current signal of the battery pack and sends the current information to the first current detection circuit 222 in the high-voltage management chip 20 through the signal input port 21.
  • the first current detection circuit 222 obtains the current information and converts the current information.
  • the processor chip 40 manages the battery management system according to the status parameter information of the single cell and/or the battery pack, including: the processor chip 40 estimates the charge state value and/or health state value of the battery pack according to the voltage information and current information of the battery pack.
  • the first voltage detection circuit 221 and the first current detection circuit 222 of the high-voltage management chip 20 obtain the voltage information and current information of the battery pack respectively, and send them to the processor chip 40 through the integrated dedicated chip 30.
  • the processor chip 40 estimates the state of charge value and/or health state value based on the SOC algorithm according to the voltage information and current information of the battery pack. Furthermore, the processor chip 40 can schedule the power supply information and adjust the working status of each power unit based on the state of charge of the battery pack.
  • the high-voltage management chip 20 may have data processing capabilities, for example, it may make corresponding estimates based on the status parameter information of the battery pack, and may share the data processing tasks of the processor chip 40, reduce the data processing burden of the processor chip 40, and improve the data processing efficiency of the processor chip 40.
  • the high-voltage management chip 20 includes a data processing circuit 24, which is respectively connected to the first voltage detection circuit 221 and the first current detection circuit 222, and is used to estimate the charge state value and/or health state value of the battery pack based on the voltage information and current information of the battery pack.
  • the data processing circuit 24 may be a digital logic circuit, but the digital logic circuit has data processing capabilities, that is, the data processing capabilities are more powerful than those of simple digital logic circuits.
  • the charge state and/or health state of the battery pack may be estimated, thereby sharing the computing tasks of the processor chip 40 and improving data processing efficiency.
  • corresponding functional protection or fault processing may be performed based on the data processing results.
  • the processor chip 40 can estimate the state of charge value of the battery pack according to the state parameter information of the single cell and/or the battery pack. Specifically, based on different state of charge value estimation algorithms, such as a state of charge estimation method based on the state parameter of the single cell and a state of charge estimation method based on the state parameter of the battery pack, the processor chip 40 can estimate the state of charge value of the battery pack according to the state parameter information of the single cell, or the processor chip 40 can estimate the state of charge value of the battery pack according to the state parameter information of the battery pack, or the processor chip 40 can estimate the state of charge value of the battery pack by combining the state parameter information of the battery cell and the battery pack.
  • state of charge value estimation algorithms such as a state of charge estimation method based on the state parameter of the single cell and a state of charge estimation method based on the state parameter of the battery pack.
  • the processor chip 40 can obtain the state of charge value of the battery pack estimated by the high-voltage management chip 20 through the integrated dedicated chip 30, and perform battery status verification based on the state of charge value of the battery pack estimated by itself and the state of charge of the battery pack estimated by the high-voltage management chip 20. For example, if the two are consistent, the battery status is normal. Otherwise, if there is a deviation between the two and it exceeds the deviation tolerance range, it is considered that the battery pack is abnormal, thereby enabling mutual verification.
  • the first detection circuit 22 includes an insulation resistance detection circuit 223, which is connected to the signal input port 21 and is used to detect the resistance between the power line of the battery pack and the insulation ground of the vehicle body.
  • the data processing circuit 24 is also used to determine the leakage state of the battery pack according to the resistance value, and can give an alarm when leakage exists, so as to handle it in time.
  • the insulation resistance detection circuit 223 may be an AD circuit, and the insulation resistance may be detected by a peripheral insulation resistance detection bridge.
  • the insulation resistance detection circuit 223 obtains the resistance through the signal input port 21 and sends it to the data processing circuit 24.
  • the data processing circuit 24 may calculate the insulation resistance currently possessed by the battery pack and store it. Thus, safety may be improved.
  • the high-voltage management chip 20 also includes a first safety diagnostic circuit 25, which is connected to the first detection circuit 22 and is used to identify whether the status parameter information of the battery pack is abnormal, and to perform safety protection when the status parameter information of the battery pack is abnormal, such as cutting off the power supply circuit of the battery pack.
  • the first safety diagnostic circuit 25 includes a first current diagnostic circuit 251, which is connected to the first current detection circuit 222 and is used to identify whether the battery pack has overcurrent based on the current information of the battery pack and perform overcurrent protection when the battery pack has overcurrent.
  • the first current detection circuit 222 receives the current information of the battery pack through the signal input port 21, and sends the current information to the first current diagnostic circuit 251.
  • the first current diagnostic circuit 251 identifies whether the current value of the current information exceeds the overcurrent threshold. If it exceeds, it is determined that there is overcurrent in the battery pack, and the monitoring circuit can be used for circuit breaking protection, etc., and the overcurrent protection trigger signal can also be fed back to the processor chip 40 for further overcurrent protection processing.
  • the signal input port 21, the first current detection circuit 222, the first current diagnostic circuit 251 and the processor chip 40 constitute a current detection and protection circuit, which detects the differential current at both ends of the battery pack, converts the differential current value into a numerical value for storage and performs relevant calculations, and continuously performs overcurrent protection on the input current signal during the detection process, and performs relevant protection measures such as open circuit and short circuit on the current monitoring circuit.
  • the first safety diagnostic circuit 25 includes a first voltage diagnostic circuit 252, which is connected to the first voltage detection circuit 221 and is used to identify whether the battery pack has overvoltage or undervoltage based on the voltage information of the battery pack, and perform overvoltage or undervoltage protection when the battery pack has overvoltage or undervoltage.
  • the first voltage detection circuit 221 receives the voltage information of the battery pack through the signal input port 21, and sends the voltage information to the first voltage diagnostic circuit 252.
  • the first voltage diagnostic circuit 252 identifies whether the voltage value of the voltage information exceeds the overvoltage threshold or is lower than the undervoltage threshold. If it exceeds the overvoltage threshold, it is determined that the battery pack is overvoltage, or if the voltage value is lower than the undervoltage threshold, it is determined that the battery pack is undervoltage. In this case, the monitoring circuit can be disconnected for protection, etc., and the trigger signal of the overvoltage or undervoltage protection can be fed back to the processor chip 40 for further overvoltage or undervoltage protection processing.
  • the signal input port 21, the first voltage detection circuit 222, the first voltage diagnostic circuit 252 and the processing module chip 40 constitute a high-voltage detection and protection circuit, which detects the differential voltage at both ends of the battery pack, converts the differential voltage value into a numerical value and stores it, and continuously performs over-voltage and under-voltage protection on the input signal during the detection process, and can perform related protection measures such as open circuit and short circuit on the monitoring circuit.
  • the high voltage management chip 20 includes a second universal input/output interface circuit 26, which is connected to an external sensor or an external load, and is used to collect external sensor information or output a control signal to the external load.
  • the external sensor may include a temperature sensor, which is used to detect the temperature information of the high voltage management chip 20.
  • the high voltage management chip 20 may also be connected to an external load through the second universal input/output interface circuit 26 to control the external load.
  • the high voltage management chip 20 further includes a first temperature detection circuit 27 and a first temperature diagnosis circuit 28 .
  • the first temperature detection circuit 27 is connected to the external temperature sensor through the second universal input/output interface circuit 26 to detect the temperature information of the high-voltage management chip 20.
  • the first temperature diagnosis circuit 28 is connected to the first temperature detection circuit 27, and is used to identify whether the high-voltage management chip 20 is over-temperature according to the temperature information of the high-voltage management chip 20, and perform over-temperature protection when the high-voltage management chip 20 is over-temperature.
  • the first temperature detection circuit 27 can receive a temperature detection signal through the second universal input/output interface 26, that is, the second universal input/output interface 26, the first temperature detection circuit 27, the first temperature diagnosis circuit 28 and the processor chip 40 constitute a temperature detection and protection circuit, which performs temperature detection on the current detection circuit of the high-voltage management chip 20, and converts the temperature-sensitive voltage value into a numerical value and stores it, and performs certain compensation and protection measures on the current acquisition circuit through temperature-sensitive parameters, such as continuous thermal switch protection, and at the same time performs related protection measures such as open circuit and short circuit on the temperature-sensitive monitoring circuit.
  • a temperature detection and protection circuit which performs temperature detection on the current detection circuit of the high-voltage management chip 20, and converts the temperature-sensitive voltage value into a numerical value and stores it, and performs certain compensation and protection measures on the current acquisition circuit through temperature-sensitive parameters, such as continuous thermal switch protection, and at the same time performs related protection measures such as open circuit and short circuit on the temperature-sensitive monitoring circuit.
  • the processor chip 40 is also used to obtain at least one of the detection information, calculation result information, safety diagnosis information and safety alarm information of the high-voltage management chip 20 through the integrated dedicated chip 30.
  • the processor chip 40 can obtain the voltage information, current information, etc. of the battery pack detected by the high-voltage management chip 20, can obtain the SOC value of the battery pack estimated by the high-voltage management chip 20 for mutual verification, and can also obtain the safety diagnosis information of overvoltage, overcurrent, undervoltage, overtemperature, etc. of the high-voltage management chip 20, and can also feedback the safety alarm information to the processor chip 40 when the high-voltage management chip 20 diagnoses that the battery pack has a safety anomaly.
  • the processor chip 40 can determine the protection measures based on the diagnosis results, for example, it can include stopping the relevant detection steps, stopping the relevant calculation steps for further detection and diagnosis such as open circuit detection or short circuit detection, and alarming the upper-level control system.
  • the high-voltage management chip 20 of the embodiment of the present application can detect the differential voltage and current at both ends of the battery pack, detect the isolation resistance of the battery pack and the surrounding temperature-sensitive value, and also has calculation and functional safety protection and safety measures.
  • the high-voltage management chip 20 also includes a third daisy chain serial peripheral interface circuit 201. As shown in Figures 1 and 2, the high-voltage management chip 20 is connected to the second daisy chain serial peripheral interface circuit 303 of the integrated dedicated chip 30 through the third daisy chain serial peripheral interface circuit 201. Communication between the integrated dedicated chip 30 and the high-voltage management chip 20 is achieved through the third daisy chain serial peripheral interface circuit 201 and the second daisy chain serial peripheral interface circuit 303.
  • the daisy chain serial peripheral interface circuit can play a role in communication isolation, reduce signal crosstalk, and improve communication stability.
  • the high-voltage management chip 20 includes at least one of a second standard serial peripheral interface circuit and a second I2C bus interface circuit. At least one of the second standard serial peripheral interface circuit and the second I2C bus interface circuit can be used for the connection between the high-voltage management chip 20 and the processor chip 40. In the present application, the high-voltage management chip 20 is connected to the processor chip 40 through an integrated dedicated chip 30, and the second standard serial peripheral interface circuit and the second I2C bus interface circuit can still be retained as a backup interface circuit.
  • the high voltage management chip 20 includes a second controller area network bus interface circuit 202, which is used to connect to an external communication bus to obtain external bus information, and can realize data interaction between the high voltage management chip 20 and the external communication bus.
  • the processor chip 40 bridges the integrated dedicated chip 30 and is connected to the high-voltage management chip 20 through a daisy chain serial peripheral interface circuit.
  • the processor chip 40 participates in the management of the high-voltage management chip 20, and can not only configure relevant parameters (operation behavior, operation mode, interface parameters, time parameters), but also analyze the state of the high-voltage signal by reading the differential data and calculation data collected by the high-voltage management chip 20, and analyze the operating state of the high-voltage management chip 20 by reading the stored relevant data and functional safety detection data.
  • the processor chip 40 can further configure relevant parameters through the analysis interface to achieve more intelligent management of the supervised chip system.
  • analog front-end chip 10 The internal structure of the analog front-end chip 10 according to the embodiment of the present application is described below.
  • FIG. 6 is a schematic diagram of the internal structure of the analog front-end chip 10 according to an embodiment of the present application.
  • the analog front-end chip 10 includes a second detection circuit 11, and the second detection circuit 11 is connected to the battery pack, and is used to detect the status parameter information of the single cell in the battery pack, such as current value, voltage value, pressure, temperature, etc., for safety diagnosis and monitoring of the analog front-end chip 10, and can also be sent to the processor chip 40 through the integrated dedicated chip 30, so that the processor chip 40 can manage the battery management system 100.
  • the analog front-end chip 10 further includes an analog input interface circuit 12 , and the second detection circuit 11 is connected to an external detection circuit via the analog input interface circuit 12 to detect status parameter information of a single cell in the battery pack.
  • the second detection circuit 11 can be an AD circuit, which detects the status parameter information of the single cell in the battery pack, such as voltage, current, stress, etc., through an external detection circuit, and sends the analog value of the detected status parameter information to the second detection circuit 11 through the analog input interface circuit 12.
  • the second detection circuit 11 converts and stores the analog value of the status parameter information of the single cell.
  • the analog front-end chip 10 also includes a third universal input/output interface circuit 13, which is connected to an external sensor.
  • the second detection circuit 11 is connected to the external sensor through the third universal input/output interface circuit 13 to detect status parameter information of the single cells in the battery pack, such as temperature information.
  • the second detection circuit 11 includes a second voltage detection circuit 111, and the second voltage detection circuit 111 is used to collect voltage information of a single cell in the battery pack.
  • the second voltage detection circuit 111 may be an AD circuit, and the external voltage detection circuit detects the voltage value of the single cell and transmits the voltage value to the second voltage detection circuit 111 through the analog input interface circuit 12.
  • the second voltage detection circuit 111 converts the analog voltage value to realize voltage detection.
  • the second detection circuit 11 also includes a second current detection circuit 112, which is used to collect current information of the single battery in the battery pack.
  • the second current detection circuit 112 can be an AD circuit, and the external current detection circuit detects the current value of the single battery and transmits the current value to the second current detection circuit 112 through the analog input interface circuit 12.
  • the second current detection circuit 112 converts the analog current value to achieve current detection.
  • the second detection circuit 11 also includes a stress detection circuit 113, which is used to detect stress information in a single cell in the battery pack.
  • the stress detection circuit 113 may be an AD circuit, and an external stress detection circuit detects the stress value in the single cell and transmits the stress value to the stress detection circuit 113 through the analog input interface circuit 12.
  • the stress detection circuit 113 converts the analog stress value to achieve stress detection.
  • the second detection circuit 11 may also include a second temperature detection circuit 114, which is used to detect the temperature information of the single battery in the battery pack.
  • the second temperature detection circuit 114 may be an AD circuit, and the external sensor detects the temperature information and transmits it to the second temperature detection circuit 114 through the third general input/output interface circuit 13.
  • the analog front-end chip 10 further includes a second safety diagnostic circuit 14 , which is connected to the second detection circuit 11 and is used to identify whether the status parameter information of the single cell in the battery pack is abnormal, and to perform safety protection when the status parameter information of the single cell is abnormal.
  • a second safety diagnostic circuit 14 which is connected to the second detection circuit 11 and is used to identify whether the status parameter information of the single cell in the battery pack is abnormal, and to perform safety protection when the status parameter information of the single cell is abnormal.
  • the analog front-end chip 10 also includes a second digital logic circuit 15, which is connected to the second safety diagnosis circuit 14 and is used to generate abnormal information when the state parameter information of the single battery in the battery pack is abnormal, so as to issue an alarm prompt.
  • the second safety diagnostic circuit 14 includes a second voltage diagnostic circuit 141, which is connected to the second voltage detection circuit 111 and is used to identify whether the voltage of the single cell in the battery pack is overvoltage/undervoltage, and perform overvoltage or undervoltage protection when the voltage of the single cell is overvoltage or undervoltage.
  • the second voltage diagnosis circuit 141 is also used to identify whether the voltage of the battery pack is abnormal and whether the voltage of the internal device of the analog front-end chip 10 is abnormal, and perform voltage safety protection when an abnormality exists.
  • the analog input interface circuit 12, the second voltage detection circuit 111, the second voltage diagnosis circuit 141 and the second digital logic circuit 15 constitute a voltage detection and protection circuit, which detects the execution voltage at both ends of the connected single-cell battery group or single-cell battery, and converts the voltage values at both ends of the positive and negative poles of the single-cell battery into numerical values and stores them.
  • the input signal is continuously protected from over-voltage and under-voltage, and the monitoring circuit can be opened and short-circuited, and related monitoring and protection measures such as loop devices and device parameters are implemented.
  • the second safety diagnosis circuit 14 further includes a second current diagnosis circuit 142, which is connected to the second current detection circuit 112 and is used to identify whether there is overcurrent in the current of the single cell in the battery pack and perform overcurrent protection when there is overcurrent in the current of the single cell.
  • a second current diagnosis circuit 142 which is connected to the second current detection circuit 112 and is used to identify whether there is overcurrent in the current of the single cell in the battery pack and perform overcurrent protection when there is overcurrent in the current of the single cell.
  • the second current detection circuit 112 is also used to detect the current of the battery pack and the current of the internal components of the analog front-end chip 10; the second current diagnosis circuit 142 is also used to diagnose whether the current of the battery pack is abnormal and to identify whether the current of the internal components of the analog front-end chip 10 is abnormal, and to perform current abnormality safety protection when current abnormality exists.
  • the analog input interface circuit 12, the second current detection circuit 112, the second current diagnostic circuit 142 and the second digital logic unit 15 constitute a current detection and protection circuit, which detects the current at both ends of the battery pack, converts the current value into a numerical value and stores it.
  • overcurrent protection is continuously performed on the input current signal, and open circuit, short circuit and over-temperature protection measures are performed on the current monitoring circuit, and related monitoring and protection measures such as loop components and component parameters are implemented.
  • the second safety diagnosis circuit 14 further includes a stress diagnosis circuit 143, which is used to identify whether the stress in the single battery in the battery pack is abnormal, and to perform stress abnormality safety protection when the stress is abnormal.
  • the analog input interface circuit 12, the stress detection circuit 113, the stress diagnosis circuit 143 and the second digital logic unit 15 constitute a current detection and protection circuit, which detects the stress inside and outside the single cell, converts the stress value into a numerical value and stores it.
  • the input stress signal is continuously limited by a threshold, and the stress monitoring circuit is protected by open circuit, short circuit and over-temperature protection measures, and related monitoring and protection measures are implemented on the circuit devices and device parameters.
  • the second safety diagnosis circuit 14 further includes a second temperature diagnosis circuit 144 , which is connected to the second temperature detection circuit 114 and is used to identify whether the temperature of a single cell in the battery pack is over-temperature and to perform over-temperature safety protection when the temperature of the single cell is over-temperature.
  • the universal third normal input/output interface circuit 13, the second temperature detection circuit 114, the second temperature diagnosis circuit 144 and the second digital logic unit 15 constitute a temperature detection and protection circuit, which detects the temperature change outside the battery connected to the current analog front end, converts the above-mentioned temperature-sensitive voltage value into a numerical value and stores it.
  • the detected temperature-sensitive signal is continuously protected against over-temperature, low temperature and thermal switch, and the temperature-sensitive monitoring circuit is opened and short-circuited, and related monitoring and protection measures such as loop devices and device parameters are implemented.
  • analog front-end chip 10 of the embodiment of the present application is provided with multiple safety protection functions, such as but not limited to overvoltage/undervoltage protection, overtemperature protection, low temperature protection, stress protection, open circuit or short circuit protection, etc.
  • the processor chip 40 can also obtain at least one of the detection information, safety diagnosis information, safety alarm information and calculation result information of the analog front-end chip 10 through the integrated dedicated chip 30, so as to perform task scheduling and management based on the obtained information of the analog front-end chip 10.
  • the processor chip 40 can also control the conversion of the state of the analog front-end chip 10, and determine its acquisition and communication mode, etc.
  • the processor chip 40 can be used to manage the battery management system 100: determine the battery status according to the status parameter information of the single battery and the battery pack, determine whether to continue charging or discharging the battery pack according to the battery status, and determine whether to stop charging or discharging the battery pack. For example, determine whether to charge or discharge or whether to stop charging according to the state of charge value of the battery pack.
  • the high voltage management chip 20 further includes a balancing circuit 16 .
  • the processor chip 40 is used to manage the battery management system 100 according to the state parameter information of the single cell and the battery pack, including: the processor chip 40 is used to generate power balancing information when determining that the power of the single cells in the battery pack is unbalanced according to the state parameter information of the single cells in the battery pack, and forward the power balancing information to the front-end analog chip 10 through the integrated dedicated chip 30.
  • the balancing circuit 16 of the analog front-end chip 10 is used to perform power balancing processing on the single cells in the battery pack according to the power balancing information, thereby improving the power supply balance of the single cells, improving the utilization rate of the battery cells, and improving the service life of the battery pack.
  • the analog front-end chip 10 can activate the balancing function and release the power of batteries with higher capacities in the battery pack.
  • the battery pack may include multiple battery packs, each battery pack is connected to an analog front-end chip 10, as shown in FIG1 , there are multiple analog front-end chips 10, and the multiple analog front-end chips 10 are connected in series. Each analog front-end chip 10 is used to detect the state parameter information of a single cell in the corresponding connected battery pack.
  • multiple analog front-end chips 10 may be connected in a daisy chain form. As shown in FIG1 , there are two first daisy chain serial peripheral interface circuits 301 connecting the integrated dedicated chip 30 and the analog front-end chip 10 .
  • each analog front-end chip 10 includes at least two daisy-chain serial peripheral interface circuits, for example, each analog front-end chip 10 includes a fourth daisy-chain serial peripheral interface circuit 101 and a fifth daisy-chain serial peripheral interface circuit 102.
  • the head end analog front-end chip 10 is connected to a first daisy-chain serial peripheral interface circuit 301 of the integrated dedicated chip 30 through the fourth daisy-chain serial peripheral interface circuit 101, and the end analog front-end chip 10 is connected to another first daisy-chain serial peripheral interface circuit 301 of the integrated dedicated chip 30 through the fifth daisy-chain serial peripheral interface circuit 102.
  • the communication between each analog front-end chip 10 and the integrated dedicated chip 30 is realized.
  • the nth analog front-end chip 10 is connected to the fourth daisy chain serial peripheral interface circuit 101 of the (n+1)th analog front-end chip 10 through the fifth daisy chain serial peripheral interface circuit 102, wherein 1 ⁇ n ⁇ n+1 ⁇ N, and N is the total number of the multiple analog front-end chips 10 connected in series.
  • the analog front-end chip 10 includes at least one of a third standard serial peripheral interface circuit and a third I2C bus interface circuit, and at least one of the third standard serial peripheral interface circuit and the third I2C bus interface circuit is a standby interface circuit.
  • the analog front-end chip 10 is not connected to the processor chip 40 through the integrated dedicated chip 30, the communication connection between the analog front-end chip 10 and the processor chip 40 can be realized through the standby interface circuit, or the analog front-end chip 10 can be connected to other control systems or monitoring systems through the standby interface circuit, which is not specifically limited here.
  • the analog front-end chip 10 of the embodiment of the present application can be connected to a single single cell or a battery pack of multiple cascaded single cells.
  • the analog front-end chip 10 can collect battery parameters such as current, voltage, stress and temperature, and has relevant functional safety protection. At the same time, it can also perform calculations such as SoC and SoH based on the above parameters.
  • the processor chip 40 bridges the integrated dedicated chip 30 and can be connected to the analog front-end chip 10 through a daisy chain serial peripheral interface circuit.
  • the processor chip 40 can participate in the management of the analog front-end chip 10, not only can it configure relevant parameters (operation behavior, operation mode, interface parameters, time parameters), but also can read the data collected by the analog front-end chip 10 and analyze the collected battery-related operating status by calculating the data.
  • the processor chip 40 further performs balancing operations on the relevant chips and related batteries based on the analysis results.
  • by reading the stored relevant data and functional safety detection data analyzing the operating status of the analog front-end chip 10, it is helpful to further configure the relevant parameters.
  • FIG. 7 is a flow chart of signal interaction between various chips of a battery management system 100 according to an embodiment of the present application, as shown in FIG. 7 , including:
  • the integrated dedicated chip is connected to the battery to obtain the starting power supply, and after starting, it generates a stable power supply to the outside.
  • the processor chip obtains power supply from the integrated dedicated chip and starts.
  • the processor chip scans the devices connected to its protocol interface through a bridge integrated dedicated chip.
  • the processor chip detects the analog front-end chip and the high-voltage management chip at the daisy-chain serial peripheral interface, and the processor chip sends relevant parameter instructions for the configuration chip and battery parameter collection execution instructions according to requirements.
  • the integrated dedicated chip sends the collection data, calculation data, operating environment status data and security data required by the processor chip to the corresponding interface through the daisy chain serial peripheral interface circuit.
  • the integrated dedicated chip After receiving the above data, the integrated dedicated chip first verifies the data. If the data is correct, it converts it into the data format of the bridge interface protocol with the processor chip and sends it to the processor chip; if the data is abnormal, the relevant chip is required to resend it.
  • the processor chip After the processor chip receives the battery-related parameters from the analog front-end chip and the high-voltage management chip, it performs related calculations such as SOC, SOH or SOP calculations to obtain higher-precision values, checks the operating environment of the above-mentioned dedicated chip, and determines whether there is an abnormality; checks the functional safety status of the above-mentioned dedicated chip, and diagnoses whether there is a failure.
  • related calculations such as SOC, SOH or SOP calculations to obtain higher-precision values
  • the processor chip generates relevant adjustment requirements such as balancing based on the calculation results, and generates relevant further diagnosis and safety measures execution requirements based on the detection and results.
  • the above requirements are sent to the analog front-end chip and the high-voltage management chip through the integrated dedicated chip.
  • the processor chip can also update the battery operation status to the upper-level processing system.
  • the battery management system 100 of the embodiment of the present application is based on the architecture of the analog front-end chip 10, the high-voltage management chip 20, the integrated dedicated chip 30 and the processor chip 40, which reduces the number of independent components, reduces costs, reduces wiring, and reduces the complexity of system design.
  • the high-voltage management chip 20 can perform relevant calculations for the signals collected by itself, and the processor chip 40 only needs to schedule the calculation results of the high-voltage management chip 20, and then further improve it according to the system data, thereby improving the efficiency of the processor chip 40 in acquiring data and the efficiency of data processing, thereby making the battery management system 100 more stable and reliable.
  • the integrated dedicated chip 30 provides power supply with different requirements to the processor chip 40, the high-voltage management chip 20 and other expansion devices, which not only improves the power supply control of the system to the expansion equipment, but also is different from the traditional system where the discrete devices are separately powered, and also reduces the complexity of the system circuit and improves the consistency of the driving power supply.
  • each chip has complete functional safety measures, which can not only detect and diagnose the surrounding and its own faults, but also be systematically monitored by the processor chip 40 for safety, ensuring the high-level vehicle safety integrity of the system of the present application and reducing the system failure rate.
  • a second embodiment of the present application proposes a battery 2, as shown in FIG10 .
  • the battery 2 includes a battery pack 200 , which includes a plurality of battery groups, each of which includes at least one single battery.
  • the battery pack 200 is connected to the battery management system 100 of the above embodiment, and each of the battery groups is also connected to the battery management system 100 .
  • the battery management system 100 by connecting to the battery management system 100 of the above embodiment, the battery management system 100 has a compact structure, a simple design, and high system safety and reliability, thereby improving the safety of battery use.
  • the third embodiment of the present application further proposes a vehicle 1.
  • FIG8 is a block diagram of a vehicle 1 according to an embodiment of the present application.
  • the vehicle 1 of the embodiment of the present application includes a battery pack 200 and a battery management system 100 of the above embodiment, and the battery management system 100 is connected to the battery pack 200 .
  • the battery pack 200 may include a plurality of battery groups, each of which includes at least one single battery.
  • the vehicle by adopting the battery management system 100 of the above embodiment, the vehicle has high operating efficiency, high safety and reliability, and multiple application scenarios, thereby improving the efficiency and safety of vehicle battery management.
  • the fourth embodiment of the present application further proposes a battery management method.
  • FIG9 is a flow chart of a battery management method according to an embodiment of the present application, as shown in FIG9 , comprising:
  • the high-voltage management chip detects the status parameter information of the battery pack
  • the analog front-end chip detects the status parameter information of the single battery in the battery pack.
  • the battery pack includes multiple battery packs, and the battery pack includes at least one single battery.
  • the integrated dedicated chip forwards the status parameter information of the battery pack and the status parameter information of the single cells in the battery pack to the processor chip.
  • the processor chip manages the battery management system according to the status parameter information of the single battery and the status parameter information of the battery pack.
  • data interaction between the analog front-end chip, the high-voltage management chip and the processor chip is realized by integrating a dedicated chip, thereby saving the interface resources of the processor chip, reducing the interface load of the processor chip, improving its data processing efficiency, and improving the safety and reliability of the system.
  • the processor chip manages the battery management system, including but not limited to obtaining the battery status through monitoring data, determining whether to charge and discharge and when to stop charging and discharging, and the processor chip can estimate the charge state value of the battery pack based on the status parameter information of the battery pack and/or the status parameter information of the single cell, and can also perform mutual verification with other estimation modules, and the processor chip can also perform functional safety-related monitoring and control, and the processor chip can also configure parameters for each chip, perform task scheduling based on monitoring data, and adjust the working status of each chip.
  • the processor chip manages the battery management system according to the state parameter information of the single cell and the state parameter information of the battery pack, including: the processor chip estimates the state of charge value and/or health state value of the battery pack according to the voltage information and current information of the battery pack to realize the monitoring and management of the state of the battery pack.
  • the estimation algorithm can refer to the relevant technical description.
  • the processor chip may determine whether to charge or discharge the battery pack and whether to stop charging or discharging the battery pack according to the state of charge of the battery pack.
  • the processor chip manages the battery management system according to the status parameter information of the single cells and the status parameter information of the battery pack, including: the processor chip determines the power imbalance of the single cells in the battery pack according to the status parameter information of the single cells in the battery pack, generates power balancing information, and forwards the power balancing information to the front-end analog chip through an integrated dedicated chip, so that the balancing circuit of the analog front-end chip can balance the power between the single cells in the battery pack.
  • the processor chip can also manage and control the power supply of the power-consuming chip inside the battery management system and the on and off of the external power-consuming unit based on the monitoring data.
  • the processor chip generates power supply configuration information according to the power supply requirements of the power-consuming chip inside the battery management system and sends it to the integrated dedicated chip to manage the battery management system to provide working power to the internal power-consuming chip.
  • the integrated dedicated chip can control the power supply circuit of the integrated dedicated chip according to the power supply configuration information to provide working power to at least one chip in the power-consuming chip inside the battery management system, thereby realizing the control of the internal power supply.
  • the processor chip generates a power switch channel selection control signal according to the power demand of the external power unit, and sends the power switch channel selection control signal to the integrated dedicated chip to manage the battery management system to power on and off the external power unit.
  • the integrated dedicated chip controls the on/off of the external power unit connected to the power supply circuit and the power supply side or controls the on/off of the external power unit and the power supply ground side according to the power switch channel selection control signal, thereby realizing the management of the power supply to the external power unit.
  • the processor chip sends configuration information of the integrated dedicated chip to the integrated dedicated chip, and obtains interface circuit transmission information of the integrated dedicated chip, and the processor chip obtains at least one of security monitoring information, security alarm information and operating status information of the integrated dedicated chip.
  • the processor chip can participate in the management of the integrated dedicated chip. It can not only configure relevant parameters (operation behavior, operation mode, interface parameters, time parameters), but also realize data interaction with other chips through the integrated dedicated chip, saving the interface resources of the processor chip and improving the efficiency of the processor chip in processing data.
  • the processor chip sends the configuration information of the high-voltage management chip to the high-voltage management system by integrating a dedicated chip, and obtains the detection information of the high-voltage management system by integrating the dedicated information, and the processor chip obtains at least one of the calculation result information, safety diagnosis information and safety alarm information of the high-voltage management chip by integrating the dedicated information.
  • the processor chip can obtain the voltage information, current information, etc. of the battery pack detected by the high-voltage management chip, can obtain the SOC value of the battery pack estimated by the high-voltage management chip for mutual verification, and can also obtain the safety diagnosis information of overvoltage, overcurrent, undervoltage, overtemperature, etc. of the high-voltage management chip, and can also feedback safety alarm information to the processor chip when the high-voltage management chip diagnoses that the battery pack has a safety abnormality.
  • the processor chip can determine protection measures based on the diagnosis results, such as stopping related detection steps, stopping related calculation steps, further detection and diagnosis such as open circuit detection or short circuit detection, and alarming the upper-level control system.
  • the processor chip can participate in the management of the high-voltage management chip, not only configuring relevant parameters (operation behavior, operation mode, interface parameters, time parameters), but also analyzing the state of the high-voltage signal by reading the differential data and calculation data collected by the high-voltage management chip, and analyzing the operation state of the high-voltage management chip by reading the stored relevant data and functional safety test data.
  • the processor chip can further configure relevant parameters through the analysis interface to achieve more intelligent management of the supervised chip system.
  • the processor chip sends the configuration information of the analog front-end chip to the analog front-end chip through an integrated dedicated chip, and obtains the detection information of the analog front-end chip through the integrated dedicated chip, and the processor chip obtains at least one of the safety diagnosis information, safety alarm information and calculation result information of the analog front-end chip through the integrated dedicated chip.
  • the processor chip can participate in the management of the analog front-end chip, not only can the relevant parameters (operation behavior, operation mode, interface parameters, time parameters) be configured, but also the relevant battery operation status collected by reading the data collected by the analog front-end chip and calculating the data analysis.
  • the processor chip 40 further performs a balancing operation on the relevant chip and the relevant battery according to the analysis results.
  • by reading the stored relevant data and functional safety test data to analyze the operation status of the analog front-end chip it is helpful to further configure the relevant parameters.
  • the high-voltage management chip itself may have data processing capabilities.
  • the high-voltage management chip estimates the state of charge and/or health status of the battery pack based on the voltage information and current information of the battery pack, thereby sharing the data processing tasks of the processor chip and facilitating improving the data processing efficiency of the processor chip.
  • the processor chip can obtain the state of charge value of the battery pack estimated by the high-voltage management chip through an integrated dedicated chip, and verify the state of the battery pack according to the state of charge value of the battery pack estimated by itself and the state of charge value of the battery pack estimated by the high-voltage management chip, thereby achieving mutual verification and improving the accuracy of the estimation.
  • the status parameter information of the battery pack includes the resistance between the power line of the battery pack and the insulation ground of the vehicle body.
  • the battery management method also includes: the high-voltage management chip determines the leakage state of the battery pack based on the resistance, and can generate leakage alarm information when leakage exists, and forward it to the processor chip through an integrated dedicated chip, so that leakage alarm and related protection measures can be performed.
  • the high-voltage management chip identifies whether the state parameter information of the battery pack is abnormal, and performs safety protection when the state parameter information of the battery pack is abnormal. For example, it may include at least one of the following:
  • the high-voltage management chip identifies whether the battery pack has overcurrent based on the current information of the battery pack, and performs overcurrent protection when the battery pack has overcurrent.
  • the high-voltage management chip identifies whether the battery pack has overvoltage or undervoltage based on the voltage information of the battery pack, and performs overvoltage or undervoltage protection when the battery pack has overvoltage or undervoltage.
  • the high voltage management chip obtains the temperature information of the high voltage management chip itself, identifies whether the high voltage management chip is over-temperature based on the temperature information of the high voltage management chip itself, and performs over-temperature protection when the high voltage management chip is over-temperature.
  • the analog front-end chip identifies whether the status parameter information of the single cell is abnormal, and performs safety protection when the status parameter of the single cell is abnormal. For example, at least one of the following is included: the analog front-end chip identifies whether the voltage of the single cell in the battery pack is overvoltage/undervoltage, and performs overvoltage or undervoltage protection when the voltage of the single cell is overvoltage or undervoltage. The analog front-end chip identifies whether there is an overcurrent in the current of the single cell, and performs overcurrent protection when there is an overcurrent in the current of the single cell. The analog front-end chip identifies whether the pressure inside the single cell in the battery pack is abnormal, and performs safety protection when the pressure is abnormal. The analog front-end chip identifies whether the temperature of the single cell in the battery pack is overheated, and performs overtemperature safety protection when the temperature of the single cell is overheated.
  • the battery management method also includes at least one of the following: the analog front-end chip identifies whether the voltage of the battery pack is abnormal and identifies whether the voltage of the internal components of the analog front-end chip is abnormal, and performs voltage safety protection when an abnormality exists; the analog front-end chip diagnoses whether the current of the battery pack is abnormal and identifies whether the current of the internal components of the analog front-end chip is abnormal, and performs current protection when a current abnormality exists.
  • the battery management method of the embodiment of the present application is based on the architecture of the analog front-end chip, the high-voltage management chip, the integrated dedicated chip and the processor chip, which reduces the complexity of system design, improves the data transmission efficiency, makes the data transmission path more consistent, and improves the stability and reliability of the system.
  • the high-voltage management chip can perform relevant calculations for the signals collected by itself, while the processor chip only needs to schedule the calculation results of the high-voltage management chip, and then make further improvements based on the system data, thereby improving the data processing efficiency.
  • each chip has complete functional safety measures, which can not only detect and diagnose surrounding and self-faults, but also be subject to systematic safety monitoring by the processor chip, making battery management more complete and safety protection more comprehensive.
  • the application scenarios of the battery management system are more extensive, especially for scenarios with high requirements for efficiency, stability and safety, the battery management system of the embodiment of the present application is also applicable.

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Abstract

一种电池管理系统、电池、车辆和电池管理方法，该电池管理系统包括模拟前端芯片、高压管理芯片、集成专用芯片和处理器芯片。该模拟前端芯片与电池组连接，用于检测该电池组中至少一个单体电池的状态参数信息。该高压管理芯片连接电池包的电源线，用于检测该电池包的状态参数信息，该电池包包括多个电池组。该处理器芯片通过该集成专用芯片与该模拟前端芯片电连接。该高压管理芯片通过该集成专用芯片与该处理器芯片电连接，该处理器芯片用于根据该单体电池和该电池包的状态参数信息管理该电池管理系统。

Description

电池管理系统、电池、车辆和电池管理方法
相关申请的交叉引用
本申请要求在2023年4月28日提交至中国国家知识产权局、申请号为202310489819.8、名称为“电池管理系统、电池、车辆和电池管理方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及电池技术领域，尤其是涉及一种电池管理系统，以及电池、车辆和电池管理方法。
背景技术
目前，电池管理系统的性能低，不能及时准确地对电池状态进行估算和管理，进而影响电池管理系统的工作效率。在某些应用场景中，现有的电池管理系统并不适用，进而影响电池的使用和推广。
公开内容
本申请旨在至少解决现有技术中存在的技术问题之一。为此，本申请第一方面实施例提出了一种电池管理系统，该电池管理系统可以提高电池管理系统的运行效率，提高系统的安全可靠性，进而适用于更多的应用场景。
本申请第二方面实施例提出一种电池；
本申请第三方面实施例提出一种车辆；
本申请第四方面实施例提出一种电池管理方法。
为了解决上述问题，本申请第一方面实施例的电池管理系统包括：模拟前端芯片，所述模拟前端芯片与电池组连接，用于检测所述电池组中单体电池的状态参数信息，所述电池组包括至少一个单体电池；高压管理芯片，所述高压管理芯片连接于电池包的电源线，用于检测所述电池包的状态参数信息，所述电池包包括多个所述电池组；集成专用芯片；以及处理器芯片，所述处理器芯片通过所述集成专用芯片与所述模拟前端芯片电连接，所述高压管理芯片通过所述集成专用芯片与所述处理器芯片电连接，所述处理器芯片用于根据所述单体电池和所述电池包的状态参数信息管理所述电池管理系统。
根据本申请实施例的电池管理系统，基于模拟前端芯片、高压管理芯片、集成专用芯片和处理器芯片的架构来实现电池管理，处理器芯片获取数据更加快速高效，提高了系统的运行效率，数据传输路径更加统一，提高了数据稳定性，并且基于该架构电池管理系统可以适用于更多的应用场景。
在一些实施例中，所述集成专用芯片包括：供电电路，所述供电电路用于连接外部电源并向所述电池管理系统中的至少一个芯片提供工作电源。
在一些实施例中，所述集成专用芯片还包括：电源输入端口和电源输出端口，所述供电电路通过所述电源输入端口连接外部电源，所述供电电路通过所述电源输出端口连接所述处理器芯片，以为所述处理器芯片提供工作电源。
在一些实施例中，所述供电电路通过所述电源输出端口连接所述高压管理芯片，以为所述高压管理芯片提供工作电源。
在一些实施例中，所述供电电路包括电压转换子电路，以为所述处理器芯片和所述高压管理芯片提供不同的工作电压。
在一些实施例中，所述处理器芯片还用于根据所述电池管理系统的内部用电芯片的供电需求生成供电配置信息并发送所述供电配置信息给所述集成专用芯片，以管理所述电池管理系统对所述内部用电芯片提供工作电源；所述集成专用芯片还包括：第一数字逻辑电路，所述第一数字逻辑电路分别与所述处理器芯片、所述供电电路电连接，用于根据所述供电配置信息控制所述供电电路为所述电池管理系统内部用电芯片提供工作电源。
在一些实施例中，所述集成专用芯片还包括：电源开关电路，所述电源开关电路的第一端与所述供电电路连接，所述电源开关电路的第二端适于与外部用电单元连接，所述电源开关电路用于控制所述外部用电单元的供电状态的通断。
所述电源开关电路包括：高边驱动子电路，所述高边驱动子电路的第一端与所述供电电路的输出端连接，所述高边驱动子电路的第二端适于与所述外部用电单元的供电回路的供电电源侧连接，所述高边驱动子电路的第三端适于与所述外部用电单元的正极端连接，所述高边驱动子电路用于控制所述外部用电单元与所述供电电源侧之间的通断。
在一些实施例中，所述电源开关电路包括：低边驱动子电路，所述低边驱动子电路的第一端与所述供电电路的输出端连接，所述低边驱动子电路的第二端适于与所述外部用电单元的供电回路的供电地侧连接，所述低边驱动子电路的第三端适于与所述外部用电单元的负极端连接，所述低边驱动子电路用于控制所述外部用电单元与所述供电地侧之间的通断。
在一些实施例中，所述电源开关电路还包括：使能开关子电路，所述使能开关子电路的一端分别与所述高边驱动子电路和所述低边驱动子电路连接，所述使能开关子电路的另一端与所述供电电路连接，用于控制所述高边驱动子电路和所述低边驱动子电路的通断。
在一些实施例中，所述处理器芯片还用于根据所述外部用电单元的用电需求生成对于所述高边驱动子电路和所述低边驱动子电路的电源开关通道选择控制信号，并将所述电源开关通道选择控制信号发送给所述集成专用芯片，以管理所述电池管理系统对于所述外部用电单元的供电通断；以及所述第一数字逻辑电路与所述使能开关子电路电连接，用于根据所述电源开关通道选择控制信号控制所述使能开关子电路。
在一些实施例中，所述集成专用芯片还包括：输入源检测子电路，所述输入源检测子电路的一端通过所述电 源输入端口与所述外部电源连接，所述输入源检测子电路的另一端与所述第一数字逻辑电路连接，用于对所述外部电源进行检测，并将所述外部电源的电源检测信息传输至所述第一数字逻辑电路。
在一些实施例中，所述集成专用芯片包括：输入源隔离电路，所述输入源隔离电路与所述外部电源和所述供电电路连接，所述供电电路通过所述输入源隔离电路与所述外部电源连接。
在一些实施例中，所述集成专用芯片包括：第一菊花链串行外设接口电路，所述集成专用芯片通过所述第一菊花链串行外设接口电路与所述模拟前端芯片电连接。
在一些实施例中，所述集成专用芯片包括：
第一标准串行外设接口电路，所述第一标准串行外设接口电路的一端与第一菊花链串行外设接口电路电连接，所述第一标准串行外设接口电路的另一端与所述处理器芯片电连接。
在一些实施例中，所述第一标准串行外设接口电路用于向所述处理器芯片发送标准串行数据或者从所述处理器芯片接收数据，并且将从所述处理器芯片接收的数据以标准串行数据传输至所述第一菊花链串行外设接口电路，所述第一菊花链串行外设接口电路用于将所述标准串行数据转换为对应差分数据，并将所述对应差分数据发送至所述模拟前端芯片；以及
所述第一菊花链串行外设接口电路还用于从所述模拟前端芯片接收差分数据，并将从所述模拟前端芯片接收的所述差分数据发送至所述第一标准串行外设接口电路，所述第一标准串行外设接口电路将所述差分数据转换为对应标准串行数据，并且将所述对应标准串行数据发送给所述处理器芯片。
在一些实施例中，所述集成专用芯片包括：
第二菊花链串行外设接口电路，所述集成专用芯片通过所述第二菊花链串行外设接口电路与所述高压管理芯片连接。
在一些实施例中，所述集成专用芯片包括：
第二标准串行外设接口电路，所述第二标准串行外设接口电路的一端与所述第二菊花链串行外设接口电路电连接，另一端与所述处理器芯片电连接。
在一些实施例中，所述第二标准串行外设接口电路用于从所述处理器芯片接收数据，并且将从所述处理器芯片接收的数据以标准串行数据传输至所述第二菊花链串行外设接口电路，所述第二菊花链串行外设接口电路用于将所述标准串行数据转换为对应差分数据，并将所述对应差分数据发送至所述高压管理芯片；以及
所述第二菊花链串行外设接口电路还用于从所述高压管理芯片接收差分数据，并将从所述高压管理芯片接收的差分数据发送至所述第二标准串行外设接口电路，所述第二标准串行外设接口电路将所述差分数据转换为对应标准串行数据，并且将所述对应标准串行数据发送给所述处理器芯片。
在一些实施例中，所述集成专用芯片还包括第一I2C总线接口电路、第一通用异步收发器接口电路、第一控制器局域网总线接口电路中的至少一种接口电路，所述至少一种接口电路用于所述集成专用芯片的菊花链串行外设接口电路与所述处理器芯片之间的电连接，或者，所述至少一种接口电路用于所述集成专用芯片与外部控制系统之间的通信。
在一些实施例中，所述集成专用芯片还包括：
第一模拟输入接口电路，所述第一模拟输入接口电路的一端与外部传感器电连接，所述第一模拟输入接口电路的另一端与所述第一数字逻辑电路电连接，用于采集所述外部传感器的传感器信息。
在一些实施例中，所述集成专用芯片还包括：
第一通用输入/输出接口电路，所述第一通用输入/输出接口电路的一端与外围电路电连接，所述第一通用输入/输出接口电路的另一端与所述第一数字逻辑电路连接，用于输出所述第一数字逻辑电路对所述外围电路的控制信息或者采集所述外围电路的状态信息。
在一些实施例中，所述处理器芯片还用于发送所述集成专用芯片的配置信息给所述集成专用芯片，以及获取所述集成专用芯片的接口电路传递信息、安全监控信息、安全报警信息和运行状态信息中的至少一种信息。
在一些实施例中，所述高压管理芯片包括：
信号输入端口，用于输入所述电池包的状态参数信息；以及
第一检测电路，所述第一检测电路通过所述信号输入端口与所述电池包的电源线连接，用于检测所述电池包的状态参数信息。
在一些实施例中，所述高压管理芯片还包括：
外围差分检测电路，所述外围差分检测电路的一端与所述电池包的电源线连接，所述外围差分检测电路的另一端与所述高压管理芯片的信号输入端口连接，所述第一检测电路通过所述外围差分检测电路检测所述电池包的状态参数信息。
在一些实施例中，所述第一检测电路包括：第一电压检测电路，所述第一电压检测电路与所述信号输入端口连接，用于检测所述电池包的电压信息。
在一些实施例中，所述第一检测电路包括：第一电流检测电路，所述第一电流检测电路与所述信号输入端口连接，用于检测所述电池包的电流信息。
在一些实施例中，所述处理器芯片用于根据所述单体电池和所述电池包的状态参数信息管理所述电池管理系统包括：所述处理器芯片用于根据所述电池包的电压信息和电流信息估算所述电池包的荷电状态值和/或健康状态值。
在一些实施例中，所述高压管理芯片还包括：数据处理电路，所述数据处理电路与所述第一电压检测电路和所述第一电流检测电路分别连接，用于根据所述电池包的电压信息和电流信息估算所述电池包的荷电状态值和/或健康状态值。
在一些实施例中，所述第一检测电路包括：绝缘阻值检测电路，所述绝缘阻值检测电路用于检测所述电池包 的电源线与车身绝缘地之间的阻值；
所述数据处理单元还用于根据所述所述阻值判断所述电池包的漏电状态。
在一些实施例中，所述高压管理芯片还包括：
第一安全诊断电路，所述第一安全诊断电路与所述第一检测电路连接，用于识别所述电池包的状态参数信息是否异常，并在所述电池包的状态参数信息异常时进行安全保护。
在一些实施例中，所述第一安全诊断电路包括：
第一电流诊断电路，所述第一电流诊断电路与所述第一电流检测电路连接，用于根据所述电池包的电流信息识别所述电池包是否存在过流，并在所述电池包存在过流时进行过流保护。
在一些实施例中，所述第一安全诊断电路包括：
第一电压诊断电路，所述第一电压诊断电路与所述第一电压检测电路连接，用于根据所述电池包的电压信息识别所述电池包是否存在过压或者欠压，并在所述电池包存在过压或者欠压时进行过压或欠压保护。
在一些实施例中，所述高压管理芯片包括：
第二通用输入/输出接口电路，所述第二通用输入/输出接口电路与外部传感器或外部负载连接，用于采集所述外部传感器信息或者输出控制信号给所述外部负载。
在一些实施例中，所述高压管理芯片还包括：
第一温度检测电路，所述第一温度检测电路通过所述第二通用输出/输出接口电路与外部温度传感器连接，以检测所述高压管理芯片的温度信息；和
第一温度诊断电路，所述第一温度诊断电路与所述第一温度检测电路连接，用于根据所述高压管理芯片的温度信息识别所述高压管理芯片是否存在过温，并在所述高压管理芯片存在过温时进行过温保护。
在一些实施例中，所述处理器芯片还用于通过所述集成专用芯片将所述高压管理芯片的配置信息发送给所述高压管理芯片，以及通过所述集成专用芯片获取所述高压管理芯片的检测信息、计算结果信息、安全诊断信息和安全报警信息中的至少一种。
在一些实施例中，所述高压管理芯片包括：
第三菊花链串行外设接口电路，所述高压管理芯片通过所述第三菊花链串行外设接口电路与所述集成专用芯片的所述第二菊花链串行外设接口电路连接。
在一些实施例中，所述高压管理芯片包括第二标准串行外设接口电路和第二I2C总线接口电路中的至少一种，所述第二标准串行外设接口电路和所述第二I2C总线接口电路中的至少一种为备用接口电路。
在一些实施例中，所述高压管理芯片包括：第二控制器局域网总线接口电路，所述第二控制器局域网总线接口电路用于与外部通信总线连接以获取外部总线信息。
在一些实施例中，所述模拟前端芯片包括：第二检测电路，所述第二检测电路与所述电池组连接，用于检测所述电池组中单体电池的状态参数信息。
在一些实施例中，所述模拟前端芯片还包括：第二模拟输入接口电路，所述第二检测电路通过所述第二模拟输入接口电路与外部检测电路连接，以检测所述电池组中单体电池的状态参数信息。
在一些实施例中，所述模拟前端芯片还包括：第三通用输入/输出接口电路，所述第三通用输入/输出接口电路与外部传感器连接，所述第二检测电路通过所述第三通用输入/输出接口电路与所述外部传感器连接，以检测所述电池组中单体电池的状态参数信息。
在一些实施例中，所述第二检测电路包括：第二电压检测电路，所述第二电压检测电路用于采集所述电池组中单体电池的电压信息。
在一些实施例中，所述第二检测电路还包括：第二电流检测电路，所述第二电流检测电路用于采集所述电池组中单体电池的电流信息。
在一些实施例中，所述第二检测电路还包括：应力检测电路，所述应力检测电路用于检测所述电池组中单体电池内的应力信息。
在一些实施例中，所述第二检测电路还包括：第二温度检测电路，所述第二温度检测电路用于检测所述电池组中单体电池的温度信息。
在一些实施例中，所述前端模拟芯片还包括：第二安全诊断电路，所述第二安全诊断电路与所述第二检测电路连接，用于识别所述单体电池的状态参数信息是否异常，并在所述单体电池的状态参数存在异常时进行安全保护。
在一些实施例中，所述第二安全诊断电路包括：第二电压诊断电路，所述第二电压诊断电路与所述第二电压检测电路连接，用于识别所述电池组中单体电池的电压是否过压/欠压，在所述单体电池的电压过压或欠压时进行过压或欠压保护。
在一些实施例中，所述第二电压检测电路还用于检测所述电池组的电压和所述模拟前端芯片内部器件的电压；所述第二电压诊断电路还用于识别所述电池组的电压是否异常以及识别所述模拟前端芯片内部器件的电压是否异常，并在存在异常时进行电压安全保护。
在一些实施例中，所述第二安全诊断电路包括：第二电流诊断电路，所述第二电流诊断电路与所述第二电流检测电路连接，用于识别所述单体电池的电流是否存在过流，并在所述单体电池的电流存在过流时进行过流保护。
在一些实施例中，所述第二电流检测电路还用于检测所述电池组的电流和所述模拟前端芯片内部器件的电流；所述第二电流诊断电路还用于诊断所述电池组的电流是否异常以及识别所述模拟前端芯片内部器件的电流是否异常，并在存在电流异常时进行电流异常安全保护。
在一些实施例中，所述第二安全诊断电路包括：应力诊断电路，所述应力诊断电路用于识别所述电池组中单体电池内的应力是否异常，并在应力异常时进行应力异常安全保护。
在一些实施例中，所述第二安全诊断电路包括：第二温度诊断电路，所述第二温度诊断电路与第二温度检测电路连接，用于识别所述电池组中的单体电池的温度是否过温，并在所述单体电池的温度过温时进行过温安全保护。
在一些实施例中，所述模拟前端芯片还包括：第二数字逻辑电路，所述第二数字逻辑电路与所述第二安全诊断电路连接，用于在所述电池组中的单体电池的状态参数信息存在异常时生成异常信息，以进行报警提示。
在一些实施例中，所述处理器芯片还用于通过所述集成专用芯片将所述模拟前端芯片的配置信息发送给所述模拟前端芯片，以及通过所述集成专用芯片获取所述模拟前端芯片的检测信息、安全诊断信息、安全报警信息和计算结果信息中的至少一种。
在一些实施例中，所述处理器芯片用于根据所述单体电池和所述电池包的状态参数信息管理管理所述电池管理系统包括：所述处理器芯片用于在根据所述电池组中单体电池的状态参数信息确定所述电池组中单体电池的电量不均衡时，生成电量均衡信息，并将所述电量均衡信息通过所述集成专用芯片转发给对应的所述前端模拟芯片；所述模拟前端芯片包括均衡电路，所述均衡电路用于根据所述电量均衡信息对所述电池组中单体电池进行电量均衡处理。
在一些实施例中，所述处理器芯片用于根据所述单体电池和所述电池包的状态参数信息管理所述电池管理系统包括：所述处理器芯片用于根据所述单体电池和所述电池包的状态参数信息确定电池状态，根据所述电池状态判断是否对所述电池包进行充电或放电以及判断是否对所述电池包停止充电或放电。
在一些实施例中，所述处理器芯片用于根据所述单体电池和所述电池包的状态参数信息管理所述电池管理系统包括：所述处理器用于根据所述单体电池和/或电池包的状态参数信息估算所述电池包的荷电状态值，并获取所述高压管理芯片估算的所述电池包的荷电状态值，根据自身估算的所述电池包的荷电状态值与所述高压管理芯片估算的所述电池包的荷电状态值进行电池状态校验。
在一些实施例中，所述模拟前端芯片为多个，多个所述模拟前端芯片串联连接。
在一些实施例中，所述第一菊花链串行外设接口电路为两个；每个所述模拟前端芯片均包括第四菊花链串行外设接口电路和第五菊花链串行外设接口电路；以及串联连接的多个所述模拟前端芯片中，首端模拟前端芯片通过所述第四菊花链串行外设接口电路与所述集成专用芯片的一个所述第一菊花链串行外设接口电路连接，末端模拟前端芯片通过所述第五菊花链串行外设接口电路与所述集成专用芯片的另一个所述第一菊花链串行外设接口电路连接。
在一些实施例中，在串联连接的多个所述模拟前端芯片中，第n个所述模拟前端芯片通过所述第五菊花链串行外设接口电路与第(n+1)个所述模拟前端芯片的所述第四菊花链串行外设接口电路连接，其中，1≤n<n+1≤N,N为串联连接的多个所述模拟前端芯片的总数量。
在一些实施例中，所述模拟前端芯片包括第三标准串行外设接口电路和第三I2C总线接口电路中的至少一个接口电路，所述第三标准串行外设接口电路和所述第三I2C总线接口电路中的至少一个接口电路为备用接口电路。
为了达到上述目的，本申请第二方面实施例提出一种电池，包括：电池包，所述电池包包括多个电池组，每个电池组包括至少一个单体电池；其中，所述电池包与所述的电池管理系统连接，并且每个所述电池组与所述电池管理系统连接。
根据本申请实施例的电池，通过连接上面实施例的电池管理系统，该电池管理系统运行高效，数据稳定性、可靠性高，从而提高了电池使用安全。
为了达到上述目的，本申请第三方面实施例的车辆，包括：电池包，所述电池包包括多个电池组，每个电池组包括至少一个单体电池；以及所述的电池管理系统，所述电池管理系统与所述电池包连接。
根据本申请实施例的车辆，通过采用上面实施例的电池管理系统，该电池管理系统运行效率高、安全可靠性高、应用场景多，提高了车辆电池管理效率和安全。
为了达到上述目的，本申请第四方面实施例的电池管理方法，用于所述的电池管理系统，所述电池管理方法包括：高压管理芯片检测电池包的状态参数信息，以及模拟前端检测电池组中单体电池的状态参数信息，所述电池包包括多个所述电池组，所述电池组包括至少一个单体电池；集成专用芯片将所述电池包的状态参数信息和所述电池组中单体电池的状态参数信息转发给处理器芯片；以及处理器芯片根据所述单体电池的状态参数信息和所述电池包的状态参数信息管理所述电池管理系统。
根据本申请实施例的电池管理方法，通过集成专用芯片来实现模拟前端和高压管理芯片与处理器芯片之间的数据交互，可以有效快速地传输数据，提高系统的运行效率，数据传输路径更加统一，提高了系统安全可靠性，可以适用于更多的应用场景。
在一些实施例中，处理器芯片根据所述单体电池的状态参数信息和所述电池包的状态参数信息管理所述电池管理系统，包括：所述处理器芯片根据所述电池包的电压信息和电流信息估算所述电池包的荷电状态值和/或健康状态值。
在一些实施例中，处理器芯片根据所述单体电池的状态参数信息和所述电池包的状态参数信息管理所述电池管理系统还包括：所述处理器芯片根据所述电池包的荷电状态判断是否对所述电池包进行充电或者放电以及判断是否停止对所述电池包充电或放电。
在一些实施例中，处理器芯片根据所述单体电池的状态参数信息和所述电池包的状态参数信息管理所述电池管理系统，包括：所述处理器芯片根据所述电池组中单体电池的状态参数信息确定所述电池组中单体电池的电量不均衡，生成电量均衡信息，并将所述电量均衡信息通过所述集成专用芯片转发给所述前端模拟芯片。
在一些实施例中，所述电池管理方法还包括：所述处理器芯片根据所述电池管理系统内部用电芯片的供电需求生成供电配置信息并发送给所述集成专用芯片，以管理所述电池管理系统对内部用电芯片提供工作电源。
在一些实施例中，所述电池管理方法还包括：所述处理器芯片根据外部用电单元的用电需求生成电源开关通道选择控制信号，并将所述电源开关通道选择控制信号发送给所述集成专用芯片，以管理所述电池管理系统对于外部用电单元的供电通断；所述集成专用芯片根据所述电源开关通道选择控制信号控制所述供电电路所连接的外部用电单元与供电电源侧的通断或者控制所述外部用电单元与供电地侧的通断。
在一些实施例中，所述电池管理方法还包括：所述处理器芯片发送所述集成专用芯片的配置信息给所述集成专用芯片，并获取所述集成专用芯片的接口电路传递信息；以及所述处理器芯片获取所述集成专用芯片的安全监控信息、安全报警信息和运行状态信息中的至少一种信息。
在一些实施例中，所述电池管理方法还包括：所述处理器芯片通过所述集成专用芯片将所述高压管理芯片的配置信息发送给所述高压管理系统，并通过所述集成专用信息获取所述高压管理系统的检测信息；以及所述处理器芯片通过所述集成专用信息获取所述高压管理芯片的计算结果信息、安全诊断信息和安全报警信息中的至少一种。
在一些实施例中，所述电池管理方法还包括：所述处理器芯片通过所述集成专用芯片将所述模拟前端芯片的配置信息发送给所述模拟前端芯片，并通过所述集成专用芯片获取所述模拟前端芯片的检测信息；以及所述处理器芯片通过所述集成专用芯片获取所述模拟前端芯片的安全诊断信息、安全报警信息和计算结果信息中的至少一种。
在一些实施例中，所述电池管理方法还包括：所述集成专用芯片根据所述供电配置信息控制所述集成专用芯片的供电电路向所述电池管理系统内部用电芯片中的至少一个芯片提供工作电源。
在一些实施例中，所述电池包的状态参数信息包括所述电池包的电压信息和电流信息，所述电池管理方法还包括：所述高压管理芯片根据所述电池包的电压信息和电流信息估算所述电池包的荷电状态值和/或健康状态值。
在一些实施例中，处理器芯片根据所述单体电池的状态参数信息和所述电池包的状态参数信息管理所述电池管理系统，还包括：所述处理器芯片通过所述集成专用芯片获取所述高压管理芯片估算的所述电池包的荷电状态值，并根据自身估算的所述电池包的荷电状态值和所述高压管理芯片估算的所述电池包的荷电状态值验证所述电池包的状态。
在一些实施例中，所述电池包的状态参数信息包括所述电池包的电源线与车身绝缘地之间的阻值，所述电池管理方法还包括：所述高压管理芯片根据所述阻值判断所述电池包的漏电状态。
在一些实施例中，所述电池管理方法还包括：所述高压管理芯片识别所述电池包的状态参数信息是否异常，并在所述电池包的状态参数信息异常时进行安全保护。
在一些实施例中，所述高压管理芯片识别所述电池包的状态参数信息是否异常，并在所述电池包的状态参数信息异常时进行安全保护，包括以下至少一项：所述高压管理芯片根据所述电池包的电流信息识别所述电池包是否存在过流，并在所述电池包存在过流时进行过流保护；所述高压管理芯片根据所述电池包的电压信息识别所述电池包是否存在过压或者欠压，并在所述电池包存在过压或者欠压时进行过压或欠压保护。
在一些实施例中，所述电池管理方法还包括：所述高压管理芯片获取所述高压管理芯片自身的温度信息；所述高压管理芯片根据所述高压管理芯片自身的温度信息识别所述高压管理芯片是否存在过温，并在所述高压管理芯片存在过温时进行过温保护。
在一些实施例中，所述电池管理方法还包括：所述模拟前端芯片识别所述单体电池的状态参数信息是否异常，并在所述单体电池的状态参数存在异常时进行安全保护。
在一些实施例中，所述模拟前端芯片识别所述单体电池的状态参数信息是否异常，并在所述单体电池的状态参数存在异常时进行安全保护，包括以下至少一项：所述模拟前端芯片识别所述电池组中单体电池的电压是否过压/欠压，在所述单体电池的电压过压或欠压时进行过压或欠压保护；所述模拟前端芯片识别所述单体电池的电流是否存在过流，并在所述单体电池的电流存在过流时进行过流保护；所述模拟前端芯片识别所述电池组中单体电池内的压力是否异常，并在压力异常时进行安全保护；和所述模拟前端芯片识别所述电池组中的单体电池的温度是否过温，并在所述单体电池的温度过温时进行过温安全保护。
在一些实施例中，所述电池管理方法还包括以下至少一项：所述模拟前端芯片识别所述电池组的电压是否异常以及识别所述模拟前端芯片内部器件的电压是否异常，并在存在异常时进行电压安全保护；和所述模拟前端芯片诊断所述电池组的电流是否异常以及识别所述模拟前端芯片内部器件的电流是否异常，并在存在电流异常时进行电流保护。
本申请的附加方面和优点将在下面的描述中部分给出，部分将从下面的描述中变得明显，或通过本申请的实践了解到。
附图说明
本申请的上述和/或附加的方面和优点从结合下面附图对实施例的描述中将变得明显和容易理解，其中：
图1是根据本申请一个实施例的电池管理系统的结构示意图；
图2是根据本申请一个实施例的集成式专用芯片的示意性框图；
图3是根据本申请一个实施例的高低边驱动配置的流程图；
图4是根据本申请一个实施例的通过集成专用芯片的接口电路实现处理器芯片和模拟前端芯片通信连接的示意图；
图5是根据本申请一个实施例的高压管理芯片的示意性框图；
图6是根据本申请一个实施例的模拟前端芯片的示意性框图；
图7是根据本申请一个实施例的数据交互的流程图；
图8是根据本申请一个实施例的车辆的示意性框图；
图9是根据本申请一个实施例的电池管理方法的流程图；
图10是根据本申请一个实施例的电池的示意性框图。
具体实施方式
下面详细描述本申请的实施例，参考附图描述的实施例是示例性的。
下面参考图1-图7描述根据本申请第一方面实施例的电池管理系统。
图1是根据本申请一个实施例的电池管理系统的框图，如图1所示，本申请实施例的电池管理系统100包括模拟前端芯片10、高压管理芯片20、集成专用芯片30和处理器芯片40。
其中，模拟前端芯片10与电池组连接，用于检测电池组中单体电池的状态参数信息，例如电池组包括至少一个单体电池。模拟前端芯片10监控由单体电池或多个单体电池组成的电池组的状态参数信息，例如包括但不限于电池电流、电压、内外应力或者外部温度等。单体电池可以为锂电池、蓄电池或者二次锂电池或二次蓄电池。
高压管理芯片20连接于电池包的电源线，用于检测电池包的状态参数信息例如电流、电压等，电池包包括多个电池组。
如图1所示，电池包包括多个电池组，每个电池组对应连接有模拟前端芯片10，模拟前端芯片10用于检测对应电池组中每个单体电池的状态参数信息。高压管理芯片20用于检测多个电池组整体即电池包的状态参数信息。
集成专用芯片30作为桥接芯片，处理器芯片40通过集成专用芯片30与模拟前端芯片10连接，以及处理器芯片40通过集成专用芯片30与高压管理芯片20连接，集成专用芯片30用于将模拟前端芯片10的检测数据或者生成数据转发给处理器芯片40，以及集成专用芯片30用于将高压管理芯片20的检测数据和生成数据转发给处理器芯片40，并且，处理器芯片40也可以通过集成专用芯片30将监控参数发送给模拟前端芯片10和高压管理芯片20。
处理器芯片40可以为具有控制、管理和计算能力的处理单元，负责监控整个电池管理系统100及其所连接的模块的运行状态、数据调度、数据计算等工作。
在本申请实施例中，处理器芯片40通过与集成专用芯片30桥接，实现与模拟前端芯片10和高压管理芯片20的数据交互，用于根据反馈的信息进行数据处理和任务调度，例如根据单体电池和电池包的状态参数信息对电池管理系统进行管理，可以包括电池包充放电、单体电池均衡、电量估算，功能安全监控等。
其中，集成专用芯片30可以充当处理器芯片40的拓展接口，相当于处理器芯片40与前端模拟芯片10和高压管理芯片20之间的桥接芯片，同时还可以实现高压管理芯片20与处理器芯片40之间的数据传输以及模拟前端芯片10与处理器芯片40之间的数据传输。通过该模式，可以高效地传输数据，提高处理器芯片40的运行效率，数据传输路径更加统一，提高了系统安全可靠性，可以适用于更多的应用场景。
在一些实施例中，处理器芯片40可以监控连接在集成专用芯片30的接口上的其他系统及设备例如模拟前端芯片10和高压管理芯片20的运行状态、配置操作参数，并进行数据传输。处理器芯片40可以通过集成专用芯片30对前端模拟芯片10和高压管理芯片20进行状态配置，也可以获取相应的数据例如采集的数据或者直接获取处理后的数据，从而可以降低处理器芯片40的任务量。
处理器芯片40可以发送配置信息以及将信息传递给集成专用芯片30，也可以获取集成专用芯片30反馈的采集数据、存储数据以及计算结果数据等，以及接收集成专用芯片30的接口电路传递信息、安全监控信息、安全报警信息和运行状态信息中的至少一种信息。进一步地，处理器芯片40基于此类信息可以进行任务调度或监控集成专用芯片30的运行。
处理器芯片40可以通过集成专用芯片30将模拟前端芯片10的配置信息发送给模拟前端芯片10，例如模拟前端芯片10的系统运行时间参数、采集参数和数据通信等参数，以便模拟前端芯片10对所连的电池组进行参数采样，和对自身进行安全监控，并根据配置情况向处理器芯片40进行反馈。其中，采集的电池参数包含但不限于单体电池电压、电流、温度和应力等信号。处理器芯片40可以通过集成专用芯片30获取模拟前端芯片10的检测信息、安全诊断信息、安全报警信息和计算结果信息中的至少一种，接收到模拟前端芯片10传输的采集数据，可以估计每个单体电池的状态，包括但不限于计算SOC值。
处理器芯片40通过集成专用芯片30将高压管理芯片20的配置信息发送给高压管理芯片20，例如高压管理芯片20的系统运行时间参数、采集参数、数据通信和计算操作等，以便高压管理芯片20对自身所连的所有电池的总压和总电流进行差分采样，并在高压管理芯片20内对所有单体电池执行状态进行估计，包括但不限于计算SoC，同时对芯片内部进行安全监控，并根据配置情况向处理器芯片40传输相关数据。例如，处理器芯片40可以通过集成专用芯片30获取高压管理芯片20的检测信息、计算结果信息、安全诊断信息和安全报警信息中的至少一种。
下面对本申请实施例的电池管理系统100的各个芯片的内部结构进行说明。
图2是根据本申请一个实施例的集成专用芯片30的功能框图，如图2所示，集成专用芯片30包括供电电路31。
供电电路31用于与外部电源连接并向电池管理系统100中的至少一个芯片提供工作电源。如图1所示，模拟前端芯片10与电池组连接，可以由电池组直接提供驱动电源。而本申请实施例中，集成专用芯片30设置供电电路31，通过供电电路31可以将外部电源分配给系统内的芯片，以实现内部用电芯片的供电，从而，电池管理系统100内部无需每个模块设置独立的驱动电源，提高供电电源的一致性，降低了整个系统的设计复杂性，降低了成本。
如图2所示，集成专用芯片30还包括电源输入端口32和电源输出端口33，供电电路31通过电源输入端口32连接外部电源，供电电路31通过电源输出端口33连接处理器芯片40，以为处理器芯片40提供工作电源。
如图1所示，集成专用芯片30可以通过电源输入端口32从车辆蓄电池中获取工作电源，并将其转换为稳定电源例如通过稳压电路进行稳压处理并为处理器芯片40提供工作电源，从而处理器芯片40无需设置独立的驱动电源。
例如，供电电路31可以通过低压差线性稳压模块(LDO，low dropout regulator)将输入的电源电压转换为芯片内部模块的工作电压和电源输出端口33所连接的外部单元的驱动电压。即，通过电源输入端口32、供电电路31(低压差线性稳压器)和电源输出端口33，将级连输入的电源转换成稳定的电压，可以为系统内部用电芯片提供供电电压。
供电电路31还可以通过电源输出端口33连接高压管理芯片20，以为高压管理芯片20提供工作电源，因此，高压 管理芯片20无需设置独立的驱动电源。
可以理解的是，电池管理系统100内部各个用电芯片的工作电压可能不相同，因此，如图3所示，供电电路31包括电压转换子电路311，电压转换子电路311的一端通过电源输入端口33与外部电路连接，电压转换子电路311的另一端与处理器芯片40、高压管理芯片20连接，电压转换子电路311可以为处理器芯片40和高压管理芯片20提供不同的工作电压，满足不同用电芯片的工作电压需求。
在一些实施例中，处理器芯片40可以根据电池管理系统100的内部用电芯片的供电需求生成供电配置信息并发送该供电配置信息给集成专用芯片30，以管理电池管理系统100对内部用电芯片提供工作电源。
如图2所示，集成专用芯片30还包括第一数字逻辑电路34，第一数字逻辑电路34分别与处理器芯片40、供电电路31电连接，用于根据供电配置信息控制供电电路31，为电池管理系统100的内部用电芯片提供工作电源。
例如，处理器芯片40从集成专用芯片30处获得供电电源并启动后，检查集成专用芯片30与自身的连接状况，和挂接在集成专用芯片30上的设备的情况。若处理器芯片40检测到集成专用芯片30连接模拟前端芯片10和高压管理芯片20，则对上述两个芯片进行配置和监控。
通过集成专用芯片30的供电电路31将外部电源分配给系统内部用电芯片，内部用电芯片无需都设置独立电源，降低电路复杂度，提高供电电源一致性。以及，高压管理芯片20具备数据处理能力，处理器芯片40可以直接获取计算处理结果，降低了处理器芯片40的计算负担，提高数据处理效率。
在本申请的实施例中，集成专用芯片30还可以为电池管理系统100外部的用电单元进行供电监控。如图2所示，集成专用芯片30包括电源开关电路35，电源开关电路35的第一端与供电电路31连接，电源开关电路35的第二端适于与外部用电单元连接例如如图1所示，外部用电设备可以为与集成专用芯片30连接的拓展设备或者通过接触器连接的外部高压设备等，电源开关电路35用于控制外部用电单元的供电状态的通断。即本申请实施例的集成专用芯片30可以具备稳压、电压转换、开关等功能，可以实现为系统内部用电芯片供电也可以控制外部用电单元的供电通断。
进一步地，如图2所示，电源开关电路35包括高边驱动子电路351，高边驱动子电路351的第一端与供电电路31的输出端连接，高边驱动子电路351的第二端适于与外部用电单元的供电回路的供电电源侧连接，高边驱动子电路351的第三端适于与外部用电单元的正极端连接，高边驱动子电路351用于控制外部用电单元与其供电电源侧之间的通断。通过高边驱动子电路351可以控制外部用电单元电源侧的输入，实现对外部用电单元的供电控制。
如图2所示，电源开关电路35还包括低边驱动子电路352，低边驱动子电路352的第一端与供电电路31的输出端连接，低边驱动子电路352的第二端适于与外部用电单元的供电回路的供电地侧连接，低边驱动子电路352的第三端适于与外部用电单元的负极端连接，低边驱动子电路352用于控制外部用电单元与其供电地侧之间的通断。即通过低边驱动子电路352可以控制外部用电单元供电地侧的连接，实现对外部用电单元的供电控制。
具体地，在实施例中，高边驱动子电路351和低边驱动子电路352均可以为三极管或者MOS管或者其它开关管，高边驱动子电路351和/或低边驱动子电路352可以通过接触器连接外部用电单元，根据外部用电单元的供电需求来控制外部用电单元的电源或地的通断。
如图2所示，电源开关电路35还包括使能开关子电路353，使能开关子电路353的一端分别与高边驱动子电路351和低边驱动子电路352连接，使能开关子电路353的另一端与供电电路31连接，用于控制高边驱动子电路351和低边驱动子电路352的通断。即通过使能开关子电路353来实现高边和低边的选通，以实现对外部用电单元供电的控制。
在实施例中，处理器芯片40还用于根据外部用电单元的用电需求生成对于高边驱动子电路351和低边驱动子电路352的电源开关通道选择控制信号，并将电源开关通道选择控制信号发送给集成专用芯片30，以管理电池管理系统100对于外部用电单元的供电通断。第一数字逻辑电路34与使能开关子电路353电连接，用于根据电源开关通道选择控制信号控制使能开关子电路353，进而使使能开关子电路353根据电源开关通道选择控制信号选通低边驱动子电路352或者选通高边驱动子电路351，实现对外部供电单元的供电控制。
以上，本申请实施例的集成专用芯片30不仅可以实现对电池管理系统100内部的用电单元的供电控制，也可以对外部用电单元的供电进行控制。
具体地，集成专用芯片30为处理器芯片40提供供电电压。在实施例中，处理器芯片40可以根据需求和当前集成专用芯片30的接口空闲情况，选择接口类型，使能该接口并选择传输通道。处理器芯片40通过与集成专用芯片30所连的接口，可配置集成专用芯片30的运行参数，如高低边驱动子电路的使能和选择、驱动电源的使能和通道选择、接口参数(传输速率、传输周期等)、时间相关类参数(WDT、内部时钟校验等)、工作模式(根据系统状态，配置不同的工作模式)和安全监控参数(检测时间、检测参数种类等)等。第一数字逻辑电路34可以根据配置信息以及处理器芯片40的任务调度信息控制电源开关电路35和供电电路31，以满足不同模块的供电电源需求。
图3为根据本申请的一个实施例的高边驱动子电路351和低边驱动子电路352配置的流程图，如图3所示，包括：
S1，集成专用芯片连接车辆蓄电池获得启动电源，启动并向外部产生稳定电源。
S2，处理器芯片从集成专用芯片处获得供电电源并启动。
S3，处理器芯片通过集成专用芯片，扫描集成专用芯片所连接接触器上挂接的系统和设备。
S4，处理器芯片根据接触器所连接系统和设备的特征，配置相关接触器通道的高低边驱动的工作状态。
在一些示例中，如图2所示，集成专用芯片30还包括输入源检测子电路36。
输入源检测子电路36的一端通过电源输入端口32与外部电源连接，输入源检测子电路36的另一端与第一数字逻辑电路34连接，用于对外部电源进行检测，并将外部电源的电源检测信息传输至第一数字逻辑电路34。第一数字逻辑电路34可以根据外部电源的电源检测信息对输入至高边驱动子电路351和低边驱动子电路352的电源信号进行调整，例如进行升降压或者进行过欠压保护等，以及还可以基于输入外部电源的电源检测信息(例如检测电压)对输入源进行故障诊断，例如是否过/欠压或者前后存在差异等。
即，本申请实施例的集成专用芯片30，基于电源输入端口32、输入的外部电源、低边驱动子电路352、高边驱动子电路351和输入源检测子电路36可以组成可控的接触器回路。如图1所示，该回路将输入电源中嵌入低边驱动子电路 352和高边驱动子电路352，并扩展至多个接触器输出端口，可实现可编程控制其接触器的连接状态，通过快速配置其驱动状态，可以有效保护连接设备和改变设备的运行状态。同时集成专用芯片30为供电输出增加了安全保护措施，保证回路的正常运行。
如图2所示，本申请实施例的集成专用芯片30还设置有输入源隔离电路37，输入源隔离电路37与外部电源和供电电路31连接，供电电路31通过输入源隔离电路37与外部电源连接。由于芯片内部用电相较于外部电源为低电压，通过输入源隔离电路37可以隔离通信信号或者隔离高低供电电源，以避免通信信号的串扰，以及高低压供电电源之间的干扰，提高集成专用芯片30提供供电的稳定性。
如图2所示，集成专用芯片30包括第一菊花链串行外设接口电路301，集成专用芯片30通过第一菊花链串行外设接口电路301与模拟前端芯片10电连接。通过第一菊花链串行外设接口电路301实现集成专用芯片30与模拟前端芯片10之间的通信，菊花链串行外设接口电路301可以起到通信隔离的作用，减少信号串扰，提高通信稳定性。
如图2所示，集成专用芯片30还包括第一标准串行外设接口电路302，第一标准串行外设接口电路302的一端与第一菊花链串行外设接口电路301电连接，第一标准串行外设接口电路302的另一端与处理器芯片40电连接。
即，通过集成专用芯片30的第一菊花链串行外设接口电路301和第一标准串行外设接口电路302实现处理器芯片40与模拟前端芯片10之间的数据隔离通信。
图4为通过第一菊花链串行外设接口电路301和第一标准串行外设接口电路302实现处理器芯片40与模拟前端芯片10之间通信连接的示意图，如图4所示，通过集成专用芯片30实现处理器芯片40的标准串行信号和模拟前端芯片10的差分信号之间的转换和传输。
具体地，第一标准串行外设接口电路302用于向处理器芯片40发送标准串行数据例如“0”“1”或者从处理器芯片40接收数据，并且将从处理器芯片40接收的数据以标准串行数据传输至第一菊花链串行外设接口电路301，第一菊花链串行外设接口电路301用于将标准串行数据转换为对应差分数据，并将对应差分数据发送至模拟前端芯片10。第一菊花链串行外设接口电路301还用于从模拟前端芯片10接收数据，并将从模拟前端芯片10接收的数据以对应差分数据发送至第一标准串行外设接口电路302，第一标准串行外设接口电路302将差分数据转换为对应标准串行数据，并且将对应标准串行数据发送给处理器芯片40。从而，通过集成专用芯片30实现模拟前端芯片10与处理器芯片40之间的隔离通信。
同理地，在实施例中，如图2所示，集成专用芯片30包括第二菊花链串行外设接口电路303，集成专用芯片30通过第二菊花链串行外设接口电路303与高压管理芯片20连接，即通过第二菊花链串行外设接口电路303实现集成专用芯片30与高压管理芯片10之间的通信，菊花链串行外设接口电路可以起到通信隔离的作用，减少信号串扰，提高通信稳定性。
如图2所示，集成专用芯片30还包括第二标准串行外设接口电路304，第二标准串行外设接口电路304的一端与第二菊花链串行外设接口电路303电连接，另一端与处理器芯片40电连接。
即，通过集成专用芯片30的第二菊花链串行外设接口电路303和第二标准串行外设接口电路304实现处理器芯片40与高压管理芯片20之间的数据隔离通信。
具体地，第二标准串行外设接口电路304用于从处理器芯片40接收数据，并且将从处理器芯片40接收的数据以标准串行数据例如“1”“0”传输至第二菊花链串行外设接口电路303，第二菊花链串行外设接口电路303用于将标准串行数据转换为对应差分数据，并将对应差分数据发送至高压管理芯片20；第二菊花链串行外设接口电路303还用于从高压管理芯片20接收数据，并将从高压管理芯片20接收的数据以对应差分数据发送至第二标准串行外设接口电路304，第二标准串行外设接口电路304将差分数据转换为对应标准串行数据，并且将对应标准串行数据发送给处理器芯片40。从而，通过集成专用芯片30实现高压管理芯片20与处理器芯片40之间的隔离通信。
此外，如图2所示，集成专用芯片30还包括第一模拟输入接口电路305，第一模拟输入接口电路305的一端与外部传感器电连接，第一模拟输入接口电路305的另一端与第一数字逻辑电路34电连接，用于采集外部传感器的传感器信息。例如外部传感器可以包括电压传感器、电流传感器等，通过该第一模拟输入接口电路305可以接收电路信号、电压信号等模拟检测信号。
集成专用芯片30还包括第一通用输入/输出接口电路306，第一通用输入/输出接口电路306的一端与外围电路例如LED回路等连接，第一通用输入/输出接口电路306的另一端与第一数字逻辑电路34连接，用于输出第一数字逻辑电路34对外围电路的控制信息或者采集外围电路的状态信息。
集成专用芯片30还包括第一I2C总线接口电路、第一通用异步收发器接口电路、第一控制器局域网总线接口电路中的至少一种接口电路，该至少一种接口电路用于集成专用芯片30的菊花链串行外设接口电路与处理器芯片40之间的电连接，或者，该至少一种接口电路用于集成专用芯片30与外部控制系统之间的通信，利于系统拓展。
由上，概括来说，本申请实施例的集成专用芯片30不仅集成了宽电压输入、多端口、多供电电源输出功能，还可以为周边系统提供所需的稳定供电；同时还集成了多种接口电路，不仅可以与其他系统的控制系统进行数据交互，还可以针对不同的接口数据格式进行转换，为较低智能化的系统提供所需的接口数据，为集成专用芯片30的功能拓展提供支持；并且，集成专用芯片30可以针对供电系统例如包括电池管理系统100内部用电和外部用电组织成一定的供电网络，以实现多方监控，提高整个电池管理系统100的一致性和可靠性。其中，可通过其供电电路31所连的电源输出端口32，为非电池所直连的系统提供线性稳定的供电电源；同时还可以通过高边驱动和低边驱动实现可控的接触器输出以控制外部用电单元的供电。
下面对本申请实施例的高压管理芯片20的内部结构进行说明。
图5是根据本申请的一个实施例的高压管理芯片20内部结构的示意图，如图5所示，高压管理芯片20包括信号输入端口21和第一检测电路22。
信号输入端口21用于输入电池包的状态参数信息。第一检测电路22通过该信号输入端口21与电池包的电源线连接，用于检测电池包的状态参数信息例如电压信号、电流信号等，以实现对电池包的状态参数信息的检测，进而高压管理芯片20可以基于该检测信息进行电池状态的估算等，并且还可以通过集成专用芯片30发送给处理器芯片40，处理器芯片 40基于该类信息来进行管理和任务调度等。
高压管理芯片20包括外围差分检测电路23，外围差分检测电路23的一端与电池包的电源线连接，外围差分检测电路23的另一端与高压管理芯片20的信号输入端口21连接，第一检测电路22通过外围差分检测电路23检测电池包的状态参数信息。
具体地，外围差分检测电路23可以检测电池包的状态参数信息例如电压差分信号、电流差分信号等，并将该检测的电池包的状态参数信息通过信号输入端口21发送给高压管理芯片20内的第一检测电路22，以实现第一检测电路22检测电池包的状态参数信息。
如图5所示，第一检测电路22包括第一电压检测电路221，第一电压检测电路221与信号输入端口21连接，用于检测电池包的电压信息。
在实施例中，第一电压检测电路22可以为AD电路，外围差分检测电路23检测电池包的电压信息，并通过信号输入端口21将该电压信息发送至高压管理芯片20内的第一电压检测电路221，第一电压检测电路221获得该电压信号，并将该电压信息进行转换。
如图5所示，第一检测电路22包括第一电流检测电路222，第一电流检测电路222与信号输入端口21连接，用于检测电池包的电流信息。
具体地，第一电流检测电路222可以为AD电路，外围差分检测电路23检测电池包的电流信号，并通过信号输入端口21将该电流信息发送至高压管理芯片20内的第一电流检测电路222，第一电流检测电路222获得该电流信息，并将该电流信息进行转换。
在实施例中，处理器芯片40根据单体电池和/或电池包的状态参数信息管理电池管理系统包括：处理器芯片40根据电池包的电压信息和电流信息估算电池包的荷电状态值和/或健康状态值。
具体地，高压管理芯片20的第一电压检测电路221和第一电流检测电路222分别获得电池包的电压信息和电流信息，并通过集成专用芯片30发送给处理器芯片40，处理器芯片40根据电池包的电压信息和电流信息基于SOC算法来估算荷电状态值和/或健康状态值，进一步地，处理器芯片40可以基于电池包的荷电状态进行供电信息的调度以及各个用电单元的工作状态的调整等。
在本申请的实施例中，高压管理芯片20可以具备数据处理能力，例如可以基于电池包的状态参数信息进行相应的估算，可以分担处理器芯片40的数据处理任务，降低处理器芯片40的数据处理负担，提高处理器芯片40数据处理效率。
如图5所示，高压管理芯片20包括数据处理电路24，数据处理电路24与第一电压检测电路221和第一电流检测电路222分别连接，用于根据电池包的电压信息和电流信息估算电池包的荷电状态值和/或健康状态值。
在实施例中，数据处理电路24可以为数字逻辑电路，但是该数字逻辑电路具备数据处理能力，即数据处理能力相较于简单数字逻辑电路来说，数据处理能力更加强大，例如可以估算电池包的荷电状态和/或健康状态等，从而可以分担处理器芯片40的计算任务，提高数据处理效率，并且还可以基于数据处理结果进行相应的功能保护或故障处理等。
在实施例中，处理器芯片40可以根据单体电池和/或电池包的状态参数信息估算电池包的荷电状态值。具体地，基于不同的荷电状态值估算算法，例如包括基于单体电池的状态参数的荷电状态估算方法、基于电池包的状态参数的荷电状态估算方法，处理器芯片40可以根据单体电池的状态参数信息估算电池包的荷电状态值，或者，处理器芯片40可以根据电池包的状态参数信息估算电池包的荷电状态值，或者，处理器芯片40综合电池单体和电池包的状态参数信息估算电池包的荷电状态值。
进一步地，处理器芯片40可以通过集成专用芯片30获取高压管理芯片20估算的电池包的荷电状态值，根据自身估算的电池包的荷电状态值与高压管理芯片20估算的电池包的荷电状态进行电池状态校验，例如两者一致，则电池状态正常，反之，若两者存在偏差且超出偏差容忍范围，则认为电池包存在异常，从而可以实现相互校验。
在一些实施例中，如图5所示，第一检测电路22包括绝缘阻值检测电路223，绝缘阻值检测电路223与信号输入端口21连接，绝缘阻值检测电路223用于检测电池包的电源线与车身绝缘地之间的阻值。数据处理电路24还用于根据该阻值判断电池包的漏电状态，在存在漏电时可以进行报警，以及时处理。
具体地，绝缘阻值检测电路223可以为AD电路，可以通过外围绝缘阻值检测电桥来检测绝缘阻值，绝缘阻值检测电路223通过信号输入端口21获得该阻值，并发送给数据处理电路24，数据处理电路24可以计算出电池包当前所具备的绝缘阻抗，并进行存储。从而，可以提高安全性。
在实施例中，高压管理芯片20还包括第一安全诊断电路25，第一安全诊断电路25与第一检测电路22连接，用于识别电池包的状态参数信息是否异常，并在电池包的状态参数信息异常时进行安全保护，例如切断电池包的供电回路等。
具体地，第一安全诊断电路25包括第一电流诊断电路251，第一电流诊断电路251与第一电流检测电路222连接，用于根据电池包的电流信息识别电池包是否存在过流，并在电池包存在过流时进行过流保护。
具体地，第一电流检测电路222通过信号输入端口21接收到电池包的电流信息，将该电流信息发送给第一电流诊断电路251，第一电流诊断电路251识别该电流信息的电流值是否超过过流阈值，若超过则确定电池包存在过流，则可以地监控回路进行断路保护等，还可以反馈过流保护的触发信号给处理器芯片40，以进一步进行过流保护处理。
即，信号输入端口21、第一电流检测电路222、第一电流诊断电路251和处理器芯片40构成电流检测和保护回路，该回路针对电池组两端的差分电流进行检测，并将差分电流值转换成数值进行存储并进行相关计算，检测过程中针对输入电流信号持续进行过流保护，并对电流监控回路执行开路和短路等相关保护措施。
第一安全诊断电路25包括第一电压诊断电路252，第一电压诊断电路252与第一电压检测电路221连接，用于根据电池包的电压信息识别电池包是否存在过压或者欠压，并在电池包存在过压或者欠压时进行过压或欠压保护。
具体地，第一电压检测电路221通过信号输入端口21接收到电池包的电压信息，将该电压信息发送给第一电压诊断电路252，第一电压诊断电路252识别该电压信息的电压值是否超过过压阈值或者低于欠压阈值，若超过过压阈值则确定电池包存在过压，或者，电压值低于欠压阈值则确定电池包存在欠压，则可以对监控回路进行断路保护等，还可以反馈过压或欠压保护的触发信号给处理器芯片40，以进一步进行过压或欠压保护处理。
即，信号输入端口21、第一电压检测电路222、第一电压诊断电路252和处理模芯片40构成高压检测和保护回路，该回路针对电池组两端的差分电压进行检测，并将差分电压值转换成数值并进行存储，在检测过程中针对输入信号持续进行过欠压保护，并可对监控回路执行开路和短路等相关保护措施。
如图5所示，高压管理芯片20包括第二通用输入/输出接口电路26，第二通用输入/输出接口电路26与外部传感器或外部负载连接，用于采集外部传感器信息或者输出控制信号给外部负载。例如外部传感器可以包括温度传感器，用于检测高压管理芯片20的温度信息。高压管理芯片20也可以通过第二通用输入/输出接口电路26连接外部负载以实现对外部负载的控制等。
在实施例中，高压管理芯片20还包括第一温度检测电路27和第一温度诊断电路28。
第一温度检测电路27通过第二通用输出/输出接口电路26与外部温度传感器连接，以检测高压管理芯片20的温度信息。第一温度诊断电路28与第一温度检测电路27连接，用于根据高压管理芯片20的温度信息识别高压管理芯片20是否存在过温，并在高压管理芯片20存在过温时进行过温保护。
具体地，第一温度检测电路27可以通过第二通用输入/输出接口26接收温度检测信号，即，第二通用输入/输出接口26、第一温度检测电路27、第一温度诊断电路28和处理器芯片40构成温度检测和保护回路，该回路针对高压管理芯片20的电流检测回路进行温度检测，并将温敏电压值转换成数值并进行存储，并通过温敏参数对电流采集回路进行一定的补偿和保护措施，如持续进行热开关等保护，同时对温敏监控回路执行开路和短路等相关保护措施。
在实施例中，处理器芯片40还用于通过集成专用芯片30获取高压管理芯片20的检测信息、计算结果信息、安全诊断信息和安全报警信息中的至少一种。例如，处理器芯片40可以获取高压管理芯片20检测的电池包的电压信息、电流信息等，可以获取高压管理芯片20估算的电池包的SOC值以进行相互校验，以及，还可以获取高压管理芯片20的过压、过流、欠压、过温等的安全诊断信息，以及还可以在高压管理芯片20诊断电池包存在安全异常时反馈安全报警信息给处理器芯片40，处理器芯片40可以基于诊断结果而定保护措施，例如可以包括停止相关检测步骤、停止相关计算步骤以进一步检测诊断例如开路检测或短路检测、向上一级控制系统报警等。
简单来说，本申请实施例的高压管理芯片20，可对电池组两端的差分电压和电流进行检测，检测电池组的隔离阻值和周围的温敏数值，同时还具备计算和功能安全保护和安全措施等。
如图5所示，高压管理芯片20还包括第三菊花链串行外设接口电路201，如图1和图2所示，高压管理芯片20通过第三菊花链串行外设接口电路201与集成专用芯片30的第二菊花链串行外设接口电路303连接，通过第三菊花链串行外设接口电路201和第二菊花链串行外设接口电路303实现集成专用芯片30与高压管理芯片20之间的通信，菊花链串行外设接口电路可以起到通信隔离的作用，减少信号串扰，提高通信稳定性。
高压管理芯片20包括第二标准串行外设接口电路和第二I2C总线接口电路中的至少一种，第二标准串行外设接口电路和第二I2C总线接口电路中的至少一种可以用于高压管理芯片20与处理器芯片40之间的连接，而本申请中高压管理芯片20通过集成专用芯片30与处理器芯片40连接，仍然可以保留该第二标准串行外设接口电路和第二I2C总线接口电路，以作为备用接口电路。
高压管理芯片20包括第二控制器局域网总线接口电路202，第二控制器局域网总线接口电路202用于与外部通信总线连接以获取外部总线信息，可以实现高压管理芯片20与外部通信总线的数据交互。
具体地，处理器芯片40桥接集成专用芯片30并通过菊花链串行外设接口电路与高压管理芯片20进行连接。通过该连接，处理器芯片40参与到高压管理芯片20的管理工作中，不仅可以配置相关参数(操作行为、运行模式、接口参数、时间参数)，还可以通过读取高压管理芯片20采集的差分数据和计算数据以分析高压信号的状态，此外通过读取寄存的相关数据和功能安全检测数据以分析高压管理芯片20的运行状态。此外，处理器芯片40通过分析接口，可以进一步配置相关参数，以实现更加智能化管理所监管的芯片系统。
下面对本申请实施例的模拟前端芯片10的内部结构进行说明。
图6是根据本申请的一个实施例的模拟前端芯片10内部结构的示意图，如图6所示，模拟前端芯片10包括第二检测电路11，第二检测电路11与电池组连接，用于检测电池组中单体电池的状态参数信息例如电流值、电压值、压力、温度等，以用于模拟前端芯片10的安全诊断和监控，以及也可以通过集成专用芯片30发送给处理器芯片40，以供处理器芯片40对电池管理系统100尽心管理。
如图6所示，模拟前端芯片10还包括模拟输入接口电路12，第二检测电路11通过模拟输入接口电路12与外部检测电路连接，以检测电池组中单体电池的状态参数信息。
具体地，第二检测电路11可以为AD电路，通过外部检测电路检测电池组中单体电池的状态参数信息例如电压、电流、应力等，并通过模拟输入接口电路12将检测的状态参数信息的模拟值发送给第二检测电路11，第二检测电路11将单体电池的状态参数信息的模拟值进行转换并存储。
模拟前端芯片10还包括第三通用输入/输出接口电路13，第三通用输入/输出接口电路13与外部传感器连接，第二检测电路11通过该第三通用输入/输出接口电路13与外部传感器连接，以检测电池组中单体电池的状态参数信息例如温度信息。
如图6所示，第二检测电路11包括第二电压检测电路111，第二电压检测电路111用于采集电池组中单体电池的电压信息。例如，第二电压检测电路111可以为AD电路，外部电压检测电路检测单体电池的电压值，并通过模拟输入接口电路12将该电压值传输给第二电压检测电路111，第二电压检测电路111将该模拟电压值进行转换，以实现电压检测。
第二检测电路11还包括第二电流检测电路112，第二电流检测电路112用于采集电池组中单体电池的电流信息。例如，第二电流检测电路112可以为AD电路，外部电流检测电路检测单体电池的电流值，并通过模拟输入接口电路12将该电流值传输给第二电流检测电路112，第二电流检测电路112将该模拟电流值进行转换，以实现电流检测。
第二检测电路11还包括应力检测电路113，压力检测电路113用于检测电池组中单体电池内的应力信息。例如，应力检测电路113可以为AD电路，外部应力检测电路检测单体电池内的应力值，并通过模拟输入接口电路12将该应力值传输给应力检测电路113，应力检测电路113将该模拟应力值进行转换，以实现应力检测。
第二检测电路11还可以包括第二温度检测电路114，第二温度检测电路114用于检测电池组中单体电池的温度信息。例如，第二温度检测电路114可以为AD电路，外部传感器检测温度信息，并通过第三通用输入/输出接口电路13传输给第二温度检测电路114。
如图6所示，模拟前端芯片10还包括第二安全诊断电路14，第二安全诊断电路14与第二检测电路11连接，用于识别电池组中单体电池的状态参数信息是否异常，并在单体电池的状态参数信息存在异常时进行安全保护。
模拟前端芯片10还包括第二数字逻辑电路15，第二数字逻辑电路15与第二安全诊断电路14连接，用于在电池组中的单体电池的状态参数信息存在异常时生成异常信息，以进行报警提示。
第二安全诊断电路14包括第二电压诊断电路141，第二电压诊断电路141与第二电压检测电路111连接，用于是识别电池组中单体电池的电压是否过压/欠压，在单体电池的电压过压或欠压时进行过压或欠压保护。
在一些实施例中，第二电压诊断电路141还用于识别电池组的电压是否异常以及识别模拟前端芯片10内部器件的电压是否异常，并在存在异常时进行电压安全保护。
具体地，模拟输入接口电路12、第二电压检测电路111、第二电压诊断电路141和第二数字逻辑电路15构成电压检测和保护回路，该回路针对所连单体电池组或单体电池两端的执行电压进行检测，并将单体电池正负极两端电压值转换成数值并进行存储，且在检测过程中针对输入信号持续进行过欠压保护，并可对监控回路执行开路和短路，回路器件和器件参数实施等相关监控保护措施。
第二安全诊断电路14还包括第二电流诊断电路142，第二电流诊断电路142与第二电流检测电路112连接，用于识别电池组中单体电池的电流是否存在过流，并在单体电池的电流存在过流时进行过流保护。
在实施例中，第二电流检测电路112还用于检测电池组的电流和模拟前端芯片10内部器件的电流；第二电流诊断电路142还用于诊断电池组的电流是否异常以及识别模拟前端芯片10内部器件的电流是否异常，并在存在电流异常时进行电流异常安全保护。
具体地，模拟输入接口电路12、第二电流检测电路112、第二电流诊断电路142和第二数字逻辑单元15构成电流检测和保护回路，该回路针对电池组两端的电流进行检测，并将电流值转换成数值并进行存储，检测过程中针对输入电流信号持续进行过流保护，并对电流监控回路执行开路、短路和过温等保护措施，且对回路器件和器件参数实施等相关监控保护措施。
第二安全诊断电路14还包括应力诊断电路143，应力诊断电路143用于识别电池组中单体电池内的应力是否异常，并在应力异常时进行应力异常安全保护。
具体地，模拟输入接口电路12、应力检测电路113、应力诊断电路143和第二数字逻辑单元15构成电流检测和保护回路，该回路针对单体电池内外的应力进行检测，并将应力值转换成数值并进行存储，检测过程中针对输入应力信号持续进行阈值限制，并对应力监控回路执行开路、短路和过温等保护措施，且对回路器件和器件参数实施等相关监控保护措施。
第二安全诊断电路14还包括第二温度诊断电路144，第二温度诊断电路144与第二温度检测电路114连接，用于识别电池组中单体电池的温度是否过温，并在单体电池的温度过温时进行过温安全保护。
具体地，通用第三通常输入/输出接口电路13、第二温度检测电路114、第二温度诊断电路144和第二数字逻辑单元15构成温度检测和保护回路，该回路针对当前模拟前端所连电池外部的温度变化进行检测，将上述温敏电压值转换成数值并进行存储，检测过程中针对检测出的温敏信号持续进行过温、低温和热开关等保护，并对温敏监控回路执行开路和短路，回路器件和器件参数实施等相关监控保护措施。
简言之，本申请实施例的模拟前端芯片10设置了多重安全保护功能，例如包括但不限于过压/欠压保护、过温保护、低温保护、应力保护、开路或短路保护等。
在实施例中，处理器芯片40还可以通过集成专用芯片30获取模拟前端芯片10的检测信息、安全诊断信息、安全报警信息和计算结果信息中的至少一种，以基于获取的模拟前端芯片10的信息来进行任务调度和管理，处理器芯片40还可以控制模拟前端芯片10状态的转换，以及决定其采集和通信模式等。
其中，在实施例中，处理器芯片40在管理电池管理系统100时具体可以用于：根据单体电池和电池包的状态参数信息确定电池状态，根据电池状态判断是否对电池包继续充电或放电以及判断是否对电池包停止充电或放电。例如根据电池包的荷电状态值确定是否充电或放电或者是否停止充电等。
在一些实施例中，如图6所示，高压管理芯片20还包括均衡电路16。
处理器芯片40用于根据单体电池和电池包的状态参数信息管理管理电池管理系统100包括：处理器芯片40用于根据电池组中单体电池的状态参数信息确定电池组中单体电池的电量不均衡时，生成电量均衡信息，并将电量均衡信息通过集成专用芯片30转发给前端模拟芯片10。模拟前端芯片10的均衡电路16用于根据电量均衡信息对电池组中单体电池进行电量均衡处理，从而提高单体电池的供电均衡，提高电池单体的利用率，提高电池包的使用寿命。
具体地，为了防止模拟前端芯片10所连的电池组存在电池组内部单体电池之间容量不一致，或存在与其它电池组中电池之间的容量不一致的情况时，模拟前端芯片10可以启动均衡功能，并对电池组中容量偏高的电池实施电量释放。
进一步地，在实施例中，电池包可以包括多个电池组，每个电池组对应连接模拟前端芯片10，如图1所示，模拟前端芯片10为多个，多个模拟前端芯片10串联连接。每个模拟前端芯片10用于检测对应连接的电池组中单体电池的状态参数信息。
在一些实施例中，多个模拟前端芯片10可以以菊花链的形式进行连接。如图1所示，集成专用芯片30与模拟前端芯片10连接的第一菊花链串行外设接口电路301为两个。
并且，每个模拟前端芯片10包括至少两个菊花链串行外设接口电路，例如，每个模拟前端芯片10均包括第四菊花链串行外设接口电路101和第五菊花链串行外设接口电路102。串联连接的多个模拟前端芯片10中，首端模拟前端芯片10通过第四菊花链串行外设接口电路101与集成专用芯片30的一个第一菊花链串行外设接口电路301连接，末端模拟前端芯片10通过第五菊花链串行外设接口电路102与集成专用芯片30的另一个第一菊花链串行外设接口电路301连接， 从而实现各个模拟前端芯片10与集成专用芯片30的通信。
进一步地，如图1所示，在串联连接的多个模拟前端芯片10中，第n个模拟前端芯片10通过第五菊花链串行外设接口电路102与第(n+1)个模拟前端芯片10的第四菊花链串行外设接口电路101连接，其中，1≤n<n+1≤N，N为串联连接的多个模拟前端芯片10的总数量。
在一些实施例中，如图6所示，模拟前端芯片10包括第三标准串行外设接口电路和第三I2C总线接口电路中的至少一个接口电路，第三标准串行外设接口电路和第三I2C总线接口电路中的至少一个接口电路为备用接口电路。在模拟前端芯片10不通过集成专用芯片30连接处理器芯片40时，可以通过该备用接口电路实现模拟前端芯片10与处理器芯片40之间的通信连接，或者，模拟前端芯片10可以通过该备用接口电路与其它控制系统或监测系统进行连接，在此不作具体限制。
简单来说，本申请实施例的模拟前端芯片10，可以连接单个单体电池亦可连接多个单体电池级联的电池组，模拟前端芯片10可以针对电流、电压、应力和温度等电池参数进行采集，具备相关功能安全保护，同时还可以根据上述参数进行SoC和SoH等计算。
具体地，处理器芯片40桥接集成专用芯片30，通过菊花链串行外设接口电路可以与模拟前端芯片10进行连接。通过该连接，处理器芯片40可以参与模拟前端芯片10的管理工作中，不仅可以配置相关参数(操作行为、运行模式、接口参数、时间参数)，还可以通过读取模拟前端芯片10采集的数据和计算数据分析所采集的电池相关运行状态，处理器芯片40根据分析结果，进一步对相关芯片和相关电池执行均衡操作。此外通过读取寄存的相关数据和功能安全检测数据，分析模拟前端芯片10的运行状态，有助于进一步配置相关参数。
基于上面实施例的说明，图7是根据本申请的一个实施例的电池管理系统100各个芯片之间信号交互的流程图，如图7所示，包括：
S10，集成专用芯片连接蓄电池获得启动电源，在启动之后并向外部产生稳定电源。
S11，处理器芯片从集成专用芯片处获得供电电源并启动。
S12，处理器芯片通过桥接集成专用芯片，扫描其协议接口上挂接的设备。
S13，处理器芯片检测到菊花链串行外设接口处的模拟前端芯片和高压管理芯片，处理器芯片根据需求发送配置芯片的相关参数指令和电池参数采集执行指令。
S14，模拟前端芯片和高压管理芯片收到指令之后，先对接收到的指令数据进行校验，若正常，则修改内部参数，并开始数据采集工作；若存在异常，向处理器芯片报错。
S15，数据采集结束之后，集成专用芯片将处理器芯片所需的采集数据、计算数据、运行环境状态数据和安全数据通过菊花链串行外设接口电路发送给相应接口。
S16，集成专用芯片接收到上述数据之后，先对数据进行校验，若数据正确，则将其转换为与处理器芯片桥接接口协议数据格式，并发送给处理器芯片；若数据存在异常，要求相关芯片重新发送。
S17，处理器芯片接收到来自模拟前端芯片和高压管理芯片的电池相关参数之后，执行相关计算例如SOC、SOH或者SOP计算，获得较高精度的数值，检查上述专用芯片的运行环境，并判断是否存在异常；检查上述专用芯片的功能安全状况，诊断是否存在失效情况。
S18，处理器芯片根据计算结果，产生相关调整需求如均衡，以及根据检测和结果，产生相关的进一步诊断和安全措施执行需求。并将上述需求通过集成专用芯片发送至模拟前端芯片和高压管理芯片，同时处理器芯片还可以向上一级处理系统更新电池运行情况。
总的来说，本申请实施例的电池管理系统100，基于模拟前端芯片10、高压管理芯片20、集成专用芯片30和处理器芯片40的架构，减少了独立元器件的数量，降低成本、减少布线，降低了系统设计复杂度。并且，高压管理芯片20针对本身采集的信号可以进行相关计算，而处理器芯片40只需要调度高压管理芯片20的计算结果，再根据系统数据做进一步完善，提高了处理器芯片40获取数据的效率和数据处理的效率，从而使得电池管理系统100更加稳定可靠。并且，集成专用芯片30向处理器芯片40、高压管理芯片20和其他拓展设备提供不同需求的供电电源，不仅提高了系统对拓展设备的电源控制，且区别于传统系统中由分立器件单独供电，还降低系统电路的复杂度，提高了驱动电源的一致性。此外，本申请实施例中，各个芯片都具备完整的功能安全措施，不仅可以检测诊断周围及自身的故障，同时受到处理器芯片40系统性的安全监控，保证本申请系统的高级别的车辆安全完整度，降低系统故障率。
基于上面实施例的电池管理系统100，本申请第二方面实施例提出一种电池2，如图10所示。
电池2包括电池包200，电池包200包括多个电池组，每个电池组包括至少一个单体电池。其中，电池包200与上面实施例的电池管理系统100连接，并且每个电池组也与电池管理系统100连接。
根据本申请实施例的电池2，通过连接上面实施例的电池管理系统100，该电池管理系统100结构紧凑、设计简单，系统安全可靠性高，从而提高了电池使用安全。
基于上面实施例的电池管理系统100，本申请第三方面实施例还提出一种车辆1。
图8是根据本申请一个实施例的车辆1的框图，如图8所示，本申请实施例的车辆1包括电池包200和上面实施例的电池管理系统100，电池管理系统100与电池包200连接。
其中，在一些实施例中，电池包200可以包括多个电池组，每个电池组包括至少一个单体电池。
根据本申请实施例的车辆1，通过采用上面实施例的电池管理系统100，运行效率高、安全可靠性高、应用场景多，提高了车辆电池管理效率和安全。
基于上面实施例的电池管理系统100，本申请第四方面实施例还提出一种电池管理方法。
图9为根据本申请一个实施例的电池管理方法的流程图，如图9所示，包括：
S100，高压管理芯片检测电池包的状态参数信息，以及模拟前端芯片检测电池组中单体电池的状态参数信息，电池包包括多个电池组，电池组包括至少一个单体电池。
S200，集成专用芯片将电池包的状态参数信息和电池组中单体电池的状态参数信息转发给处理器芯片。
S300，处理器芯片根据单体电池的状态参数信息和电池包的状态参数信息管理电池管理系统。
根据本申请实施例的电池管理方法，通过集成专用芯片来实现模拟前端芯片和高压管理芯片与处理器芯片之间的数据交互，从而可以节省处理器芯片的接口资源，减少处理器芯片的接口负载，提高其数据处理效率，提高系统的安全可靠性。
在实施例中，处理器芯片对电池管理系统进行管理可以包括但不限于通过监测数据获取电池状态，判断是否进行充放电以及何时停止充放电，以及，处理器芯片可以基于电池包的状态参数信息和/或单体电池的状态参数信息估算电池包的荷电状态值，还可以与其它估算模块进行相互检验，以及，处理器芯片还可以进行功能安全相关的监控和管控等，以及处理器芯片还可以对各个芯片进行参数配置以及基于监测数据进行任务调度和对各个芯片的工作状态进行调整等。
在一些实施例中，处理器芯片根据单体电池的状态参数信息和电池包的状态参数信息管理电池管理系统，包括：处理器芯片根据电池包的电压信息和电流信息估算电池包的荷电状态值和/或健康状态值，以实现对电池包的状态的监控和管理。其中，估算算法可以参照相关技术描述。
进一步地，处理器芯片可以根据电池包的荷电状态判断是否对电池包进行充电或者放电以及判断是否停止对电池包充电或放电。
在一些实施例中，处理器芯片根据单体电池的状态参数信息和电池包的状态参数信息管理电池管理系统，包括：处理器芯片根据电池组中单体电池的状态参数信息确定电池组中单体电池的电量不均衡，生成电量均衡信息，并将电量均衡信息通过集成专用芯片转发给前端模拟芯片，进而模拟前端芯片的均衡电路可以对电池组内单体电池之间的电量进行均衡处理。
在一些实施例中，处理器芯片还可以基于监测数据对电池管理系统内部用电芯片的供电和外部用电单元的通断进行管理和控制。
例如，处理器芯片根据电池管理系统内部用电芯片的供电需求生成供电配置信息并发送给集成专用芯片，以管理电池管理系统对内部用电芯片提供工作电源。
集成专用芯片可以根据供电配置信息控制集成专用芯片的供电电路向电池管理系统内部用电芯片中的至少一个芯片提供工作电源，从而实现对内部供电的管控。
再例如，处理器芯片根据外部用电单元的用电需求生成电源开关通道选择控制信号，并将电源开关通道选择控制信号发送给集成专用芯片，以管理电池管理系统对于外部用电单元的供电通断。
集成专用芯片根据电源开关通道选择控制信号控制供电电路所连接的外部用电单元与供电电源侧的通断或者控制外部用电单元与供电地侧的通断。从而实现对于外部用电单元供电的管理。
在本申请的一些实施例中，处理器芯片发送集成专用芯片的配置信息给集成专用芯片，并获取集成专用芯片的接口电路传递信息，以及处理器芯片获取集成专用芯片的安全监控信息、安全报警信息和运行状态信息中的至少一种信息。
从而，处理器芯片可以参与到集成专用芯片的管理工作中，不仅可以配置相关参数(操作行为、运行模式、接口参数、时间参数)，还可以通过集成专用芯片实现与其它芯片之间的数据交互，节省处理器芯片的接口资源，提高处理器芯片处理数据的效率。
在一些实施例中，处理器芯片通过集成专用芯片将高压管理芯片的配置信息发送给高压管理系统，并通过集成专用信息获取高压管理系统的检测信息，以及处理器芯片通过集成专用信息获取高压管理芯片的计算结果信息、安全诊断信息和安全报警信息中的至少一种。
例如，处理器芯片可以获取高压管理芯片检测的电池包的电压信息、电流信息等，可以获取高压管理芯片估算的电池包的SOC值以进行相互校验，以及，还可以获取高压管理芯片的过压、过流、欠压、过温等的安全诊断信息，以及还可以在高压管理芯片诊断电池包存在安全异常时反馈安全报警信息给处理器芯片，处理器芯片可以基于诊断结果而定保护措施，例如可以包括停止相关检测步骤、停止相关计算步骤、进一步检测诊断例如开路检测或短路检测、向上一级控制系统报警等。
从而，通过集成专用芯片，处理器芯片可以参与到高压管理芯片的管理工作中，不仅可以配置相关参数(操作行为、运行模式、接口参数、时间参数)，还可以通过读取高压管理芯片采集的差分数据和计算数据分析高压信号的状态，此外通过读取寄存的相关数据和功能安全检测数据分析高压管理芯片的运行状态。此外，处理器芯片通过分析接口可以进一步配置相关参数，以实现更加智能化管理所监管的芯片系统。
在一些实施例中，处理器芯片通过集成专用芯片将模拟前端芯片的配置信息发送给模拟前端芯片，并通过集成专用芯片获取模拟前端芯片的检测信息，以及处理器芯片通过集成专用芯片获取模拟前端芯片的安全诊断信息、安全报警信息和计算结果信息中的至少一种。
从而，通过集成专用芯片，处理器芯片可以参与模拟前端芯片的管理工作中，不仅可以配置相关参数(操作行为、运行模式、接口参数、时间参数)，还可以通过读取模拟前端芯片采集的数据和计算数据分析所采集的电池相关运行状态，处理器芯片40根据分析结果，进一步对相关芯片和相关电池执行均衡操作。此外通过读取寄存的相关数据和功能安全检测数据分析模拟前端芯片的运行状态，有助于进一步配置相关参数。
在本申请的一些实施例中，高压管理芯片自身可以具备数据处理能力，例如，高压管理芯片根据电池包的电压信息和电流信息估算电池包的荷电状态值和/或健康状态值，从而可以分担处理器芯片的数据处理任务，便于提高处理器芯片的数据处理效率。
进一步地，处理器芯片可以通过集成专用芯片获取高压管理芯片估算的电池包的荷电状态值，并根据自身估算的电池包的荷电状态值和高压管理芯片估算的电池包的荷电状态值验证电池包的状态。从而实现相互验证，提高估算的准确性。
在一些实施例中，电池包的状态参数信息包括电池包的电源线与车身绝缘地之间的阻值，电池管理方法还包括：高压管理芯片根据阻值判断电池包的漏电状态，在存在漏电时可以产生漏电警报信息，并通过集成专用芯片转发给处理器芯片，进而可以进行漏电警报和相关保护措施。
在一些实施例中，高压管理芯片识别电池包的状态参数信息是否异常，并在电池包的状态参数信息异常时进行安全保护。例如，可以包括以下至少一项：
高压管理芯片根据电池包的电流信息识别电池包是否存在过流，并在电池包存在过流时进行过流保护。
高压管理芯片根据电池包的电压信息识别电池包是否存在过压或者欠压，并在电池包存在过压或者欠压时进行过压或欠压保护。
在一些实施例中，高压管理芯片获取高压管理芯片自身的温度信息，高压管理芯片根据高压管理芯片自身的温度信息识别高压管理芯片是否存在过温，并在高压管理芯片存在过温时进行过温保护。
同样地，在一些实施例中，模拟前端芯片识别单体电池的状态参数信息是否异常，并在单体电池的状态参数存在异常时进行安全保护。例如，包括以下至少一项：模拟前端芯片识别电池组中单体电池的电压是否过压/欠压，在单体电池的电压过压或欠压时进行过压或欠压保护。模拟前端芯片识别单体电池的电流是否存在过流，并在单体电池的电流存在过流时进行过流保护。模拟前端芯片识别电池组中单体电池内的压力是否异常，并在压力异常时进行安全保护。模拟前端芯片识别电池组中的单体电池的温度是否过温，并在单体电池的温度过温时进行过温安全保护。
在另一些实施例中，电池管理方法还包括以下至少一项：模拟前端芯片识别电池组的电压是否异常以及识别模拟前端芯片内部器件的电压是否异常，并在存在异常时进行电压安全保护；模拟前端芯片诊断电池组的电流是否异常以及识别模拟前端芯片内部器件的电流是否异常，并在存在电流异常时进行电流保护。
概括来说，本申请实施例的电池管理方法，基于模拟前端芯片、高压管理芯片、集成专用芯片和处理器芯片的架构，降低了系统设计复杂度，提高了数据传输效率，数据传输路径更加一致，提高系统的稳定可靠性。并且，高压管理芯片针对本身采集的信号可以进行相关计算，而处理器芯片只需要调度高压管理芯片的计算结果，再根据系统数据做进一步完善，提高了数据的处理效率。并且，各个芯片都具备完整的功能安全措施，不仅可以检测诊断周围及自身的故障，同时受到处理器芯片系统性的安全监控，使电池管理更加完善，安全保护更加全面。从而，电池管理系统的应用场景更加广泛，尤其对于高效、稳定和安全性要求高的场景，本申请实施例的电池管理系统也适用。
在本说明书的描述中，参考术语“一个实施例”、“一些实施例”、“示意性实施例”、“示例”、“具体示例”、或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本申请的至少一个实施例或示例中。在本说明书中，对上述术语的示意性表述不一定指的是相同的实施例或示例。
尽管已经示出和描述了本申请的实施例，本领域的普通技术人员可以理解：在不脱离本申请的原理和宗旨的情况下可以对这些实施例进行多种变化、修改、替换和变型，本申请的范围由权利要求及其等同物限定。

Claims (83)

  1. 一种电池管理系统(100)，其特征在于，包括：
    模拟前端芯片(10)，所述模拟前端芯片(10)与电池组连接，用于检测所述电池组中单体电池的状态参数信息，所述电池组包括至少一个单体电池；
    高压管理芯片(20)，所述高压管理芯片(20)连接于电池包(200)的电源线，用于检测所述电池包(200)的状态参数信息，所述电池包(200)包括多个所述电池组；
    集成专用芯片(30)；以及
    处理器芯片(40)，所述处理器芯片(40)通过所述集成专用芯片(30)与所述模拟前端芯片(10)电连接，所述高压管理芯片(20)通过所述集成专用芯片(30)与所述处理器芯片(40)电连接，所述处理器芯片(40)用于根据所述单体电池和所述电池包(200)的状态参数信息管理所述电池管理系统(100)。
  2. 根据权利要求1所述的电池管理系统(100)，其特征在于，所述集成专用芯片(30)包括：
    供电电路(31)，所述供电电路(31)用于连接外部电源并向所述电池管理系统(100)中的至少一个芯片提供工作电源。
  3. 根据权利要求2所述的电池管理系统(100)，其特征在于，所述集成专用芯片(30)还包括：
    电源输入端口(32)和电源输出端口(33)，所述供电电路(31)通过所述电源输入端口(32)连接外部电源，所述供电电路(31)通过所述电源输出端口(33)连接所述处理器芯片(40)，以为所述处理器芯片(40)提供工作电源。
  4. 根据权利要求2或3所述的电池管理系统(100)，其特征在于，所述供电电路(31)通过所述电源输出端口(33)连接所述高压管理芯片(20)，以为所述高压管理芯片(20)提供工作电源。
  5. 根据权利要求4所述的电池管理系统(100)，其特征在于，所述供电电路(31)包括电压转换子电路(311)，所述电压转换子电路(311)的一端通过所述电源输入端口(32)与所述外部电路连接，所述电压转换子电路(311)的另一端与所述处理器芯片(40)、所述高压管理芯片(20)连接，用于为所述处理器芯片(40)和所述高压管理芯片(20)提供不同的工作电压。
  6. 根据权利要求2-5中任一项所述的电池管理系统(100)，其特征在于，
    所述处理器芯片(40)还用于根据所述电池管理系统(100)的内部用电芯片的供电需求生成供电配置信息并发送所述供电配置信息给所述集成专用芯片(30)，以管理所述电池管理系统(100)对所述内部用电芯片提供工作电源；
    所述集成专用芯片(30)还包括：
    第一数字逻辑电路(34)，所述第一数字逻辑电路(34)分别与所述处理器芯片(40)、所述供电电路(31)电连接，用于根据所述供电配置信息控制所述供电电路(31)为所述电池管理系统(100)内部用电芯片提供工作电源。
  7. 根据权利要求6所述的电池管理系统(100)，其特征在于，所述集成专用芯片(30)还包括：
    电源开关电路(35)，所述电源开关电路(35)的第一端与所述供电电路(31)连接，所述电源开关电路(35)的第二端适于与外部用电单元连接，所述电源开关电路(35)用于控制所述外部用电单元的供电状态的通断。
  8. 根据权利要求7所述的电池管理系统(100)，其特征在于，所述电源开关电路(35)包括：
    高边驱动子电路(351)，所述高边驱动子电路(351)的第一端与所述供电电路(31)的输出端连接，所述高边驱动子电路(351)的第二端适于与所述外部用电单元的供电回路的供电电源侧连接，所述高边驱动子电路(351)的第三端适于与所述外部用电单元的正极端连接，所述高边驱动子电路(351)用于控制所述外部用电单元与所述供电电源侧之间的通断。
  9. 根据权利要求8所述的电池管理系统(100)，其特征在于，所述电源开关电路(35)包括：
    低边驱动子电路(352)，所述低边驱动子电路(352)的第一端与所述供电电路(31)的输出端连接，所述低边驱动子电路(352)的第二端适于与所述外部用电单元的供电回路的供电地侧连接，所述低边驱动子电路(352)的第三端适于与所述外部用电单元的负极端连接，所述低边驱动子电路(352)用于控制所述外部用电单元与所述供电地侧之间的通断。
  10. 根据权利要求9所述的电池管理系统(100)，其特征在于，所述电源开关电路(35)还包括：
    使能开关子电路(353)，所述使能开关子电路(353)的一端分别与所述高边驱动子电路(351)和所述低边驱动子电路(352)连接，所述使能开关子电路(353)的另一端与所述供电电路(31)连接，用于控制所述高边驱动子电路(351)和所述低边驱动子电路(352)的通断。
  11. 根据权利要求10所述的电池管理系统(100)，其特征在于，
    所述处理器芯片(40)还用于根据所述外部用电单元的用电需求生成对于所述高边驱动子电路(351)和所述低边驱动子电路(352)的电源开关通道选择控制信号，并将所述电源开关通道选择控制信号发送给所述集成专用芯片(30)，以管理所述电池管理系统(100)对于所述外部用电单元的供电通断；以及
    所述第一数字逻辑电路(34)与所述使能开关子电路(353)电连接，用于根据所述电源开关通道选择控制信号控制所述使能开关子电路(353)。
  12. 根据权利要求3所述的电池管理系统(100)，其特征在于，所述集成专用芯片(30)还包括：
    输入源检测子电路(36)，所述输入源检测子电路(36)的一端通过所述电源输入端口(32)与所述外部电源连接，所述输入源检测子电路(36)的另一端与所述第一数字逻辑电路(34)连接，用于对所述外部电源进行检测，并将所述外部电源的电源检测信息传输至所述第一数字逻辑电路(34)。
  13. 根据权利要求2-12中任一项所述的电池管理系统(100)，其特征在于，所述集成专用芯片(30)包括：
    输入源隔离电路(37)，所述输入源隔离电路(37)与所述外部电源和所述供电电路(31)连接，所述供电 电路(31)通过所述输入源隔离电路(37)与所述外部电源连接。
  14. 根据权利要求1-13中任一项所述的电池管理系统(100)，其特征在于，所述集成专用芯片(30)包括：
    第一菊花链串行外设接口电路(301)，所述集成专用芯片(30)通过所述第一菊花链串行外设接口电路(301)与所述模拟前端芯片(10)电连接。
  15. 根据权利要求14所述的电池管理系统(100)，其特征在于，所述集成专用芯片(30)包括：
    第一标准串行外设接口电路(302)，所述第一标准串行外设接口电路(302)的一端与第一菊花链串行外设接口电路(301)电连接，所述第一标准串行外设接口电路(302)的另一端与所述处理器芯片(40)电连接。
  16. 根据权利要求15所述的电池管理系统(100)，其特征在于，
    所述第一标准串行外设接口电路(302)用于向所述处理器芯片(40)发送标准串行数据或者从所述处理器芯片(40)接收数据，并且将从所述处理器芯片(40)接收的数据以标准串行数据传输至所述第一菊花链串行外设接口电路(301)，所述第一菊花链串行外设接口电路(301)用于将所述标准串行数据转换为对应差分数据，并将所述对应差分数据发送至所述模拟前端芯片(10)；以及
    所述第一菊花链串行外设接口电路(301)还用于从所述模拟前端芯片(10)接收差分数据，并将从所述模拟前端芯片(10)接收的所述差分数据发送至所述第一标准串行外设接口电路(302)，所述第一标准串行外设接口电路(302)将所述差分数据转换为对应标准串行数据，并且将所述对应标准串行数据发送给所述处理器芯片(40)。
  17. 根据权利要求1-16中任一项所述的电池管理系统(100)，其特征在于，所述集成专用芯片(30)包括：
    第二菊花链串行外设接口电路(303)，所述集成专用芯片(30)通过所述第二菊花链串行外设接口电路(303)与所述高压管理芯片(20)连接。
  18. 根据权利要求17所述的电池管理系统(100)，其特征在于，所述集成专用芯片(30)包括：
    第二标准串行外设接口电路(304)，所述第二标准串行外设接口电路(304)的一端与所述第二菊花链串行外设接口电路(303)电连接，另一端与所述处理器芯片(40)电连接。
  19. 根据权利要求18所述的电池管理系统(100)，其特征在于，
    所述第二标准串行外设接口电路(304)用于从所述处理器芯片(40)接收数据，并且将从所述处理器芯片(40)接收的数据以标准串行数据传输至所述第二菊花链串行外设接口电路(303)，所述第二菊花链串行外设接口电路(303)用于将所述标准串行数据转换为对应差分数据，并将所述对应差分数据发送至所述高压管理芯片(20)；以及
    所述第二菊花链串行外设接口电路(303)还用于从所述高压管理芯片(20)接收差分数据，并将从所述高压管理芯片(20)接收的差分数据发送至所述第二标准串行外设接口电路(304)，所述第二标准串行外设接口电路(304)将所述差分数据转换为对应标准串行数据，并且将所述对应标准串行数据发送给所述处理器芯片(40)。
  20. 根据权利要求14或17所述的电池管理系统(100)，其特征在于，所述集成专用芯片(30)还包括第一I2C总线接口电路、第一通用异步收发器接口电路、第一控制器局域网总线接口电路中的至少一种接口电路，所述至少一种接口电路用于所述集成专用芯片(30)的菊花链串行外设接口电路与所述处理器芯片(40)之间的电连接，或者，所述至少一种接口电路用于所述集成专用芯片(30)与外部控制系统之间的通信。
  21. 根据权利要求6-11中任一项所述的电池管理系统(100)，其特征在于，所述集成专用芯片(30)还包括：
    第一模拟输入接口电路(12)，所述第一模拟输入接口电路(12)的一端与外部传感器电连接，所述第一模拟输入接口电路(12)的另一端与所述第一数字逻辑电路(34)电连接，用于采集所述外部传感器的传感器信息。
  22. 根据权利要求6-11中任一项所述的电池管理系统(100)，其特征在于，所述集成专用芯片(30)还包括：
    第一通用输入/输出接口电路(306)，所述第一通用输入/输出接口电路(306)的一端与外围电路电连接，所述第一通用输入/输出接口电路(306)的另一端与所述第一数字逻辑电路(34)连接，用于输出所述第一数字逻辑电路(34)对所述外围电路的控制信息或者采集所述外围电路的状态信息。
  23. 根据权利要求2-22中任一项所述的电池管理系统(100)，其特征在于，所述处理器芯片(40)还用于发送所述集成专用芯片(30)的配置信息给所述集成专用芯片(30)，以及获取所述集成专用芯片(30)的接口电路传递信息、安全监控信息、安全报警信息和运行状态信息中的至少一种信息。
  24. 根据权利要求1-23中任一项所述的电池管理系统(100)，其特征在于，所述高压管理芯片(20)包括：
    信号输入端口(21)，用于输入所述电池包(200)的状态参数信息；以及
    第一检测电路(22)，所述第一检测电路(22)通过所述信号输入端口(21)与所述电池包(200)的电源线连接，用于检测所述电池包(200)的状态参数信息。
  25. 根据权利要求24所述的电池管理系统(100)，其特征在于，所述高压管理芯片(20)还包括：
    外围差分检测电路(23)，所述外围差分检测电路(23)的一端与所述电池包(200)的电源线连接，所述外围差分检测电路(23)的另一端与所述高压管理芯片(20)的信号输入端口(21)连接，所述第一检测电路(22)通过所述外围差分检测电路(23)检测所述电池包(200)的状态参数信息。
  26. 根据权利要求24或25所述的电池管理系统(100)，其特征在于，所述第一检测电路(22)包括：
    第一电压检测电路(221)，所述第一电压检测电路(221)与所述信号输入端口(21)连接，用于检测所述电池包(200)的电压信息。
  27. 根据权利要求26所述的电池管理系统(100)，其特征在于，所述第一检测电路(22)包括：
    第一电流检测电路(222)，所述第一电流检测电路(222)与所述信号输入端口(21)连接，用于检测所述电池包(200)的电流信息。
  28. 根据权利要求27所述的电池管理系统(100)，其特征在于，所述处理器芯片(40)用于根据所述单体电池和/或所述电池包(200)的状态参数信息管理所述电池管理系统(100)包括：
    所述处理器芯片(40)用于根据所述电池包(200)的电压信息和电流信息估算所述电池包(200)的荷电状态值和/或健康状态值。
  29. 根据权利要求27或28所述的电池管理系统(100)，其特征在于，所述高压管理芯片(20)还包括：
    数据处理电路(24)，所述数据处理电路(24)与所述第一电压检测电路(221)和所述第一电流检测电路(222)分别连接，用于根据所述电池包(200)的电压信息和电流信息估算所述电池包(200)的荷电状态值和/或健康状态值。
  30. 根据权利要求29所述的电池管理系统(100)，其特征在于，所述第一检测电路(22)包括：
    绝缘阻值检测电路，所述绝缘阻值检测电路与所述信号输入端口(21)连接，用于检测所述电池包(200)的电源线与车身绝缘地之间的阻值；
    所述数据处理单元与所述绝缘阻值检测电路连接，用于根据所述所述阻值判断所述电池包(200)的漏电状态。
  31. 根据权利要求26-30中任一项所述的电池管理系统(100)，其特征在于，所述高压管理芯片(20)还包括：
    第一安全诊断电路(25)，所述第一安全诊断电路(25)与所述第一检测电路(22)连接，用于识别所述电池包(200)的状态参数信息是否异常，并在所述电池包(200)的状态参数信息异常时进行安全保护。
  32. 根据权利要求31所述的电池管理系统(100)，其特征在于，所述第一安全诊断电路(25)包括：
    第一电流诊断电路(251)，所述第一电流诊断电路(251)与所述第一电流检测电路(222)连接，用于根据所述电池包(200)的电流信息识别所述电池包(200)是否存在过流，并在所述电池包(200)存在过流时进行过流保护。
  33. 根据权利要求26-32中任一项所述的电池管理系统(100)，其特征在于，所述第一安全诊断电路(25)包括：
    第一电压诊断电路(252)，所述第一电压诊断电路(252)与所述第一电压检测电路(221)连接，用于根据所述电池包(200)的电压信息识别所述电池包(200)是否存在过压或者欠压，并在所述电池包(200)存在过压或者欠压时进行过压或欠压保护。
  34. 根据权利要求1-33中任一项所述的电池管理系统(100)，其特征在于，所述高压管理芯片(20)包括：
    第二通用输入/输出接口电路(26)，所述第二通用输入/输出接口电路(26)与外部传感器或外部负载连接，用于采集所述外部传感器信息或者输出控制信号给所述外部负载。
  35. 根据权利要求34所述的电池管理系统(100)，其特征在于，所述高压管理芯片(20)还包括：
    第一温度检测电路(27)，所述第一温度检测电路(27)通过所述第二通用输出/输出接口电路(26)与外部温度传感器连接，以检测所述高压管理芯片(20)的温度信息；和
    第一温度诊断电路(28)，所述第一温度诊断电路(28)与所述第一温度检测电路(27)连接，用于根据所述高压管理芯片(20)的温度信息识别所述高压管理芯片(20)是否存在过温，并在所述高压管理芯片(20)存在过温时进行过温保护。
  36. 根据权利要求1-35中任一项所述的电池管理系统(100)，其特征在于，所述处理器芯片(40)还用于通过所述集成专用芯片(30)将所述高压管理芯片(20)的配置信息发送给所述高压管理芯片(20)，以及通过所述集成专用芯片(30)获取所述高压管理芯片(20)的检测信息、计算结果信息、安全诊断信息和安全报警信息中的至少一种。
  37. 根据权利要求17所述的电池管理系统(100)，其特征在于，所述高压管理芯片(20)包括：
    第三菊花链串行外设接口电路(201)，所述高压管理芯片(20)通过所述第三菊花链串行外设接口电路(201)与所述集成专用芯片(30)的所述第二菊花链串行外设接口电路(303)连接。
  38. 根据权利要求1-37中任一项所述的电池管理系统(100)，其特征在于，所述高压管理芯片(20)包括第二标准串行外设接口电路(304)和第二I2C总线接口电路中的至少一种，所述第二标准串行外设接口电路(304)和所述第二I2C总线接口电路中的至少一种为备用接口电路。
  39. 根据权利要求1-38中任一项所述的电池管理系统(100)，其特征在于，所述高压管理芯片(20)包括：
    第二控制器局域网总线接口电路(202)，所述第二控制器局域网总线接口电路(202)用于与外部通信总线连接以获取外部总线信息。
  40. 根据权利要求1-39中任一项所述的电池管理系统(100)，其特征在于，所述模拟前端芯片(10)包括：
    第二检测电路(11)，所述第二检测电路(11)与所述电池组连接，用于检测所述电池组中单体电池的状态参数信息。
  41. 根据权利要求40所述的电池管理系统(100)，其特征在于，所述模拟前端芯片(10)还包括：
    第二模拟输入接口电路(12)，所述第二检测电路(11)通过所述第二模拟输入接口电路(12)与外部检测电路连接，以检测所述电池组中单体电池的状态参数信息。
  42. 根据权利要求40或41所述的电池管理系统(100)，其特征在于，所述模拟前端芯片(10)还包括：
    第三通用输入/输出接口电路(13)，所述第三通用输入/输出接口电路(13)与外部传感器连接，所述第二检测电路(11)通过所述第三通用输入/输出接口电路(13)与所述外部传感器连接，以检测所述电池组中单体电池的状态参数信息。
  43. 根据权利要求40所述的电池管理系统(100)，其特征在于，所述第二检测电路(11)包括：
    第二电压检测电路(111)，所述第二电压检测电路(111)用于采集所述电池组中单体电池的电压信息。
  44. 根据权利要求43所述的电池管理系统(100)，其特征在于，所述第二检测电路(11)还包括：
    第二电流检测电路(112)，所述第二电流检测电路(112)用于采集所述电池组中单体电池的电流信息。
  45. 根据权利要求44所述的电池管理系统(100)，其特征在于，所述第二检测电路(11)还包括：
    应力检测电路(113)，所述应力检测电路(113)用于检测所述电池组中单体电池内的应力信息。
  46. 根据权利要求45所述电池管理系统(100)，其特征在于，所述第二检测电路(11)还包括：
    第二温度检测电路(114)，所述第二温度检测电路(114)用于检测所述电池组中单体电池的温度信息。
  47. 根据权利要求46所述的电池管理系统(100)，其特征在于，所述前端模拟芯片还包括：
    第二安全诊断电路(14)，所述第二安全诊断电路(14)与所述第二检测电路(11)连接，用于识别所述单体电池的状态参数信息是否异常，并在所述单体电池的状态参数存在异常时进行安全保护。
  48. 根据权利要求47所述的电池管理系统(100)，其特征在于，所述第二安全诊断电路(14)包括：
    第二电压诊断电路(141)，所述第二电压诊断电路(141)与所述第二电压检测电路(111)连接，用于识别所述电池组中单体电池的电压是否过压/欠压，在所述单体电池的电压过压或欠压时进行过压或欠压保护。
  49. 根据权利要求48所述的电池管理系统(100)，其特征在于，所述第二电压检测电路(111)还用于检测所述电池组的电压和所述模拟前端芯片(10)内部器件的电压；
    所述第二电压诊断电路(141)还用于识别所述电池组的电压是否异常以及识别所述模拟前端芯片(10)内部器件的电压是否异常，并在存在异常时进行电压安全保护。
  50. 根据权利要求47-49中任一项所述的电池管理系统(100)，其特征在于，所述第二安全诊断电路(14)包括：
    第二电流诊断电路(142)，所述第二电流诊断电路(142)与所述第二电流检测电路(112)连接，用于识别所述单体电池的电流是否存在过流，并在所述单体电池的电流存在过流时进行过流保护。
  51. 根据权利要求50所述的电池管理系统(100)，其特征在于，
    所述第二电流检测电路(112)还用于检测所述电池组的电流和所述模拟前端芯片(10)内部器件的电流；
    所述第二电流诊断电路(142)还用于诊断所述电池组的电流是否异常以及识别所述模拟前端芯片(10)内部器件的电流是否异常，并在存在电流异常时进行电流异常安全保护。
  52. 根据权利要求47-51中任一项所述的电池管理系统(100)，其特征在于，所述第二安全诊断电路(14)包括：
    应力诊断电路(143)，所述应力诊断电路(143)用于识别所述电池组中单体电池内的应力是否异常，并在应力异常时进行应力异常安全保护。
  53. 根据权利要求47-52中任一项所述的电池管理系统(100)，其特征在于，所述第二安全诊断电路(14)包括：
    第二温度诊断电路(144)，所述第二温度诊断电路(144)与第二温度检测电路(114)连接，用于识别所述电池组中的单体电池的温度是否过温，并在所述单体电池的温度过温时进行过温安全保护。
  54. 根据权利要求47-53中任一项所述的电池管理系统(100)，其特征在于，所述模拟前端芯片(10)还包括：
    第二数字逻辑电路(15)，所述第二数字逻辑电路(15)与所述第二安全诊断电路(14)连接，用于在所述电池组中的单体电池的状态参数信息存在异常时生成异常信息，以进行报警提示。
  55. 根据权利要求54所述的电池管理系统(100)，其特征在于，所述处理器芯片(40)还用于通过所述集成专用芯片(30)将所述模拟前端芯片(10)的配置信息发送给所述模拟前端芯片(10)，以及通过所述集成专用芯片(30)获取所述模拟前端芯片(10)的检测信息、安全诊断信息、安全报警信息和计算结果信息中的至少一种。
  56. 根据权利要求1-55中任一项所述的电池管理系统(100)，其特征在于，
    所述处理器芯片(40)用于根据所述单体电池和所述电池包(200)的状态参数信息管理管理所述电池管理系统(100)包括：所述处理器芯片(40)用于在根据所述电池组中单体电池的状态参数信息确定所述电池组中单体电池的电量不均衡时，生成电量均衡信息，并将所述电量均衡信息通过所述集成专用芯片(30)转发给对应的所述前端模拟芯片；
    所述模拟前端芯片(10)包括均衡电路(16)，所述均衡电路(16)用于根据所述电量均衡信息对所述电池组中单体电池进行电量均衡处理。
  57. 根据权利要求1-56中任一项所述的电池管理系统(100)，其特征在于，
    所述处理器芯片(40)用于根据所述单体电池和所述电池包(200)的状态参数信息管理所述电池管理系统(100)包括：所述处理器芯片(40)用于根据所述单体电池和所述电池包(200)的状态参数信息确定电池状态，根据所述电池状态判断是否对所述电池包(200)进行充电或放电以及判断是否对所述电池包(200)停止充电或放电。
  58. 根据权利要求1-57中任一项所述的电池管理系统(100)，其特征在于，所述处理器芯片(40)用于根据所述单体电池和所述电池包(200)的状态参数信息管理所述电池管理系统(100)包括：所述处理器芯片(40)用于根据所述单体电池和/或电池包(200)的状态参数信息估算所述电池包(200)的荷电状态值，并获取所述高压管理芯片(20)估算的所述电池包(200)的荷电状态值，根据自身估算的所述电池包(200)的荷电状态值与所述高压管理芯片(20)估算的所述电池包(200)的荷电状态值进行电池状态校验。
  59. 根据权利要求14所述的电池管理系统(100)，其特征在于，所述模拟前端芯片(10)为多个，多个所述模拟前端芯片(10)串联连接。
  60. 根据权利要求59所述的电池管理系统(100)，其特征在于，
    所述第一菊花链串行外设接口电路(301)为两个；
    每个所述模拟前端芯片(10)均包括第四菊花链串行外设接口电路和第五菊花链串行外设接口电路；以及
    串联连接的多个所述模拟前端芯片(10)中，首端模拟前端芯片(10)通过所述第四菊花链串行外设接口电路与所述集成专用芯片(30)的一个所述第一菊花链串行外设接口电路(301)连接，末端模拟前端芯片(10)通过所述第五菊花链串行外设接口电路与所述集成专用芯片(30)的另一个所述第一菊花链串行外设接口电路(301)连接。
  61. 根据权利要求60所述的电池管理系统(100)，其特征在于，在串联连接的多个所述模拟前端芯片(10)中，第n个所述模拟前端芯片(10)通过所述第五菊花链串行外设接口电路与第(n+1)个所述模拟前端芯片(10)的所述第四菊花链串行外设接口电路连接，其中，1≤n<n+1≤N,N为串联连接的多个所述模拟前端芯片(10)的总数量。
  62. 根据权利要求1-61中任一项所述的电池管理系统(100)，其特征在于，所述模拟前端芯片(10)包括第三标准串行外设接口电路和第三I2C总线接口电路中的至少一个接口电路，所述第三标准串行外设接口电路和所述第三I2C总线接口电路中的至少一个接口电路为备用接口电路。
  63. 一种电池(2)，其特征在于，包括：
    电池包(200)，所述电池包(200)包括多个电池组，每个电池组包括至少一个单体电池；
    其中，所述电池包(200)与根据权利要求1-62中任一项所述的电池管理系统(100)连接，并且每个所述电池组与所述电池管理系统(100)连接。
  64. 一种车辆(1)，其特征在于，包括：
    电池包(200)，所述电池包(200)包括多个电池组，每个电池组包括至少一个单体电池；以及
    根据权利要求1-62中任一项所述的电池管理系统(100)，所述电池管理系统(100)与所述电池包(200)连接。
  65. 一种电池管理方法，其特征在于，用于权利要求1-62中任一项所述的电池管理系统(100)，所述电池管理方法包括：
    高压管理芯片检测电池包的状态参数信息，以及模拟前端检测电池组中单体电池的状态参数信息，所述电池包包括多个所述电池组，所述电池组包括至少一个单体电池；
    集成专用芯片将所述电池包的状态参数信息和所述电池组中单体电池的状态参数信息转发给处理器芯片；以及
    处理器芯片根据所述单体电池的状态参数信息和所述电池包的状态参数信息管理所述电池管理系统。
  66. 根据权利要求65所述的电池管理方法，其特征在于，处理器芯片根据所述单体电池的状态参数信息和所述电池包的状态参数信息管理所述电池管理系统，包括：
    所述处理器芯片根据所述单体电池和/或电池包的电压信息和电流信息估算所述电池包的荷电状态值和/或健康状态值。
  67. 根据权利要求66所述的电池管理方法，其特征在于，处理器芯片根据所述单体电池的状态参数信息和所述电池包的状态参数信息管理所述电池管理系统还包括：
    所述处理器芯片根据所述电池包的荷电状态判断是否对所述电池包进行充电或者放电以及判断是否停止对所述电池包充电或放电。
  68. 根据权利要求65-67中任一项所述的电池管理方法，其特征在于，处理器芯片根据所述单体电池的状态参数信息和所述电池包的状态参数信息管理所述电池管理系统，包括：
    所述处理器芯片根据所述电池组中单体电池的状态参数信息确定所述电池组中单体电池的电量不均衡，生成电量均衡信息，并将所述电量均衡信息通过所述集成专用芯片转发给所述前端模拟芯片。
  69. 根据权利要求65-68中任一项所述的电池管理系统，其特征在于，所述电池管理方法还包括：
    所述处理器芯片根据所述电池管理系统内部用电芯片的供电需求生成供电配置信息并发送给所述集成专用芯片，以管理所述电池管理系统对内部用电芯片提供工作电源。
  70. 根据权利要求65-69中任一项所述的电池管理方法，其特征在于，所述电池管理方法还包括：
    所述处理器芯片根据外部用电单元的用电需求生成电源开关通道选择控制信号，并将所述电源开关通道选择控制信号发送给所述集成专用芯片，以管理所述电池管理系统对于外部用电单元的供电通断；
    所述集成专用芯片根据所述电源开关通道选择控制信号控制所述供电电路所连接的外部用电单元与供电电源侧的通断或者控制所述外部用电单元与供电地侧的通断。
  71. 根据权利要求65-70中任一项所述的电池管理方法，其特征在于，所述电池管理方法还包括：
    所述处理器芯片发送所述集成专用芯片的配置信息给所述集成专用芯片，并获取所述集成专用芯片的接口电路传递信息；以及
    所述处理器芯片获取所述集成专用芯片的安全监控信息、安全报警信息和运行状态信息中的至少一种信息。
  72. 根据权利要求65-71中任一项所述的电池管理方法，其特征在于，所述电池管理方法还包括：
    所述处理器芯片通过所述集成专用芯片将所述高压管理芯片的配置信息发送给所述高压管理系统，并通过所述集成专用信息获取所述高压管理系统的检测信息；以及
    所述处理器芯片通过所述集成专用信息获取所述高压管理芯片的计算结果信息、安全诊断信息和安全报警信息中的至少一种。
  73. 根据权利要求65-72中任一项所述的电池管理方法，其特征在于，所述电池管理方法还包括：
    所述处理器芯片通过所述集成专用芯片将所述模拟前端芯片的配置信息发送给所述模拟前端芯片，并通过所述集成专用芯片获取所述模拟前端芯片的检测信息；以及
    所述处理器芯片通过所述集成专用芯片获取所述模拟前端芯片的安全诊断信息、安全报警信息和计算结果信息中的至少一种。
  74. 根据权利要求69所述的电池管理方法，其特征在于，所述电池管理方法还包括：
    所述集成专用芯片根据所述供电配置信息控制所述集成专用芯片的供电电路向所述电池管理系统内部用电芯片中的至少一个芯片提供工作电源。
  75. 根据权利要求66所述的电池管理方法，其特征在于，所述电池包的状态参数信息包括所述电池包的电压信息和电流信息，所述电池管理方法还包括：
    所述高压管理芯片根据所述电池包的电压信息和电流信息估算所述电池包的荷电状态值和/或健康状态值。
  76. 根据权利要求75所述的电池管理方法，其特征在于，处理器芯片根据所述单体电池的状态参数信息和所述电池包的状态参数信息管理所述电池管理系统，还包括：
    所述处理器芯片通过所述集成专用芯片获取所述高压管理芯片估算的所述电池包的荷电状态值，并根据自身估算的所述电池包的荷电状态值和所述高压管理芯片估算的所述电池包的荷电状态值验证所述电池包的状态。
  77. 根据权利要求65-76中任一项所述的电池管理方法，其特征在于，所述电池包的状态参数信息包括所述电池包的电源线与车身绝缘地之间的阻值，所述电池管理方法还包括：
    所述高压管理芯片根据所述阻值判断所述电池包的漏电状态。
  78. 根据权利要求72所述的电池管理方法，其特征在于，所述电池管理方法还包括：
    所述高压管理芯片识别所述电池包的状态参数信息是否异常，并在所述电池包的状态参数信息异常时进行安全保护。
  79. 根据权利要求78所述的电池管理方法，其特征在于，所述高压管理芯片识别所述电池包的状态参数信息是否异常，并在所述电池包的状态参数信息异常时进行安全保护，包括以下至少一项：
    所述高压管理芯片根据所述电池包的电流信息识别所述电池包是否存在过流，并在所述电池包存在过流时进行过流保护；
    所述高压管理芯片根据所述电池包的电压信息识别所述电池包是否存在过压或者欠压，并在所述电池包存在过压或者欠压时进行过压或欠压保护。
  80. 根据权利要求79所述的电池管理方法，其特征在于，所述电池管理方法还包括：
    所述高压管理芯片获取所述高压管理芯片自身的温度信息；
    所述高压管理芯片根据所述高压管理芯片自身的温度信息识别所述高压管理芯片是否存在过温，并在所述高压管理芯片存在过温时进行过温保护。
  81. 根据权利要求73-76中任一项所述的电池管理方法，其特征在于，所述电池管理方法还包括：
    所述模拟前端芯片识别所述单体电池的状态参数信息是否异常，并在所述单体电池的状态参数存在异常时进行安全保护。
  82. 根据权利要求81所述的电池管理方法，其特征在于，所述模拟前端芯片识别所述单体电池的状态参数信息是否异常，并在所述单体电池的状态参数存在异常时进行安全保护，包括以下至少一项：
    所述模拟前端芯片识别所述电池组中单体电池的电压是否过压/欠压，在所述单体电池的电压过压或欠压时进行过压或欠压保护；
    所述模拟前端芯片识别所述单体电池的电流是否存在过流，并在所述单体电池的电流存在过流时进行过流保护；
    所述模拟前端芯片识别所述电池组中单体电池内的压力是否异常，并在压力异常时进行安全保护；和
    所述模拟前端芯片识别所述电池组中的单体电池的温度是否过温，并在所述单体电池的温度过温时进行过温安全保护。
  83. 根据权利要求82所述的电池管理方法，其特征在于，所述电池管理方法还包括以下至少一项：
    所述模拟前端芯片识别所述电池组的电压是否异常以及识别所述模拟前端芯片内部器件的电压是否异常，并在存在异常时进行电压安全保护；和
    所述模拟前端芯片诊断所述电池组的电流是否异常以及识别所述模拟前端芯片内部器件的电流是否异常，并在存在电流异常时进行电流保护。
PCT/CN2024/090068 2023-04-28 2024-04-26 电池管理系统、电池、车辆和电池管理方法 Pending WO2024222871A1 (zh)

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