WO2024200423A1

WO2024200423A1 - Photoelectric element, in particular for use in standard cmos processes

Info

Publication number: WO2024200423A1
Application number: PCT/EP2024/058082
Authority: WO
Inventors: Jong Mun Park; Filip SEGMANOVIC; Karl Rohracher; Franz Lechner; Frédéric Roger
Original assignee: Ams Osram AG
Current assignee: Ams Osram AG
Priority date: 2023-03-27
Filing date: 2024-03-26
Publication date: 2024-10-03
Anticipated expiration: 2025-09-27

Abstract

The invention suggests a photoelectric element (20) that may be implemented on advanced CMOS technology very easily and offers superior technical properties regarding balancing of leakage currents and other parameters. According to the invention, the photoelectric element (20) comprises: - a substrate (4) of semiconductor material of a first type of electric conductivity, - a halo implant (26) in said substrate (4), said halo implant (26) having a second type of electric conductivity opposite to said first type of conductivity, and - an ldd implant (28) of said first type of electric conductivity, said ldd implant (28) being surrounded by said halo implant (26), wherein - a core set (22) formed by said ldd implant (28) and said halo implant (26) provides a pn-junction for a photodiode (24) for collecting light induced-charges.

Description

Photoelectric Element , in particular for use in Standard CMOS processes

DESCRIPTION

Technical background of the invention

The invention relates to a photoelectric element . The invention more particularly relates to a photoelectric element for use in standard CMOS processes . The invention furthermore relates to a photodetector device comprising a number of such photoelectric elements .

Background

Integrated photodetectors on standard CMOS technology are widely used for variety of applications . Depending on the respective application field and the requirements imposed thereby, typically the trade-of f of photodetector characteristics regarding optical & electrical need to be considered for design and layout purposes . Leakage current , capacitance and spectral responsivity are parameters to be optimi zed for most of typical applications .

In order to modi fy the characteristics and optimi ze the parameters mentioned above for the respective individual purpose , the following typical approaches are considered in known systems :

A highly doped shallow layer ( generally p-type , called surface passivation layer ) at the surrounding region of the photodiode on top of the silicon may be introduced for suppressing the leakage current from the interface . In general , shallow p+ layer is used for this purpose .

Many distributed small-si zed island photodiodes may be used to reduce the leakage current and capacitance basically by reducing the total area of the active photodiode . Small standard NWELL or nplus S/D implant layers may be used to form the n-type island photodiode ( IPD) region . However, it is rather di f ficult to achieve best trade-of f between electrical and optical characteristics of the photodiode by using deep NWELL or any highly n-type implants existing on the standard CMOS process , and therefore this approach is only of limited value for applications in CMOS processes .

For further reducing the capacitance of pn-j unction photodiode , a proper gap between IPD and surface-passivation region could be used, suppressing the perimeter j unction capacitance of the photodiode .

With photodiodes designed in a conventional deep- unction NWELL concept , comparatively high leakage currents and high capacitances are observed because of the large depletion region by the deep- unction and lateral spreading of NWELL . Another approach is to use shallow j unction nplus S/D-implant and nldd- implant , but doping concentration is too high for optimi zing photodiode characteristics .

Consequently, in conventional approaches using conventional n-type wells existing on the standard CMOS process , it is di f ficult to optimi ze simultaneously the leakage current , j unction capacitance , and spectral responsivity, because of the deep j unction of the NWELL or very high doping concentration of the n-type S/D implants existing on the standard process . It needs dedicated implantation with additional alignment for further optimi zation of photodiode characteristics .

Summary

The obj ect of the invention is therefore to provide an improved photoelectric element using pn-j unction photodiodes that helps overcome the deficiencies identi fied above , and that may be implemented on advanced CMOS technology very easily, in particular targeting for an improved photodiode with low-leakage and low-capacitance characteristics . Further, an improved photo detector device should be provided . With respect to the photoelectric element , this obj ect is achieved with a substrate of semiconductor material of a first type of electric conductivity, a halo implant in said substrate , said halo having a second type of electric conductivity opposite to said first type of conductivity, and an Idd implant of said first type of electric conductivity, said Idd implant being surrounded by said halo implant , wherein a core set formed by said Idd implant and said halo implant provides a pn-j unction for a photodiode for collecting light induced-charges .

In particular, incoming light will generate light-indicued charge carriers in a region comprising the substrate , the pn- j unction as such and its outside region . The carriers so generated will then be collected by the j unction .

Preferred embodiments are subj ect of the dependent claims .

The invention is based on the consideration that for especially high compatibility with CMOS technology and superior properties of the photoelectric element , the concept of "partially buried pn-j unction" should be considered, in particular in order to overcome the drawbacks arising from previous approaches as mentioned above . A partially buried pn-j unction according to an aspect of the invention may be provided by using a halo-implant of a given type of electric conductivity, typically and preferably n-type , which is already existing and therefore readily available in advanced standard CMOS processes and CMOS technology . In particular, an n-type haloimplant is part of core-pldd implant set on almost all advanced standard CMOS technologies , which is used for the suppressing punch-through between source and drain of the low- voltage PMOS transistors , and therefore vastly and readily available . According to an aspect of the inventions , such core-pldd implant set containing an n-type halo-implant may be speci fically used to provide the pn- j unction of the photodiode . Thereby, it is possible to introduce simultaneously both of buried n-type pn-j unction and p-type surface passivation layer on top of the n-type photodiode layer without any additional mask . With a core-pldd layer (both of p-type Idd- implant and n-type halo-implant ) , either one of single large si ze photodiodes or distributed photodiodes with many small island-type photodiodes may be provided, depending on the desired trade-of f and expected parameters among spectral re- sponsitivity, leakage current , and CV speci fications .

As a summary of one aspect of the invention, proper pn- j unction photodiodes together with highly doped shallow p- type surface passivation on top of n-type photodiodes can be introduced . Trade-of f among SR, leakage current and capacitance could be adj usted by changing photodiode si ze , shapes , and distribution pattern .

In a preferred embodiment , the photoelectric element further comprises a contact implant region in said substrate , said contact implant region having said second type of electric conductivity, wherein said halo implant laterally surrounds said contact implant region . In order to provide versatile contact points to the j unction, in further preferred embodiment this contact implant region extends into the bulk of said substrate beyond said halo implant ; in this embodiment , the contact implant region may be referred to as a body well . In other words , in this preferred aspect of the invention the active layer forming the pn j unction is designed relatively shallow, thereby being restricted to a comparatively small and thin layer zone close to the surface , and with respect to depth into the substrate it extends less deeply than the contact implant region or body well .

In a preferred embodiment , the contact implant region is doped higher than said pldd and halo implant in order to provide safe and reliable contact function . According to yet another aspect of the invention, the core set of said Idd implant and said halo implant has an overall layer thickness of 0 . 1 pm to 1 pm, preferably to 0 . 6 pm, at maximum .

In yet another preferred embodiment said Idd implant is doped higher than said substrate .

The substrate of the photoelectric element according to the invention may be a "conventional" , bulk substrate . In an alternative aspect of the invention, the substrate may as well be an epitaxial layer system . In the latter case , the thickness of the epitaxial layer preferably is between 2 pm to 60 pm, depending on electrical & optical characteristics and requirements .

Preferably and in view of the beneficial compatibility with standard CMOS technology, the first type of electric conductivity is a positive (p-type ) conductivity, and the second type of conductivity is a negative (n-type ) conductivity .

In order to further minimi ze leakage currents , in a preferred embodiment of the invention the halo implant is laterally surrounded by a surface passivation layer of said first type of conductivity, said surface passivation layer doped higher than said substrate .

In another aspect of the invention, the photoelectric element may comprise a multitude of island photodiode elements , wherein each island photodiode element comprises a core set formed by one of said Idd implants and one of said halo implants . Preferably, in this embodiment the lateral distance between any two of neighbouring island photodiode elements is at least 5 pm .

With respect to the photo detector device the invention suggests to provide a photoelectric element of any one of the embodiments mentioned above and an aperture metal mask cover- ing, as seen in top view, an outer fringe of the surface of said photoelectric element . In a preferred embodiment , the outer fringe covered by the aperture metal mask has a width of about 1 mm maximum . In an aspect of the invention, the width of the metal or black- filter mask is chosen such that the outside of the photodiode region is covered suf ficiently in order to safely protect from unnecessary incident light . In particular, and in one embodiment of the invention, the distribution pattern and additional number of islands underneath the metal/black- f liter mask may be determined and chosen in view of the trade-of f among leakage , capacitance , and spectral responsivity .

In accordance with an aspect of the invention considered independently inventive , the photo detector device comprises a number of island photodiode elements each of which is positioned underneath said aperture metal mask, wherein each island photodiode element comprises a core set formed by one of said Idd implants and one of said halo implants . In particular, and in one aspect of the invention, such island photodiode elements may be positioned underneath the metal or blackfilter mask so as to ef ficiently collect photo-generated carriers in this area, too .

Main advantages of the present invention may be seen in that in order to overcome the problems mentioned above , the invention suggests partially buried photodiodes by using core-pldd implant set (p-type pldd and n-type halo implants ) existing on the advanced CMOS process . An n-type halo implant well may be located between p-type Idd implant well on top and p-type substrate at the bottom, and a partially buried n-type well can be introduced without any additional alignment . A p-type Idd implant well on top of n-type halo implant well may also act as a p-type surface passivation layer, and it reduces further the leakage current by protecting leakage current contribution from the interface . Additionally, low periphery j unction-capacitance can be achieved by the laterally di ffused n-type halo-implant well at the outside of the p-type Idd implant well . It is considered particularly beneficial that standard components of CMOS processes , namely existing core pldd- implant sets having an n-type halo implant , may be used to provide the pn-j unction for a photodiode , thereby providing particularly ef ficient manufacturing as well as high compatibility with standard CMOS technology . In particular, and as a signi ficant advantage of the invention, such a core set in production may be introduced with one mask only . Energy and tilt-angle of a halo implant are higher and steeper than those of Idd implant , respectively .

Brief Description of the Preferred Embodiments

Preferred embodiments and aspects of the invention are described further in connection with a drawing . In this drawing,

FIG . 1 shows embodiments of photoelectric elements comprising photodiodes of prior art systems in cross section;

FIG . 2 a photoelectric element in accordance with the invention in cross section;

FIG . 3 shows embodiments of photoelectric elements in accordance with the invention in top view;

FIG . 4 shows the photoelectric element with various photodiode patterns in top view;

FIG . 5 shows another embodiment of a photoelectric element both in top view ( FIG . 5a ) and in cross section ( FIG . 5b ) ;

FIG . 6 shows a photo detector device in top view; and

FIG . 7 shows various graphs representing the results of comparative measurements of the suggested design .

Identical parts are labelled by the same reference numerals . Detailed Description of the Preferred Embodiments

FIG. 1 shows two embodiments of prior art photoelectric elements 1, 1 ' , each providing pn-junction photodiodes 2, 2" . In both embodiments shown in FIG. 1, the photoelectric element 1, 1 ' comprises a substrate 4 of semiconductor material, which may especially be silicon, for instance. A contact implant region 6 is formed in the substrate 4. A plurality of body contacts 8, both cathode contacts 8a and anode contacts 8b, are provided on the contact implant region 6 or directly on the substrate 4, respectively.

In the embodiments shown, the substrate 4 is a bulk substrate of said semiconductor material, in particular silicon. Alternatively, the substrate 4 may be an epitaxial layer system.

The substrate 4 of the photoelectric elements 1, 1 ' as well as that of the embodiments in accordance with the present invention as described below is made of a semiconductor material of a first type of electric conductivity. In the embodiments shown, this first type of electric conductivity is chosen to be p-type. Accordingly, in the embodiments shown, a second type of electric conductivity is meant to mean "n- type". In general, however, this association might be reversed, and n-type as being said "first type" and p-type as being said "second type" might also be possible. In the following, with respect to the embodiments shown, p-type shall be understood as meaning "a first type of an electric conductivity" and n-type shall be understood as meaning "a second type of an electric conductivity".

The contact implant region 6 of the photoelectric elements 1, 1 ' is an n-type contact implant region 6. Therefore, as shown in FIG. 1, the prior art uses existing n-type implants 8 (NWELL, n+ or nldd) to form the pn-junction photodiode 2, 2" . Depending on the selected trade-off among leakage current, capacitance, and spectral responsivity, it can be a single large size photodiode 2 (FIG. la) or a distributed islands photodiode 2 ' ( FIG . lb ) . As further shown in FIG . lb, a surface passivation layer 10 in form of a highly doped shallow p-type region can be introduced on the top silicon surface at the surrounding region of the active pn-photodiode 2 ' for further suppressing leakage current . It mainly acts as to protect leakage current generated near the Si and oxide interface in this area .

In view of a desired compatibility with standard CMOS processes , in such conventional approaches using conventional n- type wells existing on the standard CMOS process , it has turned out to be di f ficult to optimi ze simultaneously the leakage current , j unction capacitance , and spectral responsivity, in particular because of the deep j unction of the NWELL or very high doping concentration of the n-type S/D implants existing on the standard process . In order to overcome these deficiencies , and to provide a photoelectric element 20 that is particularly suitable for integration into standard CMOS technology and CMOS processes , the present invention suggests to use an existing core pldd-implant set 22 to provide the pn-j unction photodiode 24 .

Therefore , in a photoelectric element 20 according to the present invention, as shown in cross section in FIG . 2 , a halo n-type implant 26 and an pldd implant 28 surrounded by the halo implant 26 are provided in the substrate 4 , the halo n- type implant 26 together with the pldd implant 28 constituting the core pldd-implant set 22 . This core set 22 formed by the pldd implant 28 and the halo implant 26 provides the pn- j unction for the photodiode 24 for generating light induced- charges .

Depending on the selected trade-of f among leakage current , spectral response , and capacitance , photodiode si ze , shape , and layouts can be properly adj usted and adequately chosen . Proper island types and distribution patterns may be used for the pn-j unction photodiode 24 structure . In a preferred embodiment , the halo implant 26 further may be laterally surrounded by a surface passivation layer 30 of said first type of conductivity, said surface passivation layer 30 doped higher than the substrate 4 ( in the embodiment shown p+ ) .

In other words , as may be seen in FIG . 2 , the photoelectric element 20 in the embodiment of the invention shown here provides a partially buried photodiode 24 by using the core-pldd implant set 22 (p-type pldd implant 28 and n-type halo implant 26 ) existing on the advanced CMOS process . The n-type halo implant well 26 is located between the p-type Idd implant well 28 on top and p-type substrate 4 at the bottom, and therefore the partially buried n-type well 26 can be introduced without any additional mask alignment . The p-type Idd implant well 28 on top of the n-type halo implant well 26 acts also as a p-type surface passivation layer, and it reduces further the leakage current by protecting against leakage current contribution from the interface . Additionally, low periphery j unction-capacitance can be achieved by the laterally di f fused n-type halo-implant well 26 at the outside of the p-type Idd implant well 28 .

For contacting purposes , the photoelectric element 20 further comprises a contact implant region 32 in said substrate , said contact implant region 32 having said second type of electric conductivity (n-type ) . The contact implant region 32 is doped higher the halo implant 26 , and therefore in the embodiment shown is n+ . The halo implant 26 laterally surrounds this contact implant region 32 . In the case of a highly doped contact region, due to higher doping and in case of deeper j unction-depth than said core pldd set , the contact implant region 32 may also be referred to as a body well . The contact implant region 32 in the embodiment shown, and comparably to a body well , extends into the bulk of the substrate 4 way beyond the depth of the halo implant 26 . Further, the core set 22 of the pldd implant 28 and the halo implant 26 has an overall layer thickness of about 0 . 6 pm at maximum .

The lateral structure of the photoelectric element 20 may be chosen in accordance to speci fic requirements of the respective application; relatively high flexibility is possible . FIG . 3 shows top views of various structures of the photoelectric element 20 , namely a circular type in FIG . 3a, and a rectangular type in FIG . 3b . The cathode contact region 34 or the contact implant region 32 is located in the middle of the structure (n+ S/D implant ) . The p+ region at the outside of the cathode contact is provided by the pldd implant 28 , and the n- region is provided by the n-type halo implant 26 . Advanced CMOS technology of fers these two implants 26 , 28 as a set 22 of core-pldd implant . As may be seen clearly in this top view, the shallow p+ passivation layer 30 is provided at the outside of the n- region given by the halo implant 26 , completely surrounding it for further reducing the leakage current . The schematic view along the Cut line A is shown in FIG . 2 .

In an aspect of the invention, a multitude of island photodiode elements 24 of the type described above may be provided for the photoelectric element 20 . In this embodiment of the invention, preferably each island photodiode element 24 comprises a core set 22 formed by one of the pldd implants 28 and an associated one of the halo implants 26 . In a preferred embodiment , the lateral distance D between any two of neighbouring island photodiode elements 24 is at least 5 pm . In FIG . 4 , various photodiode patterns are shown for the photoelectric element 20 of this kind . The suggested photodiodes 24 could be either single large and small photodiodes 24 or any distributed photodiodes 24 as shown in the figure . Any shape of island or stripe patterns may be conceived, depending on applications . I sland diameter, stripe dimension (width and length) and distance D between two photodiodes 24 should be properly adj usted so as to ful fil the electrical and optical requirements of the respective applications . In particular, the diameter of the respective island photodiodes 24 could be from 0 . 5 pm up to 10 pm . Stripe width and length could be from 0 . 5 pm up to 10 pm . The distance between neighbour islands could be from 5 pm up to 50 pm, depending on the electrical and optical characteristics and requirements . In an aspect considered independently inventive , as shown in FIG . 5a in top view and in FIG . 5b in cross section, the photoelectric element 20 may be provided with a single and large rectangle photodiode 24 . The contact implant region 32 providing the n+ cathode contact in this embodiment is formed, as seen in top view, as a closed rectangular structure completely surrounding in inner areas of the pldd implant 28 . In this embodiment it is introduced at the surrounding photodiode region . This large single rectangle photodiode 24 could be in the range of 10 pm x 10 pm and 1000 pm x 1000 pm .

In yet another aspect of the invention, a photo detector device 40 comprising a photoelectric element 20 of type described above is provided . As can be seen in the top view in FIG . 6 , the photo detector device 40 further comprises an aperture metal layer mask covering 42 , providing an aperture for the photoelectric element 20 and covering an outer fringe 44 of the surface of the photoelectric element 20 . The outer fringe 44 covered by the aperture metal mask 42 in a preferred embodiment has a width chosen appropriately in view of a desired trade-of f between leakage , capacitance , and spectral responsivity .

In yet another independently inventive aspect of the invention, in the photo detector device 40 a number of island photodiode elements 24 is positioned underneath this metal or black- filter mask 42 , wherein each island photodiode element 24 comprises a core set 22 formed by one of the pldd implants 28 and one of the halo implants 26 . In this setup the island photodiode elements 24 positioned underneath the mask 42 may be used to ef ficiently collect the laterally spreading photo carriers generated at the main photodiode region .

Functionality of the suggested inventive design concepts has been veri fied in various comparative measurements , the results of which are shown in various graphs in FIG . 7 . FIG . 7a shows the spectral responsivity SR as a function of wavelength X in a comparison of distributed photodiodes 24 be- tween previous and now suggested approaches . Evidently, the two lines of results more or less overlap, showing that by proper design of photodiode dimensions (mainly diameter and distance between distributed photodiodes ) , similar spectral responsivity between two approaches may be achieved . In FIG . 7b, the leakage current IL as a function of cathode Voltage Vc of distributed photodiodes is compared between previous and suggested approaches . The approach suggested now in accordance with the invention shows lower leakage current while keeping similar spectral responsivity as shown in

FIG . 7a . Further, in FIG . 7c the capacitance C as a function of cathode Voltage Vc of distributed photodiodes is compared between previous and suggested approaches . The approach suggested now in accordance with the invention shows lower j unc- tion capacitance while keeping similar spectral responsivity as shown in FIG . 7 .

LIST OF REFERENCE NUMERALS

1 , 1 photoelectric element (prior art )

2 , 2 pn-j unction photodiode

4 substrate

6 contact implant region

8 implant

10 surface passivation layer

20 photoelectric element

22 core pldd-implant set

24 photodiode

26 halo implant

28 pldd implant

30 passivation layer

32 contact implant region

34 contact region

36 line

40 photo detector device

42 aperture metal mask covering

44 outer fringe

D Distance between photodiodes

X Wavelength

SR Spectral responsitivity

IL Leakage current eV Cathode Voltage

C Capacitance

Claims

1. A photoelectric element (20) , comprising: a substrate (4) of semiconductor material of a first type of electric conductivity, a halo implant (26) in said substrate (4) , said halo implant (26) having a second type of electric conductivity opposite to said first type of conductivity, and an Idd implant (28) of said first type of electric conductivity, said Idd implant (28) being surrounded by said halo implant (26) , wherein a core set (22) formed by said Idd implant (28) and said halo implant (26) provides a pn-junction for a photodiode (24) for collecting light induced-charges.

2. The photoelectric element (20) of claim 1, further comprising a contact implant region (32) in said substrate (4) , said contact implant region (4) having said second type of electric conductivity, wherein said halo implant (26) laterally surrounds said contact implant region (32) .

3. The photoelectric element (20) of claim 2, wherein said contact implant region (32) extends into the bulk of said substrate (4) beyond said halo implant (26) .

4. The photoelectric element (20) of claim 2 or 3, wherein said contact implant region (32) is doped higher than said halo implant (26) .

5. The photoelectric element (20) of any one of claims 1 to 4, wherein said core set (22) of said Idd implant (28) and said halo implant (26) has an overall layer thickness of 0.1 pm and 1 pm, preferably between 0.1 pm and 0.6 pm, at maximum.

6. The photoelectric element (20) of any one of the preceding claims, wherein said Idd implant (28) is doped higher than said substrate (4) . 7. The photoelectric element (20) of any one of the preceding claims, wherein said substrate (4) is an epitaxial layer system.

8. The photoelectric element (20) of any one of the preceding claims, wherein said first type of electric conductivity is a positive (p-type) conductivity, and said second type of conductivity is a negative (n-type) conductivity.

9. The photoelectric element (20) of any one of the preceding claims, wherein said halo implant (26) is laterally surrounded by a surface passivation layer (30) of said first type of conductivity, said surface passivation layer (30) doped higher than said substrate.

10. The photoelectric element (20) of any one of the preceding claims, comprising a multitude of island photodiode elements (24) , wherein each island photodiode element (24) comprises a core set (22) formed by one of said Idd implants

(28) and one of said halo implants (26) .

11. The photoelectric element (20) of claim 10, wherein the lateral distance (D) between any two of neighbouring island photodiode elements (24) is at least 5 pm.

12. A photo detector device (40) comprising a photoelectric element (20) of any one of the preceding claims and an aperture metal or black-filter mask (42) covering, as seen in top view, an outer fringe (44) of the surface of said photoelectric element (20) .

13. The photo detector device (40) of claim 12, wherein the outer fringe (44) covered by the aperture metal mask (42) has a width of 5 mm maximum.

14. The photo detector device (40) of claim 12 or 13, wherein a number of island photodiode elements (24) is positioned underneath said aperture metal mask (42) , wherein each island photodiode element (24) comprises a core set (22) formed by one of said idd implants (28) and one of said halo implants