WO2024196878A1 - Wireless power transfer system utilizing frequency multiplier inverter - Google Patents

Abstract

A frequency multiplier architecture for high-frequency capacitive Wireless Power Transfer (WPT) systems uses air-core transformers and includes an architecture that includes a frequency multiplier inverter having a plurality of switches, wherein a controller controls the frequency multiplier inverter to operate the plurality of switches at a frequency lower than a frequency at which power transfer is performed in the WPT system. In particular, WPT systems may utilize a Zero Voltage Switching (ZVS) induction circuit to reduce circulating currents thereby enabling ZVS or near ZVS resulting in high efficiency, which is of particular use for Electric Vehicle (EV) charging. In accordance with at least one implementation, architecture can reduce the inverter transistor's switching frequency by any desired factor compared to the system's resonant frequency, thereby improving transistor switching performance and reducing high-frequency-dependent losses.

Description

WIRELESS POWER TRANSFER SYSTEM UTILIZING FREQUENCY MULTIPLIER INVERTER

CROSS REFERENCE AND PRIORITY CLAIM

[0001] This patent application claims priority to U.S. Provisional Patent Application 63/452,888, filed March 17, 2023, the disclosures of which are incorporated herein by reference in their entirety.

FIELD

[0002] Presently disclosed embodiments relate generally to high-frequency capacitive Wireless Power Transfer (WPT) systems, e.g., within the range of 100 kHz to 50 MHz(including the ISM bands), and the preferred range for the application is 1 MHz-50 MHz (including the ISM bands). Disclosed embodiments pertain more specifically to a frequency multiplier architecture for such systems that can reduce inverter transistor switching frequency relative to the WPT system's resonant frequency.

BACKGROUND

[0003] WPT has many applications including the charging of consumer electronic devices (e.g., mobile phones, watches, tablets, and laptops), robots, electric forklifts, and Electric Vehicles (EVs). Further, WPT can help increase the adoption of EVs by providing convenient charging options while a vehicle is parked or while it is moving.

[0004] In-motion wireless charging of robots, electric forklifts and EVs can enable the onboard battery size to be reduced, thereby lowering the cost of a vehicle. In-motion wireless charging of robots, electric forklifts, and EVs may also eliminate or reduce charging time and further address range limitations.

[0005] Conventionally known WPT systems for EVs utilize either magnetic fields between inductively coupled coils or electric fields between capacitively coupled plates to wirelessly transfer power from ground to the vehicle. Capacitive WPT systems can operate at higher frequencies than their inductive counterparts because capacitive WPT systems do not utilize ferrites for flux guidance and shielding; this leads to an associated, and commercially valuable, reduction in system size and cost. [0006] Presently, the maximum power transfer capability of state-of-the-art high- frequency WPT systems is limited to only a few kilowatts. This is because the transistors used in the inverters of high-frequency WPT systems have limited power handling capability. This is a particular issue for WPT systems operated in the multi-MHz range, such as in the ISM frequency bands (6.78 MHz, 13.56 MHz, etc.) because of the increased switching losses and rapid increase in dynamic on-resistance of high-frequency transistors occurring at those levels. However, disclosed embodiments have technical utility in inductively coupled WPT systems as well. Thus, it should be understood that the scope of the disclosed embodiments is not limited to capacitive WPT systems.

[0007] Nevertheless, there is a recognized need for high-power WPT systems in order to further decrease battery charging times. One conventional approach to increasing the power transfer capability of high-frequency WPT systems has been to utilize parallel multiple inverters using various conventional power combining techniques including power-combining techniques. However, this approach still requires that inverter transistors switch at high frequencies, which necessarily results in large switching and conduction losses effecting efficiency. In addition, these losses result in equipment overheating and component failure.

SUMMARY

[0008] Hence, there is a need for a new approach to increase the power transfer capability of high-frequency WPT systems. Accordingly, disclosed embodiments provide a frequency multiplier architecture for high-frequency WPT systems that uses air-core transformers and includes an architecture that can reduce the inverter transistor's switching frequency by any desired factor compared to the system's resonant frequency, thereby improving transistor switching performance and reducing high-frequency-dependent losses. As a result, a WPT system is provided that includes a frequency multiplier inverter having a plurality of switches, wherein a controller controls the frequency multiplier inverter to operate the plurality of switches at a frequency lower than a frequency at which power transfer is performed in the WPT system. As a result, the switches in the frequency multiplier inverter of the WPT system are switched at a frequency lower than the frequency at which power is transferred in the WPT system. [0009] In accordance with disclosed embodiments, since the inverter transistors’ switching frequency is reduced by the inverter’s frequency-multiplication factor, the transistor losses are reduced in the system.

[0010] In accordance with various disclosed embodiments, WPT systems utilizing the disclosed frequency multiplier inverters may utilize a Zero Voltage Switching (ZVS) induction circuit to reduce circulating currents thereby enabling ZVS or near ZVS resulting in high efficiency, which is of particular use for (EV charging.

[0011] In accordance with at least one disclosed embodiment, the frequency multiplier inverter is a frequency doubler, wherein the frequency multiplier inverter comprises two switched inverters and a controller circuit configured and coupled thereto to control operation of the switched inverters.

[0012] In accordance with at least one disclosed embodiment, the frequency multiplier inverter is a frequency quadruples wherein the frequency multiplier inverter comprises four switched inverters and a controller circuit configured and coupled thereto to control operation of the switched inverters.

[0013] In accordance with at least one other embodiment, a frequency multiplier architecture for high-frequency capacitive WPT systems using air-core transformers is provided wherein the architecture serves to reduce the inverter transistor’s switching frequency by any desired factor compared to the system’s resonant frequency, thereby improving transistor switching performance and reducing high-frequency-dependent losses.

[0014] Additional features of the present disclosure will become apparent to those skilled in the art upon consideration of illustrative embodiments exemplifying the best mode of carrying out the disclosure as presently perceived.

BRIEF DESCRIPTION OF THE FIGURES

[0015] The concepts described herein are illustrated by way of example and not by way of limitation in the accompanying figures. For simplicity and clarity of illustration, elements illustrated in the figures are not necessarily drawn to scale. Where considered appropriate, reference labels have been repeated among the figures to indicate corresponding or analogous elements. [0016] Fig. 1 illustrates an example of the topology of a conventional capacitive WPT system for Electric Vehicle (EV) charging.

[0017] Fig. 2 illustrates an example of a topology of a capacitive WPT system utilizing a frequency doubler inverter, where the inverter AC output voltage has a frequency which is twice the transistor switching frequency, in accordance with at least one of the various disclosed embodiments.

[0018] Fig. 3 illustrates an example of a switching sequence of the frequency doubler inverter illustrated in Fig. 2, in accordance with at least one of the various disclosed embodiments, wherein the inverter output voltage is also shown.

[0019] Fig. 4 illustrates an example of a topology of a capacitive WPT system utilizing a frequency quadrupler inverter where the inverter AC output voltage has a frequency which is four times the transistor switching frequency, in accordance with at least one of the various disclosed embodiments.

[0020] Fig. 5 illustrates an example of a switching sequence of the frequency quadrupler inverter illustrated in Fig. 4 , in accordance with at least one of the various disclosed embodiments, wherein the outputs of the two stacked bridges and the inverter switch-node are also shown.

[0021] Fig. 6 illustrates examples of switching states of the frequency quadrupler inverter illustrated in Fig. 4, for half a switching period, depicting the charging and discharging cycles of one of the flying capacitors.

[0022] Fig. 7 illustrates Spice simulated operating waveforms of a capacitive WPT system utilizing the frequency quadrupler inverter, for example, as illustrated in Fig. 4, and depicting the inverter output voltage, output current and gate drive waveforms, in accordance with at least one of the various disclosed embodiments.

[0023] Fig. 8 illustrates an estimated efficiency of three 6.78-MHz 12-cm air-gap capacitive WPT systems utilizing a conventional full-bridge inverter, a frequency doubler inverter and a frequency quadrupler inverter, as a function of their input DC voltage.

[0024] Fig. 9(a) illustrates an example of predicted matching network losses provided to detail the technical utility of the disclosed embodiments relative to conventional approaches.

[0025] Fig. 9(b) illustrates an example of fringing electric field strength provided to detail the technical utility of the disclosed embodiments relative to conventional approaches. [0026] Fig. 10 illustrates an example of calculated and LTSpice-simulated losses in each inverter transistor and a total loss in the inverter for three 6.78-MHz 12-cm air-gap capacitive WPT systems delivering 3 kW power, designed using: (i) a conventional full-bridge inverter, (ii) a frequency doubler inverter, in accordance with at least one of the various disclosed embodiments and, (iii) a frequency quadrupler inverter, in accordance with at least one of the various disclosed embodiments.

[0027] Fig. 11 illustrates an example of calculated and LTSpice-simulated loss in each inverter transistor for three different 6.78-MHz 12-cm air-gap frequency quadrupler inverter-based capacitive WPT systems in accordance with at least one of the various disclosed embodiments, wherein the inverter transistors are implemented using three different device technologies.

[0028] Fig. 12 shows measured waveforms in experimental validation of the effectiveness of operation of frequency multiplier inverter implemented WPT systems for a 6.78-MHz 12-cm airgap prototype capacitive WPT system using a frequency doubler inverter implementation in accordance with at least one of the various disclosed embodiments.

[0029] Fig. 13 illustrates an example of an architecture of a capacitively coupled wireless power transfer system utilizing a frequency multiplier inverter, in accordance with at least one of the various disclosed embodiments.

[0030] Fig. 14 illustrates an example of an architecture of an inductively coupled wireless power transfer system utilizing a frequency multiplier inverter, in accordance with at least one of the various disclosed embodiments.

[0031] Fig. 15 illustrates an example of a topology of a capacitive WPT system utilizing a frequency doubler inverter, in accordance with at least one of the various disclosed embodiments, wherein an inverter output voltage has a frequency which is twice the transistor switching frequency.

[0032] Fig. 16 illustrates an additional example of a topology of a capacitive WPT system utilizing a frequency doubler inverter, in accordance with at least one of the various disclosed embodiments, wherein an inverter output voltage has a frequency which is twice the transistor switching frequency.

[0033] Fig. 17 illustrates an example of a topology of a capacitive WPT system utilizing a frequency quadrupler inverter, in accordance with at least one of the various disclosed embodiments, wherein an inverter output voltage has a frequency which is four times the transistor switching frequency.

[0034] Fig. 18 illustrates another example of a topology of a capacitive WPT system utilizing a frequency quadrupler inverter, in accordance with at least one of the various disclosed embodiments, wherein an inverter output voltage has a frequency which is four times the transistor switching frequency.

[0035] Fig. 19 illustrates another example of a topology of a capacitive WPT system utilizing a frequency quadrupler inverter, in accordance with at least one of the various disclosed embodiments, wherein an inverter output voltage has a frequency which is four times the transistor switching frequency.

[0036] Fig. 20 illustrates another example of a topology of a capacitive WPT system utilizing a frequency quadrupler inverter, in accordance with at least one of the various disclosed embodiments, wherein an inverter output voltage has a frequency which is four times the transistor switching frequency.

[0037] Fig. 21 illustrates an example of a dynamic EV charging scenario using a capacitive WPT system.

[0038] Fig. 22 illustrates an example of the topology of frequency multiplier architecture for capacitive WPT systems using a parallel-in series-out transformer in accordance with at least one embodiment.

[0039] Fig. 23 illustrates an example of a potential switching sequence of the illustrated in Fig. 22 in the frequency multiplier architecture according to at least this embodiment.

[0040] Fig. 24 illustrates an example of an equivalent circuit model realizing each winding of the transformer according to at least this embodiment.

[0041] Fig. 25 shows the topology of a frequency doubler-based capacitive WPT system using the architecture according to at least this embodiment.

[0042] Figs. 26(a) and (b) illustrate how the present embodiment operation differs from that of a conventional design provided taking into account only transformer efficiency.

[0043] Fig. 27 illustrates experimentally measured on-resistance of a commercially available 650-V Gallium Nitride (GaN) device from GaN Systems, as a function of the switching frequency, normalized with respect to its DC resistance. [0044] Fig. 28 illustrates the relative loses for three different systems including a conventional full-bridge inverter-based system, a frequency doubler-based system (in accordance with disclosed embodiments) and a frequency quadrupler-based system (in accordance with disclosed embodiments), each delivering the same power.

[0045] Fig. 29 illustrates inverter losses in the three 6.78-MHz 12-cm air-gap capacitive WPT systems as a function of the output power.

[0046] Figs. 30(a) and 30(b) show the measured waveforms of two inverters along with the matching network output current when the capacitive WPT system delivers 200W DC power.

DETAILED DESCRIPTION

[0047] While the concepts of the present disclosure are susceptible to various modifications and alternative forms, specific embodiments thereof have been shown by way of example in the drawings and will be described herein in detail. It should be understood, however, that there is no intent to limit the concepts of the present disclosure to the particular forms disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives consistent with the present disclosure and the appended claims.

[0048] References in the specification to “one embodiment,” “an embodiment,” “an illustrative embodiment,” etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may or may not necessarily include that particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described. Additionally, it should be appreciated that items included in a list in the form of “at least one A, B, and C” can mean (A); (B); (C): (A and B); (B and C); or (A, B, and C). Similarly, items listed in the form of “at least one of A, B, or C” can mean (A); (B); (C): (A and B); (B and C); or (A, B, and C).

[0049] In the drawings, some structural or method features may be shown in specific arrangements and/or orderings. However, it should be appreciated that such specific arrangements and/or orderings may not be required. Rather, in some embodiments, such features may be arranged in a different manner and/or order than shown in the illustrative figures. Additionally, the inclusion of a structural or method feature in a particular figure is not meant to imply that such feature is required in all embodiments and, in some embodiments, may not be included or may be combined with other features.

[0050] In accordance with various disclosed embodiments, a wireless power transfer system utilizes a frequency multiplier inverter. The switches in the frequency multiplier inverter are switched at a frequency lower than the frequency at which power is transferred in the wireless power transfer system. Since the inverter transistors’ switching frequency is reduced by the inverter’s frequency-multiplication factor, the transistor losses are reduced in the system.

[0051] In order to understand the technical innovation of the presently disclosed embodiments, a brief explanation of conventional capacitive WPT system operation is provided. An example of the topology of a conventional capacitive WPT system for EV charging is shown in Fig. 1. More specifically, Fig. 1 illustrates an example of the topology of a conventional capacitive WPT system 100 with a Class-D amplifier-based high-frequency inverter 105. In such an implementation, power is transferred wirelessly in the system 100 through a large air-gap by using a pair of coupling plates, for example, with one pair embedded in the roadway at the roadway side 110 and the other pair attached underneath a vehicle chassis at the vehicle side 115. In such an implementation, the inverter 105 converts the DC input voltage to high-frequency AC voltage. The inverter 105 is conventionally implemented as a full-bridge inverter.

[0052] Two L-section matching networks, one, 120, on the roadway side and one, 125, on the vehicle side, step-up and step-down the voltage, respectively, to allow relatively small displacement currents through the air-gap. The two matching networks 120, 125 also together fully compensate for the reactance of the capacitive couplers. For maximum power transfer, the operating frequency of the WPT system must be equal to the resonant frequency of the WPT system.

[0053] Thus, in this conventional system, the switching frequency of the inverter transistors is the same as the operating frequency of the system. Since these systems typically operate at one of the Industrial, Scientific, and Medical (ISM) radio frequency bands, the inverter transistors must be implemented using wide-bandgap high-frequency Gallium Nitride (GaN) semiconductor devices. As a result, high frequencies operation limits the power handling capability of these transistors, due to increased switching losses and rapid increase in dynamic on- resistance of the GaN transistors.

[0054] To the contrary, disclosed embodiments provide a frequency multiplier architecture for high-frequency WPT systems that uses air-core transformers and includes an architecture that can reduce the inverter transistor's switching frequency by any desired factor compared to the system's resonant frequency, thereby improving transistor switching performance and reducing high-frequency-dependent losses.

[0055] As a result, a WPT system is provided that includes a frequency multiplier inverter having a plurality of switches, wherein a controller controls the frequency multiplier inverter to operate the plurality of switches at a frequency lower than a frequency at which power transfer is performed in the WPT system. Thus, the switches in the frequency multiplier inverter of the WPT system may be switched at a frequency lower than the frequency at which power is transferred in the WPT system.

[0056] In accordance with various disclosed embodiments, the frequency multiplier inverter is such that its switches are switched at a switching frequency which is a factor of two lower than the frequency at which power is transferred in the wireless power transfer system.

[0057] More specifically, for example, the frequency multiplier inverter may comprise two or more switched inverters and a controller circuit coupled to operate the switched inverters to produce an output frequency which is two times higher than the switching frequency of the switches of the switched inverter.

[0058] More specifically, the topology of a capacitive WPT system utilizing a frequency doubler inverter is shown in Fig. 2. Fig. 2 illustrates an example of a topology of a capacitive WPT system 200 utilizing a frequency doubler inverter 205, where the inverter AC output voltage VOUT has a frequency which is twice the transistor switching frequency, in accordance with at least one of the various disclosed embodiments. The topology of the frequency doubler inverter 205 is similar to inverters used in conventionally known Variable Frequency Multiplier (VFX) Power Converters. However, unlike VFX inverters, which operate in both fundamental and harmonic modes, the frequency doubler inverter of the presently disclosed embodiments only operates in the frequency doubling mode and includes a shunt LC circuit 210 (ZVS tank comprising a series L_zvs and C_block) across the inverter output port, as can be seen from Fig. 2. [0059] The inductor L_zvs provides the required inductive current to achieve Zero Voltage Switching (ZVS) of the inverter transistors. This configuration serves to reduce or eliminate a need for reactive current at the inverter output port from the matching networks thereby enabling the matching networks to be more efficient.

[0060] In at least one implementation of this embodiment, the capacitor C_biock may be implemented as a DC-blocking capacitor designed to have a large enough value to exhibit negligible impedance at the system operating frequency. The required value for the ZVS tank inductor, Lzvs can be determined from:

where t_d is the dead time between the complimentary transistors, C_{oss eqv} is the charge equivalent value of the transistor’s output capacitance, and f₀ is the system operating frequency.

[0061] The switching sequence of the inverter transistors (i.e., switches Q1-Q4) of the frequency doubler inverter 205 is shown in Fig. 3. Fig. 3 illustrates an example of a switching sequence of the frequency doubler inverter illustrated in Fig. 2 in accordance with at least one of the various disclosed embodiments, wherein the inverter output voltage is also shown. As illustrated, there are four switching states and the on times for each of these states may be selected so that the inverter AC output voltage has a frequency that is twice the transistor switching frequency. This inverter topology and control eliminates the fundamental component of the inverter’s output voltage and reinforces the second harmonic component.

[0062] In accordance with various disclosed embodiments, the frequency multiplier inverter topology may also be configured such that its switches are switched at a switching frequency that is a factor of four lower than the frequency at which power is transferred in the wireless power transfer system. More particularly, in accordance with at least some disclosed embodiments, the frequency multiplier inverter may comprise four or more switched inverters and a controller circuit coupled to operate the switched inverters to produce an output frequency which is four times higher than the switching frequency of the switches of the switched inverters.

[0063] The topology of such a WPT system utilizing a frequency quadrupler inverter is shown in Fig. 4. Fig. 4 illustrates an example of a topology of a capacitive WPT system 400 utilizing a frequency quadrupler inverter 405, in which the inverter AC output voltage has a frequency which is four times the transistor switching frequency, in accordance with at least one of the various disclosed embodiments. Unlike the frequency doubler inverter example illustrated in Fig. 2, which utilizes four switches Q1-Q4, the frequency quadrupler inverter 405 utilizes eight switches Q1-Q8.

[0064] While the topology of the frequency quadrupler inverter 405 resembles that of a conventional multilevel inverter, it is operated and functions quite differently. A conventional multilevel inverter is generally used to produce different voltage levels at its output to help reduce the total harmonic distortion of the output AC voltage. To the contrary, the frequency quadrupler inverter 405 is operated using a novel pulse width modulation technique to produce only one of two voltage levels to quadruple the frequency of the output AC voltage relative to the switching frequency of the inverter switches, as shown in Fig. 5.

[0065] Fig. 5 illustrates an example of a switching sequence of the frequency quadrupler inverter illustrated in Fig. 4 , in accordance with at least one of the various disclosed embodiments. As shown in Fig. 5, the voltage outputs of the two stacked bridges Vj_nvl, v_inv2 and the inverter switch-node v_sw are also shown.

[0066] In an exemplary implementation, to generate a desired AC output having a frequency that is four times the switching frequency, the fourth harmonic component may be used, while canceling the undesired frequencies. To achieve this, the duty ratios and switching sequence of the transistors in the inverter may be chosen appropriately to synthesize the desired output waveform v_inv, as shown in Fig. 5.

[0067] Using Fourier analysis, the square pulse output of the top and bottom stacked bridges v_inv1 , Unv2 can be expressed as:

where a)_s is the transistor radial switching frequency. Since the output voltage of the frequency quadrupler inverter 405 is the difference between the two stacked bridge voltages (v_sw = v_invl — U11V2 it ^can b^{e seen} by subtracting (3) from (2) that only the fourth harmonic component remains in the output waveform v_sw.

[0068] Frequency analysis may be used to extend this recognition to other topologies. For example, by using Fourier analysis to express the square pulse output, on may determine the required switching pattern and the appropriate duty ratios for any generic frequency multiplier topology.

[0069] In this inverter, each of the two input capacitors Cini, Cm2 are charged to half the input voltage VIN. TO find the voltage across the two flying capacitors, the switching states of the inverter are considered for half the switching period, as shown in Figs. 6(a)-(d), which illustrate examples of switching states of the frequency quadrupler inverter 405 for half a switching period, depicting the charging and discharging cycles of one of the flying capacitors. Using the charge balance constraint and equating the charging and discharging currents, the voltage across the flying capacitor can be expressed as:

Vcfci = - (⁴)

[0070] A similar analysis for the other half of the switching period yields V_cfc2 = — ■ Correspondingly, each transistor Qi-Qs in the inverter 405 blocks only one-fourth the input voltage (^•). Hence, while the magnitude of the inverter AC output voltage is reduced compared to a fullbridge inverter requiring higher DC input voltage to deliver the same power, the blocking voltages are only a fraction of this voltage.

[0071] Performance of the theoretical aspects of the frequency quadrupler inverter operation has been verified using several LTSpice-based simulations. For example, simulated waveforms of a capacitive WPT system utilizing the frequency quadrupler inverter 405 are shown in Fig. 7, which illustrates Spice simulated operating waveforms of the capacitive WPT system illustrated in Fig. 4, and depicts the inverter output voltage v_sw, output current i_inv and gate drive waveforms v_swgs,Qi, in accordance with at least one of the various disclosed embodiments.

[0072] In order to further describe and enable the disclosed embodiments and their improved technical utility, descriptions are now provided regarding the use of high-power, high- frequency capacitive WPT systems designed using a conventional full-bridge inverter in comparison to such systems using a frequency doubler inverter and a frequency quadrupler inverter in accordance with the presently disclosed embodiments. Based on the following descriptions, various advantages and disadvantages of each approach are systematically detailed with reference to input voltage selection and matching network design considerations as they effect performance. [0073] Each of the compared systems is designed to charge EVs with 12-cm air-gap heights, while operating at a frequency of 6.78 MHz. The input and output voltages have been assumed to be 400 V and inductors with a quality factor of 1500 are considered. In this comparison, selection of input voltage the output power transfer capability of a capacitive WPT system can be expressed as:

where ij_nv,_max is the maximum inverter output current and keN represents the harmonic of the inverter fundamental voltage that is generated by the inverter (k = 2 for the frequency doubler and k = 4 for the frequency quadrupler). With this understanding in mind, formula (5) dictates that keeping the output power the same requires a decrease in amplitude of the inverter AC output voltage due to the harmonic factor k must be compensated for.

[0074] This may be implemented conventionally by either increasing the input DC voltage or by permitting higher currents to flow through the inverter transistors. However, higher inverter currents lead to higher conduction losses in the inverter transistors and the matching networks, which leads to a lower overall system efficiency.

[0075] Conversely, for the capacitive WPT systems utilizing frequency multiplier inverters in accordance with the disclosed embodiments, the input DC voltage can be raised to maintain a similar system efficiency as the WPT system using the conventional full-bridge inverter, as shown in Fig. 8. As shown in that figure, an estimated efficiency of three 6.78-MHz 12-cm air-gap capacitive WPT systems utilizing a conventional full-bridge inverter 805, a frequency doubler inverter 810 and a frequency quadrupler inverter 815, are illustrated as a function of their input DC voltage.

[0076] Turning to consideration of matching network design and the effect of the disclosed embodiments thereon, it should be appreciated that matching networks of a capacitive WPT system are meant to provide voltage gain and reactive compensation. Matching networks can be designed based on the voltage step-up they must provide, input-to-output voltage gain and the coupling reactance. The coupling reactance corresponds to the coupling capacitance between two 22-cm diameter plates, separated by 12-cm air-gap. For simplicity of implementation, single-stage matching network designs are considered for illustration of the technical utility of the disclosed embodiments.

[0077] As an example of a conventionally known design, the efficient matching network design technique proposed in S. Sinha, A. Kumar, B. Regensburger and K.K. Afridi, “Design of High-Efficiency Matching Networks for Capacitive Wireless Power Transfer Systems,” IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 10, no. 1, pp. 104-127, February 2022, may be used for comparison with the matching network design provided in accordance with the disclosed embodiments. Another way to design of an efficient single-stage matching networks is to incorporate the maximum allowable air-gap voltage in the design equations. Under this approach, the matching networks can be designed using the following expressions:

where E_Umit is the fringing field safety limit, and G_{i vg}, Q_iniVg, Qi_oad,vg ^{and G}i,cg> Qin, eg, > Qioad.cg are the current gain, input quality factor and load quality factors of the roadway and vehicle-side matching networks, respectively.

[0078] The predicted matching network losses 905 and fringing electric fields 910 when the matching networks are designed in accordance with disclosed embodiments are shown in Figs. 9(a) and 9(b) in comparison with those of matching networks designed in accordance with the conventional technique 915, 920. The relationships between the total matching network loss and different input-to-output voltage gain ratios are illustrated in Fig. 9(a) when a capacitive WPT system transfers 3 kW. As shown in Fig. 9(a), the predicted matching network losses associated with the disclosed embodiments tracks that of the conventional design with a slight positive offset of 25 W.

[0079] However, for further consideration, Fig. 9(b) illustrates an example of fringing electric field strength in a 6.78-MHz 12-cm air-gap capacitive WPT system when delivering its rated power, plotted for both the matching network designed using the conventional example and the matching network design provided in accordance with at least one of the various disclosed embodiments. It should be noted that, although the output of the matching networks directly interfaces to an EV battery using a rectifier, in an optional implementation, a DC-DC converter can be used in cascade; hence, the matching network output voltage can actually be different than the battery voltage. As shown in Figure 9(b), the fringing field strength for the conventional design is higher than the field safety limits set by the International Commission on Non-Ionizing Radiation Protection (ICNIRP) throughout the full range of predicted input to output voltage gain. However, the field strength predicted for the matching networks designed in accordance with the disclosed embodiments remain constant and below the prescribed safety limits throughout that range.

[0080] Thus, as illustrated in Figs. 9(a) and 9(b), it can be seen that, although the matching network losses for the disclosed embodiments are slightly higher than available in the conventional approach, the fringing field strength is cut by almost half, thereby enabling adherence to safety standards.

[0081] Predicted performance of the three capacitive WPT systems designed using the three different inverter architectures (i.e., conventional full-bridge inverter, a frequency doubler inverter and a frequency quadrupler inverter) are now compared. In this comparison of performance, the key metrics to consider are the loss per inverter transistor and the total losses in the inverter. In a modeled implementation, the inverter transistors in all three systems are considered to be implemented as Gallium Nitride (GaN) devices. The calculated and simulated inverter losses for this modeled implementation are shown in Fig. 10, which provides an example of calculated and LTSpice-simulated losses in each inverter transistor 1005 and a total loss in the inverter 1010 for three 6.78-MHz 12-cm air-gap capacitive WPT systems delivering 3 kW power, designed using: (i) a conventional full-bridge inverter, (ii) a frequency doubler inverter, in accordance with at least one of the various disclosed embodiments and, (iii) a frequency quadrupler inverter, in accordance with at least one of the various disclosed embodiments.

[0082] As can be seen in Fig. 10, the frequency quarupler inverter-based capacitive WPT system has the lowest losses per inverter transistor (both calculated and simulated). This reduction in losses is owing to the reduction in switching frequency by four, which reduces the switching and conduction losses in the transistors. The frequency doubler inverter-based capacitive WPT system has the lowest total losses in the inverter, because of the smaller number of switches compared to the frequency quadrupler inverter-based system.

[0083] Of note, a frequency quadrupler inverter-based 6.78-MHz capacitive WPT system in accordance with the disclosed embodiments requires its transistors to switch at one-fourth the system operating frequency, i.e., at 1.39 MHz. As a result of the potential for this lower switching frequency, the inverter transistors may optionally be implemented using wide-bandgap GaN high- electron mobility devices, traditional Silicon devices or next-generation Silicon Carbide (SiC) devices. When considering the technical utility of such implementations of the disclosed embodiments, three different frequency quadrupler inverter-based capacitive WPT systems have been designed using commercially available 650-V devices from the three different technologies. Analytical prediction and LTSpice simulation of the corresponding loss per device when each system transfers 3 kW power are illustrated in Fig. 11. More specifically, Fig. 11 illustrates an example of the calculated and LTSpice-simulated loss in each inverter transistor for 6.78-MHz 12- cm air-gap frequency quadrupler inverter-based capacitive WPT systems 1105-1115 utilizing wide-bandgap GaN high-electron mobility devices (1105), traditional Silicon devices (1110) and next-generation SiC devices (1115). As shown in Fig. 11, it can be seen that the loss per device in the GaN-based device implemented system 1105 is the lowest owing to the low switching and reverse recovery -related losses while the SiC-based system 1115 has slightly higher switching loss per device. Thus, it should be appreciated that SiC devices have considerably higher power handling capability than GaN devices, making them potentially useful for higher power capacitive WPT system designed in accordance with the disclosed embodiments.

[0084] Experimental validation of the effectiveness of operation of frequency multiplier inverter implemented WPT systems designed in accordance with the disclosed embodiments has been performed for a 6.78-MHz 12-cm air-gap prototype capacitive WPT system using the frequency doubler inverter implementation implemented in a Printed Circuit Board (PCB) configuration. In implementation of such a prototype, matching networks were implemented using high quality factor single layered solenoid air cored inductors and roadway embeddable charging pads, the inverter transistors were implemented using 650-V FETs and 650-V Schottky diodes were used in the high frequency rectifier.

[0085] With regard to the experimental validation, Fig. 12 shows the measured waveforms of the system when it delivers 300W DC output power. It can be seen that the transistors switch at half the inverter output frequency and achieve near-ZVS, resulting in high efficiency. As a result, when compared to a conventional full-bridge inverter-based capacitive WPT system, the prototype system measured to have lower losses in the inverter transistors, thereby improving transistor switching performance and reducing high-frequency-dependent losses.

[0086] Turning to an explanation of the controlled operation of the disclosed frequency multiplier inverters in a WPT system in accordance with the disclosed embodiments, Fig. 13 illustrates a specific example of the overall architecture of a capacitively coupled wireless power transfer system utilizing a frequency multiplier inverter, in accordance with at least one of the various disclosed embodiments. As shown in Fig. 13, the WPT system 1300 includes a controller 1305 coupled to the frequency multiplier inverter 1310, which is configured to control operation of the inverter 1310 provide the disclosed operation thereof and functionality discussed herein. Likewise, Fig. 14 illustrates an example of the overall architecture of an inductively coupled WPT system 1400 utilizing a frequency multiplier inverter 1410 operating under control of controller 1405, in accordance with at least one of the various disclosed embodiments.

[0087] Such a controller may be implemented, for example, and without limitation using an electronic digital computer, or a circuitry which may comprise one or more processing units implemented in a combination of hardware and software including various different implementations including: (a) hardware-only circuit implementations, and (b) combinations of circuits and software (and/or firmware), such as (as applicable): (i) a combination of processor(s) or (ii) portions of processor(s)/software including digital signal processor(s), software, and memory(ies) that work together to cause an apparatus to perform the various operations and functions disclosed herein. [0088] Although the majority of the disclosed embodiments discussed herein pertain to capacitively coupled plates for wireless transport power. It should be appreciated that, in accordance with various disclosed embodiments, a wireless power transfer system transfers power using an inductive coupling. As discussed above, capacitive WPT systems can operate at higher frequencies than their inductive counterparts because capacitive WPT systems do not utilize ferrites for flux guidance and shielding; this leads to an associated, and commercially valuable, reduction in system size and cost. However, disclosed embodiments have technical utility in inductively coupled WPT systems as well. Thus, it should be understood that the scope of the disclosed embodiments is not limited to capacitive WPT systems.

[0089] Turning to additional contemplated variations of the disclosed embodiments, it should be understood that the WPT systems utilizing a frequency multiplier inverter described above are merely examples of many possible implementations in accordance with the disclosed embodiments. For example, in one possible implementation, a wireless charging system utilizing a frequency doubler inverter maybe provided, wherein the switches are implemented using one or more field effect transistors (FETs), as shown in Fig. 15. As such, Fig. 15 illustrates an example of a topology of a capacitive WPT system utilizing a frequency doubler inverter, in accordance with at least one of the various disclosed embodiments, wherein an inverter output voltage has a frequency which is twice the transistor switching frequency.

[0090] In another implementation, a wireless charging system utilizing a frequency doubler inverter maybe provided, wherein the inverter switches are connected using a flying capacitor, as shown in Fig. 16. As such, Fig. 16 illustrates an additional example of a topology of a capacitive WPT system utilizing a frequency doubler inverter wherein an inverter output voltage has a frequency which is twice the transistor switching frequency.

[0091] Further, in another possible implementation of a wireless charging system utilizing a frequency quadrupler inverter, the switches may be implemented using one or more FETs, as shown in Fig. 17. As such, Fig. 17 illustrates an additional example of a topology of a capacitive WPT system utilizing a frequency quadrupler inverter, in accordance with at least one of the various disclosed embodiments, wherein an inverter output voltage has a frequency which is four times the transistor switching frequency. [0092] Likewise, in another implementation of a wireless charging system utilizing a frequency quadrupler inverter in accordance with the disclosed embodiments, the switches may be connected using three flying capacitors, as shown in Fig. 18. Accordingly, Fig. 18 illustrates another example of a topology of a capacitive WPT system utilizing a frequency quadrupler inverter, in accordance with at least one of the various disclosed embodiments, wherein an inverter output voltage has a frequency which is four times the transistor switching frequency.

[0093] In yet another implementation of a wireless charging system utilizing a frequency quadrupler inverter based WPT system in accordance with the disclosed embodiments, the switches may be configures so as to be stacked into four switching bridges, and their outputs are combined using a power combiner network, as shown in Fig. 19. Fig. 19 illustrates another example of a topology of a capacitive WPT system utilizing a frequency quadrupler inverter, in accordance with at least one of the various disclosed embodiments, wherein an inverter output voltage has a frequency which is four times the transistor switching frequency. The power combiner can have one of several implementations, including switched capacitor power combiners and resonant DC- DC converters utilizing impedance control networks.

[0094] In another implementation, a wireless charging system utilizing a frequency multiplier inverter maybe provided where the inverter is comprised of multiple basic switching cells (where a basic switching cell comprises a combination of two or more switches that maybe connected using flying capacitors), and the basic switching cells may be stacked using series capacitors such that the input de voltage is split equally between the cells, and the outputs of all the cells are combined using a power combiner network, as shown in Fig. 20. As such, Fig. 20 illustrates another example of a topology of a capacitive WPT system utilizing a frequency quadrupler inverter, in accordance with at least one of the various disclosed embodiments, wherein an inverter output voltage has a frequency which is four times the transistor switching frequency. The power combiner can have one of several implementations, including switched capacitor power combiners and resonant DC-DC converters utilizing impedance control networks.

[0095] As discussed above, WPT can potentially increase adoption of EVs by enabling stationary, semi-dynamic and dynamic charging and helping to overcome their cost, charging time, and range limitations. WPT systems for EVs utilize either magnetic fields between inductively coupled coils or electric fields between capacitively coupled plates to wirelessly transfer power from the ground to the vehicle. Capacitive WPT systems can operate at much higher frequencies than their inductive counterparts leading to reduction in system size and cost. In EV charging applications, for example, such as the one shown in Fig. 21, high-power capacitive WPT systems are needed to decrease the charging time. Fig. 21 illustrates an example of a dynamic EV charging scenario using a capacitive WPT system 2100, showing the roadway-side 2105 and vehicle-side 2110 charging pads, together with the transmitter 2115 and receiver 2120 power electronics. Maximum power transfer capability of the state-of-the-art capacitive WPT systems of this type are limited to only to a few kilowatts. This is because the transistors used in the inverters of high- frequency WPT systems have limited power handling capability. This is especially true when the WPT systems are operated in the multi-MHz range, such as in the ISM frequency bands (6.78 MHz, 13.56 MHz, etc.), due to increased switching losses and rapid increase in dynamic on- resistance of high-frequency transistors.

[0096] Conventional VFX architecture-based frequency doubler topologies have been proposed in the context of an LLC resonant converter to improve its operating range. However, such topologies require complicated isolated gate driver circuits to drive stacked-bridge switches. In addition, the fundamental voltage appearing across the inverter switch nodes is naturally reduced by two times, requiring high currents to transfer power, leading to higher conduction losses and a lower system efficiency. Also, such topologies require transistors to switch at 3.39MHz for a 6.78-MHz capacitive WPT system, which is high enough for commercially available wide-bandgap High-Electron Mobility Transistors (HEMTs) to become unreliable and traditional Silicon and Silicon-Carbide (SiC)-based transistors to be unusable.

[0097] To address such issues, at least one disclosed embodiment provides a frequency multiplier architecture for high-frequency capacitive WPT systems using air-core transformer, wherein the inverter transistor’s switching frequency can be reduced by any desired factor compared to the system’s resonant frequency, thereby improving transistor switching performance and reducing high-frequency-dependent losses. In implementation, a large air-gap 6.78-MHz capacitive WPT system may be designed accordingly, e.g., a 6.78-MHz 12-cm air-gap capacitive WPT system.

[0098] Fig. 22 illustrates an example of the topology of frequency multiplier architecture for capacitive WPT systems using a parallel-in series-out transformer in accordance with at least one embodiment. The illustrated frequency multiplier architecture increases the power transfer capability of capacitive WPT systems by combining the output of multiple high-frequency inverters 2205, 2210, 2215 using a parallel-in series-out transformer to generate a frequency multiplied AC signal across the resonant WPT system. This architecture is highly scalable and can be used to generate any frequency multiplication factor at the output up to a value of N, (where JVis the number of inverters) without requiring a system redesign.

[0099] Fig. 23 illustrates an example of a potential switching sequence of the inverters 2205, 2210, 2215 illustrated in Fig. 22. The switching sequence of each inverter and the resultant transformer output voltage is shown in Fig. 23, when each inverter is implemented as a class-D inverter. Each inverter may generate an output AC signal that has one of two voltage levels (+VIN and -ViNor 0 depending on the inverter topology). By appropriately controlling the on times of the transistors in each inverter 2205-2215, as shown in Fig. 23, the resultant transformer output voltage can be shaped to have a frequency which is higher than the inverters’ switching frequency by a factor of N. This voltage has an amplitude given by:

[00100] where kiwis a voltage gain factor associated with the inverter topology. It should be noted that an increase or decrease in the required frequency multiplication factor, N simply requires turning an inverter on or off and adjusting the individual inverters’ switching durations. The inverter switching sequence shown in Fig. 23 to generate the frequency multiplied output voltage is not unique, and the same output voltage waveform can be generated using other switching sequence and transformer winding direction combinations.

[00101] The parallel-in series-out transformer can be implemented using air-core coupled inductors to minimize the core losses associated with cored magnetic materials at these frequencies. An equivalent circuit model realizing each winding of the transformer is shown in Fig. 24. Each winding can be designed to have a 1 : 1 turns ratio and implemented using interleaved foil wires to ensure a good coupling factor of 0.6 to 0.7. The magnetizing inductance of the windings can be advantageously used to achieve ZVS for the inverter transistors, since they provide an auxiliary current path to discharge the transistor output capacitances. The required selfinductance of the transformer windings to achieve transistor ZVS is given by:

[00102] where tdis the dead time between the complimentary transistors, C_0SS,eqvis the charge equivalent value of the transistor’s output capacitance and /.is the inverter switching frequency. Since, magnetizing inductance of each transformer designed using (11) provides the ZVS current needed for each inverter, the matching networks of the WPT system can be designed with zero input phase shift to look resistive from the input of the primary side L-section at the desired operating frequency. Optionally, the equivalent leakage inductance of the windings can be absorbed into the design of the capacitive WPT system, as discussed herein.

[00103] When considering use of the inventive frequency multiplier architecture to design high-power high-frequency capacitive WPT systems, it is useful to compare the performance of the frequency multiplier-based system to a conventional Class-D full bridge inverter-based system. Each system is designed to charge EVs with 12-cm air-gap heights, while operating at a resonant frequency of 6.78 MHz. The input and output voltages are assumed to be 400 V and inductors with a quality factor of 1000 are considered.

[00104] Figure 25 shows the topology of a frequency doubler-based capacitive WPT system using the presently disclosed architecture. The inverters in this system are implemented as fullbridge Class- D inverters. A series capacitor, Cser is added at the output of each inverter to compensate for the leakage of the transformer turns. This helps to absorb the leakage inductances of each winding into the inverter design without having to redesign the matching networks. This capacitance can be designed using:

[00105] The series capacitor also helps to block the DC voltage generated at the inverter output. The DC voltage that appears across each capacitor, for a N frequency multiplier architecture is given by:

[00106] The matching networks of the capacitive WPT system provide voltage gain and reactive compensation and can be designed based on the voltage step-up requirement, input-to- output voltage gain and the coupling reactance. For a better understanding of the technical effect of this disclosed embodiment, consider a design that simply focuses on maximizing system efficiency, e.g., that disclosed in S. Sinha, A. Kumar, B. Regensburger and K. K. Afridi, "Design of High-Efficiency Matching Networks for Capacitive Wireless Power Transfer Systems," in IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 10, no. 1, pp. 104-127, Feb. 2022. The present embodiment differs from such an approach and a simulated prediction of the associated matching network losses and fringing electric fields in the 6.78-MHz 22-cm air-gap capacitive WPT system with matching networks designed using the two techniques 2605, 2610 are shown in Figs. 26(a) and 26(b).

[00107] Fig. 27 illustrates experimentally measured on-resistance of a commercially available 650-V Gallium Nitride (GaN) device from GaN Systems, as a function of the switching frequency, normalized with respect to its DC resistance.

[00108] The performance of the presently disclosed frequency-multiplier architecture-based capacitive WPT systems to a conventional Class-D full bridge inverter-based system, the loss per inverter transistor 2810 and total inverter losses 2805 are compared.

[00109] In particular, Fig. 28 illustrates the relative loses for three different systems including a conventional full-bridge inverter-based system, a frequency doubler-based system (in accordance with disclosed embodiments) and a frequency quadrupler-based system (in accordance with disclosed embodiments), each delivering the same power.

[00110] Figure 28 shows the total inverter losses 2810 and the loss per inverter transistor 2805 of the three capacitive WPT systems when they each deliver 3 kW power, with the experimentally measured on-resistance values factored into (14)-( 16). It can be seen that the loss per inverter transistor is reduced considerably in the frequency doubler and frequency quadrupler systems. However, there are diminishing returns to reducing the frequency further, since the total inverter losses start increasing, leading to a reduction in system efficiency. The theoretical predictions were also validated using LTspice-based simulations of the three WPT systems. [00111] As shown in Fig. 28, each system operates at a resonant frequency of 6.78 MHz, and the inverter switching frequencies are sub-multiples of this resonant frequency, based on the multiplication factor. The total inverter loss in each system is given by:

P - r J os sAdl- bridge

p — r lossfr eq.doubler

p, , ,

¹ loss req.quadrupier

where /out,rms represents the rms value of the inverter output current,

denotes the switching energy lost in each transistor during each turn-off transition and

represents the on-resistance of the inverter transistors at 6.78 MHz, 3.39 MHz and 1.7 MHz respectively. At first glance, it may appear from (14)-(16) that the frequency multiplier architectures lead to higher losses in the inverter transistors. However, upon careful investigation and thorough experimental measurements, it is found that the dynamic on resistances of the high-frequency transistors increase rapidly at these frequencies.

[00112] Fig. 29 illustrates inverter losses in the three 6.78-MHz 12-cm air-gap capacitive WPT systems as a function of the output power. As shown in Fig. 29, the solid lines depict total inverter loss while the dashed lines pertain to loss per device. In Fig. 29, all of the inverters (the conventional full bridge 2905, frequency doubler 2910 and frequency quadrupler 2915) exhibit the initial hump in the curves that is due to the hard switching losses at lower powers. However, also shown, is the decrease of these losses at higher powers, at which the conduction loss starts to dominate. Since the frequency quadrupler-based 6.78-MHz capacitive WPT system requires its transistors to switch at one-fourth the operating frequency, i.e., 1.7MHz, it may also be viable to use Silicon Carbide (SiC) devices instead of GaN devices in the inverter.

[00113] Experimental validation of the effectiveness and operation of the this particular embodiment’s frequency multiplier architecture was performed with reference to a 6.78-MHz 12- cm air-gap frequency doubler-based prototype capacitive WPT system designed using two fullbridge Class-D amplifiers. In that experimental implementation, each winding of the transformer was realized using three turns of planar PCB-based windings. The matching networks were implemented using high quality factor single layered solenoid air cored inductors and charging pads. Figures 30(a) and 30(b) show the measured waveforms of two inverters along with the matching network output current when the capacitive WPT system delivers 200W DC power. As can be seen in the experimental results, the transistors switch at half the system resonant frequency and achieve near-ZVS.

[00114] While the disclosure has been illustrated and described in detail in the drawings and foregoing description, such an illustration and description is to be considered as illustrative and not restrictive in character, it being understood that only illustrative embodiments have been shown and described and that all changes and modifications that come within the spirit of the disclosure are desired to be protected.

[00115] Various aspects of technical utility arise from the various features of the methods, apparatuses, and systems described herein. It will be noted that alternative embodiments of the methods, apparatuses, and systems of the present disclosure may not include all of the features described yet still benefit from at least some of the advantages of such features.

[00116] Those of ordinary skill in the art may readily devise their own implementations of the methods, apparatuses, and systems that incorporate one or more of the features of the present invention and fall within the spirit and scope of the present disclosure as defined by the appended claims.

Claims

CLAIMS:

1. A wireless power transfer system comprising: a frequency multiplier inverter including a plurality of switches; and a controller configured to control the frequency multiplier inverter to operate the plurality of switches at a frequency lower than a frequency at which power transfer is performed in the wireless power transfer system.

2. The wireless power transfer system of claim 1, any other suitable claim, or any other suitable combination of claims, wherein the frequency multiplier inverter comprises four switches controlled by the controller to produce an output frequency which is twice the switching frequency of the plurality of switches.

3. The wireless power transfer system of claim 1, any other suitable claim, or any other suitable combination of claims, wherein the frequency multiplier inverter operates in a frequency doubling mode and includes a shunt resonant circuit utilizing an inductor that provides inductive current to achieve zero voltage switching of plurality of switches of the frequency multiplier inverter.

4. The wireless power transfer system of claim 3, any other suitable claim, or any other suitable combination of claims, wherein circuit topology of the frequency multiplier inverter eliminates a fundamental harmonic component of the inverter's output voltage and reinforces a second harmonic component.

5. The wireless power transfer system of claim 1, any other suitable claim, or any other suitable combination of claims, wherein the frequency multiplier inverter comprises at least two high-frequency inverters having outputs connected using a parallel-in series-out transformer, to produce an output frequency which is twice the switching frequency of each of the at least two high-frequency inverters.

6. The wireless power transfer system of claim 5, any other suitable claim, or any other suitable combination of claims, wherein the frequency multiplier inverter operates in a frequency doubling mode and utilizes a transformer to achieve zero voltage switching of a plurality of switches of the at least two high-frequency inverters.

7. The wireless power transfer system of claim 1, any other suitable claim, or any other suitable combination of claims, wherein the frequency multiplier inverter comprises eight switches controlled by the controller to produce an output frequency which is four times higher than the switching frequency of the switches of the switched inverters.

8. The wireless power transfer system of claim 7, any other suitable claim, or any other suitable combination of claims, wherein the frequency multiplier inverter is controlled by the controller in accordance with a pulse width modulation operation which produces only one of two voltage levels to quadruple an output alternating-current voltage frequency relative to the switching frequency of the inverter switches.

9. The wireless power transfer system of claim 1, any other suitable claim, or any other suitable combination of claims, wherein the frequency multiplier inverter comprises a plurality of high-frequency inverters, whose outputs are connected using a parallel-in series-out transformer, to produce an output frequency which is a multiple of the switching frequency of each inverter.

10. The wireless power transfer system of claim 1, any other suitable claim, or any other suitable combination of claims, wherein the system is a frequency multiplier inverter-based 6.78- MHz capacitive wireless power transfer system, wherein the switches operate at 1.39 MHz.

11. The wireless power transfer system of claim 10, any other suitable claim, or any other suitable combination of claims, wherein the switches are transistors that are wide-bandgap GaN high-electron mobility devices.

12. The wireless power transfer system of claim 10, any other suitable claim, or any other suitable combination of claims, wherein the switches are transistors that are Silicon Carbide (SiC) devices.

13. The wireless power transfer system of claim 1, any other suitable claim, or any other suitable combination of claims, wherein the switches are implemented using one or more field effect transistors.

14. The wireless power transfer system of claim 1, any other suitable claim, or any other suitable combination of claims, wherein the frequency multiplier inverter is a multi-level inverter and the switches are coupled together via flying capacitors.

15. The wireless power transfer system of claim 1, any other suitable claim, or any other suitable combination of claims, wherein the switches are configured in four switching bridges with switch outputs combined using a switched capacitor power combiner or a resonant direct current to direct-current converter utilizing impedance control.

16. The wireless power transfer system of claim 1, any other suitable claim, or any other suitable combination of claims, wherein the frequency multiplier inverter is comprised of a plurality of switching cells including a plurality of switches coupled together via flying capacitors.

17. The wireless power transfer system of claim 1, any other suitable claim, or any other suitable combination of claims, wherein the frequency multiplier inverter is comprised of a plurality of high-frequency inverters, wherein each high-frequency inverter is comprised of at least one switch.

18. The wireless power transfer system of claim 17, any other suitable claim, or any other suitable combination of claims, wherein an input direct-current voltage is equally split between the switching cells by stacking the switching cells relative to each other using series capacitors.

19. The wireless power transfer system of claim 1, any other suitable claim, or any other suitable combination of claims, wherein the system transfers power using a capacitive coupling.

20. The wireless power transfer system of claim 1, any other suitable claim, or any other suitable combination of claims, wherein the system transfers power using an inductive coupling.

21. The wireless power transfer system of claim 1, wherein the wireless power transfer system is a capacitive wireless power transfer system generating electric fields between capacitively coupled plates to wirelessly transfer power.

22. The wireless power transfer system of claim 1, any other suitable claim, or any other suitable combination of claims, wherein the wireless power transfer system is an inductive wireless power transfer system generating magnetic fields between inductively coupled coils to wirelessly transfer power.

23. The wireless power transfer system of claim 1, any other suitable claim, or any other suitable combination of claims, wherein the system operates at an output frequency within an ISM frequency band.

24. A charging system for charging an electric vehicle including the wireless power transfer system of claim 1.

25. A method for wirelessly transferring power to an electricity powered device, the method comprising: controlling operation of a frequency multiplier inverter included in a wireless power transfer system to operate a plurality of switches included in the frequency multiplier inverter at a first frequency; and outputting power from the wireless power transfer system at a second frequency, wherein the first frequency is lower than the second frequency.

26. The wireless power transfer method of claim 25, any other suitable claim, or any other suitable combination of claims, wherein the first frequency is half of the second frequency.

27. The wireless power transfer method of claim 25, any other suitable claim, or any other suitable combination of claims, wherein the controlled operation of the frequency multiplier inverter eliminates a fundamental harmonic component of the inverter's output voltage and reinforces a second harmonic component.

28. The wireless power transfer method of claim 25, any other suitable claim, or any other suitable combination of claims, wherein the controlled operation of the frequency multiplier inverter controls a switching sequence of the plurality of switches among four switching states, wherein on times for each of the states are selected so that the first frequency is half the second frequency.

29. The wireless power transfer method of claim 25, any other suitable claim, or any other suitable combination of claims, wherein the first frequency is a quarter of the second frequency.

30. The wireless power transfer method of claim 25, any other suitable claim, or any other suitable combination of claims, wherein the controlled operation of the frequency multiplier inverter is controlled by the controller in accordance with a pulse width modulation operation which produces only one of two voltage levels to quadruple the second frequency relative to the first frequency.

31. The wireless power transfer method of claim 25, any other suitable claim, or any other suitable combination of claims, wherein the controlled operation of the frequency multiplier inverter controls emphasizes a fourth harmonic component while canceling undesired frequencies by controlling duty ratios and switching sequences of the plurality of switches to synthesize a prescribed wireless power transfer output at the second frequency.

32. The wireless power transfer method of claim 25, wherein inverter transistor switching frequency is reduced in comparison to the resonant frequency of the system by the inverter’s frequency-multiplication factor.

33. The wireless power transfer method of claim 32, any other suitable claim, or any other suitable combination of claims, wherein the system operates at a resonant frequency of 6.78 MHz, and the inverter switching frequencies are sub-multiples of this resonant frequency.

34. The wireless power transfer method of claim 32, any other suitable claim, or any other suitable combination of claims, wherein system is a frequency quadrupler-based capacitive WPT system that requires the transistors to switch at one-fourth the system system’s resonant frequency.

35. The wireless power transfer method of claim 32, any other suitable claim, or any other suitable combination of claims, wherein system is a frequency doubler-based capacitive WPT system that requires the transistors to switch at one-half the system system’s resonant frequency.