WO2024148394A1

WO2024148394A1 - A method for protecting solar cells from contaminants

Info

Publication number: WO2024148394A1
Application number: PCT/AU2024/050005
Authority: WO
Inventors: Bram Hoex; Chandany SEN; Xinyuan Wu
Original assignee: NewSouth Innovations Pty Ltd
Current assignee: NewSouth Innovations Pty Ltd
Priority date: 2023-01-09
Filing date: 2024-01-08
Publication date: 2024-07-18
Anticipated expiration: 2025-07-09

Abstract

Disclosed herein is a solar cell, in particular a solar cell comprising a barrier layer that may improve chemical resistance against one or more contaminants to the solar cell, as well as methods of their use and manufacture. The present disclosure also relates to an array comprising a plurality of solar cells, particularly solar cells comprising a barrier layer. The present disclosure also relates to the use of a barrier layer comprising aluminium oxide for a solar cell that comprises a plurality of layers.

Description

"A METHOD FOR PROTECTING SOLAR CELLS FROM CONTAMINANTS"

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application claims priority from Australian Provisional Patent Application No 2023900037 filed on 9 January 2023, the contents of which are incorporated herein by reference in their entirety.

TECHNICAL FIELD OF THE INVENTION

The present disclosure relates to solar cells, particularly solar cells comprising a barrier layer that may improve chemical resistance against one or more contaminants to the solar cell, as well as methods of their use and manufacture. The present disclosure also relates to an array comprising a plurality of solar cells, particularly solar cells comprising a barrier layer. The present disclosure also relates to the use of a barrier layer comprising aluminium oxide for a solar cell that comprises a plurality of layers.

BACKGROUND TO THE INVENTION

Sodium ions are one of the most significant contaminants present in silicon solar cells. In normal industrial silicon solar cell operation, sodium ions may be introduced from an encapsulating glass sheet and/or be unintentionally introduced during solar cell manufacturing.

The presence of sodium ions or other ions can significantly reduce the output power of the solar cell, and in some cases, even cause catastrophic failure of the solar cell.

Current methods for mitigating the effects of contaminant sodium ion intrusion include the use of low sodium ion containing glass for module fabrication, alteration of the front dielectric stack, or the use of alternative encapsulation materials. Such approaches leave much to be desired in terms of effectiveness, as well as manufacturing complexity and cost.

Accordingly, there is a need for more efficient, practical, and cost-effective methods for the protection of solar cells from sodium ions and other contaminants.

Any discussion of documents, acts, materials, devices, articles or the like which has been included in the present specification is not to be taken as an admission that any or all of these matters form part of the prior art base or were common general knowledge in the field relevant to the present disclosure as it existed before the priority date of each of the appended claims.

SUMMARY OF THE INVENTION

It has been surprisingly found that solar cells comprising a barrier layer can be resistant to impurities, or reduce the effect or impact of impurities on said solar cells. The impurities can comprise sodium ions. Such a barrier may layer impart this resistance or reduction to any solar cell upon which it is deposited, irrespective of the internal architecture, arrangement and/or composition of the solar cell.

In one aspect, there is provided a solar cell comprising: a plurality of layers; and a barrier layer comprising aluminium oxide.

In a further aspect, there is provided a solar cell comprising: a plurality of layers; and a barrier layer deposited by atomic layer deposition (ALD).

In a further aspect, there is provided a solar cell comprising: a plurality of layers; and a barrier layer capable of being chemically resistive to one or more impurities including sodium ions.

In a further aspect, there is provided an array comprising a plurality of any one of the solar cells described herein.

In a further aspect, there is provided a use of a barrier layer comprising aluminium oxide for a solar cell comprising a plurality of layers.

In a further aspect, there is provided a method for manufacturing any one of the solar cells described herein, the method comprising depositing the barrier layer via atomic layer deposition.

In a further aspect, there is provided a solar cell comprising a barrier layer as described herein, when produced by a method for manufacture as described herein.

In a further aspect, there is provided an array comprising a plurality of any one of the solar cells described herein comprising a barrier layer as described herein, when produced by a method for manufacture as described herein. BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 is a schematic of the A1O_X barrier layer on a heterojunction silicon solar cell.

Figure 2 is a graphical representation of the variation in efficiency as a function of damp heat time, from the results obtained in Example 1.

Figure 3 is a graphical representation of the variation in V_oc as a function of damp heat time, from the results obtained in Example 1.

Figure 4 is a graphical representation of the variation in J_sc as a function of damp heat time, from the results obtained in Example 1.

Figure 5 is a graphical representation of the variation in FF as a function of damp heat time, from the results obtained in Example 1.

Figure 6 is a graphical representation of the variation in R_s as a function of damp heat time, from the results obtained in Example 1.

Figure 7 is a graphical representation of the variation in J02 as a function of damp heat time, from the results obtained in Example 1.

Figure 8 is a graphical representation of the variation in power as a function of damp heat time, from the results obtained in Example 1.

Figure 9 contains electroluminescence images of the solar cells subjected to damp heat conditions in Example 1.

Figure 10 contains photoluminescence images of the solar cells subjected to damp heat conditions in Example 1.

Figure 11 contains series resistance images of the solar cells subjected to damp heat conditions in Example 1.

Figure 12A is a graphical representation of the variation in J_sc, Rs, V_oc and Joi as a function of damp heat time, from the results obtained in Example 2 (TOPCon).

Figure 12B is a graphical representation of the variation in FF, J02 and efficiency as a function of damp heat time, from the results obtained in Example 2 (TOPCon).

Figure 13A is a graphical representation of the variation in J_sc, Rs, Voc, and Joi as a function of damp heat time, from the results obtained in Example 3 (PERC).

Figure 13B is a graphical representation of the variation in FF, J02 and efficiency as a function of damp heat time, from the results obtained in Example 3 (PERC). Figure 14 is a graphical representation of a top-view SEM images and corresponding EDS mappings of Ag, O and Al of a SHJ solar cell with an ALD A1O_X barrier layer.

Figure 15 is a graphical representation of the photoluminescence images and R_s images of SHJ solar cells before and after the ALD process.

Figure 16 is a graphical representation of the relative changes in PCE, J_sc, Voc, FF and R_s as a function of damp heat time, from the results obtained in Example 4 (SHJ).

DETAILED DESCRIPTION OF EMBODIMENTS

General

It will be clearly understood that, although a number of prior art publications may be referred to herein, this reference does not constitute an admission that any of these documents forms part of the common general knowledge in the art, in Australia or in any other country.

With regards to the definitions provided herein, unless stated otherwise, or implicit from context, the defined terms and phrases include the provided meanings.

Unless explicitly stated otherwise, or apparent from context, the terms and phrases below do not exclude the meaning that the term or phrase has acquired by a person skilled in the relevant art. The definitions are provided to aid in describing particular embodiments, and are not intended to limit the claimed invention, because the scope of the invention is limited only by the claims. Furthermore, unless otherwise required by context, singular terms shall include pluralities and plural terms shall include the singular.

Furthermore, unless otherwise required by context, singular terms shall include pluralities and plural terms shall include the singular. Throughout this specification, unless specifically stated otherwise or the context requires otherwise, reference to a single step, composition of matter, group of steps or group of compositions of matter shall be taken to encompass one and a plurality (i.e., one or more), of those steps, compositions of matter, groups of steps or groups of compositions of matter. Thus, as used herein, the singular forms “a”, “an” and “the” include plural aspects unless the context clearly dictates otherwise. For example, reference to “a” includes a single as well as two or more; reference to “an” includes a single as well as two or more; reference to “the” includes a single as well as two or more and so forth.

Those skilled in the art will appreciate that the disclosure herein is susceptible to variations and modifications other than those specifically described. It is to be understood that the disclosure includes all such variations and modifications. The disclosure also includes all of the examples, steps, features, methods, compositions, coatings, processes, and coated substrates, referred to or indicated in this specification, individually or collectively, and any and all combinations or any two or more of said steps or features.

Throughout this specification the word "comprise", or variations such as "comprises" or "comprising", will be understood to imply the inclusion of a stated element, integer or step, or group of elements, integers or steps, but not the exclusion of any other element, integer or step, or group of elements, integers or steps.

As used herein the term "consisting essentially" or "consists essentially" refers to those elements required for a given embodiment. The term permits the presence of elements that do not materially affect the basic and novel or functional characteristics of that embodiment of the invention. The term "consisting of" refers to methods, and respective components thereof as described herein, which are exclusive of any element not recited in that description of the embodiment.

As used herein, the term “and/or”, e.g., “X and/or Y” shall be understood to mean either "X and Y" or "X or Y" and shall be taken to provide explicit support for both meanings or for either meaning, e.g. A and/or B includes the options (i) A, (ii) B or (iii) A and B.

As used herein, the term about, unless stated to the contrary, refers to +/- 20%, or +/- 10%, or +/- 5%, of the designated value.

Unless otherwise indicated, the terms “first,” “second,” etc. are used herein merely as labels, and are not intended to impose ordinal, positional, or hierarchical requirements on the items to which these terms refer. Moreover, reference to a “second” item does not require or preclude the existence of lower- numbered item (e.g., a “first” item), and/or a higher-numbered item (e.g., a “third” item).

As used herein, the phrase “at least one of’, when used with a list of items, means different combinations of one or more of the listed items may be used and only one of the items in the list may be needed. The item may be a particular object, thing, or category. In other words, “at least one of’ means any combination of items or number of items may be used from the list, but not all of the items in the list may be required. For example, “at least one of item A, item B, and item C” may mean item A; item A and item B; item B; item A, item B, and item C; or item B and item C. In some cases, “at least one of item A, item B, and item C” may mean, for example and without limitation, two of item A, one of item B, and ten of item C; four of item B and seven of item C; or some other suitable combination.

Throughout the present specification, various aspects and components of the invention can be presented in a range format. The range format is included for convenience and should not be interpreted as an inflexible limitation on the scope of the invention. Accordingly, the description of a range should be considered to have specifically disclosed all the possible sub-ranges as well as individual numerical values within that range, unless specifically indicated. For example, description of a range such as from 1 to 5 should be considered to have specifically disclosed sub-ranges such as from 1 to 3, from 1 to 4, from 1 to 5, from 2 to 4, from 2 to 5, from 3 to 5 etc., as well as individual and partial numbers within the recited range, for example, 1, 2, 3, 4, 5, 4.5 and 5, unless where integers are required or implicit from context. This applies regardless of the breadth of the disclosed range. Where specific values are required, these will be indicated in the specification.

It is to be appreciated that certain features that are, for clarity, described herein in the context of separate embodiments, may also be provided in combination in a single embodiment. Conversely, various features that are, for brevity, described in the context of a single embodiment, may also be provided separately or in any sub-combination. It will be appreciated that the embodiments of each aspect of the present disclosure may equally be applied to each other aspect, mutatis mutandis.

Unless specifically defined otherwise, all technical and scientific terms used herein shall be taken to have the same meaning as commonly understood by one of ordinary skill in the art (e.g., chemistry, biochemistry, medicinal chemistry, microbiology and the like). Although methods and materials similar or equivalent to those described herein can be used in the practice or testing of the present invention, suitable methods and materials are described below. In case of conflict, the present specification, including definitions, will prevail. In addition, the materials, methods, and examples are illustrative only and not intended to be limiting.

As used herein ‘ALD’ refers to atomic layer deposition.

As used herein PEALD’ refers to plasma-enhanced atomic layer deposition.

As used herein CVD’ refers to chemical vapour deposition. As used herein ‘PECVD’ refers to plasma-enhanced chemical vapour deposition.

As used herein ‘PVD’ refers to physical vapour deposition.

As used herein ‘Jsc’ refers to short circuit current density.

As used herein ‘ Voc’ refers to open circuit voltage.

As used herein ‘FF’ refers to fill factor.

As used herein, ‘PERC’ refers to passivated emitter and rear cell.

As used herein, ‘TOPCon’ refers to tunnel oxide passivated contact.

As used herein, ‘HJT’ refers to heterojunction technology.

As used herein ‘efficiency’ refers to the fraction of incident power that is converted to electricity.

As used herein ‘barrier layer’ refers to the outer most layer of the solar cell, and may itself comprise one or more layers.

As used herein ‘coating layer’ refers to an outer layer of the barrier layer.

As used herein ‘aluminium oxide’ refers to all chemical compounds consisting of aluminium and oxygen, e.g. aluminium(I) oxide, aluminium (II) oxide, and aluminium(III) oxide, and mixtures thereof.

Herein ‘A1O_X’ refers to aluminium oxide and comprises stoichiometric compositions such as AI2O3 and non-stoichiometric compositions. Herein ‘aluminium oxide’ and ‘A1O_X’ may be used interchangeably.

As used herein ‘substantially covers’ shall mean that at least about 95% of the surface area of an underlying substrate and/or layer is covered. In one embodiment, substantially covers means at least about: 95%, 96%, 97%, 98% or 99% of an underlying substrate or layer is covered.

Herein one or more “layers” may be contiguous or substantially contiguous in relation to covering an underlaying substrate or layer. For example, a “layer” may substantially cover an underlaying substrate and/or layer. In one embodiment one or more “layers” may be in direct contact with an underlying layer and/or substrate. In another embodiment, one or more layers may be in substantial contact with an underlying layer and/or substrate. In another embodiment, one or more “layers” may not be in direct contact or be substantially in direct contact with an underlying layer and/or substate due to the presence of an expected, wanted and/or unwanted impurity, for example silicon dioxide on a surface of a silicon substrate. The composition (e.g., elemental composition) and/or structure of each “layer” may be independently selected and tailored, for example in relation to the type of solar cell and/or the intended application, purpose or area to be installed or utilised.

It should be noted that the embodiments, features and advantages of the invention have been described mainly in relation to the solar cell according to the invention. However, a person skilled in the art will recognise both from the foregoing and from the subsequent description that, unless otherwise indicated, the embodiments and features of the invention are also transferable by analogy to the manufacturing method according to the invention. In particular, the features of the various embodiments may also be combined with one another in any desired manner.

Solar Cell and Barrier Layer Deposition

Disclosed herein is a solar cell comprising: a plurality of layers; and a barrier layer comprising aluminium oxide.

The aluminium oxide may be deposited by any deposition technique known in the art including, but not limited to: liquid deposition, vapour deposition, thermal transfer, or a mixture thereof.

In some embodiments, the aluminium oxide is deposited via a method selected from, but not limited to: atomic layer deposition, plasma-enhanced atomic layer deposition, chemical vapour deposition, plasma-enhanced chemical vapour deposition, physical vapour deposition, or a mixture thereof.

In some embodiments, the aluminium oxide is deposited via atomic layer deposition. Atomic layer deposition (ALD) may also be referred to as Atomic Layer Epitaxy (ALE), or Atomic Layer Chemical Vapour Deposition (ALCVD). ALD involves the successive deposition of a plurality of monolayers, optionally over a semiconductor substrate within a deposition chamber typically maintained at a negative pressure (sub- atmospheric pressure). A typical method for ALD may comprise the following steps: feeding a first vaporised precursor into a deposition chamber to form a first monolayer on the substrate placed in the deposition chamber; thereafter, ceasing the flow of the first vaporised precursor, and flowing an inert purge gas (e.g., nitrogen), through the chamber to remove all remaining first precursor from the chamber that has not adhered to the substrate. Subsequently, flowing a second vaporised precursor which is different from the first precursor into the deposition chamber to form a second monolayer on and/or with the first monolayer, the second monolayer can react with the first monolayer (e.g., oxidation); and ceasing the flow of the second precursor, and flowing an inert purge gas through the chamber to remove all remaining second monolayer that has not adhered to the first layer. The deposition process for the first and the second monolayer can be repeated until the layer having the desired thickness and composition has been formed on the substrate.

Disclosed herein is a solar cell comprising: a plurality of layers; and a barrier layer deposited by atomic layer deposition.

In some embodiments the barrier layer comprises a binary or tertiary compound. In some embodiments the barrier layer comprises a material selected from, but not limited to: a transition metal oxide (TMO), a semi-metal oxide, a nitride, a metal, a sulfide, a fluoride, and mixtures thereof. In some embodiments the barrier layer comprises a transition metal oxide or semi-metal oxide. In some embodiments the barrier layer comprises a material selected from, but not limited to: silicon oxide, aluminium oxide, and mixtures thereof. In some embodiments the barrier layer comprises aluminium oxide for example as A1O_X.

Disclosed herein is a solar cell comprising: a plurality of layers; and a barrier layer capable of being chemically resistive to one or more impurities, optionally sodium ions.

Herein, chemically resistive means that the barrier layer does not significantly react with either of the one or more impurities. Such chemical resistance may prevent significant chemical degradation of the barrier layer, and potentially one or more layers disposed beneath the barrier layer, by any present impurities.

In some embodiments, the one or more impurities is selected from, but not limited to: sodium ions, water, acids, metallic ions, and mixtures thereof. Types of solar cell

The present disclosure provides for a solar cell of any class, category, type, structure or architecture, wherein that solar cell comprises a barrier layer as defined herein.

In some embodiments, for any one of the solar cells described herein, the solar cell is selected from, but not limited to: a silicon solar cell, a thin film solar cell, a silicon- based tandem solar cell, and a single or multi-junction III-V solar cell. In some embodiments, the solar cell is a silicon solar cell. In some embodiments the solar cell is a thin film solar cell. In some embodiments the solar cell is a silicon-based tandem solar cell. In some embodiments the solar cell is a single or multi-junction III-V solar cell.

In some embodiments, the solar cell is selected from, but not limited to: PERC, TOPCon, HJT, CIGS, CdTe, CZTS, OPV, perovskite, Si-perovskite, GaAs, InP, or mixtures thereof.

In some embodiments, the solar cell is selected from, but not limited to: HJT, TOPCon, and PERC. In some embodiments, the solar cell is a HJT solar cell. In some embodiments, the solar cell is a TOPCon solar cell. In some embodiments, the solar cell is a PERC solar cell.

Plurality of Layers

In some embodiments, for any one of the solar cells described herein, the plurality of layers comprises at least one of: a silicon substrate; one or more passivation layers or passivating contacts; and one or more transparent conductive oxide layers.

In one embodiment, a solar cell as described herein comprises a silicon substrate as described herein.

In another embodiment, a solar cell described herein comprises at least one passivation layer. In another embodiment, a solar cell described herein comprises at least one passivating contact. In another embodiment, a solar cell described herein comprises a plurality of passivation layers, wherein the composition (e.g., elemental composition) and structure (e.g., thickness), of each passivation layer may be independently selected. In another embodiment, a solar cell as described herein comprises at least 2, 3, 4 or 5, for example 2, independently selected passivation layers. In yet another embodiment, a solar cell described herein comprises a plurality of passivating contacts, wherein the composition (e.g., elemental composition) and structure (e.g., shape and/or thickness), of each passivating contact may be independently selected. In another embodiment, a solar cell as described herein comprises at least 2, 3, 4 or 5, for example 2, independently selected passivating contacts.

In yet another embodiment, a solar cell described herein comprises at least one or more transparent conductive oxide layers. In yet another embodiment, a solar cell described herein comprises a plurality of transparent conductive oxide layers, wherein the composition (e.g., elemental composition) and structure (e.g., thickness), of each transparent conductive oxide layers may be independently selected. In another embodiment, a solar cell as described herein comprises at least 2, 3, 4 or 5, for example 2, independently selected transparent conductive oxide layers.

It should be noted that where a plurality of passivation layers, passivating contacts and/or transparent conductive oxide layers exist, they may be distributed in various parts/sections of the solar cell.

In one or more embodiments, the composition, deposition technique, pinhole density, and thickness of each one of the silicon substrate; the one or more passivation layers or passivating contacts and the one or more transparent conductive oxide layers, optionally in addition to one or more further physical, chemical or electronic attributes, is independent of that of any other substrate and/or layers that may be present.

Silicon substrate

The silicon substrate may be any substrate that comprises silicon formed into a suitable form. Examples of suitable silicon substrates include substrates that are composed entirely of silicon (e.g., bulk silicon wafers), substrates that substantially or consist essentially of silicon, silicon-on-insulator (SOI) substrates, silicon-on-sapphire substrate (SOS), and separation by implantation of oxygen (SIMOX) substrates, amongst others. Suitable silicon substrates also include composite substrates that have a silicon wafer bonded to another material such as, but not limited to, diamond or other crystallographic forms of carbon, aluminium nitride (AIN), silicon carbide (SiC), or other crystalline or poly crystalline materials. Silicon substrates having different crystallographic orientations may be used, though single crystal silicon substrates may be used in certain, but not necessarily all, embodiments. In some embodiments, silicon substrates are used. In certain embodiments, silicon or substrates are used. Herein, there may be at least one intervening layer (for example at least one contiguous intervening later, between the barrier layer and a silicon substrate).

Passivation layers

In some embodiments, the solar cell comprises one or more passivation layers.

In one embodiment at least one passivation layer comprises at least one compound (optionally an oxide, a nitride and/or a carbide), comprising an element selected from, but not limited to: silicon, a transition metal, and mixtures thereof.

In another embodiment at least one passivation layer comprises at least one compound (optionally an oxide, a carbide and/or a nitride), comprising an element selected from, but not limited to: molybdenum, vanadium, tungsten, niobium, copper, tin, nickel, titanium, tantalum, aluminium, silicon, and mixtures thereof.

In one embodiment, at least one of the one or more passivation layers comprise at least one: oxide, transition metal oxide, nitride, carbide or a mixture thereof.

In some embodiments, at least one of the one or more passivation layers comprise at least one material selected from, but not limited to: molybdenum oxide, vanadium oxide, tungsten oxide, niobium oxide, copper oxide, tin oxide, nickel oxide, titanium oxide, tantalum oxide, aluminium oxide, silicon nitride, silicon oxide, silicon carbide, and mixtures thereof.

In some embodiments, at least one of the one or more passivation layers comprise molybdenum oxide. In some embodiments, at least one of the one or more passivation layers comprise vanadium oxide. In some embodiments, at least one of the one or more passivation layers comprise tungsten oxide. In some embodiments, at least one of the one or more passivation layers comprise niobium oxide. In some embodiments, at least one of the one or more passivation layers comprise copper oxide. In some embodiments, at least one of the one or more passivation layers comprise tin oxide. In some embodiments, at least one of the one or more passivation layers comprise nickel oxide. In some embodiments, at least one of the one or more passivation layers comprise titanium oxide. In some embodiments, at least one of the one or more passivation layers comprise tantalum oxide. In some embodiments, at least one of the one or more passivation layers comprise aluminium oxide. In some embodiments, at least one of the one or more passivation layers comprise silicon nitride. In some embodiments, at least one of the one or more passivation layers comprise, silicon oxide. In some embodiments, at least one of the one or more passivation layers comprise silicon carbide. In some embodiments, at least one of the one or more passivation layers has a thickness of less than about: 500 nm, 400 nm, 300 nm, 200 nm, 100 nm, 95 nm, 90 nm, 85 nm, 80 nm, 75 nm, 70 nm, 65 nm, 60 nm, 55 nm, 50 nm, 45 nm, 40 nm, 35 nm, 30 nm, 25 nm, 20 nm, 15 nm, 10 nm, 5 nm, 4 nm, 3 nm, 2 nm. At least one of the one or more passivation layers may have a thickness in a range of any two of the above recited values.

In some embodiments, at least one of the one or more passivation layers has a thickness of greater than about: 1 nm, 2 nm, 3 nm, 4 nm, 5 nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, 65 nm, 70 nm, 75 nm, 80 nm, 85 nm, 90 nm, 95 nm, 100 nm, 200 nm, 300 nm, 400 nm, or 500 nm. At least one of the one or more passivation layers may have a thickness in a range of any two of the above recited values.

In some embodiments, at least one of the one or more passivation layers has a thickness in a range of about 5 nm to about 500 nm. In some embodiments, at least one of the one or more passivation layers has a thickness in a range of about 50 nm to about 100 nm. In some embodiments, at least one of the one or more passivation layers has a thickness in a range of about 60 nm to about 90 nm. In some embodiments, at least one of the one or more passivation layers has a thickness in a range of about 70 nm to about 80 nm. In some embodiments, at least one of the one or more passivation layers has a thickness in a range of about 50 nm to about 90 nm. In some embodiments, at least one of the one or more passivation layers has a thickness in a range of about 50 nm to about 80 nm. In some embodiments, at least one of the one or more passivation layers has a thickness in a range of about 50 nm to about 70 nm. In some embodiments, at least one of the one or more passivation layers has a thickness in a range of about 50 nm to about 60 nm.

Transparent conductive oxide layers

In one embodiment, the one or more transparent conductive oxide layers comprise at least one layer comprising an oxide comprising at least one element selected from, but not limited to a transition metal.

In one embodiment, the one or more transparent conductive oxide layers comprise at least one layer comprising an oxide comprising at least one element selected from, but not limited to: indium, tin, aluminium, zinc, gallium, tungsten, and mixtures thereof. In one embodiment, at least one of the one or more transparent conductive oxide layers comprise a doped oxide. The dopant may be any dopant known in the art, for example: a transition metal, a metal, a semi-conductor, a halogen, or a mixture thereof.

In some embodiments, at least one of the one or more transparent conductive oxide layers comprise at least one material selected from, but not limited to: hydrogenated indium oxide, indium tin oxide, aluminium zinc oxide, gallium zinc oxide, tungsten doped indium oxide, indium zinc oxide, fluorine-doped tin oxide, aluminium- doped tin oxide, and mixtures thereof.

In some embodiments, at least one of the one or more transparent conductive oxide layers comprise hydrogenated indium oxide. In some embodiments, at least one of the one or more transparent conductive oxide layers comprise indium tin oxide. In some embodiments, at least one of the one or more transparent conductive oxide layers comprise aluminium zinc oxide. In some embodiments, at least one of the one or more transparent conductive oxide layers comprise gallium zinc oxide. In some embodiments, at least one of the one or more transparent conductive oxide layers comprise tungsten doped indium oxide. In some embodiments, at least one of the one or more transparent conductive oxide layers comprise indium zinc oxide. In some embodiments, at least one of the one or more transparent conductive oxide layers comprise fluorine-doped tin oxide. In some embodiments, at least one of the one or more transparent conductive oxide layers comprise aluminium-doped tin oxide.

In some embodiments, at least one of the one or more transparent conductive oxide layers has a thickness in a range of about 50 nm to about 100 nm.

In some embodiments, at least one of the one or more transparent conductive oxide layers has a thickness of less than about: 500 nm, 400 nm, 300 nm, 200 nm, 100 nm, 95 nm, 90 nm, 85 nm, 80 nm, 75 nm, 70 nm, 65 nm, 60 nm, 55 nm, 50 nm, 45 nm, 40 nm, 35 nm, 30 nm, 25 nm, 20 nm, 15 nm, 10 nm, 5 nm, 4 nm, 3 nm, 2 nm. At least one of the one or more passivation layers may have a thickness in a range of any two of the above recited values.

In some embodiments, at least one of the one or more transparent conductive oxide layers has a thickness of greater than about: 1 nm, 2 nm, 3 nm, 4 nm, 5 nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, 65 nm, 70 nm, 75 nm, 80 nm, 85 nm, 90 nm, 95 nm, 100 nm, 200 nm, 300 nm, 400 nm, or 500 nm. At least one of the one or more passivation layers may have a thickness in a range of any two of the above recited values. In some embodiments, at least one of the one or more transparent conductive oxide layers has a thickness in a range of about 60 nm to about 90 nm. In some embodiments, at least one of the one or more transparent conductive oxide layers has a thickness in a range of about 70 nm to about 80 nm.

In some embodiments, at least one of the one or more transparent conductive oxide layers has a thickness in a range of about 10 nm to about 500 nm. In some embodiments, at least one of the one or more transparent conductive oxide layers has a thickness in a range of about 50 nm to about 90 nm. In some embodiments, at least one of the one or more transparent conductive oxide layers has a thickness in a range of about 50 nm to about 80 nm. In some embodiments, at least one of the one or more transparent conductive oxide layers has a thickness in a range of about 50 nm to about 70 nm. In some embodiments, at least one of the one or more transparent conductive oxide layers has a thickness in a range of about 50 nm to about 60 nm.

In some embodiments, at least one of the one or more transparent conductive oxide layers is an anti-reflection layer.

Method of Manufacture

In some embodiments, for any one of the solar cells described herein, at least one of: the one or more passivation layers; and the one or more transparent conductive oxide layers, is manufactured via a method selected from, but not limited to: atomic layer deposition, plasma-enhanced atomic layer deposition, chemical vapour deposition, plasma-enhanced chemical vapour deposition, physical vapour deposition, or a mixture thereof.

In some embodiments, for any one of the solar cells described herein, at least one of: the one or more passivation layers; and the one or more transparent conductive oxide layers, is manufactured via a method comprising or consisting essentially of atomic layer deposition. Barrier Layer

Composition

In one embodiment the barrier layer consists or consists essentially of a single layer. In another embodiment the barrier layer comprises at least one layer. In another embodiment, the barrier layer comprises a plurality of layers layer, wherein at least one layer is a coating layer. In yet another embodiment the barrier layer consists or consists essentially of 2, 3, 4 or 5 layers, for example 2 layers. The composition (e.g., elemental composition) and/or structure of each “layer” may be independently selected and tailored, for example in relation to the type of solar cell and/or the intended application, purpose or area to be installed or utilised.

In some embodiments the barrier layer comprises, consists, or consists essentially of a binary or tertiary compound. In some embodiments the barrier layer comprises, consists, or consists essentially of a material selected from, but not limited to: transition metal oxide, semi-metal oxide, nitride, metal, sulfide, fluoride, or a mixture thereof. In some embodiments the barrier layer comprises, consists, or consists essentially of a transition metal oxide or semi-metal oxide. In some embodiments the barrier layer comprises, consists, or consists essentially of a material selected from, but not limited to: silicon oxide, aluminium oxide, and mixtures thereof.

In some embodiments the barrier layer consists essentially of aluminium oxide, or consists of aluminium oxide.

In some embodiments the barrier layer consists essentially of aluminium oxide.

In some embodiments the barrier layer consists of aluminium oxide.

The composition, deposition technique, pinhole density, and/or thickness of each layer in the barrier layer, optionally in addition to one or more further physical, chemical or electronic attributes, is independent of that of any other layer in the barrier layer that may be present.

Doping

In some embodiments, for any one of the solar cells described herein, the barrier layer is doped. In some embodiments one or more materials and/or layers in any one of the cells described herein is doped.

In one embodiment at least a portion of a silicon substrate is doped.

In another embodiment, at least a portion of at least one passivation layer is doped. In another embodiment, at least a portion of at least one transparent conductive oxide layer is doped.

In another embodiment, at least a portion of a barrier layer is doped.

In another embodiment, at least a portion of a coating layer is doped.

A variety of dopant materials are contemplated for the formation of the multiple doped regions, and any such dopant that can be used in such processes to surface modify a material is considered to be within the present scope. It should be noted that the particular dopant used can vary depending on the material being doped, as well as the intended use of the resulting material. For example, the selection of potential dopants may differ depending on whether or not tuning of a solar cell is desired. A dopant can be either charge donating or accepting dopant species. More specifically, an electron donating or a hole donating species can cause a region to become more positive or negative in polarity as compared to the semiconductor substrate. In one aspect, for example, the doped region can be p-doped. In another aspect the doped region can be n- doped. A highly doped region can also be formed on or near the doped region to create a pinned diode. In one non-limiting example, the semiconductor substrate can be negative in polarity, and a doped region and a highly doped region can be doped with P+ and n dopants, respectively. In some aspects, variations of n( — ), n(-), n(+), n(++), p( — ), p(-), p(+), or p(++) type doping of the regions can be used.

Non-limiting examples of dopant materials can include: S, F, B, P, N, As, Se, Te, Ge, Ar, Ga, In, Sb, Zn, Ti, and mixtures thereof. It should be noted that the scope of dopant materials should include, not only the dopant materials themselves, but also materials in forms that deliver such dopants (i.e,. dopant carriers).

In some embodiments, for any one of the solar cells described herein, the barrier layer or at least one layer of the barrier layer is comprised of doped aluminium oxide, wherein the aluminium oxide is optionally doped with an element, optionally selected from: S, F, B, P, N, As, Se, Te, Ge, Ar, Ga, In, Sb, Zn, Ti, and mixtures thereof. In one embodiment the aluminium oxide is doped with: Zn, Ti, or a mixture thereof.

In some embodiments the barrier layer or at least one layer of the barrier layer is comprised of aluminium oxide doped with Zn. In some embodiments the barrier layer is comprised of aluminium oxide doped with Ti.

Density

In one embodiment, the barrier layer or at least one layer of the barrier layer has a pinhole density (per mm²) of below about: 300, 290, 280, 270, 260, 250, 240, 230, 220, 210, 200, 190, 180, 170, 160, 150, 140, 130, 120, 110, 100, 90, 80, 70, 60, 50, 40, 30, 20, or 10. In another embodiment, the barrier layer, or at least one layer of the barrier layer has a pinhole density (per mm²) in a range of any one of the recited values.

In some embodiments, for any one of the solar cells described herein, the barrier layer has a pinhole density below about 100/mm².

Thickness

In some embodiments the barrier layer or at least one layer of the barrier layer has a thickness of less than about 50 nm, optionally less than 10 nm.

In some embodiments, the barrier layer or at least one layer of the barrier layer has a thickness of less than about: 100 nm, 95 nm, 90 nm, 85 nm, 80 nm, 75 nm, 70 nm, 65 nm, 60 nm, 55 nm, 50 nm, 45 nm, 40 nm, 35 nm, 30 nm, 25 nm, 20 nm, 15 nm, 10 nm, 9 nm, 8 nm, 7 nm, 6 nm, 5 nm, 4 nm, 3 nm, 2 nm, or 1 nm. In another embodiment, the barrier layer, or at least one layer of the barrier layer has thickness in a range of any one of the recited values.

In some embodiments, the barrier layer or at least one layer of the barrier layer has a thickness of greater than about: 1 nm, 2 nm, 3 nm, 4 nm, 5nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, 65 nm, 70 nm, 75 nm, 80 nm, 85 nm, 90 nm, 95 nm, or 100 nm. In another embodiment, the barrier layer, or at least one layer of the barrier layer has thickness in a range of any one of the recited values.

In some embodiments, the barrier layer or at least one layer of the barrier layer has a thickness in a range of about 50 nm to about 100 nm. In some embodiments, the barrier layer has a thickness in a range of about 60 nm to about 90 nm. In some embodiments, the barrier layer or at least one layer of the barrier layer has a thickness in a range of about 70 nm to about 80 nm. In some embodiments, the barrier layer or at least one layer of the barrier layer has a thickness in a range of about 50 nm to about 90 nm. In some embodiments, the barrier layer has a thickness in a range of about 50 nm to about 80 nm. In some embodiments, the barrier layer or at least one layer of the barrier layer has a thickness in a range of about 50 nm to about 70 nm. In some embodiments, the barrier layer or at least one layer of the barrier layer has a thickness in a range of about 50 nm to about 60 nm. Coverage

In some embodiments, for any one of the solar cells described herein, the barrier layer substantially covers or completely covers at least one surface of the solar cell.

In some embodiments, for any one of the solar cells described herein, the barrier layer substantially covers or completely covers at least (in %): 5, 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80, 85, 90, 95, 96, 97, 98, 99, of at least one surface of the solar cell.

In some embodiments, for any one of the solar cells described herein, the barrier layer substantially covers or completely covers at least (in %): 5, 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80, 85, 90, 95, 96, 97, 98, 99, of the solar cell.

In some embodiments, for any one of the solar cells described herein, the barrier layer substantially covers or completely covers a plurality of surfaces of the solar cell.

In some embodiments, for any one of the solar cells described herein, the barrier layer substantially covers or encapsulates the solar cell.

Contaminant Resistance

In some embodiments, for any one of the solar cells described herein, the barrier layer is capable of reducing the penetration of at least one contaminant from reaching at least a portion of the solar cell disposed beneath the barrier layer. For example compared to an equivalent solar cell which does not comprise a barrier layer.

In some embodiments, the at least one contaminant is selected from, but not limited to: sodium ions, water, acids, metallic ions, and mixtures thereof. In some embodiments, the at least one contaminant is sodium ions.

In the solar cells described herein, the barrier layer may be capable of reducing the penetration of at least one contaminant from reaching at least about: 95%, 90%, 85%, 80%, 75%, 70%, 65%, 60%, 55%, 50%, 45%, 40%, 35%, 30%, 25%, 20%, 15%, 10%, or 5% of the solar cell disposed beneath the barrier layer. For example compared to an equivalent solar cell which does not comprise a barrier layer. In the solar cells described herein, the barrier layer may be capable of reducing the penetration of at least one contaminant from reaching less than about 95%, 90%, 85%, 80%, 75%, 70%, 65%, 60%, 55%, 50%, 45%, 40%, 35%, 30%, 25%, 20%, 15%, 10%, or 5% of at least one underlying layer, surface and or substrate. For example compared to an equivalent solar cell which does not comprise a barrier layer. In the solar cells described herein, the barrier layer may be capable of reducing the penetration of at least one contaminant from reaching a portion of the solar cell in a range provided by any two of these upper and/or lower values, for example between about 5% and 20%. For example compared to an equivalent solar cell which does not comprise a barrier layer.

Coating Layer

In some embodiments, for example for any one of the solar cells described herein, the barrier layer comprises: a layer comprising aluminium oxide and at least one other layer. In one or more embodiments, the at least one other layer is a coating layer.

In some embodiments, the barrier layer may comprise multiple coating layers, which is to say, one or more coating layers. Thus, in some embodiments, for any one of the solar cells described herein, the barrier layer comprises: a layer comprising aluminium oxide; and one or more coating layers. As described below, the composition, deposition technique, pinhole density, and thickness of each coating layer, optionally in addition to one or more further physical, chemical or electronic attributes, is independent of that of any other coating layer that may be present.

In one embodiment, at least one coating layer comprises at least one layer comprising an oxide comprising at least one element selected from, but not limited to a transition metal.

In one embodiment, at least one coating layer comprises at least one layer comprising an oxide comprising at least one element selected from, but not limited to: indium, tin, aluminium, zinc, gallium, tungsten, and mixtures thereof.

In some embodiments, at least one coating layer comprises, but is not limited to: aluminium oxide, zinc oxide, titanium oxide, aluminium-doped zinc oxide, aluminium- doped titanium oxide, zinc-doped titanium oxide, indium tungsten oxide, and mixtures thereof.

In some embodiments, at least one coating layer comprises aluminium oxide. In some embodiments, at least one coating layer comprises zinc oxide. In some embodiments, at least one coating layer comprises titanium oxide. In some embodiments, at least one coating layer aluminium-doped zinc oxide. In some embodiments, at least one coating layer comprises aluminium-doped titanium oxide. In some embodiments, at least one coating layer comprises, zinc-doped titanium oxide. In some embodiments, at least one coating layer comprises indium tungsten oxide. Each coating layer may be deposited independently by any deposition technique known in the art. In some embodiments, each coating layer is deposited by a technique independently selected from the group consisting of: atomic layer deposition, chemical vapour deposition, and physical vapour deposition. In some embodiments, each coating layer is deposited by atomic layer deposition.

In some embodiments, the coating layer or at least one coating layer has a pinhole density (per mm²) of below about: 300, 290, 280, 270, 260, 250, 240, 230, 220, 210, 200, 190, 180, 170, 160, 150, 140, 130, 120, 110, 100, 90, 80, 70, 60, 50, 40, 30, 20, or 10. In another embodiment, the coating layer or at least one coating layer has a pinhole density (per mm²) in a range of any one of the recited values.

In some embodiments the coating layer or at least one layer of the coating layer has a thickness of less than about 50 nm, optionally less than 10 nm.

In some embodiments, the coating layer or at least one layer of the coating layer has a thickness of less than about: 100 nm, 95 nm, 90 nm, 85 nm, 80 nm, 75 nm, 70 nm, 65 nm, 60 nm, 55 nm, 50 nm, 45 nm, 40 nm, 35 nm, 30 nm, 25 nm, 20 nm, 15 nm, 10 nm, 9 nm, 8 nm, 7 nm, 6 nm, 5 nm, 4 nm, 3 nm, 2 nm, or 1 nm. In another embodiment, the coating layer or at least one layer of the coating layer has thickness in a range of any one of the recited values.

In some embodiments, the coating layer or at least one layer of the coating layer has a thickness of greater than about: 1 nm, 2 nm, 3 nm, 4 nm, 5nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, 65 nm, 70 nm, 75 nm, 80 nm, 85 nm, 90 nm, 95 nm, or 100 nm. In another embodiment, the coating layer or at least one layer of the coating layer has thickness in a range of any one of the recited values.

In some embodiments, at least one coating layer has a thickness in a range of about 50 nm to about 100 nm. In some embodiments, at least one coating layer has a thickness in a range of about 60 nm to about 90 nm. In some embodiments, at least one coating layer has a thickness in a range of about 70 nm to about 80 nm. In some embodiments, at least one coating layer has a thickness in a range of about 50 nm to about 90 nm. In some embodiments, at least one coating layer has a thickness in a range of about 50 nm to about 80 nm. In some embodiments, at least one coating layer has a thickness in a range of about 50 nm to about 70 nm. In some embodiments, at least one coating layer has a thickness in a range of about 50 nm to about 60 nm.

In some embodiments, for any one of the solar cells described herein, a layer comprising aluminium oxide has a pinhole density (per mm²) of below about: 300, 290, 280, 270, 260, 250, 240, 230, 220, 210, 200, 190, 180, 170, 160, 150, 140, 130, 120, 110, 100, 90, 80, 70, 60, 50, 40, 30, 20, or 10. In another embodiment, a layer comprising aluminium oxide has a pinhole density (per mm²) in a range of any one of the recited values.

In some embodiments a layer comprising aluminium oxide has a thickness of less than about 50 nm, optionally less than 10 nm.

In some embodiments, a layer comprising aluminium oxide has a thickness of: less than about: 100 nm, 95 nm, 90 nm, 85 nm, 80 nm, 75 nm, 70 nm, 65 nm, 60 nm, 55 nm, 50 nm, 45 nm, 40 nm, 35 nm, 30 nm, 25 nm, 20 nm, 15 nm, 10 nm, 9 nm, 8 nm, 7 nm, 6 nm, 5 nm, 4 nm, 3 nm, 2 nm, or 1 nm. In another embodiment, a layer comprising aluminium oxide has thickness in a range of any one of the recited values.

In some embodiments, a layer comprising aluminium oxide has a thickness of greater than about: 1 nm, 2 nm, 3 nm, 4 nm, 5nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, 65 nm, 70 nm, 75 nm, 80 nm, 85 nm, 90 nm, 95 nm, or 100 nm. In another embodiment, a layer comprising aluminium oxide has thickness in a range of any one of the recited values.

In some embodiments, a layer comprising aluminium oxide has a thickness in a range of about 50 nm to about 100 nm. In some embodiments, a layer comprising aluminium oxide has a thickness in a range of about 60 nm to about 90 nm. In some embodiments, a layer comprising aluminium oxide has a thickness in a range of about 70 nm to about 80 nm. In some embodiments, a layer comprising aluminium oxide has a thickness in a range of about 50 nm to about 90 nm. In some embodiments, a layer comprising aluminium oxide has a thickness in a range of about 50 nm to about 80 nm. In some embodiments, a layer comprising aluminium oxide has a thickness in a range of about 50 nm to about 70 nm. In some embodiments, a layer comprising aluminium oxide has a thickness in a range of about 50 nm to about 60 nm.

Efficiency Loss

In some embodiments, for any one of the solar cells described herein, the solar cell exhibits less than about 15% loss of efficiency when exposed to damp heat conditions for 20 hours.

In some embodiments, for any one of the solar cells described herein, the solar cell exhibits less than about 20% loss of efficiency when exposed to damp heat conditions for 20 hours. In some embodiments, for any one of the solar cells described herein, the solar cell exhibits less than about 25% loss of efficiency when exposed to damp heat conditions for 20 hours. In some embodiments, for any one of the solar cells described herein, the solar cell exhibits less than about 30% loss of efficiency when exposed to damp heat conditions for 20 hours. In some embodiments, for any one of the solar cells described herein, the solar cell exhibits less than about 35% loss of efficiency when exposed to damp heat conditions for 20 hours. In some embodiments, for any one of the solar cells described herein, the solar cell exhibits less than about 40% loss of efficiency when exposed to damp heat conditions for 20 hours. In some embodiments, for any one of the solar cells described herein, the solar cell exhibits less than about 45% loss of efficiency when exposed to damp heat conditions for 20 hours. In some embodiments, for any one of the solar cells described herein, the solar cell exhibits less than about 50% loss of efficiency when exposed to damp heat conditions for 20 hours.

Arrays

Disclosed herein is an array comprising a plurality of any one of the solar cells described herein.

A person skilled in the art will appreciate that solar cells of an array:

(i) may optionally be located on a supporting substrate, non-limiting examples of which include titanium, steel, coated steel, aluminium or alloys thereof; and/or

(ii) may be of varying dimensions and/or areas; and/or

(iii) may be provided in a range of shapes including circles, trapezoids, rectangles, or squares. The cells may be electrically interconnected by a circuit board, printed circuit board (PCB) or a continuous substrate such as the working electrode (WE) or counter electrode (CE).

The PCB may be flexible. The PCB design may allow for inclusion of diodes. The array may include an external connection point which is attached to the PCB via a knitted, solder paste adhered, rivet, pin, eyelet and/or soldered positive and negative contacts, or a combination thereof. The array may be formed by joining cells via any one of conductive adhesive coated tape, wire, cable, metal braid, polyimide strip, rivets, eyelets, pins, spade clips, crimp terminals or a combination thereof. The cells may use metal substrates for one of their electrodes. Furthermore, it will be appreciated that the array may be encapsulated in a substantially transparent cover which is of low light reflectivity. Furthermore, it will be appreciated that the array may be encapsulated by hot lamination, cold lamination and/or vacuum sealing or a combination thereof.

Uses

Disclosed herein is use of any of the barrier layers described herein for any one of the solar cells described herein.

Disclosed herein is use of a barrier layer comprising aluminium oxide for a solar cell comprising a plurality of layers.

Disclosed herein is use of a barrier layer comprising aluminium oxide for a solar cell comprising a plurality of layers, wherein the aluminium oxide is deposited via atomic layer deposition.

Methods for Manufacturing

Disclosed herein is a method for manufacturing any one of the solar cells described herein, wherein the method optionally comprises depositing the barrier layer via atomic layer deposition.

In some embodiments, the method comprises: providing a solar cell in an atomic layer deposition chamber; forming a barrier layer on the solar cell, wherein forming the barrier layer on the solar cell comprises one or more of the following steps: exposing the solar cell to a precursor to form a precursor layer which substantially covers the surface of the solar cell; oxidising the precursor layer on the solar cell surface with an oxidant, to form an oxide layer on the solar cell surface; and optionally depositing a coating layer on the oxide layer; and optionally depositing one or more further coating layers successively wherein the barrier layer is the outer most layer of the solar cell.

It will be appreciated by a person skilled in the art that the exposing of the solar cell to a precursor to form a precursor layer, and oxidation of the precursor layer with an oxidant, may be repeated a number of times in order to form an oxide layer of a desired thickness. It will further be appreciated that all such precursor-oxidant cycles will occur prior to the optional deposition of a coating layer on the oxide layer.

In some embodiments, the precursor is selected from, but not limited to: metal, semiconductor, metal coordinated with halogen and organic complex, organometallic, and semiconductor coordinated with halogen and organic complex, or mixtures thereof. In some embodiments, the metal comprises Ta, Ti, W, Mo, Nb, Cu, Ni, Pt, Ru, Me, Ni or Al.

In some embodiments the precursor is any aluminium containing compound. In some embodiments the precursor is selected from the group consisting of: A1(CH3)3, AlCh, A1(CH3)2C1, dimethylaluminium is opropoxide and (CH3)2(C2HS)N:A1H3. In some embodiments the precursor is A1(CH3)3-

In some embodiments, the oxidant is selected from, but not limited to: O2, O3, oxygen plasma, H2O, or mixtures thereof. In some embodiments, the oxidant is H2O.

Temperature

In some embodiments, at least one of the precursor or oxidant is introduced into the atomic layer deposition chamber at a temperature or about, or less than about: 500 °C, 400 °C, 300 °C, 200 °C, 190 °C, 180 °C, 170 °C, 160 °C, 150 °C, 140 °C, 130 °C, 120 °C, 110 °C, 100 °C, or 50 °C. In one embodiment the temperature is in a range of any two of the recited values.

In some embodiments, at least one of the precursor or oxidant is introduced into the atomic layer deposition chamber at a temperature greater than about: 500 °C, 400 °C, 300 °C, 200 °C, 190 °C, 180 °C, 170 °C, 160 °C, 150 °C, 140 °C, 130 °C, 120 °C, 110 °C, 100 °C, or 50 °C. In one embodiment the temperature is in a range of any two of the recited values.

In some embodiments, at least one of the precursor or oxidant is introduced into the atomic layer deposition chamber at a temperature: between about 300 °C and about 50 °C, between about 200 °C and about 100 °, between about 200 °C and about 150 °, between about 190 °C and about 110 °C, between about 180 °C and about 120 °C, between about 170 °C and about 130 °C, or between about 160 °C and about 140 °C. EXAMPLE EMBODIMENTS

1. A solar cell comprising: a plurality of layers; and a barrier layer comprising aluminium oxide.

2. The solar cell of example embodiment 1, wherein the aluminium oxide is deposited via atomic layer deposition.

3. A solar cell comprising: a plurality of layers; and a barrier layer deposited by atomic layer deposition

4. The solar cell of example embodiment 3, wherein the barrier layer comprises aluminium oxide.

5. A solar cell comprising: a plurality of layers; and a barrier layer capable of being chemically resistive to one or more impurities including sodium ions.

6. The solar cell of example embodiment 5, wherein the wherein the barrier layer comprises aluminium oxide.

7. The solar cell of example embodiment 5 or example embodiment 6, wherein the barrier layer is deposited via atomic layer deposition.

8. The solar cell of any one of the preceding example embodiments, wherein the barrier layer is capable of reducing the penetration of at least one contaminant from reaching at least a portion of the solar cell disposed beneath the barrier layer.

9. The solar cell of example embodiment 8, wherein at least one contaminant is selected from: sodium ions, water, acids, metallic ions, and mixtures thereof.

10. The solar cell of any one of the preceding example embodiments, wherein the barrier layer, or at least one layer of the barrier layer has a pinhole density below 100/mm², optionally a pinhole density (per mm²) of below about: 300, 290, 280, 270, 260, 250, 240, 230, 220, 210, 200, 190, 180, 170, 160, 150, 140, 130, 120, 110, 100, 90, 80, 70, 60, 50, 40, 30, 20, or 10.

11. The solar cell of any one of the preceding example embodiments, wherein the barrier layer or at least one layer of the barrier layer has a thickness of less than about 50 nm, optionally less than 10 nm, or optionally the barrier layer or at least one layer of the barrier layer has a thickness of less than about (in nm): 100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, 40, 35, 30, 25, 20, 15, 10, 9, 8, 7, 6, 5, 4, 3, 2, or 1, or optionally the barrier layer or at least one layer of the barrier layer has a thickness greater than about (in nm): 1, 2, 3, 4, 5, 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80, 85, 90, 95, or 100 nm.

12. The solar cell of any one of the preceding example embodiments, wherein the barrier layer, or at least one layer of the barrier layer, consists essentially of aluminium oxide, or consists of aluminium oxide.

13. The solar cell of any one of the preceding example embodiments, wherein the barrier layer, or at least one layer of the barrier layer, comprises doped aluminium oxide, wherein the aluminium oxide is optionally doped with zinc, titanium, or a mixture thereof.

14. The solar cell of any one of the preceding example embodiments, wherein the barrier layer comprises a plurality of layers, optionally at least: a layer comprising aluminium oxide; and a coating layer.

15. The solar cell of example embodiment 14, wherein the coating layer comprises one or more of the group selected from: aluminium oxide, zinc oxide, titanium oxide, aluminium-doped zinc oxide, aluminium-doped titanium oxide, zinc-doped titanium oxide, indium tungsten oxide, and mixtures thereof.

16. The solar cell of any one of the preceding example embodiments, wherein the plurality of layers comprises at least one of: a silicon substrate; one or more passivation layers or passivating contacts; and one or more transparent conductive oxide layers. 17. The solar cell of example embodiment 16, wherein at least one of: the one or more passivation layers; and the one or more transparent conductive oxide layers, is manufactured via a method selected from the group consisting of atomic layer deposition, plasma-enhanced atomic layer deposition, chemical vapour deposition, plasma-enhanced chemical vapour deposition, physical vapour deposition, or a mixture thereof.

18. The solar cell according to any one of the preceding example embodiments wherein the solar cell comprises one or more passivation layers, wherein the one or more passivation layers comprise at least one compound which is selected from: an oxide (optionally a transition metal oxide), a carbide, a nitride, or a mixture thereof.

19. The solar cell according to any one of the preceding example embodiments wherein the solar cell comprises one or more passivation layers, wherein the one or more passivation layers comprise at least one of: molybdenum oxide, vanadium oxide, tungsten oxide, niobium oxide, copper oxide, tin oxide, nickel oxide, titanium oxide, tantalum oxide, aluminium oxide, silicon nitride, silicon oxide, silicon carbide, and mixtures thereof.

20. The solar cell of any one of the preceding example embodiments, wherein the barrier layer substantially covers or completely covers at least one surface of the solar cell.

21. The solar cell of any one of the preceding example embodiments, wherein the barrier layer substantially covers or completely covers a plurality of surfaces of the solar cell.

22. The solar cell of any one of the preceding example embodiments, wherein the barrier layer substantially covers or encapsulates the solar cell.

23. The solar cell of any one of the preceding example embodiments, wherein the one or more transparent conductive oxide layers comprises an oxide comprising at least one element selected from: indium, tin, aluminium, zinc, gallium, tungsten and mixtures thereof, wherein the oxide is optionally at least one material selected from: hydrogenated indium oxide, indium tin oxide, aluminium zinc oxide, gallium zinc oxide, tungsten doped indium oxide, indium zinc oxide, fluorine-doped tin oxide, aluminium-doped tin oxide, and mixtures thereof.

24. The solar cell according to any one of the preceding example embodiments, wherein the solar cell comprises one or more transparent conductive oxide layers, wherein at least one of the one or more transparent conductive oxide layers has a thickness in a range of about 50 nm to about 100 nm.

25. The solar cell of any one of the preceding example embodiments, wherein the solar cell comprises one or more transparent conductive oxide layers and wherein at least one of the one or more transparent conductive layers is an anti-reflection layer.

26. The solar cell of any of the preceding example embodiments, wherein the solar cell exhibits less than about 15% loss of efficiency when exposed to damp heat conditions for 20 hours.

27. The solar cell of any of the preceding example embodiments, wherein the solar cell is selected from the group consisting of: a silicon solar cell, a thin film solar cell, a silicon-based tandem solar cell, and a single or multi-junction III-V solar cell.

28. The solar cell of any of the preceding example embodiments, wherein the type of solar cell is selected from the group consisting of: PERC, TOPCon, HJT, CIGS, CdTe, CZTS, OPV, perovskite, Si-perovskite, GaAs, or InP.

29. An array comprising a plurality of the solar cells of any one of example embodiments 1 to 28.

30. Use of a barrier layer comprising aluminium oxide for a solar cell comprising a plurality of layers.

31. The use according to example embodiment 30, wherein the aluminium oxide is deposited via atomic layer deposition. 32. A method for manufacturing a solar cell according to any one of example embodiments 1 to 28, the method comprising depositing the barrier layer via atomic layer deposition. 33. A solar cell manufactured according to the method of example embodiment 32.

EXAMPLES

General Experimental for Examples 1 to 3

ALD was performed on a Leadmicro QL200. ALD system parameter settings used for the deposition of the A10_x barrier layer are presented in Table 1.

The imaging of photoluminescence (PL), electroluminescence (EL), and series resistance (Rs), were performed on a BT Imaging LIS-R3. Solar cell efficiencies were measured using the LOANA solar cell analysis system. General Procedure for Examples 1 to 3

For each experiment (Examples 1, 2 and 3) I-V, Rs, PL and EL for the solar cells was initialled measured. After which, an A1O_X layer was deposited on some of the solar cells via ALD, using the ALD system parameter settings presented in Table 1.

Table 1. ALD parameter settings for the deposition of an AlOx barrier layer (Table continued on next page)

Following ALD, either the front, rear, both, or none of the surfaces of each solar cell was uniformly sprayed with a 0.1% wt. sodium chloride solution. This delineated eight groups of solar cell according to deposition and treatment, as summarised in Table 2.

Table 2. Experiment group settings for AlOx barrier layer experiments

The solar cells were then placed in an ASLi environmental chamber for damp heat testing, at 85 °C in 85% humidity. The solar cell samples were evaluated (I-V, PL, EL, Rs) every 2 to 4 hours, over a 20 hour period.

Example 1

Commercial n-type half-cut heterojunction solar cells (182 mm x 92 mm) were used in this experiment. 16 samples are used for this experiment and selected into 8 groups listed as Table 2. Each group has two samples. Before the experiment, all the samples are measured by LOANA solar cell analysis system for current-voltage (I-V) curves, and BT imaging LIS-R3 for photoluminescence (PL) images, electroluminescence (EL) images and series resistance (Rs) mapping. After all the cells’ performances are confirmed, all the cells are cleaned with deionised (DI) water to remove potential contamination and dried with nitrogen (N2). Then, the cells from Group 1 to 4 are double-sided deposited with around 10 nm aluminium oxide (AlOx) in Leadmicro QL-200 atomic layer deposition (ALD) system under 150 Celsius degrees. The I-V, PL, EL and Rs measurements are repeated after ALD process to confirm no other unexpected impacts on solar cell performance. Then, except for Group 1 and Group 5, the other cells are uniformly sprayed with 0.1 wt% NaCl solution and air-dried in accordance with the experiment setting shown in Table 2. The samples with and without NaCl are placed in two wafer holders separately to avoid contamination. These wafer holders are loaded into a cleaned climate chamber for damp-heat testing (85 °C and 85% relative humidity). Every 2 to 4 hours, the samples are taken out for I-V, PL, EL and R_s measurements.

The heterojunction solar cells were treated and analysed according to the general procedure.

Figures 2 to 8 depict the variation in efficiency, V_oc, Jsc, FF, R_s, J02, and power (respectively) of the solar cells of Groups 1 to 8 throughout the 20 hour period. Figures 9 to 11 depict the electroluminescence, photoluminescence, and series resistance across the 20 hour period.

Superior performance was clearly observed for cells treated with A1O_X. Notably the comparison in efficiency variation, provides evidence that an ALD-deposited A1O_X layer on solar cells protects the cell from sodium ion penetration under damp heat conditions.

Commercial n-type TOPCon solar cells (158.75 mm x 158.75 mm), were used in this experiment. 16 samples are used for this experiment and selected into 8 groups listed as Table 2. Each group has two samples. Before the experiment, all the samples are measured by EOANA solar cell analysis system for current- voltage (I-V) curves, and BT imaging EIS-R3 for photoluminescence (PE) images, electroluminescence (EL) images and series resistance (R_s) mapping. After all the cells’ performances are confirmed, all the cells are cleaned with deionised (DI) water to remove potential contamination and dried with nitrogen (N2). Then, the cells from Group 1 to 4 are double-sided deposited with around 10 nm aluminium oxide (AlOx) in Leadmicro QL-200 atomic layer deposition (ALD) system under 150 Celsius degrees. The I-V, PL, EL and Rs measurements are repeated after ALD process to confirm no other unexpected impacts on solar cell performance. Then, except for Group 1 and Group 5, the other cells are uniformly sprayed with 0.1 wt% NaCl solution and air-dried in accordance with the experiment setting shown in Table 2. The samples with and without NaCl are placed in two wafer holders separately to avoid contamination. These wafer holders are loaded into a cleaned climate chamber for damp-heat testing (85 °C and 85% relative humidity). Every 2 to 4 hours, the samples are taken out for I-V, PL, EL and Rs measurements. The TOPCon solar cells were treated and analysed according to the general procedure.

Figure 12A and Figure 12B depict the variation in J_sc, V_oc, FF, R_s, Joi, J02, and efficiency of the TOPCon solar cells of Groups 1 to 8 throughout the 20 hour period.

Commercial p-type PERC solar cells (158.75 mm x 158.75 mm) were used in this experiment. 16 samples are used for this experiment and selected into 8 groups listed as Table 2. Each group has two samples. Before the experiment, all the samples are measured by LOANA solar cell analysis system for current- voltage (I-V) curves, and BT imaging LIS-R3 for photoluminescence (PL) images, electroluminescence (EL) images and series resistance (R_s) mapping. After all the cells’ performances are confirmed, all the cells are cleaned with deionised (DI) water to remove potential contamination and dried with nitrogen (N2). Then, the cells from Group 1 to 4 are double-sided deposited with around 10 nm aluminium oxide (AlOx) in Leadmicro QL-200 atomic layer deposition (ALD) system under 150 Celsius degrees. The I-V, PL, EL and R_s measurements are repeated after ALD process to confirm no other unexpected impacts on solar cell performance. Then, except for Group 1 and Group 5, the other cells are uniformly sprayed with 0.1 wt% NaCl solution and air-dried in accordance with the experiment setting shown in Table 2. The samples with and without NaCl are placed in two wafer holders separately to avoid contamination. These wafer holders are loaded into a cleaned climate chamber for damp-heat testing (85 °C and 85% relative humidity). Every 2 to 4 hours, the samples are taken out for I-V, PL, EL and Rs measurements.

The PERC solar cells were treated and analysed according to the general procedure.

Figures 13 A and 13B depict the variation in J_sc, V_oc, FF, R_s, Joi, J02, and efficiency of the PERC solar cells of Groups 1 to 8 throughout the 20 hour period.

Commercial M10 half-cut n-type industrial silicon heterojunction (SHJ) cells (182 mm x 91 mm), with 10 busbars were used in this experiment. All the SHJ cells were processed from half-cut silicon wafers. To minimise surface contamination, all samples were rinsed with deionised water and subsequently dried using a nitrogen gun. Samples were categorised into three groups: Group 1 was a control group with no barrier layer and no exposure to NaCl (2 samples); Group 2 had no barrier layer and exposure to NaCl (8 samples); and Group 3 had a barrier layer and exposure to NaCl (8 samples).

For cells in Group 3, samples underwent a 20-minute pre-heat treatment to ensure temperature uniformity during the deposition process. The A1O_X barrier layers were deposited in an industrial batch ALD reactor from Leadmicro (QL200). Samples were vertically positioned in the wafer boat to enable simultaneous deposition on both sides. Trimethylaluminum (TMA) was used as the metal precursor and deionised water (DIW) as the oxidant. The pulse and purge periods for TMA were set at 4 seconds and 12 seconds, respectively. The pulse and purge times for H2O were set at 6 seconds and 14 seconds, respectively. To prevent overheating of the SHJ cells, the process temperature was maintained at 150 °C. Figure 14 presents a top-view SEM and EDS analysis images of a typical region of the cells after the deposition of the A1O_X barrier layer. The EDS analysis results demonstrated the uniform distribution of aluminium (Al) on both the silver (Ag) finger and the transparent conducting oxide regions. Based on the growth rate per cycle, the estimated final thickness of the A1O_X layer was ~10 nm.

Table 3 presents the I-V parameters of the cells before and after the deposition of the ALD A1O_X barrier layer on both sides of the cells. No significant changes were found in any of the parameters after the ALD A1O_X barrier layer was applied and the measured PCE of the cells remained at approximately 24%. As shown in Figure 15, no significant changes were observed in the luminescence images after deposition of the ALD A1O_X barrier layer. It is concluded that the A1O_X barrier layer has no significant impact on the performance of the SHJ solar cells.

Table 3. A comparison of average cell performance before and after the ALD process.

^{N m}i.^er PCE (%) , .^Js.^c ₂, Voc (mV) FF (%) of cells ^{v 7} (mA/cm ) ^{v 7 v 7}

Samples from Group 2 and Group 3 were exposed to a 0.9% weight sodium chloride (NaCl) solution. For each sample, about 0.2 g of NaCl solution was uniformly sprayed on the test surface, and the samples were dried.

All samples from Groups 1, 2 and 3 were placed separately in two wafer cassettes and loaded into an ASLi Environment chamber (T=85 °C and a relative humidity of 85%). The climate chamber was cooled down to room temperature periodically to facilitate the characterisation of the samples. At particular intervals, the samples were taken out for I-V, PL, EL and R_s measurements.

Figure 16 depicts the variation in APCE J_sc, V_oc, FF, and R_s of the SHJ cells of Groups 1 to 3 throughout the 20 hour duration of the damp heat (DH85) test.

Current-voltage (I-V) characteristics were measured using a LOANA solar cell analysis system

As shown in Figure 16, after 20 hours of DH85, the control group experienced only minor PCE attenuation, and all the parameters, such as J_sc, V_oc, fill factor (FF), and R_s remained relatively stable indicating that exposure to high humidity at an elevated temperature for 20 hours does not degrade SHJ cells.

SHJ solar cells without a A1O_X barrier layer which were exposed to NaCl (Na front bare and Na rear bare in Figure 16) showed a pronounced PCE degradation (~11.4%rei and ~33.5%_rei, respectively) after the 20-hour DH85 test. Further, in the first two hours, the R_s of the Na_front_bare samples increased by up to 143%_rei, the FF decreased from 82.5% to 76.9% and the PCE declined. The R_s of the Na_rear_bare and Na_front_bare samples increased to ~245.8%_rei nd t~l 99.3%_rei after 20 hours of DH85 test, respectfully. The V_oc of Na_rear_bare exhibited a loss of ~8.2%_rei after 20 hours of the DH85 test.

SHJ solar cells with an A1O_X barrier layer which were exposed to NaCl (Na_front_ALD and Na_rear_ALD in Figure 16) exhibited a minor drop in PCE (~3.3%_rei) after 20 hours of DH85 test. This drop in PCE can also be attributed to an increase in R_s, but the extent of loss (~3.1%_rei for Na_front_ALD and ~2.8%rei for Na_rear_ALD after the 20 hours of DH85 test) was significantly less than the cells without AlOx barrier layer. No significant loss of Foe was observed for Na_rear_ALD. These results that an A10_x barrier layers can effectively reduce the impact of NaCl induced degradation of SHJ solar cells relative to SHJ cells without said barrier.

Other Matter It will be appreciated by persons skilled in the art that numerous variations and/or modifications may be made to the above-described embodiments, without departing from the broad general scope of the present disclosure. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive.

Claims

2. The solar cell of claim 1, wherein the aluminium oxide is deposited via atomic layer deposition.

4. The solar cell of claim 3, wherein the barrier layer comprises aluminium oxide.

6. The solar cell of claim 5, wherein the wherein the barrier layer comprises aluminium oxide.

7. The solar cell of claim 5 or claim 6, wherein the barrier layer is deposited via atomic layer deposition.

8. The solar cell of any one of the preceding claims, wherein the barrier layer is capable of reducing the penetration of at least one contaminant from reaching at least a portion of the solar cell disposed beneath the barrier layer.

9. The solar cell of claim 8, wherein at least one contaminant is selected from: sodium ions, water, acids, metallic ions, and mixtures thereof.

10. The solar cell of any one of the preceding claims, wherein the barrier layer or at least one layer of the barrier layer has a pinhole density below 100/mm².

11. The solar cell of any one of the preceding claims, wherein the barrier layer, or at least one layer of the barrier layer, has a thickness of less than about 50 nm, optionally less than 10 nm.

12. The solar cell of any one of the preceding claims, wherein the barrier layer, or at least one layer of the barrier layer, consists essentially of aluminium oxide, or consists of aluminium oxide.

13. The solar cell of any one of the preceding claims, wherein the barrier layer, or at least one layer of the barrier layer, comprises doped aluminium oxide, wherein the aluminium oxide is optionally doped with zinc, titanium, or a mixture thereof.

14. The solar cell of any one of the preceding claims, wherein the barrier layer comprises at least: a layer comprising aluminium oxide; and a coating layer.

15. The solar cell of claim 14, wherein the coating layer comprises one or more of the group selected from: aluminium oxide, zinc oxide, titanium oxide, aluminium-doped zinc oxide, aluminium-doped titanium oxide, zinc-doped titanium oxide, indium tungsten oxide, and mixtures thereof.

16. The solar cell of any one of the preceding claims, wherein the plurality of layers comprises at least one of: a silicon substrate; one or more passivation layers or passivating contacts; and one or more transparent conductive oxide layers.

17. The solar cell of claim 16, wherein at least one of: the one or more passivation layers; and the one or more transparent conductive oxide layers, is manufactured via a method selected from the group consisting of atomic layer deposition, plasma-enhanced atomic layer deposition, chemical vapour deposition, plasma-enhanced chemical vapour deposition, physical vapour deposition, or a mixture thereof.

18. The solar cell according to any one of the preceding claims wherein the solar cell comprises one or more passivation layers, wherein the one or more passivation layers comprise at least one compound which is selected from: an oxide (optionally a transition metal oxide), a carbide, a nitride, or a mixture thereof.

19. The solar cell according to any one of the preceding claims wherein the solar cell comprises one or more passivation layers, wherein the one or more passivation layers comprise at least one of: molybdenum oxide, vanadium oxide, tungsten oxide, niobium oxide, copper oxide, tin oxide, nickel oxide, titanium oxide, tantalum oxide, aluminium oxide, silicon nitride, silicon oxide, silicon carbide, and mixtures thereof.

20. The solar cell of any one of the preceding claims, wherein the barrier layer substantially covers or completely covers at least one surface of the solar cell.

21. The solar cell of any one of the preceding claims, wherein the barrier layer substantially covers or completely covers a plurality of surfaces of the solar cell.

22. The solar cell of any one of the preceding claims, wherein the barrier layer substantially covers or encapsulates the solar cell.

23. The solar cell of any one of the preceding claims, wherein the one or more transparent conductive oxide layers comprises an oxide comprising at least one element selected from: indium, tin, aluminium, zinc, gallium, tungsten and mixtures thereof, wherein the oxide is optionally at least one material selected from: hydrogenated indium oxide, indium tin oxide, aluminium zinc oxide, gallium zinc oxide, tungsten doped indium oxide, indium zinc oxide, fluorine-doped tin oxide, aluminium-doped tin oxide, and mixtures thereof.

24. The solar cell according to any one of the preceding claims, wherein the solar cell comprises one or more transparent conductive oxide layers, wherein at least one of the one or more transparent conductive oxide layers has a thickness in a range of about 50 nm to about 100 nm.

25. The solar cell of any one of the preceding claims, wherein the solar cell comprises one or more transparent conductive oxide layers and wherein at least one of the one or more transparent conductive layers is an anti-reflection layer.

26. The solar cell of any of the preceding claims, wherein the solar cell exhibits less than about 15% loss of efficiency when exposed to damp heat conditions for 20 hours.

27. The solar cell of any of the preceding claims, wherein the solar cell is selected from the group consisting of: a silicon solar cell, a thin film solar cell, a silicon-based tandem solar cell, and a single or multi-junction III-V solar cell.

28. The solar cell of any of the preceding claims, wherein the type of solar cell is selected from the group consisting of: PERC, TOPCon, HJT, CIGS, CdTe, CZTS, OPV, perovskite, Si-perovskite, GaAs, or InP.

29. An array comprising a plurality of the solar cells of any one of claims 1 to 28.

31. The use according to claim 30, wherein the aluminium oxide is deposited via atomic layer deposition.

32. A method for manufacturing a solar cell according to any one of claims 1 to 28, the method comprising depositing the barrier layer via atomic layer deposition.

33. A solar cell comprising a barrier layer manufactured according to the method of claim 32.