WO2024129100A1 - Optimizing processor unit frequency - Google Patents
Optimizing processor unit frequency Download PDFInfo
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- WO2024129100A1 WO2024129100A1 PCT/US2022/053186 US2022053186W WO2024129100A1 WO 2024129100 A1 WO2024129100 A1 WO 2024129100A1 US 2022053186 W US2022053186 W US 2022053186W WO 2024129100 A1 WO2024129100 A1 WO 2024129100A1
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- WO
- WIPO (PCT)
- Prior art keywords
- frequency
- model
- processing unit
- processor
- instructions configured
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/02—Capturing of monitoring data
- H04L43/026—Capturing of monitoring data using flow identification
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
- G06F1/3209—Monitoring remote activity, e.g. over telephone lines or network connections
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N20/00—Machine learning
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/04—Architecture, e.g. interconnection topology
- G06N3/044—Recurrent networks, e.g. Hopfield networks
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/04—Architecture, e.g. interconnection topology
- G06N3/044—Recurrent networks, e.g. Hopfield networks
- G06N3/0442—Recurrent networks, e.g. Hopfield networks characterised by memory or gating, e.g. long short-term memory [LSTM] or gated recurrent units [GRU]
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/08—Learning methods
Definitions
- This invention relates generally to the field of computing, and, more particularly, to optimizing processing unit frequency in view of predicted network traffic patterns.
- data intensive and network intensive applications running on a (e.g., Kubernetes) cluster can be affined to isolated cores respecting a Non-Uniform Memory Access (NUMA) boundary.
- NUMA Non-Uniform Memory Access
- the amount of work done by these applications is directly proportional to the amount of data or network packets processed.
- the amount of data or network packets processed is in turn directly proportional to a processor core frequency.
- processor core frequency is directly proportion to wattage (power consumed). Running a processor at a higher core frequency consumes more power.
- Some threshold-based approaches utilize manually configured thresholds/rules to adjust processor frequency under various conditions.
- Figure 1 illustrates an example architecture that facilitates optimizing processor unit frequency.
- Figure 2 illustrates a flow chart of an example method for optimizing processor unit frequency.
- Figure 3 illustrates an example traffic flow relative to processing unit frequency.
- Figure 4 illustrates an example block diagram of a computing device.
- the present invention extends to methods, systems, and computer program products for optimizing processor core frequency in view of predicted network traffic patterns.
- a processor unit runs at a higher (or its highest frequency)
- corresponding applications can deliver more (or maximum) work.
- the data volume may be low enough that all data is processable at a frequency lower than the higher (or highest) frequency. If the processor unit is nonetheless run at the higher (or highest) frequency, power resources can be underutilized (or wasted).
- a processor unit may also be run at a median frequency. If a processor unit is run at a median frequency, power resources can be underutilized (or wasted) and/or data can be lost (e.g., packets can be dropped) over time as data volume changes.
- aspects of the invention can predict processor unit workload over time and adjust processor unit frequency to deliver a larger amount of work while consuming less power.
- Processing unit frequency (and thus power consumption) can be adjusted (e.g., increased or decreased) based on (e.g., network) traffic flow patterns to mitigate packet drops for applications.
- Network traffic can be predicted based on past learnings and processor unit frequency can be adjusted ahead of time.
- Processing unit frequency can be optimized to network traffic patterns.
- Network traffic patterns can be predicted based on historical Key Performance Indicators (KPIs), trends, metrics, etc. with enough probability to optimize processing unit frequencies.
- KPIs Key Performance Indicators
- potential processing issues e.g., inefficient power usage, packet drops, etc.
- a processing unit frequency is adjusted (e.g., increased or decreased) based on the historical Key Performance Indicators (KPIs), trends, metrics, etc. Adjustments can take corrective actions in terms of: optimal usage of power resources, scaling application instances, healing application instances (e.g., with migration/relocation), upgrading applications, etc.
- KPIs Key Performance Indicators
- Adjustments can take corrective actions in terms of: optimal usage of power resources, scaling application instances, healing application instances (e.g., with migration/relocation), upgrading applications, etc.
- a Recurrent Neural Network such as, a Long Short-Term Memory (LTSM) model
- RNN Long Short-Term Memory
- Processing unit frequency can be adjusted (e.g., increased or decreased) to adapt to predicted traffic patterns.
- a “processing unit” is defined as electronic circuitry that executes instructions of a computer program.
- a processing unit can be a central processing unit (CPU), a Graphical Processing Units (GPUs), a general-purpose GPUs (GPGPUs), a Field Programmable Gate Arrays (FPGA), an application specific integrated circuits (ASICs), a Tensor Processing Units (TPUs), etc.
- Processing unit is also defined to include a core of a multicore processor.
- a “multi-core processor” is defined as a microprocessor on a single integrated circuit with two or more separate processing units, called cores, each of which reads and executes program instructions.
- the instructions are ordinary CPU instructions (such as add, move data, and branch) but the single processor can run instructions on separate cores at the same time, increasing overall speed for programs that support multithreading or other parallel computing techniques.
- NUMA Non-Uniform Memory Access
- a NUMA architecture can include one or more “nodes” of resources.
- the resources at a NUMA node can include a plurality of CPUs connected to volatile memory and connected to one or more Non-Volatile Memory Express (NVMe) (or other) storage devices.
- NVMe Non-Volatile Memory Express
- FIG. 1 illustrates an example architecture 100 that facilitates optimizing processor unit frequency.
- architecture 100 includes application platform 101, monitor 104, model trainer 106, and automation platform 107.
- Application platform 101 further includes clusters 102A, 102B, and 102C.
- Cluster 102A includes processor units 122A, 132A, etc. and applications 103A (running on the processors).
- Cluster 102B includes processor units 122B, 132B, etc. and applications 103B (running on the processors).
- Cluster 102C includes processor units 122C, 132C, etc. and applications 103C (running on the processors). It may be that each of clusters 102A, 102B, and 102C is a different NUMA node.
- application platform 101 can receive a plurality of network packets over time defining an existing network traffic flow.
- Applications at application platform 101 can run on corresponding cluster processors.
- applications 103 A can run on processors 122A, 132A, etc.
- applications 103B can run on processors 122B, 132B, etc.
- applications 103C can run on processors 122C, 132C, etc.
- Applications 103A, 103B, 103C can process data contained in the network packets.
- the speed an application can process data depends on the frequency of the processor unit where the application is running. An application can process data faster when running on a processing unit operating at a higher frequency. On the other hand, an application processes data slower when running on a processing unit operating at a lower frequency.
- monitor 104 can monitor application platform 101, clusters 102A, 102B, and 102C, and applications 103A, 103B, and 103C.
- Monitor 104 can collect metrics associated with any of: application platform 101, clusters 102A, 102B, and 102C, and applications 103A, 103B, and 103C during processing of data contained in network packets by any of: applications 103A, 103B, and 103C.
- Monitor 104 can derive training data from the collected metrics.
- the derived training data can be used to train processor unit frequency adjustment models.
- Monitor 104 can send the derived training data to model trainer 106.
- Model trainer 106 can receive training data from monitor 104. Model trainer 106 can train processor unit frequency adjustment models using the training data. Processor unit frequency adjustment models can be RNNs such at LTSM models. Model trainer 106 can send processor unit frequency adjustment models to automation platform 107.
- a model can be configured to implement various conditions:
- Case 2 Minimal acceptable packet drops based on processing unit temperature Depending on processing unit operating temperature, there can be scenarios where packet drops are acceptable. Packet drops can be minimized as much as possible while keeping processing unit temperature below a maximum allowable temperature (e.g., 100 0 C)
- Case 3 x% power savings
- Automation platform 107 can receive processor unit frequency adjustment models from model trainer 106. Automation platform 107 can execute a processor frequency adjustment model to predict network packets defining further network traffic flow patterns to be received at application platform 101. Based on predicted further network traffic flow patterns, automation platform 107 can send processor frequency adjustments to application platform 101.
- the processor frequency adjustments can include instructions to adjust (e.g., increase or decrease) the frequency of any of: processor units 122A, 132A, etc., processor units 122B, 132B, etc., or processor units 122C, 132C, etc.
- Application platform 101 can receive processor frequency adjustments from automation platform 107.
- Application platform 101 can adjust the frequency at any of: processor units 122A, 132A, etc., processor units 122B, 132B, etc., or processor units 122C, 132C, etc. in accordance with instructions included in received processor frequency adjustments.
- Adjusting processor unit frequency can optimize the processor unit frequency for processing data in network packets of the further network flow.
- Figure 2 illustrates a flow chart of an example method 200 for optimizing processor unit frequency. Method 200 will be described with respect to the components and data in architecture 100.
- Method 200 includes receiving network packets over time at a platform, the network packets defining a traffic network flow (201).
- application platform 101 can receive a plurality of network packets over time defining network traffic flow 111.
- Applications at application platform 101 can run on corresponding processors and can process data contain in the network packets of network traffic data flow 111.
- an application 103 A can run on processor 132A to process data contained in the network packets of network traffic data flow 111.
- an application 103C can run on processor 122C to process data contained in the network packets of network traffic data flow 111.
- Method 200 includes monitoring metrics derived from one or more applications executing at one or more processing units of the platform and processing data contained in the network data packets (202).
- monitor 104 can monitor app metrics 112, cluster metrics 113, and platform metrics 114 derived from applications 103A executing on processors 122A, 132A, etc., from applications 103B executing on processors 122B, 132B, etc., and from applications 103C executing on processors 122C, 132C, etc.
- Applications 103A, 103B, and 103C can process data contained in network packets of network traffic flow 111.
- App metrics 112 can be metrics corresponding to applications 103 A, 130B, and 103C.
- Cluster metrics 113 can be metrics corresponding to clusters 102A, 102B, and 102C.
- Platform metrics 114 can correspond to application platform 101.
- Method 200 includes formulating model training data from the metrics (203). For example, monitor 104 can formulate training data 119 from app metrics 112, cluster metrics 113, and platform metrics 114. Monitor 104 can send training data 119 to model trainer 106. Model trainer 106 can receive training data 119 from monitor 104. Method 200 includes training a processor unit frequency adjustment model using the model training data (204). For example, model trainer 106 can train model 116 using training data 119. Model 116 can be an RNN, such as, as an LTSM model, configured to predict subsequent network traffic flows received at application platform 101. Model trainer 106 can send model 116 to automation platform 107. Automation platform 107 can receive model 116 from model trainer 106.
- RNN such as, as an LTSM model
- Method 200 includes automating execution of the model adjusting the frequency of a processing unit from among the one or more processing units (205).
- automation platform 107 can automate execution of model 116.
- Executing model 116 can predict network packets defining network traffic flow 118 are to be received at application platform 101.
- automation platform 107 can derive processor frequency adjustments 117.
- Automation platform 107 can send processor frequency adjustments 117 to application platform 101.
- Application platform 101 can adjust the frequency of one or more of: processors 122A, 132A, etc., processors 122B, 132B, etc., or processors 122C, 132C, etc. in accordance with processor frequency adjustments 117.
- Processor frequencies can be adjusted in anticipation of receiving the network packets defining network traffic flow 118. Adjusting processor frequencies can optimize the processor frequencies for processing the network packets defining network traffic flow 118. For example, one or more processor frequencies can be decreased if the workload associated with network traffic flow 118 is anticipated to be less than the workload associated with network traffic flow 111.
- one or more process frequencies can be increased if the workload associated with network traffic flow 118 is anticipated to be more than the workload associated with network traffic flow 111.
- Method 200 includes receiving additional network packets at the platform, the additional network packets define an additional network flow overtime (206). For example, subsequent to receiving network packets defining network traffic flow 111, application platform 101 can receive additional network packets defining network traffic flow 118.
- Method 200 includes processing data contained in the additional network packets at the processing unit at the adjusted frequency (207).
- processors 122A, 132A, etc., processors 122B, 132B, etc., or processors 122C, 132C, etc. can process data contained in network packets of network traffic flow 118 at frequencies previously adjusted in accordance with processor frequency adjustments 117. Processing data at the adjusted frequencies optimizes data processing by providing sufficient processing resources in a manner that also minimizes power consumption.
- Method 200 or portions thereof can be repeated responsive to processing data packets in network traffic flow 118 to further refine a frequency adjustment model configured to adjust processor frequencies at application platform 101.
- FIG. 3 illustrates an example network traffic flow 301 relative to processing unit frequency 302.
- processor unit frequency 302 is adjusted to match network traffic flow 301 as the network traffic flow changes over time. For example, processor frequency is reduced at hours 3 and 4 to reduce power consumption in view of reduced traffic flow. On the other hand, processor frequency is increased to a highest frequency at hours 18, 19, 20, 21, and 22 to provide increased processing resources in view of increased traffic flow.
- Figure 4 illustrates an example block diagram of a computing device 400.
- Computing device 400 can be used to perform various procedures, such as those discussed herein.
- Computing device 400 can function as a server, a client, or any other computing entity.
- Computing device 400 can perform various communication and data transfer functions as described herein and can execute one or more application programs, such as the application programs described herein.
- Computing device 400 can be any of a wide variety of computing devices, such as a mobile telephone or other mobile device, a desktop computer, a notebook computer, a server computer, a handheld computer, tablet computer and the like.
- Computing device 400 includes one or more processor(s) 402, one or more memory device(s) 404, one or more interface(s) 406, one or more mass storage device(s) 408, one or more Input/Output (I/O) device(s) 410, and a display device 430 all of which are coupled to a bus 412.
- Processor(s) 402 include one or more processors or controllers that execute instructions stored in memory device(s) 404 and/or mass storage device(s) 408.
- Processor(s) 402 may also include various types of computer storage media, such as cache memory.
- Memory device(s) 404 include various computer storage media, such as volatile memory (e.g., random access memory (RAM) 414) and/or nonvolatile memory (e.g., read-only memory (ROM) 416). Memory device(s) 404 may also include rewritable ROM, such as Flash memory.
- volatile memory e.g., random access memory (RAM) 41
- ROM read-only memory
- Memory device(s) 404 may also include rewritable ROM, such as Flash memory.
- Mass storage device(s) 408 include various computer storage media, such as magnetic tapes, magnetic disks, optical disks, solid state memory (e.g., Flash memory), and so forth. As depicted in Figure 4, a particular mass storage device is a hard disk drive 424. Various drives may also be included in mass storage device(s) 408 to enable reading from and/or writing to the various computer readable media. Mass storage device(s) 408 include removable media 426 and/or nonremovable media.
- I/O device(s) 410 include various devices that allow data and/or other information to be input to or retrieved from computing device 400.
- Example I/O device(s) 410 include cursor control devices, keyboards, keypads, barcode scanners, microphones, monitors or other display devices, speakers, printers, network interface cards, modems, cameras, lenses, radars, CCDs or other image capture devices, and the like.
- Display device 430 includes any type of device capable of displaying information to one or more users of computing device 400. Examples of display device 430 include a monitor, display terminal, video projection device, and the like.
- Interface(s) 406 include various interfaces that allow computing device 400 to interact with other systems, devices, or computing environments as well as humans.
- Example interface(s) 406 can include any number of different network interfaces 420, such as interfaces to personal area networks (PANs), local area networks (LANs), wide area networks (WANs), wireless networks (e.g., near field communication (NFC), Bluetooth, Wi-Fi, etc., networks), and the Internet.
- Other interfaces include user interface 418 and peripheral device interface 422.
- Bus 412 allows processor(s) 402, memory device(s) 404, interface(s) 406, mass storage device(s) 408, and I/O device(s) 410 to communicate with one another, as well as other devices or components coupled to bus 412.
- Bus 412 represents one or more of several types of bus structures, such as a system bus, PCI bus, IEEE 1394 bus, USB bus, and so forth.
- one or more processors are configured to execute instructions (e.g., computer-readable instructions, computer-executable instructions, etc.) to perform any of a plurality of described operations.
- the one or more processors can access information from system memory and/or store information in system memory.
- the one or more processors can transform information between different formats, such as, for example, network packets, network traffic flows, app metrics, cluster metrics, platform metrics, training data, models, processor frequency adjustments, etc.
- System memory can be coupled to the one or more processors and can store instructions (e.g., computer-readable instructions, computer-executable instructions, etc.) executed by the one or more processors.
- the system memory can also be configured to store any of a plurality of other types of data generated by the described components, such as, for example, network packets, network traffic flows, app metrics, cluster metrics, platform metrics, training data, models, processor frequency adjustments, etc.
- aspects of the invention can facilitate significant power savings (e.g., reducing power consumption by 30% to 40%). During prolonged off-peak hours workload relocation can optimize power savings even further. Using less power along with reduced operational expenses translates to financial savings. Aspects of the invention also (potentially significantly) reduce application downtime translating to higher availability and improved customer experience.
- Implementations can comprise or utilize a special purpose or general-purpose computer including computer hardware, such as, for example, one or more computer and/or hardware processors (including any of Central Processing Units (CPUs), and/or Graphical Processing Units (GPUs), general-purpose GPUs (GPGPUs), Field Programmable Gate Arrays (FPGAs), application specific integrated circuits (ASICs), Tensor Processing Units (TPUs)) and system memory, as discussed in greater detail below. Implementations also include physical and other computer-readable media for carrying or storing computer-executable instructions and/or data structures. Such computer-readable media can be any available media that can be accessed by a general purpose or special purpose computer system.
- CPUs Central Processing Units
- GPUs Graphical Processing Units
- GPUs general-purpose GPUs
- FPGAs Field Programmable Gate Arrays
- ASICs application specific integrated circuits
- TPUs Tensor Processing Units
- Implementations also include physical and other computer-readable media for carrying or storing computer-executable instructions
- Computer-readable media that store computer-executable instructions are computer storage media (devices).
- Computer-readable media that carry computer-executable instructions are transmission media.
- implementations can comprise at least two distinctly different kinds of computer-readable media: computer storage media (devices) and transmission media.
- Computer storage media includes RAM, ROM, EEPROM, CD-ROM, solid state drives (“SSDs”) (e.g., based on RAM), Flash memory, phase-change memory (“PCM”), other types of memory, other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store desired program code means in the form of computer-executable instructions or data structures and which can be accessed by a general purpose or special purpose computer.
- SSDs solid state drives
- PCM phase-change memory
- An implementation of the devices, systems, and methods disclosed herein may communicate over a computer network.
- a “network” is defined as one or more data links that enable the transport of electronic data between computer systems and/or modules and/or other electronic devices.
- Transmissions media can include a network and/or data links, which can be used to carry desired program code means in the form of computer-executable instructions or data structures and which can be accessed by a general purpose or special purpose computer. Combinations of the above should also be included within the scope of computer-readable media.
- Computer-executable instructions comprise, for example, instructions and data which, when executed at a processor, cause a general purpose computer, special purpose computer, or special purpose processing device to perform a certain function or group of functions.
- the computer executable instructions may be, for example, binaries, intermediate format instructions such as assembly language, or even source code.
- the disclosure may be practiced in network computing environments with many types of computer system configurations, including, an indash or other vehicle computer, personal computers, desktop computers, laptop computers, message processors, hand-held devices, multi-processor systems, microprocessor-based or programmable consumer electronics, network PCs, minicomputers, mainframe computers, mobile telephones, PDAs, tablets, pagers, routers, switches, various storage devices, and the like.
- the disclosure may also be practiced in distributed system environments where local and remote computer systems, which are linked (either by hardwired data links, wireless data links, or by a combination of hardwired and wireless data links) through a network, both perform tasks.
- program modules may be located in both local and remote memory storage devices.
- ASICs application specific integrated circuits
- a sensor may include computer code configured to be executed in one or more processors, and may include hardware logic/electrical circuitry controlled by the computer code.
- processors may include hardware logic/electrical circuitry controlled by the computer code.
- At least some embodiments of the disclosure have been directed to computer program products comprising such logic (e.g., in the form of software) stored on any computer useable medium.
- Such software when executed in one or more data processing devices, causes a device to operate as described herein.
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Abstract
Description
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Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US18/006,982 US20250300911A1 (en) | 2022-12-16 | 2022-12-16 | Optimizing Processor Unit Frequency |
| PCT/US2022/053186 WO2024129100A1 (en) | 2022-12-16 | 2022-12-16 | Optimizing processor unit frequency |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/US2022/053186 WO2024129100A1 (en) | 2022-12-16 | 2022-12-16 | Optimizing processor unit frequency |
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| Publication Number | Publication Date |
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| WO2024129100A1 true WO2024129100A1 (en) | 2024-06-20 |
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| Application Number | Title | Priority Date | Filing Date |
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| PCT/US2022/053186 Ceased WO2024129100A1 (en) | 2022-12-16 | 2022-12-16 | Optimizing processor unit frequency |
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| Country | Link |
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| US (1) | US20250300911A1 (en) |
| WO (1) | WO2024129100A1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US20200250539A1 (en) * | 2017-10-20 | 2020-08-06 | Shanghai Cambricon Information Technology Co., Ltd | Processing method and device |
| US20210064444A1 (en) * | 2019-08-27 | 2021-03-04 | Advanced Micro Devices, Inc. | Proactive management of inter-gpu network links |
| WO2021242388A1 (en) * | 2020-05-29 | 2021-12-02 | Intel Corporation | Systems, apparatus, and methods to workload optimize hardware |
| US20220104127A1 (en) * | 2020-09-25 | 2022-03-31 | Samsung Electronics Co., Ltd. | Method and apparatus for power management in a wireless communication system |
| US20220329539A1 (en) * | 2020-09-02 | 2022-10-13 | Samsung Electronics Co., Ltd. | METHOD AND SERVER FOR ADJUSTING ALLOCATION OF COMPUTING RESOURCES TO PLURALITY OF VIRTUALIZED NETWORK FUNCTIONS (VNFs) |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| BR112016021103A2 (en) * | 2016-07-15 | 2018-05-15 | Ericsson Telecomunicacoes Sa | server and method performed this way to determine a frequency and voltage of one or more server processors |
| US20190199602A1 (en) * | 2019-03-01 | 2019-06-27 | Intel Corporation | Method and apparatus for closed-loop optimization flow in a network functions virtualization environment |
| US20200167258A1 (en) * | 2020-01-28 | 2020-05-28 | Intel Corporation | Resource allocation based on applicable service level agreement |
| US12001932B2 (en) * | 2020-07-27 | 2024-06-04 | Intel Corporation | Hierarchical reinforcement learning algorithm for NFV server power management |
-
2022
- 2022-12-16 US US18/006,982 patent/US20250300911A1/en active Pending
- 2022-12-16 WO PCT/US2022/053186 patent/WO2024129100A1/en not_active Ceased
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20200250539A1 (en) * | 2017-10-20 | 2020-08-06 | Shanghai Cambricon Information Technology Co., Ltd | Processing method and device |
| US20210064444A1 (en) * | 2019-08-27 | 2021-03-04 | Advanced Micro Devices, Inc. | Proactive management of inter-gpu network links |
| WO2021242388A1 (en) * | 2020-05-29 | 2021-12-02 | Intel Corporation | Systems, apparatus, and methods to workload optimize hardware |
| US20220329539A1 (en) * | 2020-09-02 | 2022-10-13 | Samsung Electronics Co., Ltd. | METHOD AND SERVER FOR ADJUSTING ALLOCATION OF COMPUTING RESOURCES TO PLURALITY OF VIRTUALIZED NETWORK FUNCTIONS (VNFs) |
| US20220104127A1 (en) * | 2020-09-25 | 2022-03-31 | Samsung Electronics Co., Ltd. | Method and apparatus for power management in a wireless communication system |
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| Publication number | Publication date |
|---|---|
| US20250300911A1 (en) | 2025-09-25 |
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