WO2024113702A1 - 数据存储方法及相关设备 - Google Patents

数据存储方法及相关设备 Download PDF

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Publication number
WO2024113702A1
WO2024113702A1 PCT/CN2023/095350 CN2023095350W WO2024113702A1 WO 2024113702 A1 WO2024113702 A1 WO 2024113702A1 CN 2023095350 W CN2023095350 W CN 2023095350W WO 2024113702 A1 WO2024113702 A1 WO 2024113702A1
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Prior art keywords
data
check
stripe
target
cache
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English (en)
French (fr)
Inventor
李飞龙
许永良
孙明刚
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Suzhou Metabrain Intelligent Technology Co Ltd
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Suzhou Metabrain Intelligent Technology Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G06F12/0871—Allocation or management of cache space
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G06F12/0868—Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G06F2212/1024—Latency reduction
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/26—Using a specific storage system architecture
    • G06F2212/261—Storage comprising a plurality of storage devices
    • G06F2212/262—Storage comprising a plurality of storage devices configured as RAID

Definitions

  • the present application relates to the technical field of data storage, and in particular to a data storage method and related equipment.
  • RAID Redundant Array of Independent Disks
  • I/O Input/Output
  • cache as an important component of the RAID array, can greatly improve I/O performance and accelerate read and write responses.
  • the storage system only needs to write data to the cache, and then immediately send a data write success signal to the host, and then continue to process other I/O requests initiated by the host.
  • the speed of writing data to the cache is much faster than the speed of writing to the physical disk, and the I/O data temporarily stored in the cache will be written to each disk in the RAID array by multiple threads in the thread pool concurrently, thus greatly reducing the I/O response delay.
  • RAID card hard RAID storage technology
  • RAID card soft RAID storage technology
  • the use of RAID card technology can effectively improve the I/O performance and data security of reading and writing data.
  • WB Write Back, write-back mode
  • WT Write Through, write-through mode
  • the WB write strategy has a lower response delay than the WT write strategy, because the WB write strategy writes the write data and the verification data into the cache and immediately sends a data write success signal to the host, while the WT write strategy sends a data write success signal to the host only after the write data and the verification data are all written to the physical disk of the RAID card. Therefore, the WB write strategy has higher I/O performance than the WT write strategy.
  • the industry's implementation details of the WB write strategy are that after receiving the write data, the write data is first striped, and wait for the check blocks to be obtained by the XOR operation of the data blocks in each stripe after the split. After the check blocks are obtained, the check blocks in each stripe are written into the cache, and finally the host is responded to. Obviously, this waiting process will increase the response delay of the WB write strategy.
  • the present application provides a data storage method, which can effectively reduce the response delay to the host side during the data storage process, thereby achieving a fast response; the present application also provides a data storage device, equipment and non-volatile readable storage medium, all of which have the above-mentioned beneficial effects.
  • the present application provides a data storage method, the method comprising:
  • obtaining a target cache node includes:
  • the number of data storage requests is the same as the number of target cache nodes.
  • determining a target cache area specified in a target cache node includes:
  • the target cache area is determined according to the record information of the cache area field.
  • the target cache node includes a flush status field, a cache area field, a front pointer field, and a back pointer field;
  • the flush status field is used to record the cache flush status of the cache area, and the cache flush status includes cache flush completed and cache flush incomplete;
  • the cache area field is used to record the location information of the target cache area in the cache area
  • the previous pointer field is used to record the node information of the previous cache node of the target cache node in the global free cache node list;
  • the back pointer field is used to record the node information of the next cache node after the target cache node in the global free cache node linked list.
  • a check block is obtained by calculating each data block in the data stripe
  • the method after writing the check block into the corresponding data stripe in the target cache area, the method further includes:
  • the target check element includes a global check status field, a stripe check status field, and a pointer field;
  • the global verification status field is used to record the global verification status of the target data.
  • the global verification status includes global verification completed and global verification incomplete;
  • the stripe check status field is used to record the stripe check status of each data stripe, and the stripe check status includes stripe check completed and stripe check incomplete;
  • the pointer field is used to record the element information of the next check element of the target check element in the global check table.
  • the method further includes:
  • the global check status field is updated to global check completed.
  • each data block and check block in the data stripe is flushed to the physical disk.
  • the flush status field is associated with the bitmap metadata, and the bitmap metadata is used to record the stripe flush status of each data stripe, and the stripe flush status includes stripe flush completed and stripe flush incomplete;
  • the method further includes:
  • the flush status field is updated to indicate that the cache flush is completed.
  • the method further includes:
  • the present application also discloses a data storage device, the device comprising:
  • a determination module used to determine target data according to a data storage request
  • An acquisition module used to acquire a target cache node and determine a target cache area specified in the target cache node
  • a partitioning module used for partitioning the target data into stripes to obtain each data stripe
  • a writing module used for writing each data stripe into a target cache area in response to a prompt of stripe division completion
  • the feedback module is used to feed back a storage completion signal to the initiator of the data storage request.
  • the present application also discloses a data storage device, comprising:
  • a processor is used to implement the steps of any one of the data storage methods described above when executing a computer program.
  • the present application also discloses a non-volatile readable storage medium, on which a computer program is stored.
  • a computer program is stored on which a computer program is stored.
  • the steps of any one of the data storage methods described above are implemented.
  • the target cache area corresponding to the target data can be determined in the target cache node, and the target data can be striped.
  • the striping situation can be monitored in real time. Once the striping completion prompt is detected, The data stripes obtained after the division are immediately written into the target cache area, and the storage completion signal is directly fed back to the initiator. That is to say, after completing the data stripe division, this technical solution can realize data caching and reply to the requesting end without waiting for the generation of the verification block. It can effectively reduce the response delay to the requesting end during the data storage process, thereby achieving fast response, and also help improve the system performance of the storage end.
  • FIG1 is a schematic diagram of a flow chart of a data storage method provided by the present application.
  • FIG2 is a schematic diagram of stripe division provided by the present application.
  • FIG3 is a schematic diagram of the structure of a cache module provided by the present application.
  • FIG4 is a schematic diagram of the structure of a global check table provided in the present application.
  • FIG5 is a schematic diagram of the structure of a cache node provided by the present application.
  • FIG6 is a schematic diagram of the structure of a global idle cache node linked list provided by the present application.
  • FIG7 is a schematic diagram of a flow chart of another data storage method provided by the present application.
  • FIG8 is a schematic structural diagram of a data storage device provided by the present application.
  • FIG. 9 is a schematic diagram of the structure of a data storage device provided by the present application.
  • An embodiment of the present application provides a data storage method.
  • FIG. 1 is a schematic flow chart of a data storage method provided in the present application.
  • the data storage method may include the following S101 to S105 .
  • S101 Determine target data according to a data storage request.
  • This step aims to determine the target data, which is the data that needs to be stored. Specifically, when a certain data needs to be written into the storage system for storage, the host side (the initiator of the data storage request) can add the data as the target data to the data storage request and send it to the storage system. Request to parse and obtain target data.
  • S102 Acquire a target cache node, and determine a target cache area specified in the target cache node.
  • This step aims to achieve the acquisition of the target cache node.
  • a cache area can be pre-created in the storage system and divided into multiple cache areas, each of which is used to store a copy of the target data, and each cache area has a cache node recording its location information, so each cache node is used to process a data storage request.
  • a cache node can be obtained first as the target cache node for processing the data storage request. Since the location information of a cache area is recorded in the target cache node, the cache area can be used as the target cache area for the target data to facilitate writing the target data into the target cache area.
  • the target cache node should be a cache node in an idle state.
  • the target cache area specified by the target cache node should be a cache area to which no target data is written.
  • This step is intended to achieve striping of the target data.
  • the physical disk stores data in the form of strips, that is, a partition is divided into multiple blocks of equal size and adjacent addresses. These blocks are called blocks, and blocks are usually considered to be elements of stripes, and stripes are a collection of position-related blocks on different partitions. Therefore, in order to facilitate the subsequent flushing of the target data in the cache area to the physical disk, the target data can also be striped to obtain individual data stripes, so that the target data is stored in the target cache area of the cache area in the form of data stripes.
  • Figure 2 is a stripe division diagram provided by the present application. 101 shown in the figure is the data stripes stripe0 ⁇ stripe2 after division, stripe1 ⁇ strip20 represent 20 data blocks, and parity1 ⁇ parity5 represent 5 check blocks.
  • This step is intended to achieve writing each data stripe into the target cache area.
  • the write data is first striped, and the check blocks are obtained by XOR operation of the data blocks in each stripe after the striping. After the check blocks are obtained, the check blocks in each stripe are written into the cache, and finally the host is responded to. Obviously, this waiting process will increase the response delay of the WB write strategy.
  • the striping process can be monitored in real time. Once the striping completion prompt is detected, each data stripe is immediately written into the target cache area.
  • writing each data stripe into the target cache area is performed after the target data is divided into multiple data stripes and before the check blocks are calculated for each data stripe (that is, the check value is not written in the check block). That is to say, the check blocks in each data stripe are written into the target cache area in the form of empty blocks. After that, the check value is calculated and the check blocks are filled in the target cache area.
  • This step aims to realize the feedback of the storage completion signal, specifically, after each data stripe is written into the target cache area, the storage completion signal is fed back to the initiator of the data storage request (i.e., the host end mentioned above). Based on S104, the storage completion signal is fed back to the initiator of the data storage request before the check value is calculated and the check block is filled, so as to realize The response can be sent to the initiator without waiting for the check value to be processed, which effectively reduces the response delay.
  • the data storage method provided in the embodiment of the present application can first determine the target cache area corresponding to the target data in the target cache node, and stripe the target data, after determining the target data that needs to be written to the storage system according to the data storage request.
  • the stripe division situation can be monitored in real time. Once the stripe division completion prompt is detected, the data stripes obtained after the division are immediately written to the target cache area, and the storage completion signal is directly fed back to the initiator.
  • the technical solution can realize data caching and reply to the request end without waiting for the generation of the check block.
  • the response delay to the request end can be effectively reduced during the data storage process, thereby achieving a fast response, and also helping to improve the system performance of the storage end.
  • the above-mentioned acquisition of the target cache node may include: acquiring an idle cache node from a global idle cache node list; using the idle cache node as the target cache node; wherein the number of data storage requests is the same as the number of target cache nodes.
  • the embodiment of the present application provides a method for obtaining a target cache node.
  • a global free cache node linked list can be created in advance to manage free cache nodes, and thus, a free cache node can be directly retrieved from the global free cache node linked list as a target cache node. It should be noted that since one cache node is used to process one data storage request, the number of free cache nodes retrieved is the same as the number of data storage requests received, and the free cache nodes are sequentially allocated to each data storage request for subsequent processing.
  • the above-mentioned determination of the target cache area specified in the target cache node may include: performing field parsing on the target cache node to obtain a cache area field; and determining the target cache area based on record information of the cache area field.
  • each cache area has its location information recorded by a cache node, so after obtaining the cache node, it can be field parsed to obtain a cache area field for storing the location information of the target cache area, and then the target cache area is determined based on the recorded information in the cache area field.
  • the recorded information is the location information of the target cache area.
  • the target cache node may include a flush status field, a cache area field, a front pointer field, and a back pointer field;
  • the flush status field is used to record the cache flush status of the cache area, and the cache flush status includes cache flush completed and cache flush incomplete;
  • the cache area field is used to record the location information of the target cache area in the cache area;
  • the front pointer field is used to record the node information of the previous cache node of the target cache node in the global free cache node linked list;
  • the back pointer field is used to record the node information of the next cache node of the target cache node in the global free cache node linked list.
  • the embodiment of the present application provides a specific form of cache node, which may include four fields, namely, a flush status field, a cache area field, a front pointer field, and a back pointer field.
  • the flush status field is used to record the cache flush status of the cache area, which is whether the cache data in the cache area is flushed to the physical disk. Therefore, the cache flush status includes cache flush completed and cache flush incomplete.
  • the cache flush completed indicates that the cache data in the cache area has been flushed to the physical disk, and the cache flush incomplete indicates that the cache data in the cache area has not been flushed to the physical disk;
  • the front pointer field and the back pointer field are used to confirm the front and back cache nodes of the current cache node, to ensure the coherent order of the cache nodes, and then to ensure the coherent order of processing data storage requests.
  • each data stripe after writing each data stripe into the target cache area, the following may also be included: for each data stripe, obtaining a check block by calculating based on each data block in the data stripe; and writing the check block into the corresponding data stripe in the target cache area.
  • This step is intended to realize the calculation of the check value and the filling of the check block. It should be noted that this step can be performed after the storage completion signal is fed back to the request end, or at the same time as the storage completion signal is fed back to the request end, but not before the storage completion signal is fed back to the request end.
  • the check block can be calculated according to each data block therein.
  • the method of performing XOR operation on each data block can be adopted to obtain the check block, and then the check block is written to the corresponding data stripe in the target cache area.
  • the check block after the check block is written into the corresponding data stripe in the target cache area, it may also include: obtaining an idle check element in the global check table as a target check element; searching for the check status bit corresponding to the data stripe in the stripe check field of the target check element; and updating the check status bit to indicate that the stripe check is completed.
  • the embodiment of the present application provides an implementation method for recording the verification status of each data stripe, where the stripe verification status is used to indicate whether the corresponding data stripe has completed the verification, including the stripe verification has been completed and the stripe verification has not been completed.
  • a global verification table can be created in advance, which includes multiple verification elements in an idle state, each of which is used to record the verification status of each data stripe in the target data.
  • each verification element can record the verification status of each data stripe in the target data through the stripe verification field therein.
  • an idle verification element can be obtained from the global verification table as a target verification element corresponding to the target data, and a stripe verification field can be found therein, and the stripe verification field includes multiple verification status bits, each of which is used to record the verification status of a data stripe. Therefore, after the verification block is written into the corresponding data stripe in the target cache area, the verification status bit corresponding to the data stripe can be found in the above-mentioned stripe verification field, and it can be updated to the state where the stripe verification has been completed. For example, when the verification status position is 0, it indicates that the corresponding data stripe verification is not completed, and when the verification status position is 1, it indicates that the corresponding data stripe verification has been completed.
  • the target check element may include a global check status field, a stripe check status field, and a pointer field;
  • the global check status field is used to record the global check status of the target data, and the global check status includes global check completed and global check incomplete;
  • the stripe check status field is used to record the stripe check status of each data stripe, and the stripe check status includes stripe check completed and stripe check incomplete;
  • the pointer field is used to record the element information of the next check element of the target check element in the global check table.
  • the embodiment of the present application provides a specific form of a check element, which may include three fields, namely, a global check state field, a stripe check state field, and a pointer field. Among them, it is used to record the global check state of the target data, and the global check state is used to indicate whether all data stripes in the target data have been fully checked. Therefore, the global check state includes global check completed and global check incomplete. Global check completed means that all data stripes in the target data have been checked, and global check incomplete means that there are still data stripes in the target data that have not been checked. The pointer field is used to point to the next check element.
  • the method may further include: when all check status bits in the stripe check field are in the stripe check completed state, updating the global check status field to global check completed.
  • the stripe check field in the check element is used to record the check status of each data stripe in the target data
  • the global check status field is used to record the check status of all data stripes in the target data. Therefore, when all the check status bits in the stripe check field are in the stripe check completion state, the global check status field can be updated to the global check completion state. For example, 0 indicates that the check is not completed, and 1 indicates that the check is completed. Then, when all the check status bits in the stripe check field are 1, the global check status field is set to 1, and when there is a check status bit set to 0 in the stripe check field, the global check status field is set to 0.
  • each data stripe in the cache area is flushed to the physical disk.
  • the data storage provided in the embodiments of the present application is used to implement the flushing of cached data in the cache area to the physical disk.
  • the global check status field is updated to the global check completed, that is, it is confirmed that the target data has completed the global check
  • each data block and check block in each data stripe can be flushed to the physical disk.
  • the flushing operation can be performed together after all cache areas in the cache area have completed the global check.
  • the flush status field is associated with the bitmap metadata, and the bitmap metadata is used to record the stripe flush status of each data stripe, and the stripe flush status includes stripe flush completed and stripe flush incomplete;
  • the process may further include: searching for a flush status bit corresponding to the data stripe in the bitmap metadata; and updating the flush status bit to indicate that the stripe flushing is completed.
  • the embodiment of the present application provides an implementation method for recording the flushing status of each data stripe, where the stripe flushing status is used to indicate whether the corresponding data stripe has completed flushing, including whether the stripe flushing has been completed and whether the stripe flushing has not been completed.
  • a bitmap metadata can be created in advance, which includes multiple bits in the flushing status, and each flushing status bit is used to record the flushing status of a data stripe.
  • the flushing status bit corresponding to the data stripe can be found in the bitmap metadata, and the flushing status bit can be updated to the state where the stripe has been flushed. For example, when the flushing status position is 0, it indicates that the corresponding data stripe has not been flushed, and when the flushing status position is 1, it indicates that the corresponding data stripe has been flushed.
  • the bitmap metadata is associated with the flush status field in the cache node and is used to implement the update of the flush status field.
  • the method may further include: when all flush status bits in the bitmap metadata indicate that the stripe flush is completed, updating the flush status field to indicate that the cache flush is completed.
  • the bitmap metadata is used to record the flush status of each data stripe in the target data
  • the flush status field in the cache node is used to record the flush status of all data stripes in the target data
  • the bitmap metadata is associated with the flush status field. Therefore, when all the flush status bits in the bitmap metadata are stripe flushing completed, the flush status field can be updated to cache flushing completed. For example, 0 means that the flushing is not completed, and 1 means that the flushing is completed. Then, when all the flush status bits in the bitmap metadata are 1, the flush status field is set to 1, and when there is a flush status bit set to 0 in the bitmap metadata, the flush status field is set to 0.
  • the method may further include: when the global check status field is updated to global check completed, releasing the target check element; when the flush status field is updated to cache flush completed, releasing the target cache node.
  • the embodiment of the present application is used to realize the release of the target check element and the target cache node.
  • the global check status field is updated
  • the target check element is released to provide services for subsequent new data storage requests
  • the flush status field is updated to cache flush completed, that is, when it is confirmed that the target data has completed the global flush
  • the target cache node is released to provide services for subsequent new data storage requests.
  • An embodiment of the present application provides another data storage method.
  • FIG. 3 is a schematic diagram of the structure of a cache module provided by the present application.
  • the cache module is a cache module in a RAID card, including an upper cache 210 , a lower cache 211 and a cache area 212 . Among them:
  • the upper cache 210 is used to maintain a global check table, and the global check table can be managed using a metadata organization method that combines a one-way linked list and a bitmap.
  • FIG. 4 is a schematic diagram of the structure of a global check table provided by the present application. For each check element in the global check table:
  • the parity_ok field (global check status field) indicated by 301 is of bool type. When all the check blocks of the strips after the target data is split are calculated, the parity_ok field is assigned a value of true, otherwise it is assigned a value of false.
  • stripe[32] field stripe check status field indicated by 302 is an array of int type.
  • An int type data contains 8 bits, and one bit corresponds to one stripe. If the check block of the stripe has been calculated, the corresponding bit is set to 1, otherwise it is set to 0 (indicated by 304). Therefore, when the bits corresponding to the stripe are all 1, the parity_ok field is assigned to true, otherwise it is assigned to false.
  • nextStripe field (pointer field) indicated by 303 points to the next check element in the global check table.
  • the lower cache 211 uses a two-way linked list metadata organization method to manage cache nodes.
  • One cache node manages and controls a host I/O request (data storage request).
  • the two-way linked list metadata uses the front pointer field and the back pointer field in the cache node to connect the cache nodes together. If the target data is all flushed to the physical disk, the cache node (target cache node) that manages and controls the host I/O request will be released back to the global free cache node list. Therefore, the lower cache 211 will also maintain a global free cache node list.
  • the RAID card controller When a new host I/O request arrives, the RAID card controller will take out the free cache node from the global free cache node list, and add the free cache node as the target cache node to the cache node list managed by the two-way linked list metadata organization method. When the target data of the corresponding host I/O request is all flushed to the physical disk, the target cache node is released back to the global free cache node list.
  • FIG5 is a schematic diagram of the structure of a cache node provided by the present application, wherein:
  • the destage_control field (flush status field) indicated by 401 is of bool type. This field is associated with a bitmap metadata (405). A bit in the bitmap metadata corresponds to a stripe. If the bit is 1, it indicates that the corresponding stripe has been flushed to the physical disk. Similarly, if the bit is 0, it indicates that the corresponding stripe has not been flushed to the physical disk. When all stripes are flushed to the physical disk, that is, when the corresponding bits are all 1, the destage_control field is assigned a value of true. Otherwise, the destage_control field is assigned a value of false.
  • the cache_ptr field (cache area field) indicated by 402 points to the specific area in the cache area where the target data needs to be temporarily stored (such as the cache area indicated by 212 in FIG. 3 );
  • pre_pointer field (previous pointer field) indicated by 403 refers to the previous pointer of the previous cache node
  • next_pointer field (previous pointer field) indicated by 404 is a back pointer pointing to the next cache node.
  • FIG. 6 is a schematic diagram of the structure of a global idle cache node linked list provided by the present application.
  • the implementation process of implementing logical control based on cache nodes includes:
  • 500 indicates the global free cache node linked list maintained by the lower cache.
  • the RAID card controller takes out three cache nodes from the head of the global free cache node linked list.
  • One cache node corresponds to one host I/O write request. Therefore, the global free cache node linked list after taking out three cache nodes is shown as 510. Since the data blocks and check blocks in the stripe have not been flushed to the physical disk by the worker threads in the thread pool after being written into the cache, the bit in the bitmap metadata associated with the destage_control field in the cache node is 0 (521 shown in FIG. 6).
  • FIG. 7 is a flow chart of another data storage method provided by the present application, and its implementation process may include:
  • Step 1 The host sends a host I/O request to the RAID card, and the RAID card driver receives and parses the command.
  • Step 2 Based on the parsed command parameters, apply for the check element corresponding to the host I/O request from the global check table maintained by the upper-level cache. Similarly, take out the cache node from the global free cache node list maintained by the lower-level cache and put it into the cache node managed by the bidirectional linked list metadata organization method (520 shown in Figure 6).
  • Step 3 The main control thread of the RAID card controller divides the target data into stripes. After the stripes are divided, no parity blocks are calculated. Therefore, the bits of each stripe corresponding to the stripe[32] field in the parity element are set to 0. Since the parity_ok field is assigned to true when all the parity blocks are calculated for each stripe after the division, in this step, the parity_ok field in the parity element is assigned to false.
  • Step 4 Write the data blocks in each stripe to the specific area (target cache area) in the cache area pointed to by the cache_ptr field in the cache node.
  • Step 5 The RAID card immediately sends a data write completion signal to the host (i.e., immediately responds to the host).
  • Step 6 The worker thread in the thread pool uses the data blocks of the stripe temporarily stored in the cache to perform an XOR operation to obtain the check block of the stripe, and then writes the check block to the cache. Since the check block of the stripe has been calculated, the bits of each stripe corresponding to the stripe[32] field in the check element are set to 1, and the parity_ok field in the check element is assigned to true. Since the data blocks and check blocks of the stripe have not been flushed to the physical disk, the bits in the bitmap metadata associated with the destage_control field in the cache node are set to 0, and the destage_control field is assigned to false.
  • Step 7 The worker thread in the thread pool flushes the data blocks and check blocks temporarily stored in the cache to the physical disk. Since the data blocks and check blocks have been flushed to the physical disk, in this step, each bit in the bitmap metadata associated with the destage_control field in the cache node is set to 1, and the destage_control field is assigned to true.
  • Step 8 Determine whether the parity_ok field in the check element is true, and jointly determine whether the destage_control field in the cache node is true. If the determination fails, return to step 6.
  • Step 9 If the judgment is passed, release the verification element resources to the verification table, and similarly release the bidirectional linked list metadata organization method The managed cache nodes are added to the global free cache node list.
  • the data storage method provided in the embodiment of the present application can first determine the target cache area corresponding to the target data in the target cache node, and stripe the target data, after determining the target data that needs to be written to the storage system according to the data storage request.
  • the stripe division situation can be monitored in real time. Once the stripe division completion prompt is detected, the data stripes obtained after the division are immediately written into the target cache area, and the storage completion signal is directly fed back to the initiator.
  • the technical solution can realize data caching and reply to the request end without waiting for the generation of the check block.
  • the response delay to the request end can be effectively reduced during the data storage process, thereby achieving a fast response, and also helping to improve the system performance of the storage end.
  • An embodiment of the present application provides a data storage device.
  • FIG8 is a schematic diagram of the structure of a data storage device provided by the present application.
  • the data storage device may include:
  • Determination module 1 used to determine target data according to a data storage request
  • Acquisition module 2 used to acquire a target cache node and determine a target cache area specified in the target cache node
  • a partitioning module 3 is used to partition the target data into stripes to obtain data stripes;
  • a writing module 4 used for writing each data stripe into a target cache area in response to a prompt of stripe division completion
  • the feedback module 5 is used to feed back a storage completion signal to the initiator of the data storage request.
  • the data storage device provided in the embodiment of the present application can first determine the target cache area corresponding to the target data in the target cache node, and stripe the target data after determining the target data that needs to be written to the storage system according to the data storage request.
  • the stripe division situation can be monitored in real time. Once the stripe division completion prompt is detected, the data stripes obtained after the division are immediately written to the target cache area, and the storage completion signal is directly fed back to the initiator.
  • the technical solution can realize data caching and reply to the request end without waiting for the generation of the check block.
  • the response delay to the request end can be effectively reduced during the data storage process, thereby achieving a fast response, and also helping to improve the system performance of the storage end.
  • the above-mentioned acquisition module 2 can be specifically used to obtain free cache nodes from the global free cache node list; use the free cache nodes as target cache nodes; wherein the number of data storage requests is the same as the number of target cache nodes.
  • the acquisition module 2 can be specifically used to perform field analysis on the target cache node to obtain the cache area field; and determine the target cache area according to the record information of the cache area field.
  • the target cache node may include a flush status field, a cache area field, a front pointer field, and a back pointer field;
  • the flush status field is used to record the cache flush status of the cache area, and the cache flush status includes cache flush completed and cache flush incomplete;
  • the cache area field is used to record the location information of the target cache area in the cache area;
  • the front pointer field is used to record the node information of the previous cache node of the target cache node in the global free cache node linked list;
  • the back pointer field is used to record the node information of the next cache node of the target cache node in the global free cache node linked list.
  • the device may further include a verification module for calculating, for each data stripe, a verification block according to each data block in the data stripe after writing each data stripe into the target cache area; The verification block is written to the corresponding data stripe in the target cache area.
  • the device may also include a stripe check status update module, which is used to obtain an idle check element as a target check element in the global check table after writing the check block into the corresponding data stripe in the target cache area; search for the check status bit corresponding to the data stripe in the stripe check field of the target check element; and update the check status bit to indicate that the stripe check is completed.
  • a stripe check status update module which is used to obtain an idle check element as a target check element in the global check table after writing the check block into the corresponding data stripe in the target cache area; search for the check status bit corresponding to the data stripe in the stripe check field of the target check element; and update the check status bit to indicate that the stripe check is completed.
  • the target check element may include a global check status field, a stripe check status field, and a pointer field;
  • the global check status field is used to record the global check status of the target data, and the global check status includes global check completed and global check incomplete;
  • the stripe check status field is used to record the stripe check status of each data stripe, and the stripe check status includes stripe check completed and stripe check incomplete;
  • the pointer field is used to record the element information of the next check element of the target check element in the global check table.
  • the device may further include a global check status update module, which is used to update the global check status field to global check completed when all check status bits in the stripe check field are in the stripe check completed state.
  • a global check status update module which is used to update the global check status field to global check completed when all check status bits in the stripe check field are in the stripe check completed state.
  • the device may also include a flush module for flushing each data block and check block in the data stripe to the physical disk for each data stripe in the cache area after the global check status field is updated to indicate that the global check is completed.
  • the flush status field is associated with the bitmap metadata, and the bitmap metadata is used to record the stripe flush status of each data stripe, and the stripe flush status includes stripe flush completed and stripe flush incomplete;
  • the device may also include a stripe flush status update module, which is used to search for the flush status bit corresponding to the data stripe in the bitmap metadata after flushing each data block and check block in the data stripe to the physical disk; and update the flush status bit to indicate that the stripe flush is completed.
  • a stripe flush status update module which is used to search for the flush status bit corresponding to the data stripe in the bitmap metadata after flushing each data block and check block in the data stripe to the physical disk; and update the flush status bit to indicate that the stripe flush is completed.
  • the device may further include a cache flush status update module for updating the flush status field to cache flush completed when all flush status bits in the bitmap metadata indicate stripe flush completed.
  • the device may further include a release module for releasing the target check element when the global check status field is updated to global check completed; and releasing the target cache node when the flush status field is updated to cache flush completed.
  • An embodiment of the present application provides a data storage device.
  • FIG. 9 is a schematic diagram of the structure of a data storage device provided by the present application.
  • the data storage device may include:
  • a processor when used to execute a computer program, can implement the steps of any of the above data storage methods.
  • FIG. 9 it is a schematic diagram of the composition structure of the data storage device, which may include: a processor 10, a memory 11, a communication interface 12 and a communication bus 13.
  • the processor 10, the memory 11 and the communication interface 12 communicate with each other through the communication bus 13.
  • the processor 10 may be a central processing unit (CPU), a special Certain application integrated circuits, digital signal processors, field programmable gate arrays or other programmable logic devices, etc.
  • CPU central processing unit
  • special Certain application integrated circuits digital signal processors, field programmable gate arrays or other programmable logic devices, etc.
  • the processor 10 may call a program stored in the memory 11. Specifically, the processor 10 may execute operations in the embodiment of the data storage method.
  • the memory 11 is used to store one or more programs, which may include program codes, and the program codes include computer operation instructions.
  • the memory 11 at least stores programs for implementing the following functions:
  • the memory 11 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and an application required for at least one function, etc.; the data storage area may store data created during use.
  • the memory 11 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device or other volatile solid-state storage device.
  • the communication interface 12 may be an interface of a communication module, and is used to connect to other devices or systems.
  • FIG. 9 does not constitute a limitation on the data storage device in the embodiment of the present application.
  • the data storage device may include more or fewer components than those shown in FIG. 9 , or a combination of certain components.
  • An embodiment of the present application provides a non-volatile readable storage medium.
  • the non-volatile readable storage medium provided in the embodiment of the present application stores a computer program, and when the computer program is executed by a processor, the steps of any of the above-mentioned data storage methods can be implemented.
  • the non-volatile readable storage medium may include: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and other media that can store program codes.
  • the steps of the method or algorithm described in conjunction with the embodiments disclosed herein may be implemented directly using hardware, a software module executed by a processor, or a combination of the two.
  • the software module may be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

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Abstract

本申请公开了一种数据存储方法，包括根据数据存储请求确定目标数据；获取目标缓存节点，确定目标缓存节点中指定的目标缓存区域；对目标数据进行条带划分，获得各数据条带；响应于条带划分完成提示，将各数据条带写入目标缓存区域；反馈存储完成信号至数据存储请求的发起端。应用本申请所提供的技术方案，可以在数据存储过程中有效降低面向主机端的响应延迟，从而实现快速响应。本申请还公开了一种数据存储装置、设备及非易失性可读存储介质，均具有上述有益效果。

Description

数据存储方法及相关设备
相关申请的交叉引用
本申请要求于2022年11月29日提交中国专利局，申请号为202211508013.0，申请名称为“数据存储方法及相关设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及数据存储技术领域，特别涉及一种数据存储方法以及相关设备。
背景技术
在高速发展的现代社会，各行各业都需要安全高效的存储数据。RAID(Redundant Array of Independent Disks，独立磁盘组成的具有冗余性的阵列)技术是存储中的重要技术，主要使用条带、镜像和校验来保证数据安全性，并提高RAID阵列的I/O(Input/Output，输入/输出)性能。其中，缓存作为RAID阵列的重要组件，可以极大地提高I/O性能，加速读写响应，存储系统只需将数据写入缓存，便立即向主机发送数据写成功信号，然后继续处理主机发起的其他I/O请求，数据写入缓存的速度远远大于写入物理磁盘的速度，而暂存在缓存中的I/O数据会被线程池中多个线程并发的写入RAID阵列中的各个磁盘中，因此极大地减少了I/O的响应延迟。
目前在存储领域，业界在软RAID存储技术基础上提出了硬RAID存储技术(即RAID卡)，使用RAID卡技术，可以有效提高读写数据的I/O性能和数据安全性。在RAID卡的缓存写策略中有WB(Write Back，写回模式)写策略和WT(Write Through，写通模式)写策略，WB写策略相对于WT写策略具有更低的响应延迟，因为WB写策略将写数据和校验数据写入缓存后，立刻向主机发送数据写成功信号，而WT写策略只有写数据和校验数据全部写入RAID卡的物理磁盘后，才向主机发送数据写成功信号，因此WB写策略比WT写策略具有更高的I/O性能。
其中，业界在WB写策略的实现细节上是，在接收到写数据之后，先对写数据进行条带切分，并等待由各个切分后条带中的数据分块异或运算得出校验分块，在得出校验分块之后才将各个条带中的校验分块写入缓存，最后才响应主机，显然，这个等待过程会增加WB写策略的响应延迟。
发明内容
本申请提供一种数据存储方法，该数据存储方法可以在数据存储过程中有效降低面向主机端的响应延迟，从而实现快速响应；本申请还提供一种数据存储装置、设备及非易失性可读存储介质，均具有上述有益效果。
本申请提供了一种数据存储方法，方法包括：
根据数据存储请求确定目标数据；
获取目标缓存节点，确定目标缓存节点中指定的目标缓存区域；
对目标数据进行条带划分，获得各数据条带；
响应于条带划分完成提示，将各数据条带写入目标缓存区域；
反馈存储完成信号至数据存储请求的发起端。
本申请一些实施例中，获取目标缓存节点，包括：
从全局空闲缓存节点链表中获取空闲缓存节点；
将空闲缓存节点作为目标缓存节点；
其中，数据存储请求的数量与目标缓存节点的数量相同。
本申请一些实施例中，确定目标缓存节点中指定的目标缓存区域，包括：
对目标缓存节点进行字段解析，获得缓存区域字段；
根据缓存区域字段的记录信息确定目标缓存区域。
本申请一些实施例中，目标缓存节点包括下刷状态字段、缓存区域字段、前指针字段、后指针字段；
下刷状态字段用于记录缓存区的缓存下刷状态，缓存下刷状态包括缓存下刷已完成和缓存下刷未完成；
缓存区域字段用于记录目标缓存区域在缓存区内的位置信息；
前指针字段用于记录目标缓存节点在全局空闲缓存节点链表中的前一个缓存节点的节点信息；
后指针字段用于记录目标缓存节点在全局空闲缓存节点链表中的后一个缓存节点的节点信息。
本申请一些实施例中，将各数据条带写入目标缓存区域之后，还包括：
对于每一数据条带，根据数据条带中的各数据分块计算获得校验分块；
将校验分块写入目标缓存区域内对应的数据条带中。
本申请一些实施例中，将校验分块写入目标缓存区域内对应的数据条带中之后，还包括：
在全局校验表中获取空闲校验元素作为目标校验元素；
在目标校验元素的条带校验字段中查找数据条带对应的校验状态位；
将校验状态位更新为条带校验已完成。
本申请一些实施例中，目标校验元素包括全局校验状态字段、条带校验状态字段、指针字段；
全局校验状态字段用于记录目标数据的全局校验状态，全局校验状态包括全局校验已完成和全局校验未完成；
条带校验状态字段用于记录各数据条带的条带校验状态，条带校验状态包括条带校验已完成和条带校验未完成；
指针字段用于记录目标校验元素在全局校验表中的下一个校验元素的元素信息。
本申请一些实施例中，方法还包括：
当条带校验字段中所有校验状态位均为条带校验完成状态时，将全局校验状态字段更新为全局校验已完成。
本申请一些实施例中，将全局校验状态字段更新为全局校验已完成之后，还包括：
对于缓存区中的每一数据条带，将数据条带中的各数据分块和校验分块下刷至物理磁盘。
本申请一些实施例中，下刷状态字段与位图元数据相关联，位图元数据用于记录各数据条带的条带下刷状态，条带下刷状态包括条带下刷已完成和条带下刷未完成；
相应地，将数据条带中的各数据分块和校验分块下刷至物理磁盘之后，还包括：
在位图元数据中查找数据条带对应的下刷状态位；
将下刷状态位更新为条带下刷已完成。
本申请一些实施例中，方法还包括：
当位图元数据中所有下刷状态位均为条带下刷已完成时，将下刷状态字段更新为缓存下刷已完成。
本申请一些实施例中，方法还包括：
当全局校验状态字段更新为全局校验已完成时，释放目标校验元素；
当下刷状态字段更新为缓存下刷已完成时，释放目标缓存节点。
本申请还公开了一种数据存储装置，装置包括：
确定模块，用于根据数据存储请求确定目标数据；
获取模块，用于获取目标缓存节点，确定目标缓存节点中指定的目标缓存区域；
划分模块，用于对目标数据进行条带划分，获得各数据条带；
写入模块，用于响应于条带划分完成提示，将各数据条带写入目标缓存区域；
反馈模块，用于反馈存储完成信号至数据存储请求的发起端。
本申请还公开了一种数据存储设备，包括：
存储器，用于存储计算机程序；
处理器，用于执行计算机程序时实现如上所述的任一种数据存储方法的步骤。
本申请还公开了一种非易失性可读存储介质，非易失性可读存储介质上存储有计算机程序，计算机程序被处理器执行时实现如上所述的任一种数据存储方法的步骤。
应用本申请所提供的技术方案，在根据数据存储请求确定需要写入至存储系统的目标数据之后，可以先在目标缓存节点中确定该目标数据对应的目标缓存区域，并对目标数据进行条带划分，在此过程中，可以对条带划分情况进行实时监测，一旦监测到条带划分完成提示， 则立即将划分后得到的各数据条带写入目标缓存区域，并直接向发起端反馈存储完成信号，也就是说，该技术方案在完成数据条带划分之后并不等待校验分块的生成即可实现数据缓存并向请求端回复响应，可以在数据存储过程中有效降低面向请求端的响应延迟，进而实现快速响应，也有助于提高存储端的系统性能。
附图说明
为了更清楚地说明现有技术和本申请实施例中的技术方案，下面将对现有技术和本申请实施例描述中需要使用的附图作简要的介绍。当然，下面有关本申请实施例的附图描述的仅仅是本申请中的一部分实施例，对于本领域普通技术人员来说，在不付出创造性劳动的前提下，还可以根据提供的附图获得其他的附图，所获得的其他附图也属于本申请的保护范围。
图1为本申请所提供的一种数据存储方法的流程示意图；
图2为本申请所提供的一种条带划分示意图；
图3为本申请所提供的一种缓存模块的结构示意图；
图4为本申请所提供的一种全局校验表的结构示意图；
图5为本申请所提供的一种缓存节点的结构示意图；
图6为本申请所提供的一种全局空闲缓存节点链表的结构示意图；
图7为本申请所提供的另一种数据存储方法的流程示意图；
图8为本申请所提供的一种数据存储装置的结构示意图；
图9为本申请所提供的一种数据存储设备的结构示意图。
具体实施方式
本申请的核心是提供一种数据存储方法，该数据存储方法可以在数据存储过程中有效降低面向主机端的响应延迟，从而实现快速响应；本申请的另一核心是提供一种数据存储装置、设备及非易失性可读存储介质，均具有上述有益效果。
为了对本申请实施例中的技术方案进行更加清楚、完整地描述，下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行介绍。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
本申请实施例提供了一种数据存储方法。
请参考图1，图1为本申请所提供的一种数据存储方法的流程示意图，该数据存储方法可以包括如下S101至S105。
S101：根据数据存储请求确定目标数据。
本步骤旨在实现目标数据的确定，该目标数据即为需要进行存储的数据。具体而言，当需要将某数据写入存储系统进行存储时，主机端(发起数据存储请求的发起端)可以将该数据作为目标数据添加至数据存储请求，并将其发送至存储系统，由存储系统通过对数据存储 请求进行解析，获得目标数据。
S102：获取目标缓存节点，确定目标缓存节点中指定的目标缓存区域。
本步骤旨在实现目标缓存节点的获取。具体而言，可以在存储系统中预先创建缓存区，并将其划分出多个缓存区域，每个缓存区域用于存储一份目标数据，且每个缓存区域均由一个缓存节点记录其位置信息，因此，每一个缓存节点用于处理一个数据存储请求。
在此基础上，当根据数据存储请求确定目标数据之后，可以先获取一个缓存节点，作为用于处理该数据存储请求的目标缓存节点，由于该目标缓存节点中记录有一个缓存区域的位置信息，因此，可以将该缓存区域作为目标数据的目标缓存区域，以便于将目标数据写入该目标缓存区域。
需要说明的是，上述目标缓存节点应当是处于空闲状态的缓存节点，换而言之，目标缓存节点所指定的目标缓存区域应当为未写入任何目标数据的缓存区域。
S103：对目标数据进行条带划分，获得各数据条带。
本步骤旨在实现目标数据的条带划分。可以理解的是，物理磁盘对数据的存储是采用分块(strip)的形式，即将一个分区分成多个大小相等的、地址相邻的块(block)，这些块则称为分块，分块通常被认为是条带(stripe)的元素，而条带则是不同分区上的位置相关的分块的集合。因此，为方便后续将缓存区的目标数据下刷至物理磁盘，同样可以对目标数据进行条带划分，得到各个数据条带，使得目标数据以数据条带的形式存储于缓存区的目标缓存区域。
请参考图2，图2为本申请所提供的一种条带划分示意图，图中所示101即为划分后的数据条带stripe0～stripe2，strip1～strip20表示20个数据分块，parity1～parity5表示5个校验分块。
S104：响应于条带划分完成提示，将各数据条带写入目标缓存区域。
本步骤旨在实现将各数据条带写入目标缓存区域。如上所述，在接收到写数据之后，先对写数据进行条带切分，并等待由各个切分后条带中的数据分块异或运算得出校验分块，在得出校验分块之后才将各个条带中的校验分块写入缓存，最后才响应主机，显然，这个等待过程会增加WB写策略的响应延迟。但是，在本申请实施例中，此处，可以对条带划分过程进行实时监测，一旦监测到条带划分完成提示，则立即将各数据条带写入目标缓存区域，由此可见，将各数据条带写入目标缓存区域是在将目标数据划分为多个数据条带之后，对每个数据条带计算校验分块之前(即校验分块中未写入校验值)执行的，也就是说，每个数据条带中的校验分块以空分块的形式写入目标缓存区域，在此之后，再在目标缓存区域内进行校验值的计算和校验分块的填充。
S105：反馈存储完成信号至数据存储请求的发起端。
本步骤旨在实现存储完成信号的反馈，具体是在将各数据条带写入目标缓存区域之后，立即向数据存储请求的发起端(即上述主机端)反馈存储完成信号。在S104的基础上，向数据存储请求的发起端反馈存储完成信号是在计算校验值、填充校验分块之前执行的，实现 了无需等待校验值处理即可向发起端回复响应，有效地降低了响应延迟。
可见，本申请实施例所提供的数据存储方法，在根据数据存储请求确定需要写入至存储系统的目标数据之后，可以先在目标缓存节点中确定该目标数据对应的目标缓存区域，并对目标数据进行条带划分，在此过程中，可以对条带划分情况进行实时监测，一旦监测到条带划分完成提示，则立即将划分后得到的各数据条带写入目标缓存区域，并直接向发起端反馈存储完成信号，也就是说，该技术方案在完成数据条带划分之后并不等待校验分块的生成即可实现数据缓存并向请求端回复响应，可以在数据存储过程中有效降低面向请求端的响应延迟，进而实现快速响应，也有助于提高存储端的系统性能。
本申请一些实施例中，上述获取目标缓存节点，可以包括：从全局空闲缓存节点链表中获取空闲缓存节点；将空闲缓存节点作为目标缓存节点；其中，数据存储请求的数量与目标缓存节点的数量相同。
本申请实施例提供了一种目标缓存节点的获取方法。具体而言，可以预先创建全局空闲缓存节点链表，用于管理空闲缓存节点，由此，则可以直接从全局空闲缓存节点链表中直接调取空闲缓存节点作为目标缓存节点，需要说明的是，由于一个缓存节点用于处理一个数据存储请求，因此，接收到多少个数据存储请求就调取多少个空闲缓存节点，并依次分配给每一个数据存储请求进行后续处理。
本申请一些实施例中，上述确定目标缓存节点中指定的目标缓存区域，可以包括：对目标缓存节点进行字段解析，获得缓存区域字段；根据缓存区域字段的记录信息确定目标缓存区域。
本申请实施例提供了一种确定目标缓存区域的实现方法。如上所述，每个缓存区域均由一个缓存节点记录其位置信息，因此，在获得缓存节点之后，可以对其进行字段解析，获得用于存储目标缓存区域的位置信息的缓存区域字段，然后根据该缓存区域字段中的记录信息确定目标缓存区域，当然，该记录信息即为目标缓存区域的位置信息。
本申请一些实施例中，目标缓存节点可以包括下刷状态字段、缓存区域字段、前指针字段、后指针字段；下刷状态字段用于记录缓存区的缓存下刷状态，缓存下刷状态包括缓存下刷已完成和缓存下刷未完成；缓存区域字段用于记录目标缓存区域在缓存区内的位置信息；前指针字段用于记录目标缓存节点在全局空闲缓存节点链表中的前一个缓存节点的节点信息；后指针字段用于记录目标缓存节点在全局空闲缓存节点链表中的后一个缓存节点的节点信息。
本申请实施例提供了一种具体形式的缓存节点，该缓存节点可以包括四个字段，分别为下刷状态字段、缓存区域字段、前指针字段、后指针字段。其中，下刷状态字段用于记录缓存区的缓存下刷状态，该缓存下刷状态即为缓存区中的缓存数据是否下刷至物理磁盘，因此，缓存下刷状态包括缓存下刷已完成和缓存下刷未完成，缓存下刷已完成表示缓存区的缓存数据已经下刷至物理磁盘，缓存下刷未完成表示缓存区的缓存数据未下刷至屋里磁盘；前指针字段和后指针字段用于确认当前缓存节点的前后缓存节点，保证缓存节点的连贯顺序，进而保证处理数据存储请求的连贯顺序。
本申请一些实施例中，上述将各数据条带写入目标缓存区域之后，还可以包括：对于每一数据条带，根据数据条带中的各数据分块计算获得校验分块；将校验分块写入目标缓存区域内对应的数据条带中。
本步骤旨在实现校验值的计算和校验分块的填充。需要说明的是，该步骤的进行可以是在反馈存储完成信号至请求端之后，也可以是在反馈存储完成信号至请求端的同时，但不会是在反馈存储完成信号至请求端之前。在实现过程中，对于划分后的每一个数据条带，可以根据其中的各个数据分块进行校验分块的计算，此处，具体可以采用对各个数据分块进行异或运算的方法，得到校验分块，然后将该校验分块写入目标缓存区域内对应的数据条带中。
本申请一些实施例中，上述将校验分块写入目标缓存区域内对应的数据条带中之后，还可以包括：在全局校验表中获取空闲校验元素作为目标校验元素；在目标校验元素的条带校验字段中查找数据条带对应的校验状态位；将校验状态位更新为条带校验已完成。
本申请实施例提供了一种记录各个数据条带校验状态的实现方法，此处，条带校验状态用于指示相应的数据条带是否完成校验，包括条带校验已完成和条带校验未完成。在实现过程中，可以预先创建全局校验表，其中包括有多个处于空闲状态的校验元素，每一个校验元素用于记录目标数据中各个数据条带的校验状态，具体的，每一个校验元素可以通过其中的条带校验字段记录目标数据中各个数据条带的校验状态。在此基础上，可以从全局校验表中获取一个空闲校验元素作为对应于目标数据的目标校验元素，并在其中查找到条带校验字段，该条带校验字段中包括有多个校验状态位，每一个校验状态位用于记录一个数据条带的校验状态，因此，在将校验分块写入目标缓存区域内对应的数据条带中之后，则可以在上述条带校验字段中查找到该数据条带对应的校验状态位，并将其更新为条带校验已完成的状态，例如，校验状态位置0时，表示对应的数据条带校验未完成，校验状态位置1时，表示对应的数据条带校验已完成。
本申请一些实施例中，目标校验元素可以包括全局校验状态字段、条带校验状态字段、指针字段；全局校验状态字段用于记录目标数据的全局校验状态，全局校验状态包括全局校验已完成和全局校验未完成；条带校验状态字段用于记录各数据条带的条带校验状态，条带校验状态包括条带校验已完成和条带校验未完成；指针字段用于记录目标校验元素在全局校验表中的下一个校验元素的元素信息。
本申请实施例提供了一种具体形式的校验元素，该校验元素可以包括三个字段，分别为全局校验状态字段、条带校验状态字段、指针字段。其中，用于记录目标数据的全局校验状态，该全局校验状态用于指示目标数据中的所有数据条带是否全部校验完成，因此，全局校验状态包括全局校验已完成和全局校验未完成，全局校验已完成表示目标数据中的所有数据条带均已完成校验，全局校验未完成表示目标数据中仍然存在未完成校验的数据条带；指针字段则用于指向下一个校验元素。
本申请一些实施例中，该方法还可以包括：当条带校验字段中所有校验状态位均为条带校验完成状态时，将全局校验状态字段更新为全局校验已完成。
如上所述，校验元素中的条带校验字段用于记录目标数据中每一个数据条带的校验状态，全局校验状态字段用于记录目标数据中所有数据条带的校验状态，因此，当条带校验字段中所有校验状态位均为条带校验完成状态时，则可以将全局校验状态字段更新为全局校验已完成。例如，0表示校验未完成，1表示校验已完成，那么，当条带校验字段中所有校验状态位均为1时，全局校验状态字段置为1，当条带校验字段中存在置0的校验状态位时，全局校验状态字段置为0。
本申请一些实施例中，上述将全局校验状态字段更新为全局校验已完成之后，还可以包括：对于缓存区中的每一数据条带，将数据条带中的各数据分块和校验分块下刷至物理磁盘。
本申请实施例所提供的数据存储用于实现缓存区缓存数据向物理磁盘的下刷，在将全局校验状态字段更新为全局校验已完成之后，也即确认目标数据已经完成了全局校验，则可以将各个数据条带中的各个数据分块和校验分块下刷至物理磁盘。本申请一些实施例中，可以等待缓存区中的所有缓存区域均已完成全局校验之后，再一同执行下刷操作。
本申请一些实施例中，下刷状态字段与位图元数据相关联，位图元数据用于记录各数据条带的条带下刷状态，条带下刷状态包括条带下刷已完成和条带下刷未完成；
相应地，上述将数据条带中的各数据分块和校验分块下刷至物理磁盘之后，还可以包括：在位图元数据中查找数据条带对应的下刷状态位；将下刷状态位更新为条带下刷已完成。
本申请实施例提供了一种记录各个数据条带下刷状态的实现方法，此处，条带下刷状态用于指示相应的数据条带是否完成下刷，包括带下刷已完成和条带下刷未完成。在实现过程中，可以预先创建位图元数据，其中包括有多个处于下刷状态位，每一个下刷状态位用于记录一个数据条带的下刷状态。由此，在将数据条带中的各数据分块和校验分块下刷至物理磁盘之后，则可以在位图元数据中查找到该数据条带对应的下刷状态位，并将该下刷状态位更新为条带下刷已完成的状态，例如，下刷状态位置0时，表示对应的数据条带下刷未完成，下刷状态位置1时，表示对应的数据条带下刷已完成。
其中，位图元数据与缓存节点中的下刷状态字段相关联，用于实现下刷状态字段的更新。
本申请一些实施例中，该方法还可以包括：当位图元数据中所有下刷状态位均为条带下刷已完成时，将下刷状态字段更新为缓存下刷已完成。
如上所述，位图元数据用于记录目标数据中每一个数据条带的下刷状态，缓存节点中的下刷状态字段用于记录目标数据中所有数据条带的下刷状态，且位图元数据与下刷状态字段相关联，因此，当位图元数据中所有的下刷状态位均为条带下刷已完成时，则可以将下刷状态字段更新为缓存下刷已完成。例如，0表示下刷未完成，1表示下刷已完成，那么，当位图元数据中所有下刷状态位均为1时，下刷状态字段置为1，当位图元数据中存在置0的下刷状态位时，下刷状态字段置为0。
本申请一些实施例中，该方法还可以包括：当全局校验状态字段更新为全局校验已完成时，释放目标校验元素；当下刷状态字段更新为缓存下刷已完成时，释放目标缓存节点。
本申请实施例用于实现目标校验元素和目标缓存节点的释放，当全局校验状态字段更新 为全局校验已完成时，也即确认目标数据完成全局校验时，释放目标校验元素，以便为后续新的数据存储请求提供服务；当下刷状态字段更新为缓存下刷已完成时，也即确认目标数据完成全局下刷时，释放目标缓存节点，以便为后续新的数据存储请求提供服务。
本申请实施例提供了另一种数据存储方法。
首先，请参考图3，图3为本申请所提供的一种缓存模块的结构示意图，该缓存模块即为RAID卡中的缓存模块，包括上层缓存210、下层缓存211和缓存区212。其中：
1、上层缓存210：
上层缓存210用于维护全局校验表，可以使用单向链表和位图相结合的元数据组织方式管理全局校验表。
请参考图4，图4为本申请所提供的一种全局校验表的结构示意图，对于全局校验表中的每一个校验元素：
(1)301指示的parity_ok字段(全局校验状态字段)为bool类型，当目标数据切分后的条带全部计算出校验分块后，赋值parity_ok字段为true，否则赋值为false。
(2)302指示的stripe[32]字段(条带校验状态字段)是int类型的数组，一个int类型数据包含8个bit位，一个bit位对应一个条带，如果条带已计算得出校验分块则置位对应的bit位为1，否则为0(304指示)，因此当与条带对应的bit位都为1时，赋值parity_ok字段为true，否则赋值为false。
(3)303指示的nextStripe字段(指针字段)指向全局校验表中的下一个校验元素。
2、下层缓存211：
下层缓存211使用双向链表元数据组织方式管理缓存节点，一个缓存节点管理控制一次主机I/O请求(数据存储请求)，双向链表元数据利用缓存节点中的前指针字段和后指针字段将缓存节点连接在一起，如果目标数据全部下刷到物理磁盘，则将管理控制该次主机I/O请求的缓存节点(目标缓存节点)释放回全局空闲缓存节点链表中，因此，下层缓存211还会维护一个全局空闲缓存节点链表。当新的主机I/O请求到来时，RAID卡控制器会从全局空闲缓存节点链表取出空闲缓存节点，并将该空闲缓存节点作为目标缓存节点加入到双向链表元数据组织方式管理的缓存节点链表中，当对应主机I/O请求的目标数据全部下刷到物理磁盘后，将该目标缓存节点释放回全局空闲缓存节点链表中。
请参考图5，图5为本申请所提供的一种缓存节点的结构示意图，其中：
(1)401指示的destage_control字段(下刷状态字段)为bool类型，该字段关联一个位图元数据(405)，位图元数据中的一个bit位对应一个条带，bit位为1则表示相对应的条带已下刷到物理磁盘，同理bit位为0则表示相对应的条带没有下刷到物理磁盘，当所有条带都下刷到物理磁盘后，即对应的各个bit位都为1时，赋值destage_control字段为true，反之赋值destage_control字段为false。
(2)402指示的cache_ptr字段(缓存区域字段)是指向目标数据需要暂存在缓存区中的具体区域(如图3中212指示的缓存区)；
(3)403指示的pre_pointer字段(前指针字段)是指向前一个缓存节点的前指针；
(4)404指示的next_pointer字段(前指针字段)是指向后一个缓存节点的后指针。
进一步，请参考图6，图6为本申请所提供的一种全局空闲缓存节点链表的结构示意图，基于缓存节点实现逻辑控制的实现流程包括：
500指示的是下层缓存维护的全局空闲缓存节点链表，当三个主机I/O写请求到来后，RAID卡控制器从全局空闲缓存节点链表的头部取出三个缓存节点，一个缓存节点对应一个主机I/O写请求，因此，被取出三个缓存节点后的全局空闲缓存节点链表如510所示。由于条带中的数据分块和校验分块在写入缓存后，还没有被线程池中的工作线程下刷到物理磁盘，因此，缓存节点中destage_control字段所关联的位图元数据中的bit位为0(图6所示521)。
最后，请参考图7，图7为本申请所提供的另一种数据存储方法的流程示意图，其实现流程可以包括：
第一步：主机向RAID卡发出主机I/O请求，RAID卡的驱动程序接收此命令并解析。
第二步：根据解析的命令参数，从上层缓存维护的全局校验表中申请主机I/O请求对应的校验元素，同理从下层缓存维护的全局空闲缓存节点链表中取出缓存节点放入双向链表元数据组织方式管理的缓存节点中(图6所示520)。
第三步：RAID卡控制器的主控线程将目标数据切分为条带，切分后的各个条带都没有计算得出校验分块，因此，将校验元素中stripe[32]字段所对应各个条带的bit位都置位为0。由于当切分后的各个条带全部计算得出校验分块后，赋值parity_ok字段为true，因此，在本步骤中，赋值校验元素中parity_ok字段为false。
第四步：将各个条带中的数据分块写入缓存节点中cache_ptr字段指向的缓存区中的具体区域(目标缓存区域)。
第五步：RAID卡立即向主机发送数据写入完成信号(即立即响应主机)。
第六步：线程池中的工作线程利用暂存在缓存中的条带的数据分块异或运算得出条带的校验分块，然后将校验分块写入缓存中。由于已计算得出条带的校验分块，因此，将校验元素中stripe[32]字段所对应各个条带的各bit位都置位为1，并赋值校验元素中的parity_ok字段为true。由于条带的数据分块和校验分块还没有下刷到物理磁盘，因此，将与缓存节点中destage_control字段关联的位图元数据中的各个bit位都置位为0，并赋值destage_control字段为false。
第七步：线程池中的工作线程将暂存在缓存中的数据分块和校验分块下刷到物理磁盘，由于数据分块和校验分块都已下刷到物理磁盘，所以在此步骤中将与缓存节点中destage_control字段关联的位图元数据中的各个bit位都置位为1，并赋值destage_control字段为true。
第八步：判断校验元素中的parity_ok字段是否为true，并联合判断缓存节点中的destage_control字段是否为true，如果判断不通过则返回到第六步。
第九步：判断通过，释放校验元素资源到校验表中，同理释放双向链表元数据组织方式 管理的缓存节点到全局空闲缓存节点链表中。
可见，本申请实施例所提供的数据存储方法，在根据数据存储请求确定需要写入至存储系统的目标数据之后，可以先在目标缓存节点中确定该目标数据对应的目标缓存区域，并对目标数据进行条带划分，在此过程中，可以对条带划分情况进行实时监测，一旦监测到条带划分完成提示，则立即将划分后得到的各数据条带写入目标缓存区域，并直接向发起端反馈存储完成信号，也就是说，该技术方案在完成数据条带划分之后并不等待校验分块的生成即可实现数据缓存并向请求端回复响应，可以在数据存储过程中有效降低面向请求端的响应延迟，进而实现快速响应，也有助于提高存储端的系统性能。
本申请实施例提供了一种数据存储装置。
请参考图8，图8为本申请所提供的一种数据存储装置的结构示意图，该数据存储装置可以包括：
确定模块1，用于根据数据存储请求确定目标数据；
获取模块2，用于获取目标缓存节点，确定目标缓存节点中指定的目标缓存区域；
划分模块3，用于对目标数据进行条带划分，获得各数据条带；
写入模块4，用于响应于条带划分完成提示，将各数据条带写入目标缓存区域；
反馈模块5，用于反馈存储完成信号至数据存储请求的发起端。
可见，本申请实施例所提供的数据存储装置，在根据数据存储请求确定需要写入至存储系统的目标数据之后，可以先在目标缓存节点中确定该目标数据对应的目标缓存区域，并对目标数据进行条带划分，在此过程中，可以对条带划分情况进行实时监测，一旦监测到条带划分完成提示，则立即将划分后得到的各数据条带写入目标缓存区域，并直接向发起端反馈存储完成信号，也就是说，该技术方案在完成数据条带划分之后并不等待校验分块的生成即可实现数据缓存并向请求端回复响应，可以在数据存储过程中有效降低面向请求端的响应延迟，进而实现快速响应，也有助于提高存储端的系统性能。
本申请一些实施例中，上述获取模块2可具体用于从全局空闲缓存节点链表中获取空闲缓存节点；将空闲缓存节点作为目标缓存节点；其中，数据存储请求的数量与目标缓存节点的数量相同。
本申请一些实施例中，上述获取模块2可具体用于对目标缓存节点进行字段解析，获得缓存区域字段；根据缓存区域字段的记录信息确定目标缓存区域。
本申请一些实施例中，目标缓存节点可以包括下刷状态字段、缓存区域字段、前指针字段、后指针字段；下刷状态字段用于记录缓存区的缓存下刷状态，缓存下刷状态包括缓存下刷已完成和缓存下刷未完成；缓存区域字段用于记录目标缓存区域在缓存区内的位置信息；前指针字段用于记录目标缓存节点在全局空闲缓存节点链表中的前一个缓存节点的节点信息；后指针字段用于记录目标缓存节点在全局空闲缓存节点链表中的后一个缓存节点的节点信息。
本申请一些实施例中，该装置还可以包括校验模块，用于在上述将各数据条带写入目标缓存区域之后，对于每一数据条带，根据数据条带中的各数据分块计算获得校验分块；将校 验分块写入目标缓存区域内对应的数据条带中。
本申请一些实施例中，该装置还可以包括条带校验状态更新模块，用于在上述将校验分块写入目标缓存区域内对应的数据条带中之后，在全局校验表中获取空闲校验元素作为目标校验元素；在目标校验元素的条带校验字段中查找数据条带对应的校验状态位；将校验状态位更新为条带校验已完成。
本申请一些实施例中，目标校验元素可以包括全局校验状态字段、条带校验状态字段、指针字段；全局校验状态字段用于记录目标数据的全局校验状态，全局校验状态包括全局校验已完成和全局校验未完成；条带校验状态字段用于记录各数据条带的条带校验状态，条带校验状态包括条带校验已完成和条带校验未完成；指针字段用于记录目标校验元素在全局校验表中的下一个校验元素的元素信息。
本申请一些实施例中，该装置还可以包括全局校验状态更新模块，用于当条带校验字段中所有校验状态位均为条带校验完成状态时，将全局校验状态字段更新为全局校验已完成。
本申请一些实施例中，该装置还可以包括下刷模块，用于在上述将全局校验状态字段更新为全局校验已完成之后，对于缓存区中的每一数据条带，将数据条带中的各数据分块和校验分块下刷至物理磁盘。
本申请一些实施例中，下刷状态字段与位图元数据相关联，位图元数据用于记录各数据条带的条带下刷状态，条带下刷状态包括条带下刷已完成和条带下刷未完成；
相应地，该装置还可以包括条带下刷状态更新模块，用于在上述将数据条带中的各数据分块和校验分块下刷至物理磁盘之后，在位图元数据中查找数据条带对应的下刷状态位；将下刷状态位更新为条带下刷已完成。
本申请一些实施例中，该装置还可以包括缓存下刷状态更新模块，用于当位图元数据中所有下刷状态位均为条带下刷已完成时，将下刷状态字段更新为缓存下刷已完成。
本申请一些实施例中，该装置还可以包括释放模块，用于当全局校验状态字段更新为全局校验已完成时，释放目标校验元素；当下刷状态字段更新为缓存下刷已完成时，释放目标缓存节点。
对于本申请实施例提供的装置的介绍请参照上述方法实施例，本申请在此不做赘述。
本申请实施例提供了一种数据存储设备。
请参考图9，图9为本申请所提供的一种数据存储设备的结构示意图，该数据存储设备可包括：
存储器，用于存储计算机程序；
处理器，用于执行计算机程序时可实现如上述任意一种数据存储方法的步骤。
如图9所示，为数据存储设备的组成结构示意图，数据存储设备可以包括：处理器10、存储器11、通信接口12和通信总线13。处理器10、存储器11、通信接口12均通过通信总线13完成相互间的通信。
在本申请实施例中，处理器10可以为中央处理器(Central Processing Unit，CPU)、特 定应用集成电路、数字信号处理器、现场可编程门阵列或者其他可编程逻辑器件等。
处理器10可以调用存储器11中存储的程序，具体的，处理器10可以执行数据存储方法的实施例中的操作。
存储器11中用于存放一个或者一个以上程序，程序可以包括程序代码，程序代码包括计算机操作指令，在本申请实施例中，存储器11中至少存储有用于实现以下功能的程序：
根据数据存储请求确定目标数据；
获取目标缓存节点，确定目标缓存节点中指定的目标缓存区域；
对目标数据进行条带划分，获得各数据条带；
响应于条带划分完成提示，将各数据条带写入目标缓存区域；
反馈存储完成信号至数据存储请求的发起端。
本申请一些实施例中，存储器11可包括存储程序区和存储数据区，其中，存储程序区可存储操作系统，以及至少一个功能所需的应用程序等；存储数据区可存储使用过程中所创建的数据。
此外，存储器11可以包括高速随机存取存储器，还可以包括非易失性存储器，例如至少一个磁盘存储器件或其他易失性固态存储器件。
通信接口12可以为通信模块的接口，用于与其他设备或者系统连接。
当然，需要说明的是，图9所示的结构并不构成对本申请实施例中数据存储设备的限定，在实际应用中数据存储设备可以包括比图9所示的更多或更少的部件，或者组合某些部件。
本申请实施例提供了一种非易失性可读存储介质。
本申请实施例所提供的非易失性可读存储介质上存储有计算机程序，计算机程序被处理器执行时可实现如上述任意一种数据存储方法的步骤。
该非易失性可读存储介质可以包括：U盘、移动硬盘、只读存储器(Read-Only Memory，ROM)、随机存取存储器(Random Access Memory，RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
对于本申请实施例提供的非易失性可读存储介质的介绍请参照上述方法实施例，本申请在此不做赘述。
说明书中各个实施例采用递进的方式描述，每个实施例重点说明的都是与其他实施例的不同之处，各个实施例之间相同相似部分互相参见即可。对于实施例公开的装置而言，由于其与实施例公开的方法相对应，所以描述的比较简单，相关之处参见方法部分说明即可。
专业人员还可以进一步意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、计算机软件或者二者的结合来实现，为了清楚地说明硬件和软件的可互换性，在上述说明中已经按照功能一般性地描述了各示例的组成及步骤。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
结合本文中所公开的实施例描述的方法或算法的步骤可以直接用硬件、处理器执行的软件模块，或者二者的结合来实施。软件模块可以置于随机存储器(RAM)、内存、只读存储器(ROM)、电可编程ROM、电可擦除可编程ROM、寄存器、硬盘、可移动磁盘、CD-ROM或技术领域内所公知的任意其它形式的存储介质中。
以上对本申请所提供的技术方案进行了详细介绍。本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的方法及其核心思想。应当指出，对于本技术领域的普通技术人员来说，在不脱离本申请原理的前提下，还可以对本申请进行若干改进和修饰，这些改进和修饰也落入本申请的保护范围内。

Claims (20)

  1. 一种数据存储方法，其特征在于，所述方法包括：
    根据数据存储请求确定目标数据；
    获取目标缓存节点，确定所述目标缓存节点中指定的目标缓存区域；
    对所述目标数据进行条带划分，获得各数据条带；
    响应于条带划分完成提示，将各所述数据条带写入所述目标缓存区域；
    反馈存储完成信号至所述数据存储请求的发起端。
  2. 根据权利要求1所述的方法，其特征在于，所述获取目标缓存节点，包括：
    从全局空闲缓存节点链表中获取空闲缓存节点；
    将所述空闲缓存节点作为所述目标缓存节点；
    其中，所述数据存储请求的数量与所述目标缓存节点的数量相同。
  3. 根据权利要求2所述的方法，其特征在于，所述确定所述目标缓存节点中指定的目标缓存区域，包括：
    对所述目标缓存节点进行字段解析，获得缓存区域字段；
    根据所述缓存区域字段的记录信息确定所述目标缓存区域。
  4. 根据权利要求3所述的方法，其特征在于，所述响应于条带划分完成提示，将各所述数据条带写入所述目标缓存区域，包括：
    响应于所述条带划分完成提示，在对各所述数据条带计算校验分块之前，将各所述数据条带写入所述目标缓存区域。
  5. 根据权利要求4所述的方法，其特征在于，所述将各所述数据条带写入所述目标缓存区域，包括：
    将各所述数据条带中的校验分块以空分块的形式写入所述目标缓存区域。
  6. 根据权利要求3所述的方法，其特征在于，所述目标缓存节点包括下刷状态字段、缓存区域字段、前指针字段、后指针字段；
    所述下刷状态字段用于记录缓存区的缓存下刷状态，所述缓存下刷状态包括缓存下刷已完成和缓存下刷未完成；
    所述缓存区域字段用于记录所述目标缓存区域在所述缓存区内的位置信息；
    所述前指针字段用于记录所述目标缓存节点在所述全局空闲缓存节点链表中的前一个缓存节点的节点信息；
    所述后指针字段用于记录所述目标缓存节点在所述全局空闲缓存节点链表中的后一个缓存节点的节点信息。
  7. 根据权利要求6所述的方法，其特征在于，所述将各所述数据条带写入所述目标缓存区域之后，还包括：
    对于每一所述数据条带，根据所述数据条带中的各数据分块计算获得校验分块；
    将所述校验分块写入所述目标缓存区域内对应的数据条带中。
  8. 根据权利要求7所述的方法，其特征在于，所述根据所述数据条带中的各数据分块计算获得校验分块，包括：
    对各个数据分块进行异或运算，获得所述校验分块。
  9. 根据权利要求7所述的方法，其特征在于，所述将所述校验分块写入所述目标缓存区域内对应的数据条带中之后，还包括：
    在全局校验表中获取空闲校验元素作为目标校验元素；
    在所述目标校验元素的条带校验字段中查找所述数据条带对应的校验状态位；
    将所述校验状态位更新为条带校验已完成。
  10. 根据权利要求9所述的方法，其特征在于，所述目标校验元素包括全局校验状态字段、条带校验状态字段、指针字段；
    所述全局校验状态字段用于记录所述目标数据的全局校验状态，所述全局校验状态包括全局校验已完成和全局校验未完成；
    所述条带校验状态字段用于记录各所述数据条带的条带校验状态，所述条带校验状态包括条带校验已完成和条带校验未完成；
    所述指针字段用于记录所述目标校验元素在所述全局校验表中的下一个校验元素的元素信息。
  11. 根据权利要求10所述的方法，其特征在于，还包括：
    当所述条带校验字段中所有校验状态位均为所述条带校验完成状态时，将所述全局校验状态字段更新为所述全局校验已完成。
  12. 根据权利要求11所述的方法，其特征在于，所述将所述全局校验状态字段更新为所述全局校验已完成之后，还包括：
    对于所述缓存区中的每一所述数据条带，将所述数据条带中的各所述数据分块和所述校验分块下刷至物理磁盘。
  13. 根据权利要求12所述的方法，其特征在于，所述将所述数据条带中的各所述数据分块和所述校验分块下刷至物理磁盘，包括：
    在所述缓存区中的所有缓存区域均已完成全局校验之后，将所述数据条带中的各所述数据分块和所述校验分块下刷至所述物理磁盘。
  14. 根据权利要求12所述的方法，其特征在于，所述下刷状态字段与位图元数据相关联，所述位图元数据用于记录各所述数据条带的条带下刷状态，所述条带下刷状态包括条带下刷已完成和条带下刷未完成；
    相应地，所述将所述数据条带中的各所述数据分块和所述校验分块下刷至物理磁盘之后，还包括：
    在所述位图元数据中查找所述数据条带对应的下刷状态位；
    将所述下刷状态位更新为所述条带下刷已完成。
  15. 根据权利要求14所述的方法，其特征在于，还包括：
    当所述位图元数据中所有所述下刷状态位均为所述条带下刷已完成时，将所述下刷 状态字段更新为所述缓存下刷已完成。
  16. 根据权利要求15所述的方法，其特征在于，还包括：
    当所述全局校验状态字段更新为所述全局校验已完成时，释放所述目标校验元素；
    当所述下刷状态字段更新为所述缓存下刷已完成时，释放所述目标缓存节点。
  17. 根据权利要求1所述的方法，其特征在于，还包括：
    实时监测条带划分过程。
  18. 一种数据存储理装置，其特征在于，所述装置包括：
    确定模块，用于根据数据存储请求确定目标数据；
    获取模块，用于获取目标缓存节点，确定所述目标缓存节点中指定的目标缓存区域；
    划分模块，用于响应于条带划分完成提示，对所述目标数据进行条带划分，获得各数据条带；
    写入模块，用于将各所述数据条带写入所述目标缓存区域；
    反馈模块，用于反馈存储完成信号至所述数据存储请求的发起端。
  19. 一种数据存储设备，其特征在于，包括：
    存储器，用于存储计算机程序；
    处理器，用于执行所述计算机程序时实现如权利要求1至17任一项所述的数据存储方法的步骤。
  20. 一种非易失性可读存储介质，其特征在于，所述非易失性可读存储介质上存储有计算机程序，所述计算机程序被处理器执行时实现如权利要求1至17任一项所述的数据存储方法的步骤。
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