WO2024090288A1 - Central Brain制御の冗長設定 - Google Patents

Central Brain制御の冗長設定 Download PDF

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Publication number
WO2024090288A1
WO2024090288A1 PCT/JP2023/037522 JP2023037522W WO2024090288A1 WO 2024090288 A1 WO2024090288 A1 WO 2024090288A1 JP 2023037522 W JP2023037522 W JP 2023037522W WO 2024090288 A1 WO2024090288 A1 WO 2024090288A1
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WIPO (PCT)
Prior art keywords
control unit
chips
control
vehicle
external
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Ceased
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PCT/JP2023/037522
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English (en)
French (fr)
Japanese (ja)
Inventor
正義 孫
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SoftBank Group Corp
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SoftBank Group Corp
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Application filed by SoftBank Group Corp filed Critical SoftBank Group Corp
Priority to CN202380075238.8A priority Critical patent/CN120112893A/zh
Priority to EP23882493.2A priority patent/EP4610825A4/en
Priority to JP2024552989A priority patent/JPWO2024090288A1/ja
Publication of WO2024090288A1 publication Critical patent/WO2024090288A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B60VEHICLES IN GENERAL
    • B60WCONJOINT CONTROL OF VEHICLE SUB-UNITS OF DIFFERENT TYPE OR DIFFERENT FUNCTION; CONTROL SYSTEMS SPECIALLY ADAPTED FOR HYBRID VEHICLES; ROAD VEHICLE DRIVE CONTROL SYSTEMS FOR PURPOSES NOT RELATED TO THE CONTROL OF A PARTICULAR SUB-UNIT
    • B60W50/00Details of control systems for road vehicle drive control not related to the control of a particular sub-unit, e.g. process diagnostic or vehicle driver interfaces
    • B60W50/02Ensuring safety in case of control system failures, e.g. by diagnosing, circumventing or fixing failures
    • B60W50/023Avoiding failures by using redundant parts
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B60VEHICLES IN GENERAL
    • B60WCONJOINT CONTROL OF VEHICLE SUB-UNITS OF DIFFERENT TYPE OR DIFFERENT FUNCTION; CONTROL SYSTEMS SPECIALLY ADAPTED FOR HYBRID VEHICLES; ROAD VEHICLE DRIVE CONTROL SYSTEMS FOR PURPOSES NOT RELATED TO THE CONTROL OF A PARTICULAR SUB-UNIT
    • B60W60/00Drive control systems specially adapted for autonomous road vehicles
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2023Failover techniques
    • G06F11/2025Failover techniques using centralised failover control functionality
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2038Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant with a single idle spare processing component
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2048Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant where the redundant components share neither address space nor persistent storage
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/505Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B60VEHICLES IN GENERAL
    • B60WCONJOINT CONTROL OF VEHICLE SUB-UNITS OF DIFFERENT TYPE OR DIFFERENT FUNCTION; CONTROL SYSTEMS SPECIALLY ADAPTED FOR HYBRID VEHICLES; ROAD VEHICLE DRIVE CONTROL SYSTEMS FOR PURPOSES NOT RELATED TO THE CONTROL OF A PARTICULAR SUB-UNIT
    • B60W50/00Details of control systems for road vehicle drive control not related to the control of a particular sub-unit, e.g. process diagnostic or vehicle driver interfaces
    • B60W2050/0001Details of the control system
    • B60W2050/0002Automatic control, details of type of controller or control system architecture
    • B60W2050/0004In digital systems, e.g. discrete-time systems involving sampling
    • B60W2050/0006Digital architecture hierarchy
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B60VEHICLES IN GENERAL
    • B60WCONJOINT CONTROL OF VEHICLE SUB-UNITS OF DIFFERENT TYPE OR DIFFERENT FUNCTION; CONTROL SYSTEMS SPECIALLY ADAPTED FOR HYBRID VEHICLES; ROAD VEHICLE DRIVE CONTROL SYSTEMS FOR PURPOSES NOT RELATED TO THE CONTROL OF A PARTICULAR SUB-UNIT
    • B60W50/00Details of control systems for road vehicle drive control not related to the control of a particular sub-unit, e.g. process diagnostic or vehicle driver interfaces
    • B60W50/02Ensuring safety in case of control system failures, e.g. by diagnosing, circumventing or fixing failures
    • B60W50/0205Diagnosing or detecting failures; Failure detection models
    • B60W2050/021Means for detecting failure or malfunction
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B60VEHICLES IN GENERAL
    • B60WCONJOINT CONTROL OF VEHICLE SUB-UNITS OF DIFFERENT TYPE OR DIFFERENT FUNCTION; CONTROL SYSTEMS SPECIALLY ADAPTED FOR HYBRID VEHICLES; ROAD VEHICLE DRIVE CONTROL SYSTEMS FOR PURPOSES NOT RELATED TO THE CONTROL OF A PARTICULAR SUB-UNIT
    • B60W50/00Details of control systems for road vehicle drive control not related to the control of a particular sub-unit, e.g. process diagnostic or vehicle driver interfaces
    • B60W50/06Improving the dynamic response of the control system, e.g. improving the speed of regulation or avoiding hunting or overshoot
    • B60W2050/065Improving the dynamic response of the control system, e.g. improving the speed of regulation or avoiding hunting or overshoot by reducing the computational load on the digital processor of the control computer
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00Indexing scheme relating to G06F9/00
    • G06F2209/50Indexing scheme relating to G06F9/50
    • G06F2209/509Offload

Definitions

  • This invention relates to redundant settings for Central Brain control, which controls ultra-high performance autonomous driving.
  • Patent Document 1 describes a vehicle having an automatic driving function.
  • Patent Documents [Patent Documents]
  • Patent Document 1 JP 2022-035198 A
  • a control device for controlling a vehicle may include a control unit having a plurality of internal chips disposed therein.
  • the control device may include a plurality of external chips disposed outside the control unit, the number of external chips being less than the plurality of internal chips.
  • the control device may include a management section that manages the control of the vehicle by the control unit.
  • the management section may manage the control of the vehicle using the plurality of external chips in response to the control unit satisfying a predetermined condition.
  • a first number of the external chips may be arranged outside the control unit, and a number of the internal chips arranged inside the control unit may be the theoretical number of chips in the control unit minus the first number.
  • the management section may manage the control of the vehicle using the multiple external chips in response to determining that the control unit is not functioning due to a high load.
  • the management unit may manage the control of the vehicle using further the multiple external chips in response to determining that the control unit has insufficient computing power when the control of the vehicle is being executed by the control unit.
  • the management unit may manage the control of the vehicle using the multiple external chips to start control of the vehicle if a malfunction occurs in the control unit while the control unit is controlling the vehicle.
  • 2 shows a schematic diagram of an example of the configuration of a control device 100.
  • a schematic diagram of Perfect Bell Curves is shown.
  • 1 shows an example of a hardware configuration of a computer 1200 functioning as the control device 100.
  • FIG. 1 shows an overview of the risk prediction capabilities of the ultra-high performance autonomous driving AI according to this embodiment.
  • multiple types of sensor information are converted into AI data and stored in the cloud.
  • the AI predicts and determines the best mix of situations every nanosecond, optimizing vehicle operation.
  • Figure 2 shows a schematic diagram of the Central Brain in ultra-high performance autonomous driving.
  • sensors used in this embodiment include radar, LiDAR, high-pixel, telephoto, ultra-wide-angle, 360-degree, high-performance cameras, vision recognition, fine sound, ultrasound, vibration, infrared, ultraviolet, electromagnetic waves, temperature, humidity, spot AI weather forecasts, high-precision multi-channel GPS, low-altitude satellite information, and long-tail incident AI data.
  • Long-tail incident AI data is trip data for vehicles with level 5 implementation.
  • Sensor information collected from multiple types of sensors includes the shift in the center of gravity of body weight, detection of road material, detection of outside air temperature, detection of outside air humidity, detection of the up, down, side, and diagonal inclination angle of a slope, detection of how frozen the road is, detection of the amount of moisture, detection of the material of each tire, wear condition, detection of air pressure, road width, whether or not overtaking is prohibited, oncoming vehicles, information on the vehicle models in front and behind, the cruising state of those vehicles, and surrounding conditions (birds, animals, soccer balls, wrecked vehicles, earthquakes, housework, wind, typhoons, heavy rain, light rain, blizzards, fog, etc.), and in this embodiment, these detections are performed every nanosecond.
  • the Central Brain may use this information to match the weather forecast with the highest accuracy rate for the entire road + minimum spot by AI.
  • the Central Brain may also use this information to match with the location information of other vehicles.
  • the Central Brain may also use this information to match with the best estimated vehicle model (matching the remaining amount and speed for that journey every nanosecond).
  • the Central Brain may also use this information to match with the mood of the music, etc., that the passengers are listening to.
  • the Central Brain may also use this information to instantly rearrange the conditions to change the desired mood.
  • the Central Brain may, for example, upload AI data to the cloud when the vehicle is charging.
  • a Data Lake is created, and the AI analyzes and uploads the data in an updated format.
  • Central Brain may use both software and hardware as a method to optimize vehicle traffic.
  • Central Brain uses AI to create the best mix of cloud-stored information and vehicle sensor information, and the AI makes decisions every nanosecond to realize automated driving that meets the passengers' needs.
  • the vehicle micro-controls the motor's rotation output every 1/1 billion second.
  • the vehicle is equipped with electricity and motors that can communicate and be controlled in nanoseconds.
  • AI predicts crises, making it possible to make a perfect stop without the need for braking and without spilling a cup of water. It also consumes low power and does not generate brake friction.
  • FIG. 3 shows an example of the configuration of the control device 100.
  • the control device 100 controls the vehicle.
  • the control device 100 controls the automatic driving of the vehicle.
  • the control device 100 includes a control unit 200.
  • the control unit 200 may be a Central Brain.
  • a plurality of internal chips 210 are arranged inside the control unit 200.
  • the internal chips 210 may be so-called monster chips.
  • the plurality of internal chips 210 acquire information from a plurality of types of sensors, and use the acquired information to execute processing for controlling the autonomous driving of the vehicle.
  • a plurality of external chips 220 are further arranged outside the control unit 200.
  • the control device 100 has a smaller number of external chips 220 than the plurality of internal chips 210 arranged inside the control unit 200.
  • the external chips 220 may be so-called monster chips.
  • the plurality of external chips 220 are arranged inside the external unit 300, but the arrangement of the external chips 220 is not limited to this and may be arranged in any position outside the control unit 200.
  • the control unit 200 and the external unit 300 are connected by wiring, but this is not limited to this and the external unit 300 may be directly installed outside the control unit 200.
  • the control device 100 includes a management unit 110 that manages the control of the vehicle.
  • the management unit 110 manages the control unit 200 so that the control of the vehicle is normally performed by the control unit 200, and manages the control unit 200 so that the control of the vehicle is performed using a plurality of external chips 220 when the control unit 200 satisfies a predetermined condition.
  • the management unit 110 manages the multiple internal chips 210 and the multiple external chips 220 so that, for example, when the control unit 200 satisfies a predetermined condition, the control unit 200 executes control of the vehicle using the multiple external chips 220 in addition to the multiple internal chips 210.
  • the management unit 110 manages the multiple external chips 220 so that, for example, when the control unit 200 satisfies a predetermined condition, the control unit 200 executes control of the vehicle using the multiple external chips 220 without using the multiple internal chips 210.
  • the predetermined condition may be a condition that is satisfied when it is determined that the control unit 200 is not functioning due to a high load.
  • the management unit 110 may manage to execute control of the vehicle using multiple external chips 220.
  • the predetermined condition may be a condition that is satisfied when it is determined that the control unit 200 has insufficient computing power.
  • the management unit 110 may manage the control of the vehicle to be performed using a plurality of external chips 220 in addition to the plurality of internal chips 210.
  • the predetermined condition may be a condition that is satisfied when a malfunction occurs in the control unit 200.
  • the management unit 110 may manage the control of the vehicle using the multiple external chips 220 so that if a malfunction occurs in the control unit 200 while the control of the vehicle is being executed by the control unit 200, the management unit 110 starts control of the vehicle.
  • the number of internal chips 210 and the number of external chips 220 may be determined based on the theoretical number of chips in the control unit 200.
  • the theoretical number of chips in the control unit 200 may be the number theoretically required for the control unit 200 to perform the process of controlling the vehicle.
  • the number of internal chips 210 which is the theoretical number of chips of the control unit 200 minus N, is arranged inside the control unit 200, and N external chips 220 are arranged outside the control unit 200.
  • the management unit 110 may, for example, manage the internal chips 210 and the external chips 220 so as to execute vehicle control using the internal chips 210 and the external chips 220 under normal circumstances, and manage the external chips 220 so as to execute vehicle control using only the external chips 220 out of the internal chips 210 and the external chips 220 in response to the control unit 200 satisfying a predetermined condition.
  • the management unit 110 manages the external chips 220 so as to execute vehicle control using only the external chips 220 when the control unit 200 becomes highly loaded or a malfunction occurs in the control unit 200 while the control of the vehicle is being executed using the internal chips 210 and the external chips 220.
  • the control device 100 has 55 internal chips 210 and five external chips 220. If the internal chips 210 and external chips 220 are so-called monster chips, five chips are enough to provide the minimum driving control required for driving, so that even if a malfunction occurs in the control unit 200 or the control unit 200 is unable to continue processing due to a high load, it is possible to prevent the vehicle from becoming uncontrollable. This makes it possible to control the vehicle for safe autonomous driving.
  • the number of internal chips 210 that is the theoretical value of the number of chips of the control unit 200 may be arranged inside the control unit 200, and the number of external chips 220 that is less than the theoretical value may be arranged outside the control unit 200.
  • the management unit 110 manages the multiple external chips 220 so as to execute the control of the vehicle using the multiple external chips 220 in addition to the multiple internal chips 210 in response to determining that the computing power of the control unit 200 is insufficient.
  • the control device 100 includes 60 internal chips 210 and 5 external chips 220.
  • Figure 4 shows an outline of the Perfect Speed Control achieved by the control device according to this embodiment.
  • the principle shown in Figure 4 is an index for calculating the vehicle's braking distance, and is controlled by this basic equation.
  • ultra-high performance input data is available, so calculations can be made with a neat bell curve.
  • Figure 5 shows a schematic diagram of the Perfect Bell Curves realized by the control device according to this embodiment.
  • the computational speed required to realize ultra-high performance autonomous driving is 1 million TOPS.
  • the control device may realize Perfect Cruise Control.
  • the control device may execute control according to the desires of the passengers aboard the vehicle. Examples of passenger desires include “shortest time,” “longest battery remaining,” “want to avoid car sickness as much as possible,” “want to feel G-forces the most (safely),” “want to enjoy the scenery the most with a mix of the above,” “want to enjoy a different scenery than the last time,” “for example, want to retrace the memories of a road I took with someone years ago,” “want to minimize the chance of an accident,” and the like.
  • the control device consults with the passengers about various other conditions, and executes a perfect mix with the vehicle based on the above condition selections, including the number of passengers, weight, position, and center of gravity movement of weight (calculated every nanosecond), detection of road material every nanosecond, detection of outside air humidity every nanosecond, detection of outside air humidity every nanosecond, and total every nanosecond.
  • the control device may consider and execute the following: “up, down, side, and diagonal slope of the road”, “matching with the weather forecast with the highest accuracy rate for the entire route + the smallest spot by AI”, “matching with the position information of other vehicles every nanosecond”, “matching with the best estimated vehicle type (matching the remaining amount and speed on the route every nanosecond), “matching with the mood of the music etc.
  • the position that should be taken within the width of each lane, rather than being in the middle, is entirely different. It varies depending on the speed, angle and road information at the time. For example, it performs best probability inference matching of flying birds, animals, oncoming cars, flying soccer balls, children, wrecked cars, earthquakes, fires, wind, typhoons, heavy rain, light rain, blizzards, fog and other influences every nanosecond.
  • ultra-high performance autonomous driving requires 1 million TOPs to provide the best battery power management and temperature AI synchronized burst chilling function at that time.
  • Figures 6, 7, 8, 9, 10, 11, and 12 are schematic diagrams of Perfect Cruising.
  • FIG. 13 shows a schematic diagram of an example of a hardware configuration of a computer 1200 functioning as the control device 100.
  • a program installed on the computer 1200 can cause the computer 1200 to function as one or more "parts" of the device according to the present embodiment, or to execute operations or one or more "parts” associated with the device according to the present embodiment, and/or to execute a process or steps of the process according to the present embodiment.
  • Such a program can be executed by the CPU 1212 to cause the computer 1200 to execute specific operations associated with some or all of the blocks of the flowcharts and block diagrams described herein.
  • the computer 1200 includes a CPU 1212, a RAM 1214, and a graphics controller 1216, which are interconnected by a host controller 1210.
  • the computer 1200 also includes input/output units such as a communication interface 1222, a storage device 1224, a DVD drive, and an IC card drive, which are connected to the host controller 1210 via an input/output controller 1220.
  • the DVD drive may be a DVD-ROM drive, a DVD-RAM drive, or the like.
  • the storage device 1224 may be a hard disk drive, a solid state drive, or the like.
  • the computer 1200 also includes a ROM 1230 and a legacy input/output unit such as a keyboard, which are connected to the input/output controller 1220 via an input/output chip 1240.
  • the CPU 1212 operates according to the programs stored in the ROM 1230 and the RAM 1214, thereby controlling each unit.
  • the graphics controller 1216 acquires image data generated by the CPU 1212 into a frame buffer or the like provided in the RAM 1214 or into itself, and causes the image data to be displayed on the display device 1218.
  • the communication interface 1222 communicates with other electronic devices via a network.
  • the storage device 1224 stores programs and data used by the CPU 1212 in the computer 1200.
  • the DVD drive reads programs or data from a DVD-ROM or the like and provides them to the storage device 1224.
  • the IC card drive reads programs and data from an IC card and/or writes programs and data to an IC card.
  • ROM 1230 stores therein a boot program or the like executed by computer 1200 upon activation, and/or a program that depends on the hardware of computer 1200.
  • I/O chip 1240 may also connect various I/O units to I/O controller 1220 via USB ports, parallel ports, serial ports, keyboard ports, mouse ports, etc.
  • the programs are provided by a computer-readable storage medium such as a DVD-ROM or an IC card.
  • the programs are read from the computer-readable storage medium, installed in storage device 1224, RAM 1214, or ROM 1230, which are also examples of computer-readable storage media, and executed by CPU 1212.
  • the information processing described in these programs is read by computer 1200, and brings about cooperation between the programs and the various types of hardware resources described above.
  • An apparatus or method may be constructed by realizing the operation or processing of information according to the use of computer 1200.
  • CPU 1212 may execute a communication program loaded into RAM 1214 and instruct communication interface 1222 to perform communication processing based on the processing described in the communication program.
  • communication interface 1222 reads transmission data stored in a transmission buffer area provided in RAM 1214, storage device 1224, a DVD-ROM, or a recording medium such as an IC card, and transmits the read transmission data to the network, or writes received data received from the network to a reception buffer area or the like provided on the recording medium.
  • the CPU 1212 may also cause all or a necessary portion of a file or database stored in an external recording medium such as the storage device 1224, a DVD drive (DVD-ROM), an IC card, etc. to be read into the RAM 1214, and perform various types of processing on the data on the RAM 1214. The CPU 1212 may then write back the processed data to the external recording medium.
  • an external recording medium such as the storage device 1224, a DVD drive (DVD-ROM), an IC card, etc.
  • CPU 1212 may perform various types of processing on data read from RAM 1214, including various types of operations, information processing, conditional judgment, conditional branching, unconditional branching, information search/replacement, etc., as described throughout this disclosure and specified by the instruction sequence of the program, and write back the results to RAM 1214.
  • CPU 1212 may also search for information in a file, database, etc. in the recording medium.
  • CPU 1212 may search for an entry whose attribute value of the first attribute matches a specified condition from among the multiple entries, read the attribute value of the second attribute stored in the entry, and thereby obtain the attribute value of the second attribute associated with the first attribute that satisfies a predetermined condition.
  • the above-described programs or software modules may be stored in a computer-readable storage medium on the computer 1200 or in the vicinity of the computer 1200.
  • a recording medium such as a hard disk or RAM provided in a server system connected to a dedicated communication network or the Internet can be used as a computer-readable storage medium, thereby providing the programs to the computer 1200 via the network.
  • the blocks in the flowcharts and block diagrams in this embodiment may represent stages of a process where an operation is performed or "parts" of a device responsible for performing the operation. Particular stages and “parts" may be implemented by dedicated circuitry, programmable circuitry provided with computer-readable instructions stored on a computer-readable storage medium, and/or a processor provided with computer-readable instructions stored on a computer-readable storage medium.
  • the dedicated circuitry may include digital and/or analog hardware circuitry and may include integrated circuits (ICs) and/or discrete circuits.
  • the programmable circuitry may include reconfigurable hardware circuitry including AND, OR, XOR, NAND, NOR, and other logical operations, flip-flops, registers, and memory elements, such as, for example, field programmable gate arrays (FPGAs) and programmable logic arrays (PLAs).
  • FPGAs field programmable gate arrays
  • PDAs programmable logic arrays
  • a computer-readable storage medium may include any tangible device capable of storing instructions that are executed by a suitable device, such that a computer-readable storage medium having instructions stored thereon comprises an article of manufacture that includes instructions that can be executed to create means for performing the operations specified in the flowchart or block diagram.
  • Examples of computer-readable storage media may include electronic storage media, magnetic storage media, optical storage media, electromagnetic storage media, semiconductor storage media, and the like.
  • Computer-readable storage media may include floppy disks, diskettes, hard disks, random access memories (RAMs), read-only memories (ROMs), erasable programmable read-only memories (EPROMs or flash memories), electrically erasable programmable read-only memories (EEPROMs), static random access memories (SRAMs), compact disk read-only memories (CD-ROMs), digital versatile disks (DVDs), Blu-ray disks, memory sticks, integrated circuit cards, and the like.
  • RAMs random access memories
  • ROMs read-only memories
  • EPROMs or flash memories erasable programmable read-only memories
  • EEPROMs electrically erasable programmable read-only memories
  • SRAMs static random access memories
  • CD-ROMs compact disk read-only memories
  • DVDs digital versatile disks
  • Blu-ray disks memory sticks, integrated circuit cards, and the like.
  • the computer readable instructions may include either assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source or object code written in any combination of one or more programming languages, including object-oriented programming languages such as Smalltalk (registered trademark), JAVA (registered trademark), C++, etc., and conventional procedural programming languages such as the "C" programming language or similar programming languages.
  • ISA instruction set architecture
  • machine instructions machine-dependent instructions
  • microcode firmware instructions
  • state setting data or source or object code written in any combination of one or more programming languages, including object-oriented programming languages such as Smalltalk (registered trademark), JAVA (registered trademark), C++, etc., and conventional procedural programming languages such as the "C" programming language or similar programming languages.
  • the computer-readable instructions may be provided to a processor of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus, or to a programmable circuit, either locally or over a local area network (LAN), a wide area network (WAN) such as the Internet, so that the processor of the general-purpose computer, special-purpose computer, or other programmable data processing apparatus, or to a programmable circuit, executes the computer-readable instructions to generate means for performing the operations specified in the flowcharts or block diagrams.
  • processors include computer processors, processing units, microprocessors, digital signal processors, controllers, microcontrollers, etc.
  • Control device 110 Management unit, 200 Control unit, 210 Internal chip, 220 External chip, 1200 Computer, 1210 Host controller, 1212 CPU, 1214 RAM, 1216 Graphic controller, 1218 Display device, 1220 Input/output controller, 1222 Communication interface, 1224 Storage device, 1230 ROM, 1240 Input/output chip

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  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Automation & Control Theory (AREA)
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PCT/JP2023/037522 2022-10-27 2023-10-17 Central Brain制御の冗長設定 Ceased WO2024090288A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN202380075238.8A CN120112893A (zh) 2022-10-27 2023-10-17 中央大脑控制的冗余设定
EP23882493.2A EP4610825A4 (en) 2022-10-27 2023-10-17 REDUNDANCY SETTING FOR CENTRAL BRAIN CONTROL
JP2024552989A JPWO2024090288A1 (https=) 2022-10-27 2023-10-17

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JP2022-172447 2022-10-27
JP2022172447 2022-10-27

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